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Sat, 31 Dec 2022 18:14:31 -0500 (EST) From: Samuel Holland To: Chen-Yu Tsai , Jernej Skrabec , Michael Turquette , Stephen Boyd Cc: Samuel Holland , Albert Ou , Krzysztof Kozlowski , Palmer Dabbelt , Paul Walmsley , Philipp Zabel , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-sunxi@lists.linux.dev Subject: [PATCH v2 1/6] clk: sunxi-ng: Remove duplicate ARCH_SUNXI dependencies Date: Sat, 31 Dec 2022 17:14:24 -0600 Message-Id: <20221231231429.18357-2-samuel@sholland.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221231231429.18357-1-samuel@sholland.org> References: <20221231231429.18357-1-samuel@sholland.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221231_151436_522888_14BB8AC4 X-CRM114-Status: UNSURE ( 9.00 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org SUNXI_CCU already depends on ARCH_SUNXI, so adding the dependency to individual SoC drivers is redundant. Drivers stay disabled under COMPILE_TEST because of the `default ARCH_SUNXI` applied to SUNXI_CCU. Acked-by: Jernej Skrabec Signed-off-by: Samuel Holland --- (no changes since v1) drivers/clk/sunxi-ng/Kconfig | 43 ++++++++++++++++++------------------ 1 file changed, 21 insertions(+), 22 deletions(-) diff --git a/drivers/clk/sunxi-ng/Kconfig b/drivers/clk/sunxi-ng/Kconfig index 461537679c04..64cfa022e320 100644 --- a/drivers/clk/sunxi-ng/Kconfig +++ b/drivers/clk/sunxi-ng/Kconfig @@ -14,43 +14,43 @@ config SUNIV_F1C100S_CCU config SUN20I_D1_CCU tristate "Support for the Allwinner D1 CCU" - default RISCV && ARCH_SUNXI - depends on (RISCV && ARCH_SUNXI) || COMPILE_TEST + default RISCV + depends on RISCV || COMPILE_TEST config SUN20I_D1_R_CCU tristate "Support for the Allwinner D1 PRCM CCU" - default RISCV && ARCH_SUNXI - depends on (RISCV && ARCH_SUNXI) || COMPILE_TEST + default RISCV + depends on RISCV || COMPILE_TEST config SUN50I_A64_CCU tristate "Support for the Allwinner A64 CCU" - default ARM64 && ARCH_SUNXI - depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST + default ARM64 + depends on ARM64 || COMPILE_TEST config SUN50I_A100_CCU tristate "Support for the Allwinner A100 CCU" - default ARM64 && ARCH_SUNXI - depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST + default ARM64 + depends on ARM64 || COMPILE_TEST config SUN50I_A100_R_CCU tristate "Support for the Allwinner A100 PRCM CCU" - default ARM64 && ARCH_SUNXI - depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST + default ARM64 + depends on ARM64 || COMPILE_TEST config SUN50I_H6_CCU tristate "Support for the Allwinner H6 CCU" - default ARM64 && ARCH_SUNXI - depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST + default ARM64 + depends on ARM64 || COMPILE_TEST config SUN50I_H616_CCU tristate "Support for the Allwinner H616 CCU" - default ARM64 && ARCH_SUNXI - depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST + default ARM64 + depends on ARM64 || COMPILE_TEST config SUN50I_H6_R_CCU tristate "Support for the Allwinner H6 and H616 PRCM CCU" - default ARM64 && ARCH_SUNXI - depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST + default ARM64 + depends on ARM64 || COMPILE_TEST config SUN4I_A10_CCU tristate "Support for the Allwinner A10/A20 CCU" @@ -71,8 +71,7 @@ config SUN6I_A31_CCU config SUN6I_RTC_CCU tristate "Support for the Allwinner H616/R329 RTC CCU" - default ARCH_SUNXI - depends on ARCH_SUNXI || COMPILE_TEST + default y config SUN8I_A23_CCU tristate "Support for the Allwinner A23 CCU" @@ -91,8 +90,8 @@ config SUN8I_A83T_CCU config SUN8I_H3_CCU tristate "Support for the Allwinner H3 CCU" - default MACH_SUN8I || (ARM64 && ARCH_SUNXI) - depends on MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST + default MACH_SUN8I || ARM64 + depends on MACH_SUN8I || ARM64 || COMPILE_TEST config SUN8I_V3S_CCU tristate "Support for the Allwinner V3s CCU" @@ -101,7 +100,7 @@ config SUN8I_V3S_CCU config SUN8I_DE2_CCU tristate "Support for the Allwinner SoCs DE2 CCU" - default MACH_SUN8I || (ARM64 && ARCH_SUNXI) + default MACH_SUN8I || ARM64 config SUN8I_R40_CCU tristate "Support for the Allwinner R40 CCU" @@ -115,6 +114,6 @@ config SUN9I_A80_CCU config SUN8I_R_CCU tristate "Support for Allwinner SoCs' PRCM CCUs" - default MACH_SUN8I || (ARCH_SUNXI && ARM64) + default MACH_SUN8I || ARM64 endif From patchwork Sat Dec 31 23:14:25 2022 Content-Type: text/plain; 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Sat, 31 Dec 2022 18:14:32 -0500 (EST) From: Samuel Holland To: Chen-Yu Tsai , Jernej Skrabec , Michael Turquette , Stephen Boyd Cc: Samuel Holland , Albert Ou , Krzysztof Kozlowski , Palmer Dabbelt , Paul Walmsley , Philipp Zabel , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-sunxi@lists.linux.dev Subject: [PATCH v2 2/6] clk: sunxi-ng: Move SoC driver conditions to dependencies Date: Sat, 31 Dec 2022 17:14:25 -0600 Message-Id: <20221231231429.18357-3-samuel@sholland.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221231231429.18357-1-samuel@sholland.org> References: <20221231231429.18357-1-samuel@sholland.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221231_151436_545456_9C0C805B X-CRM114-Status: GOOD ( 10.21 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Do not duplicate the same expression on the `default` line, so the two lines do not need to be kept in sync. Drivers stay disabled under COMPILE_TEST because of the `default ARCH_SUNXI` applied to SUNXI_CCU. Three drivers had no conditions. - SUN6I_RTC_CCU and SUN8I_DE2_CCU are used on current hardware regardless of CPU architecture. - SUN8I_R_CCU is only used on pre-H6 SoCs, which means no RISCV SoCs. Acked-by: Jernej Skrabec Signed-off-by: Samuel Holland --- (no changes since v1) drivers/clk/sunxi-ng/Kconfig | 46 +++++++++++++++++++----------------- 1 file changed, 24 insertions(+), 22 deletions(-) diff --git a/drivers/clk/sunxi-ng/Kconfig b/drivers/clk/sunxi-ng/Kconfig index 64cfa022e320..78deee2996ce 100644 --- a/drivers/clk/sunxi-ng/Kconfig +++ b/drivers/clk/sunxi-ng/Kconfig @@ -9,111 +9,113 @@ if SUNXI_CCU config SUNIV_F1C100S_CCU tristate "Support for the Allwinner newer F1C100s CCU" - default MACH_SUNIV + default y depends on MACH_SUNIV || COMPILE_TEST config SUN20I_D1_CCU tristate "Support for the Allwinner D1 CCU" - default RISCV + default y depends on RISCV || COMPILE_TEST config SUN20I_D1_R_CCU tristate "Support for the Allwinner D1 PRCM CCU" - default RISCV + default y depends on RISCV || COMPILE_TEST config SUN50I_A64_CCU tristate "Support for the Allwinner A64 CCU" - default ARM64 + default y depends on ARM64 || COMPILE_TEST config SUN50I_A100_CCU tristate "Support for the Allwinner A100 CCU" - default ARM64 + default y depends on ARM64 || COMPILE_TEST config SUN50I_A100_R_CCU tristate "Support for the Allwinner A100 PRCM CCU" - default ARM64 + default y depends on ARM64 || COMPILE_TEST config SUN50I_H6_CCU tristate "Support for the Allwinner H6 CCU" - default ARM64 + default y depends on ARM64 || COMPILE_TEST config SUN50I_H616_CCU tristate "Support for the Allwinner H616 CCU" - default ARM64 + default y depends on ARM64 || COMPILE_TEST config SUN50I_H6_R_CCU tristate "Support for the Allwinner H6 and H616 PRCM CCU" - default ARM64 + default y depends on ARM64 || COMPILE_TEST config SUN4I_A10_CCU tristate "Support for the Allwinner A10/A20 CCU" - default MACH_SUN4I - default MACH_SUN7I + default y depends on MACH_SUN4I || MACH_SUN7I || COMPILE_TEST config SUN5I_CCU bool "Support for the Allwinner sun5i family CCM" - default MACH_SUN5I + default y depends on MACH_SUN5I || COMPILE_TEST depends on SUNXI_CCU=y config SUN6I_A31_CCU tristate "Support for the Allwinner A31/A31s CCU" - default MACH_SUN6I + default y depends on MACH_SUN6I || COMPILE_TEST config SUN6I_RTC_CCU tristate "Support for the Allwinner H616/R329 RTC CCU" default y + depends on MACH_SUN8I || ARM64 || RISCV || COMPILE_TEST config SUN8I_A23_CCU tristate "Support for the Allwinner A23 CCU" - default MACH_SUN8I + default y depends on MACH_SUN8I || COMPILE_TEST config SUN8I_A33_CCU tristate "Support for the Allwinner A33 CCU" - default MACH_SUN8I + default y depends on MACH_SUN8I || COMPILE_TEST config SUN8I_A83T_CCU tristate "Support for the Allwinner A83T CCU" - default MACH_SUN8I + default y depends on MACH_SUN8I || COMPILE_TEST config SUN8I_H3_CCU tristate "Support for the Allwinner H3 CCU" - default MACH_SUN8I || ARM64 + default y depends on MACH_SUN8I || ARM64 || COMPILE_TEST config SUN8I_V3S_CCU tristate "Support for the Allwinner V3s CCU" - default MACH_SUN8I + default y depends on MACH_SUN8I || COMPILE_TEST config SUN8I_DE2_CCU tristate "Support for the Allwinner SoCs DE2 CCU" - default MACH_SUN8I || ARM64 + default y + depends on MACH_SUN8I || ARM64 || RISCV || COMPILE_TEST config SUN8I_R40_CCU tristate "Support for the Allwinner R40 CCU" - default MACH_SUN8I + default y depends on MACH_SUN8I || COMPILE_TEST config SUN9I_A80_CCU tristate "Support for the Allwinner A80 CCU" - default MACH_SUN9I + default y depends on MACH_SUN9I || COMPILE_TEST config SUN8I_R_CCU tristate "Support for Allwinner SoCs' PRCM CCUs" - default MACH_SUN8I || ARM64 + default y + depends on MACH_SUN8I || ARM64 || COMPILE_TEST endif From patchwork Sat Dec 31 23:14:26 2022 Content-Type: text/plain; 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Sat, 31 Dec 2022 18:14:33 -0500 (EST) From: Samuel Holland To: Chen-Yu Tsai , Jernej Skrabec , Michael Turquette , Stephen Boyd Cc: Samuel Holland , Albert Ou , Krzysztof Kozlowski , Palmer Dabbelt , Paul Walmsley , Philipp Zabel , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-sunxi@lists.linux.dev, Andre Przywara Subject: [PATCH v2 3/6] clk: sunxi-ng: d1: Allow building for R528/T113 Date: Sat, 31 Dec 2022 17:14:26 -0600 Message-Id: <20221231231429.18357-4-samuel@sholland.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221231231429.18357-1-samuel@sholland.org> References: <20221231231429.18357-1-samuel@sholland.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221231_151436_535549_07F250A5 X-CRM114-Status: UNSURE ( 9.17 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Allwinner released some 32-bit ARM (sun8i) SoCs which use the same CCU as D1. Allow them to reuse the driver. Acked-by: Jernej Skrabec Reviewed-by: Andre Przywara Signed-off-by: Samuel Holland --- (no changes since v1) drivers/clk/sunxi-ng/Kconfig | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/clk/sunxi-ng/Kconfig b/drivers/clk/sunxi-ng/Kconfig index 78deee2996ce..b547198a2c65 100644 --- a/drivers/clk/sunxi-ng/Kconfig +++ b/drivers/clk/sunxi-ng/Kconfig @@ -13,14 +13,14 @@ config SUNIV_F1C100S_CCU depends on MACH_SUNIV || COMPILE_TEST config SUN20I_D1_CCU - tristate "Support for the Allwinner D1 CCU" + tristate "Support for the Allwinner D1/R528/T113 CCU" default y - depends on RISCV || COMPILE_TEST + depends on MACH_SUN8I || RISCV || COMPILE_TEST config SUN20I_D1_R_CCU - tristate "Support for the Allwinner D1 PRCM CCU" + tristate "Support for the Allwinner D1/R528/T113 PRCM CCU" default y - depends on RISCV || COMPILE_TEST + depends on MACH_SUN8I || RISCV || COMPILE_TEST config SUN50I_A64_CCU tristate "Support for the Allwinner A64 CCU" From patchwork Sat Dec 31 23:14:27 2022 Content-Type: text/plain; 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Sat, 31 Dec 2022 18:14:35 -0500 (EST) From: Samuel Holland To: Chen-Yu Tsai , Jernej Skrabec , Michael Turquette , Stephen Boyd Cc: Samuel Holland , Albert Ou , Krzysztof Kozlowski , Palmer Dabbelt , Paul Walmsley , Philipp Zabel , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-sunxi@lists.linux.dev, =?utf-8?b?QW5kcsOhcyBTemVtesWR?= , Andre Przywara Subject: [PATCH v2 4/6] clk: sunxi-ng: d1: Mark cpux clock as critical Date: Sat, 31 Dec 2022 17:14:27 -0600 Message-Id: <20221231231429.18357-5-samuel@sholland.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221231231429.18357-1-samuel@sholland.org> References: <20221231231429.18357-1-samuel@sholland.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221231_151437_593915_DD7D16CE X-CRM114-Status: GOOD ( 12.59 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: András Szemző Some SoCs in the D1 family feature ARM CPUs instead of a RISC-V CPU. In that case, the CPUs are driven from the 'cpux' clock, so it needs to be marked as critical, since there is no consumer when DVFS is disabled. This matches the drivers for other SoCs, and the "riscv" clock in this driver. Signed-off-by: András Szemző Acked-by: Jernej Skrabec Reviewed-by: Andre Przywara Signed-off-by: Samuel Holland --- Changes in v2: - Expand commit message drivers/clk/sunxi-ng/ccu-sun20i-d1.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun20i-d1.c b/drivers/clk/sunxi-ng/ccu-sun20i-d1.c index 8ef3cdeb7962..c5a7df93602c 100644 --- a/drivers/clk/sunxi-ng/ccu-sun20i-d1.c +++ b/drivers/clk/sunxi-ng/ccu-sun20i-d1.c @@ -240,7 +240,7 @@ static const struct clk_parent_data cpux_parents[] = { { .hw = &pll_periph0_800M_clk.common.hw }, }; static SUNXI_CCU_MUX_DATA(cpux_clk, "cpux", cpux_parents, - 0x500, 24, 3, CLK_SET_RATE_PARENT); + 0x500, 24, 3, CLK_SET_RATE_PARENT | CLK_IS_CRITICAL); static const struct clk_hw *cpux_hws[] = { &cpux_clk.common.hw }; static SUNXI_CCU_M_HWS(cpux_axi_clk, "cpux-axi", From patchwork Sat Dec 31 23:14:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 13086249 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7C310C4332F for ; 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Sat, 31 Dec 2022 18:14:37 -0500 (EST) From: Samuel Holland To: Chen-Yu Tsai , Jernej Skrabec , Michael Turquette , Stephen Boyd Cc: Samuel Holland , Albert Ou , Krzysztof Kozlowski , Palmer Dabbelt , Paul Walmsley , Philipp Zabel , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-sunxi@lists.linux.dev, Andre Przywara Subject: [PATCH v2 5/6] dt-bindings: clock: Add D1 CAN bus gates and resets Date: Sat, 31 Dec 2022 17:14:28 -0600 Message-Id: <20221231231429.18357-6-samuel@sholland.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221231231429.18357-1-samuel@sholland.org> References: <20221231231429.18357-1-samuel@sholland.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221231_151438_995151_979DB075 X-CRM114-Status: UNSURE ( 9.12 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The D1 CCU contains gates and resets for two CAN buses. While the CAN bus controllers are only documented for the T113 SoC, the CCU is the same across all SoC variants. Reviewed-by: Andre Przywara Signed-off-by: Samuel Holland Acked-by: Krzysztof Kozlowski Acked-by: Philipp Zabel --- Changes in v2: - Move dt-bindings header changes to a separate patch include/dt-bindings/clock/sun20i-d1-ccu.h | 2 ++ include/dt-bindings/reset/sun20i-d1-ccu.h | 2 ++ 2 files changed, 4 insertions(+) diff --git a/include/dt-bindings/clock/sun20i-d1-ccu.h b/include/dt-bindings/clock/sun20i-d1-ccu.h index e3ac53315e1a..e143b9929763 100644 --- a/include/dt-bindings/clock/sun20i-d1-ccu.h +++ b/include/dt-bindings/clock/sun20i-d1-ccu.h @@ -152,5 +152,7 @@ #define CLK_FANOUT0 142 #define CLK_FANOUT1 143 #define CLK_FANOUT2 144 +#define CLK_BUS_CAN0 145 +#define CLK_BUS_CAN1 146 #endif /* _DT_BINDINGS_CLK_SUN20I_D1_CCU_H_ */ diff --git a/include/dt-bindings/reset/sun20i-d1-ccu.h b/include/dt-bindings/reset/sun20i-d1-ccu.h index de9ff5203239..f8001cf50bf1 100644 --- a/include/dt-bindings/reset/sun20i-d1-ccu.h +++ b/include/dt-bindings/reset/sun20i-d1-ccu.h @@ -73,5 +73,7 @@ #define RST_BUS_DSP_CFG 63 #define RST_BUS_DSP_DBG 64 #define RST_BUS_RISCV_CFG 65 +#define RST_BUS_CAN0 66 +#define RST_BUS_CAN1 67 #endif /* _DT_BINDINGS_RST_SUN20I_D1_CCU_H_ */ From patchwork Sat Dec 31 23:14:29 2022 Content-Type: text/plain; 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Sat, 31 Dec 2022 18:14:38 -0500 (EST) From: Samuel Holland To: Chen-Yu Tsai , Jernej Skrabec , Michael Turquette , Stephen Boyd Cc: Samuel Holland , Albert Ou , Krzysztof Kozlowski , Palmer Dabbelt , Paul Walmsley , Philipp Zabel , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-sunxi@lists.linux.dev, Fabien Poussin , Andre Przywara Subject: [PATCH v2 6/6] clk: sunxi-ng: d1: Add CAN bus gates and resets Date: Sat, 31 Dec 2022 17:14:29 -0600 Message-Id: <20221231231429.18357-7-samuel@sholland.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221231231429.18357-1-samuel@sholland.org> References: <20221231231429.18357-1-samuel@sholland.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221231_151440_187929_12EEE5E0 X-CRM114-Status: GOOD ( 13.07 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Fabien Poussin The D1 CCU contains gates and resets for two CAN buses. While the CAN bus controllers are only documented for the T113 SoC, the CCU is the same across all SoC variants. Signed-off-by: Fabien Poussin Reviewed-by: Andre Przywara Signed-off-by: Samuel Holland Acked-by: Jernej Skrabec --- Changes in v2: - Move dt-bindings header changes to a separate patch drivers/clk/sunxi-ng/ccu-sun20i-d1.c | 11 +++++++++++ drivers/clk/sunxi-ng/ccu-sun20i-d1.h | 2 +- 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun20i-d1.c b/drivers/clk/sunxi-ng/ccu-sun20i-d1.c index c5a7df93602c..48a8fb2c43b7 100644 --- a/drivers/clk/sunxi-ng/ccu-sun20i-d1.c +++ b/drivers/clk/sunxi-ng/ccu-sun20i-d1.c @@ -469,6 +469,11 @@ static SUNXI_CCU_GATE_HWS(bus_i2c2_clk, "bus-i2c2", apb1_hws, static SUNXI_CCU_GATE_HWS(bus_i2c3_clk, "bus-i2c3", apb1_hws, 0x91c, BIT(3), 0); +static SUNXI_CCU_GATE_HWS(bus_can0_clk, "bus-can0", apb1_hws, + 0x92c, BIT(0), 0); +static SUNXI_CCU_GATE_HWS(bus_can1_clk, "bus-can1", apb1_hws, + 0x92c, BIT(1), 0); + static const struct clk_parent_data spi_parents[] = { { .fw_name = "hosc" }, { .hw = &pll_periph0_clk.hw }, @@ -997,6 +1002,8 @@ static struct ccu_common *sun20i_d1_ccu_clks[] = { &bus_i2c1_clk.common, &bus_i2c2_clk.common, &bus_i2c3_clk.common, + &bus_can0_clk.common, + &bus_can1_clk.common, &spi0_clk.common, &spi1_clk.common, &bus_spi0_clk.common, @@ -1147,6 +1154,8 @@ static struct clk_hw_onecell_data sun20i_d1_hw_clks = { [CLK_BUS_I2C1] = &bus_i2c1_clk.common.hw, [CLK_BUS_I2C2] = &bus_i2c2_clk.common.hw, [CLK_BUS_I2C3] = &bus_i2c3_clk.common.hw, + [CLK_BUS_CAN0] = &bus_can0_clk.common.hw, + [CLK_BUS_CAN1] = &bus_can1_clk.common.hw, [CLK_SPI0] = &spi0_clk.common.hw, [CLK_SPI1] = &spi1_clk.common.hw, [CLK_BUS_SPI0] = &bus_spi0_clk.common.hw, @@ -1252,6 +1261,8 @@ static struct ccu_reset_map sun20i_d1_ccu_resets[] = { [RST_BUS_I2C1] = { 0x91c, BIT(17) }, [RST_BUS_I2C2] = { 0x91c, BIT(18) }, [RST_BUS_I2C3] = { 0x91c, BIT(19) }, + [RST_BUS_CAN0] = { 0x92c, BIT(16) }, + [RST_BUS_CAN1] = { 0x92c, BIT(17) }, [RST_BUS_SPI0] = { 0x96c, BIT(16) }, [RST_BUS_SPI1] = { 0x96c, BIT(17) }, [RST_BUS_EMAC] = { 0x97c, BIT(16) }, diff --git a/drivers/clk/sunxi-ng/ccu-sun20i-d1.h b/drivers/clk/sunxi-ng/ccu-sun20i-d1.h index e303176f0d4e..b14da36e2537 100644 --- a/drivers/clk/sunxi-ng/ccu-sun20i-d1.h +++ b/drivers/clk/sunxi-ng/ccu-sun20i-d1.h @@ -10,6 +10,6 @@ #include #include -#define CLK_NUMBER (CLK_FANOUT2 + 1) +#define CLK_NUMBER (CLK_BUS_CAN1 + 1) #endif /* _CCU_SUN20I_D1_H_ */