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Mon, 2 Jan 2023 20:09:08 -0500 (EST) From: Samuel Holland To: Joerg Roedel , Will Deacon , Robin Murphy , Chen-Yu Tsai , Jernej Skrabec , Krzysztof Kozlowski , Rob Herring Cc: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Maxime Ripard , Samuel Holland Subject: [PATCH v2 1/6] dt-bindings: iommu: sun50i: Add compatible for Allwinner D1 Date: Mon, 2 Jan 2023 19:08:58 -0600 Message-Id: <20230103010903.11181-2-samuel@sholland.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20230103010903.11181-1-samuel@sholland.org> References: <20230103010903.11181-1-samuel@sholland.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230102_170915_631969_9619BACC X-CRM114-Status: GOOD ( 11.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org D1 contains an IOMMU similar to the one in the H6 SoC, but the D1 variant has no external reset signal. Signed-off-by: Samuel Holland Reviewed-by: Rob Herring --- Changes in v2: - Disallow the 'resets' property for the D1 variant .../iommu/allwinner,sun50i-h6-iommu.yaml | 20 +++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml b/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml index e20016f12017..5aeea10cf899 100644 --- a/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml +++ b/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml @@ -17,7 +17,9 @@ properties: The content of the cell is the master ID. compatible: - const: allwinner,sun50i-h6-iommu + enum: + - allwinner,sun20i-d1-iommu + - allwinner,sun50i-h6-iommu reg: maxItems: 1 @@ -37,7 +39,21 @@ required: - reg - interrupts - clocks - - resets + +if: + properties: + compatible: + contains: + enum: + - allwinner,sun50i-h6-iommu + +then: + required: + - resets + +else: + properties: + resets: false additionalProperties: false From patchwork Tue Jan 3 01:08:59 2023 Content-Type: text/plain; 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Mon, 2 Jan 2023 20:09:10 -0500 (EST) From: Samuel Holland To: Joerg Roedel , Will Deacon , Robin Murphy , Chen-Yu Tsai , Jernej Skrabec , Krzysztof Kozlowski , Rob Herring Cc: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Maxime Ripard , Samuel Holland Subject: [PATCH v2 2/6] iommu/sun50i: Track masters attached to the domain Date: Mon, 2 Jan 2023 19:08:59 -0600 Message-Id: <20230103010903.11181-3-samuel@sholland.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20230103010903.11181-1-samuel@sholland.org> References: <20230103010903.11181-1-samuel@sholland.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230102_170915_642673_3EA78CB3 X-CRM114-Status: GOOD ( 19.52 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The refcount logic here is broken. The refcount is initialized to 1 with no devices attached, so it will be decremented back to 1 when the last device is detached. However, refcount_dec_and_test() returns true only when the refcount gets decremented to zero, so the domain will never be cleaned up, and the hardware will never be disabled. Replace the refcount with a mask of masters attached to the domain. The domain can be cleaned up when the last master detaches. This mask is also necessary to correctly set the bypass register. Fixes: 4100b8c229b3 ("iommu: Add Allwinner H6 IOMMU driver") Signed-off-by: Samuel Holland Reviewed-by: Jernej Skrabec --- Changes in v2: - New patch for v2 drivers/iommu/sun50i-iommu.c | 28 +++++++++++++--------------- 1 file changed, 13 insertions(+), 15 deletions(-) diff --git a/drivers/iommu/sun50i-iommu.c b/drivers/iommu/sun50i-iommu.c index 5b585eace3d4..3757d5a18318 100644 --- a/drivers/iommu/sun50i-iommu.c +++ b/drivers/iommu/sun50i-iommu.c @@ -114,8 +114,8 @@ struct sun50i_iommu { struct sun50i_iommu_domain { struct iommu_domain domain; - /* Number of devices attached to the domain */ - refcount_t refcnt; + /* Mask of masters attached to this domain */ + atomic_t masters; /* L1 Page Table */ u32 *dt; @@ -684,8 +684,6 @@ static struct iommu_domain *sun50i_iommu_domain_alloc(unsigned type) if (!sun50i_domain->dt) goto err_free_domain; - refcount_set(&sun50i_domain->refcnt, 1); - sun50i_domain->domain.geometry.aperture_start = 0; sun50i_domain->domain.geometry.aperture_end = DMA_BIT_MASK(32); sun50i_domain->domain.geometry.force_aperture = true; @@ -760,23 +758,27 @@ static void sun50i_iommu_detach_domain(struct sun50i_iommu *iommu, static void sun50i_iommu_detach_device(struct iommu_domain *domain, struct device *dev) { + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); struct sun50i_iommu_domain *sun50i_domain = to_sun50i_domain(domain); struct sun50i_iommu *iommu = dev_iommu_priv_get(dev); + int masters = 0; dev_dbg(dev, "Detaching from IOMMU domain\n"); - if (iommu->domain != domain) - return; + for (unsigned int i = 0; i < fwspec->num_ids; i++) + masters |= BIT(fwspec->ids[i]); - if (refcount_dec_and_test(&sun50i_domain->refcnt)) + if (atomic_fetch_andnot(masters, &sun50i_domain->masters) == masters) sun50i_iommu_detach_domain(iommu, sun50i_domain); } static int sun50i_iommu_attach_device(struct iommu_domain *domain, struct device *dev) { + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); struct sun50i_iommu_domain *sun50i_domain = to_sun50i_domain(domain); struct sun50i_iommu *iommu; + int masters = 0; iommu = sun50i_iommu_from_dev(dev); if (!iommu) @@ -784,15 +786,11 @@ static int sun50i_iommu_attach_device(struct iommu_domain *domain, dev_dbg(dev, "Attaching to IOMMU domain\n"); - refcount_inc(&sun50i_domain->refcnt); - - if (iommu->domain == domain) - return 0; - - if (iommu->domain) - sun50i_iommu_detach_device(iommu->domain, dev); + for (unsigned int i = 0; i < fwspec->num_ids; i++) + masters |= BIT(fwspec->ids[i]); - sun50i_iommu_attach_domain(iommu, sun50i_domain); + if (atomic_fetch_or(masters, &sun50i_domain->masters) == 0) + sun50i_iommu_attach_domain(iommu, sun50i_domain); return 0; } From patchwork Tue Jan 3 01:09:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 13087063 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 42CD4C3DA7A for ; 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Mon, 2 Jan 2023 20:09:13 -0500 (EST) From: Samuel Holland To: Joerg Roedel , Will Deacon , Robin Murphy , Chen-Yu Tsai , Jernej Skrabec , Krzysztof Kozlowski , Rob Herring Cc: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Maxime Ripard , Samuel Holland Subject: [PATCH v2 3/6] iommu/sun50i: Keep the bypass register up to date Date: Mon, 2 Jan 2023 19:09:00 -0600 Message-Id: <20230103010903.11181-4-samuel@sholland.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20230103010903.11181-1-samuel@sholland.org> References: <20230103010903.11181-1-samuel@sholland.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230102_170916_608115_E9B73A8E X-CRM114-Status: GOOD ( 13.87 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Currently, the IOMMU driver leaves the bypass register at its default value. The H6 variant of the hardware disables bypass by default. So once the first device is attached to the IOMMU, translation is enabled for all masters, even those not attached to an IOMMU group/domain. On the other hand, the D1 hardware variant enables bypass by default, so keeping the default value prevents the IOMMU from functioning entirely. Fixes: 4100b8c229b3 ("iommu: Add Allwinner H6 IOMMU driver") Signed-off-by: Samuel Holland Reviewed-by: Jernej Skrabec --- Changes in v2: - Set bypass based on attached devices instead of using a fixed value drivers/iommu/sun50i-iommu.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/iommu/sun50i-iommu.c b/drivers/iommu/sun50i-iommu.c index 3757d5a18318..a3a462933c62 100644 --- a/drivers/iommu/sun50i-iommu.c +++ b/drivers/iommu/sun50i-iommu.c @@ -441,6 +441,9 @@ static int sun50i_iommu_enable(struct sun50i_iommu *iommu) spin_lock_irqsave(&iommu->iommu_lock, flags); + iommu_write(iommu, IOMMU_BYPASS_REG, + ~atomic_read(&sun50i_domain->masters)); + iommu_write(iommu, IOMMU_TTB_REG, sun50i_domain->dt_dma); iommu_write(iommu, IOMMU_TLB_PREFETCH_REG, IOMMU_TLB_PREFETCH_MASTER_ENABLE(0) | @@ -755,6 +758,17 @@ static void sun50i_iommu_detach_domain(struct sun50i_iommu *iommu, iommu->domain = NULL; } +static void sun50i_iommu_update_masters(struct sun50i_iommu *iommu, + struct sun50i_iommu_domain *sun50i_domain) +{ + unsigned long flags; + + spin_lock_irqsave(&iommu->iommu_lock, flags); + iommu_write(iommu, IOMMU_BYPASS_REG, + ~atomic_read(&sun50i_domain->masters)); + spin_unlock_irqrestore(&iommu->iommu_lock, flags); +} + static void sun50i_iommu_detach_device(struct iommu_domain *domain, struct device *dev) { @@ -770,6 +784,8 @@ static void sun50i_iommu_detach_device(struct iommu_domain *domain, if (atomic_fetch_andnot(masters, &sun50i_domain->masters) == masters) sun50i_iommu_detach_domain(iommu, sun50i_domain); + else + sun50i_iommu_update_masters(iommu, sun50i_domain); } static int sun50i_iommu_attach_device(struct iommu_domain *domain, @@ -791,6 +807,8 @@ static int sun50i_iommu_attach_device(struct iommu_domain *domain, if (atomic_fetch_or(masters, &sun50i_domain->masters) == 0) sun50i_iommu_attach_domain(iommu, sun50i_domain); + else + sun50i_iommu_update_masters(iommu, sun50i_domain); return 0; } From patchwork Tue Jan 3 01:09:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 13087060 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 64E4AC3DA7A for ; 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Mon, 2 Jan 2023 20:09:16 -0500 (EST) From: Samuel Holland To: Joerg Roedel , Will Deacon , Robin Murphy , Chen-Yu Tsai , Jernej Skrabec , Krzysztof Kozlowski , Rob Herring Cc: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Maxime Ripard , Samuel Holland , Philipp Zabel Subject: [PATCH v2 4/6] iommu/sun50i: Support variants without an external reset Date: Mon, 2 Jan 2023 19:09:01 -0600 Message-Id: <20230103010903.11181-5-samuel@sholland.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20230103010903.11181-1-samuel@sholland.org> References: <20230103010903.11181-1-samuel@sholland.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230102_170919_728182_EABB3445 X-CRM114-Status: GOOD ( 16.16 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The IOMMU in the Allwinner D1 SoC does not have an external reset line. Only attempt to get the reset on hardware variants which should have one according to the binding. And switch from the deprecated function to the explicit "exclusive" variant. Reviewed-by: Jernej Skrabec Reviewed-by: Philipp Zabel Signed-off-by: Samuel Holland --- (no changes since v1) drivers/iommu/sun50i-iommu.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/sun50i-iommu.c b/drivers/iommu/sun50i-iommu.c index a3a462933c62..d19f6ce25f76 100644 --- a/drivers/iommu/sun50i-iommu.c +++ b/drivers/iommu/sun50i-iommu.c @@ -95,6 +95,10 @@ #define SPAGE_SIZE 4096 +struct sun50i_iommu_variant { + bool has_reset; +}; + struct sun50i_iommu { struct iommu_device iommu; @@ -995,9 +999,14 @@ static irqreturn_t sun50i_iommu_irq(int irq, void *dev_id) static int sun50i_iommu_probe(struct platform_device *pdev) { + const struct sun50i_iommu_variant *variant; struct sun50i_iommu *iommu; int ret, irq; + variant = of_device_get_match_data(&pdev->dev); + if (!variant) + return -EINVAL; + iommu = devm_kzalloc(&pdev->dev, sizeof(*iommu), GFP_KERNEL); if (!iommu) return -ENOMEM; @@ -1037,7 +1046,8 @@ static int sun50i_iommu_probe(struct platform_device *pdev) goto err_free_group; } - iommu->reset = devm_reset_control_get(&pdev->dev, NULL); + if (variant->has_reset) + iommu->reset = devm_reset_control_get_exclusive(&pdev->dev, NULL); if (IS_ERR(iommu->reset)) { dev_err(&pdev->dev, "Couldn't get our reset line.\n"); ret = PTR_ERR(iommu->reset); @@ -1075,8 +1085,12 @@ static int sun50i_iommu_probe(struct platform_device *pdev) return ret; } +static const struct sun50i_iommu_variant sun50i_h6_iommu = { + .has_reset = true, +}; + static const struct of_device_id sun50i_iommu_dt[] = { - { .compatible = "allwinner,sun50i-h6-iommu", }, + { .compatible = "allwinner,sun50i-h6-iommu", .data = &sun50i_h6_iommu }, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, sun50i_iommu_dt); From patchwork Tue Jan 3 01:09:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 13087064 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4F567C3DA7A for ; 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Mon, 2 Jan 2023 20:09:19 -0500 (EST) From: Samuel Holland To: Joerg Roedel , Will Deacon , Robin Murphy , Chen-Yu Tsai , Jernej Skrabec , Krzysztof Kozlowski , Rob Herring Cc: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Maxime Ripard , Samuel Holland Subject: [PATCH v2 5/6] iommu/sun50i: Add support for the D1 variant Date: Mon, 2 Jan 2023 19:09:02 -0600 Message-Id: <20230103010903.11181-6-samuel@sholland.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20230103010903.11181-1-samuel@sholland.org> References: <20230103010903.11181-1-samuel@sholland.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230102_170922_431167_5201123C X-CRM114-Status: GOOD ( 13.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org D1 contains an IOMMU similar to the one in the H6 SoC, but the D1 variant has no external reset signal. It also has some register definition changes, but none that affect the current driver. Reviewed-by: Jernej Skrabec Signed-off-by: Samuel Holland --- (no changes since v1) drivers/iommu/sun50i-iommu.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/iommu/sun50i-iommu.c b/drivers/iommu/sun50i-iommu.c index d19f6ce25f76..8652559a2ca3 100644 --- a/drivers/iommu/sun50i-iommu.c +++ b/drivers/iommu/sun50i-iommu.c @@ -1085,11 +1085,15 @@ static int sun50i_iommu_probe(struct platform_device *pdev) return ret; } +static const struct sun50i_iommu_variant sun20i_d1_iommu = { +}; + static const struct sun50i_iommu_variant sun50i_h6_iommu = { .has_reset = true, }; static const struct of_device_id sun50i_iommu_dt[] = { + { .compatible = "allwinner,sun20i-d1-iommu", .data = &sun20i_d1_iommu }, { .compatible = "allwinner,sun50i-h6-iommu", .data = &sun50i_h6_iommu }, { /* sentinel */ }, }; From patchwork Tue Jan 3 01:09:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 13087065 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 89942C3DA7A for ; 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Mon, 2 Jan 2023 20:09:22 -0500 (EST) From: Samuel Holland To: Joerg Roedel , Will Deacon , Robin Murphy , Chen-Yu Tsai , Jernej Skrabec , Krzysztof Kozlowski , Rob Herring Cc: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Maxime Ripard , Samuel Holland Subject: [PATCH v2 6/6] riscv: dts: allwinner: d1: Add the IOMMU node Date: Mon, 2 Jan 2023 19:09:03 -0600 Message-Id: <20230103010903.11181-7-samuel@sholland.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20230103010903.11181-1-samuel@sholland.org> References: <20230103010903.11181-1-samuel@sholland.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230102_170925_357913_1DBFBA2F X-CRM114-Status: GOOD ( 10.85 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org D1 contains an IOMMU for its video-related hardware. Add the node, and hook it up to the masters which are already described in the devicetree. Signed-off-by: Samuel Holland Reviewed-by: Jernej Skrabec --- Changes in v2: - New patch for v2 arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi index dff363a3c934..ade50f1e01a4 100644 --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi @@ -138,6 +138,14 @@ ccu: clock-controller@2001000 { #reset-cells = <1>; }; + iommu: iommu@2010000 { + compatible = "allwinner,sun20i-d1-iommu"; + reg = <0x2010000 0x10000>; + interrupts = ; + clocks = <&ccu CLK_BUS_IOMMU>; + #iommu-cells = <1>; + }; + dmic: dmic@2031000 { compatible = "allwinner,sun20i-d1-dmic", "allwinner,sun50i-h6-dmic"; @@ -574,6 +582,7 @@ mixer0: mixer@5100000 { <&display_clocks CLK_MIXER0>; clock-names = "bus", "mod"; resets = <&display_clocks RST_MIXER0>; + iommus = <&iommu 2>; ports { #address-cells = <1>; @@ -596,6 +605,7 @@ mixer1: mixer@5200000 { <&display_clocks CLK_MIXER1>; clock-names = "bus", "mod"; resets = <&display_clocks RST_MIXER1>; + iommus = <&iommu 2>; ports { #address-cells = <1>;