From patchwork Thu Jan 5 14:31:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090007 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9556FC3DA7A for ; Thu, 5 Jan 2023 14:34:31 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJF-0002pE-6C; Thu, 05 Jan 2023 09:33:33 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRIu-0002ju-UX; Thu, 05 Jan 2023 09:33:26 -0500 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRIs-0006tD-Aq; Thu, 05 Jan 2023 09:33:12 -0500 Received: by mail-wr1-x42d.google.com with SMTP id d17so16572247wrs.2; Thu, 05 Jan 2023 06:33:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5Gf+reKwkE6jXOJI2HiIZEfL9A4187k5o28S5UxntFc=; b=TACBP5NFIjvm4NsaDt/AoSEf3vxiZn/GT/4SV7bN27CGzRNFw08ZZFE2xpUkFYR/Wy MDr/V9hkMcBmnMNogURcTbSxq8I5nJkDJLyWVHdCT4trB1Y8Ehz9l1R2f2NUioYxFEr4 28Z0ix5zVX27u0gASD5967MAmDTKRRxs6YWmvI9kp1Dl58iwG8ksDrT2wuBMyStgLf88 X+fyGWKIuJEPDhnd/jWc7fpyl4xqi0vO0y+LNwPGjpExY+SkIhtj2Ies6cUtsAnriZ4w MqXyhVHfYcFWFFMVrf7f+wn+nZO68B4EEIgtc+GSimx1FRVFQLvxYpvXmeODG6CzOl44 33oQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5Gf+reKwkE6jXOJI2HiIZEfL9A4187k5o28S5UxntFc=; b=AArqKvoo13iz8JH6fhkPK+cgG9n8sRL5qpH7yRE2BqJFo+zuGJz3gXxIfFeM+NJSOs gLuk9+lc5Habdx3Sf6MrtNcnvYVOsC43MuSicJT7suo8H74ivWkVQFvQNNuewvKchG60 jiTPhzS/tgWxFGNt+JtiN7quXj3SgfDcbrWIP1ROx48FNTsvAy6wqhhPlfPE2HGQ0po4 jwdXLkoIg5cLBpoiFdyQvFJ7MItw6z+uqy2mQAxgI3BfZL7PiUXZDSFki/twimSNpmYr 0/STOqbEenzcOez9IMnHxbHEIPyZLOoqUZ79YNIzrgqroIwr1aqBlLgeHCRy1TdlPLW3 kQxQ== X-Gm-Message-State: AFqh2krYzQI3XsKEFexZjtRzWnKV6JZgbgFmaeWuL/2OZuvQ+WkQUGzs hO/Dyo801gAZwDKIhAsNGhpXTcZp0YzjUQ== X-Google-Smtp-Source: AMrXdXuyQ/35JXNZssv9zv4i+SMKchRZrPwePjlyl0QW6D1uk3faxhzcffDYlJfBja4+in2V+6RDXw== X-Received: by 2002:a5d:408c:0:b0:298:5b78:9e0a with SMTP id o12-20020a5d408c000000b002985b789e0amr8879136wrp.34.1672929187424; Thu, 05 Jan 2023 06:33:07 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:07 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v5 01/31] hw/mips/malta: Introduce PIIX4_PCI_DEVFN definition Date: Thu, 5 Jan 2023 15:31:58 +0100 Message-Id: <20230105143228.244965-2-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=shentey@gmail.com; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Philippe Mathieu-Daudé The PIIX4 PCI-ISA bridge function is always located at 10:0. Since we want to re-use its address, add the PIIX4_PCI_DEVFN definition. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20221027204720.33611-2-philmd@linaro.org> --- hw/mips/malta.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/mips/malta.c b/hw/mips/malta.c index e435f80973..2e175741ff 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -72,6 +72,8 @@ #define FLASH_SIZE 0x400000 +#define PIIX4_PCI_DEVFN PCI_DEVFN(10, 0) + typedef struct { MemoryRegion iomem; MemoryRegion iomem_lo; /* 0 - 0x900 */ @@ -1427,7 +1429,7 @@ void mips_malta_init(MachineState *machine) empty_slot_init("GT64120", 0, 0x20000000); /* Southbridge */ - piix4 = pci_create_simple_multifunction(pci_bus, PCI_DEVFN(10, 0), true, + piix4 = pci_create_simple_multifunction(pci_bus, PIIX4_PCI_DEVFN, true, TYPE_PIIX4_PCI_DEVICE); isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(piix4), "isa.0")); From patchwork Thu Jan 5 14:31:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090003 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 53D79C3DA7D for ; Thu, 5 Jan 2023 14:34:10 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJF-0002pp-TG; Thu, 05 Jan 2023 09:33:33 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJ8-0002kk-Ht; Thu, 05 Jan 2023 09:33:26 -0500 Received: from mail-wr1-x434.google.com ([2a00:1450:4864:20::434]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRIs-0006tS-ED; Thu, 05 Jan 2023 09:33:13 -0500 Received: by mail-wr1-x434.google.com with SMTP id co23so36341866wrb.4; Thu, 05 Jan 2023 06:33:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ncw5nnPVK/uF8+rX+LoiYH3+/VQ+iJInXM5uQBXVtuY=; b=RNX1JKz3q/4t+luafx4cuFcZmg3YaPBe4lkGOzfk2MTTFF+n7wO6FfDCKj31vmJQEn OtYa4o8cmx4j278C6ezrlYrxfSXRzVXFpM4Lrtt8jJO8FVstG/GauXDNUqobSYUVuriL FUYOpM5qvx0sKlnspEaJLlmGborKqwic0yeub4U65imMCanSMQnOrPh04+D/P22QEqb8 OODSZJCQtSLi9MJMKYNUN3tBXsN1klyjQ9NRDT/hAl96A/M4RXhh8iYhmY5QcimzXRXA mdGZzBll+wQ25grgMx9XRN9YfmefGDW1q3kvmOxWBYZZ2m13QXF3oPv7NPo/K8+FE2zz PMwQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ncw5nnPVK/uF8+rX+LoiYH3+/VQ+iJInXM5uQBXVtuY=; b=NQiXYFfBnbxOKDmNQmLUuf2IABKobVwOk/9SiLmPZ1MUYsKyCZ+eProURGu/eUIMcJ DiMBs3qAylEsp+M6wP9xkUuQ3ULtwomGeg07GdsSu8DMITyh5nr/9Hyz4YqGKPNRXmi1 cvshnGNSaGMULcnvmVh4CmzwjVAqzmV1VWwFYgOeiUg2vZQYlFBvxTJ5PSEsyOVAXPnl 97h7HMuafs7YifJzIM1XXpaZ82V1bBa124SAU3aBdgrSECC1AMb3b8fb++I3bPzP8rk/ G5FhD8CXK47vUlBg7XszpM03W+4IdhKkQlPMPfmyoaumZMsQRn7YZb/EG1949fYb7k/Q gLPQ== X-Gm-Message-State: AFqh2krwg9SREue4Pzpo9/Bs+paLSBgstKFHoNOWk30TNIOqX+wEm0uO e5PwrQX7U6A06Er+6R9fHZgzbkTH4vwo2A== X-Google-Smtp-Source: AMrXdXuPLv690JBT8uxgyB/BFUC53+jyeFKb35Pmq+MQWuV41mzgtbe+ALht/IYcnZdpP6h9fm5dlA== X-Received: by 2002:a05:6000:18a6:b0:280:4a9:c8dd with SMTP id b6-20020a05600018a600b0028004a9c8ddmr40208330wri.18.1672929188361; Thu, 05 Jan 2023 06:33:08 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:08 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v5 02/31] hw/mips/malta: Set PIIX4 IRQ routes in embedded bootloader Date: Thu, 5 Jan 2023 15:31:59 +0100 Message-Id: <20230105143228.244965-3-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=shentey@gmail.com; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Philippe Mathieu-Daudé Linux kernel expects the northbridge & southbridge chipsets configured by the BIOS firmware. We emulate that by writing a tiny bootloader code in write_bootloader(). Upon introduction in commit 5c2b87e34d ("PIIX4 support"), the PIIX4 configuration space included values specific to the Malta board. Set the Malta-specific IRQ routing values in the embedded bootloader, so the next commit can remove the Malta specific bits from the PIIX4 PCI-ISA bridge and make it generic (matching the real hardware). Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20221027204720.33611-3-philmd@linaro.org> --- hw/mips/malta.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 2e175741ff..ef3e10dc4d 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -804,6 +804,8 @@ static void write_bootloader_nanomips(uint8_t *base, uint64_t run_addr, stw_p(p++, 0x8422); stw_p(p++, 0x9088); /* sw t0, 0x88(t1) */ + /* TODO set PIIX IRQC[A:D] routing values! */ + stw_p(p++, 0xe320 | NM_HI1(kernel_entry)); stw_p(p++, NM_HI2(kernel_entry)); @@ -841,6 +843,9 @@ static void write_bootloader_nanomips(uint8_t *base, uint64_t run_addr, static void write_bootloader(uint8_t *base, uint64_t run_addr, uint64_t kernel_entry) { + const char pci_pins_cfg[PCI_NUM_PINS] = { + 10, 10, 11, 11 /* PIIX IRQRC[A:D] */ + }; uint32_t *p; /* Small bootloader */ @@ -915,6 +920,20 @@ static void write_bootloader(uint8_t *base, uint64_t run_addr, #undef cpu_to_gt32 + /* + * The PIIX ISA bridge is on PCI bus 0 dev 10 func 0. + * Load the PIIX IRQC[A:D] routing config address, then + * write routing configuration to the config data register. + */ + bl_gen_write_u32(&p, /* GT_PCI0_CFGADDR */ + cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0xcf8), + tswap32((1 << 31) /* ConfigEn */ + | PCI_BUILD_BDF(0, PIIX4_PCI_DEVFN) << 8 + | PIIX_PIRQCA)); + bl_gen_write_u32(&p, /* GT_PCI0_CFGDATA */ + cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0xcfc), + tswap32(ldl_be_p(pci_pins_cfg))); + bl_gen_jump_kernel(&p, true, ENVP_VADDR - 64, /* From patchwork Thu Jan 5 14:32:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090034 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0F64DC3DA7A for ; Thu, 5 Jan 2023 14:45:26 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJG-0002q8-KA; Thu, 05 Jan 2023 09:33:34 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJ8-0002kh-Gf; Thu, 05 Jan 2023 09:33:26 -0500 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRIt-0006tZ-QQ; Thu, 05 Jan 2023 09:33:13 -0500 Received: by mail-wr1-x42a.google.com with SMTP id s9so4301256wru.13; Thu, 05 Jan 2023 06:33:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=YHtHVYo4NVUXU56/alQ0bH+UtHEiwYpVK/P9pel6Axs=; b=aEY0wMTD3YdxwZa42PTEvDVFsEWtmp3JmLE71V6hJX/g79gJjLAJiDlMBvVORvBye/ HqovYHDFSroGOaU82x23Kze0Kh2pe1BAbJwgWAwZaJESl4UAIta/z+czdJT2yPRBkjCK 0MoS+AZzaQDcmAmTVjql9dLTKx/9+ZOu8uKGAyWi498OSsJvO837WMpd68gM9IvFJvH/ rsYE97uOnVmtw8O9sYiN8fdYwzDfhachGYEwnJhCbSLDNnNI0beuRNtPpdvp5Dnn/3wF rc2z8rg/EHRoz2qDFKCx6dmMFifht/2Nk63dZFumKmm+z6AKyPC9/tLhDYjh72Ku3iYx L/zQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=YHtHVYo4NVUXU56/alQ0bH+UtHEiwYpVK/P9pel6Axs=; b=qVcoOlRj0FzQIFXfAnhMvf1w780fLAPd+AwdBqYEwDDAkXNojhBRa1ZSa1L8iFngXZ lNP/c7nL3tpmZYnMRjbt7gmIJx0odEqSQ2xvRylBIjEDtodsv/bXRWNvdjMlbhn7PPuV v+4hQ8JyNrE740oiI0pOdrXc1gxPXimWzLxqdSYrduC4GsPXR2QgaYp5txgl4d7xWpbg WZ8bR9+pocBNBl/w4G4F1wpOxkwQHRXWPBAtiDncA30TdXR6HWFukPdgTK73QYz9f0Hg ZF6rH45I1vIyCmevtY2fbh1/3CRDv71UK8r/2cNQ6optptIhzmHkOBxqK1uP6SmTGJgk qqtw== X-Gm-Message-State: AFqh2krj3iI3E41vSPGNgV9b6RlgspVGfrjpKQgn8OMF0r3t3CRvGrFw yrQmegJcugUJ0CZYZ0szA53W9fGzi7QWNA== X-Google-Smtp-Source: AMrXdXvhAA7EIT652OsLA2N4ls3es4J3UNE75oGE7XrwZ845BQLeHxrRuGmcYuKaGF5P5ueInkqC+w== X-Received: by 2002:a5d:58e6:0:b0:26f:aaff:e98c with SMTP id f6-20020a5d58e6000000b0026faaffe98cmr27427553wrd.27.1672929189308; Thu, 05 Jan 2023 06:33:09 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:09 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v5 03/31] hw/isa/piix4: Correct IRQRC[A:D] reset values Date: Thu, 5 Jan 2023 15:32:00 +0100 Message-Id: <20230105143228.244965-4-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=shentey@gmail.com; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Philippe Mathieu-Daudé IRQRC[A:D] registers reset value is 0x80. We were forcing the MIPS Malta machine routing to be able to boot a Linux kernel without any bootloader. We now have these registers initialized in the Malta machine write_bootloader(), so we can use the correct reset values. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20221027204720.33611-4-philmd@linaro.org> --- hw/isa/piix4.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index eca96fb8f0..6e9434129d 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -91,10 +91,10 @@ static void piix4_isa_reset(DeviceState *dev) pci_conf[0x4c] = 0x4d; pci_conf[0x4e] = 0x03; pci_conf[0x4f] = 0x00; - pci_conf[0x60] = 0x0a; // PCI A -> IRQ 10 - pci_conf[0x61] = 0x0a; // PCI B -> IRQ 10 - pci_conf[0x62] = 0x0b; // PCI C -> IRQ 11 - pci_conf[0x63] = 0x0b; // PCI D -> IRQ 11 + pci_conf[0x60] = 0x80; + pci_conf[0x61] = 0x80; + pci_conf[0x62] = 0x80; + pci_conf[0x63] = 0x80; pci_conf[0x69] = 0x02; pci_conf[0x70] = 0x80; pci_conf[0x76] = 0x0c; From patchwork Thu Jan 5 14:32:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090009 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8B86AC3DA7D for ; Thu, 5 Jan 2023 14:35:01 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJF-0002pt-V0; Thu, 05 Jan 2023 09:33:33 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJ8-0002ki-Hr; Thu, 05 Jan 2023 09:33:26 -0500 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRIu-0006tk-1M; Thu, 05 Jan 2023 09:33:13 -0500 Received: by mail-wr1-x42d.google.com with SMTP id r2so1493199wrv.7; Thu, 05 Jan 2023 06:33:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0n/SCpv5aiBm+X16I26hh3ltLrnYFlTaexw96i1C/dI=; b=Sg54jycdG9d4dHVSOGE3L3NgT2pGvcQIjqy5XJ7GjXZgFig0GYpvuN5XyoqfYtiBna 93F0Noa+lqoOPVzPWHdXDm2Yp18o6XE0QdFLboxbyySCgDtxalpjczRHVWQUSPeu4XpG 3pjL5KdH80bjRqm1l6h7z4D0XW7RC8eI5myb/YsX6YRFHXMEWjoVNhJrlFNQznKJ0FSY 3PXSYggcl9w7rtmLl0T5bQVPoOllp4v7Rk3xcr1OviLHq40Ft+X7GEqp/WlCOz1VwsJ1 nYjDV4L1Q+cvvuzgeNbukeEbNcSXYXc5JH69Gjha5YBVCTBKm/1WrC2JfrkjmBVdeEIS mb7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0n/SCpv5aiBm+X16I26hh3ltLrnYFlTaexw96i1C/dI=; b=37cE1KfMwQYHkhmfnDdHeaMu73o/MGw4msmvYftxok0K8fT8Yk9yIvt2bnkjqa17Ab nilxvOjUs8OHuGST5I7CbI6PybqXf4UuAWoxeZ+hzOAo5upwEVKXFaA2AKmTRG0EC8IW YTl54qbemvE9hxhLANet5/vkpEKc5Tv+BLt4fzocwOnFjPwHsQLtX8YNNEydNAWchqpp uZ5jKMBmu8Wv7jS5HeZ7Rczf837masvXVElTglaauU2mS34uo+0h1IOvXYNmbQjHZMjz CMv6zhFOaCCz3qK0bdABGIEwqAe0KS60kEgA4+IdWPTuHuSxJuJABHKfGZ8IFxTryImA QJoQ== X-Gm-Message-State: AFqh2krZJXtmCiYhvgQOSH+JdwD+W2mks2abTvKEQl0FEq5xpX4fM5K9 rYVgkcApzUztVtHn3AZffI4Q4WyetSL/Ow== X-Google-Smtp-Source: AMrXdXtuO1JLTiJ1KXMgjtMV3qTQXthYD0Dpx7do4CaA5bl5cXNuUa3b8t5paV5uRGni0RgSyURSoQ== X-Received: by 2002:a5d:51c7:0:b0:29d:7fe4:b70e with SMTP id n7-20020a5d51c7000000b0029d7fe4b70emr6667961wrv.7.1672929190301; Thu, 05 Jan 2023 06:33:10 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:09 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow Subject: [PATCH v5 04/31] hw/mips/Kconfig: Track Malta's PIIX dependencies via Kconfig Date: Thu, 5 Jan 2023 15:32:01 +0100 Message-Id: <20230105143228.244965-5-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=shentey@gmail.com; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Tracking dependencies via Kconfig seems much cleaner. Note that PIIX4 already depends on ACPI_PIIX4. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin --- configs/devices/mips-softmmu/common.mak | 2 -- hw/mips/Kconfig | 1 + 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/configs/devices/mips-softmmu/common.mak b/configs/devices/mips-softmmu/common.mak index 416161f833..7813fd1b41 100644 --- a/configs/devices/mips-softmmu/common.mak +++ b/configs/devices/mips-softmmu/common.mak @@ -18,10 +18,8 @@ CONFIG_PCSPK=y CONFIG_PCKBD=y CONFIG_FDC=y CONFIG_ACPI=y -CONFIG_ACPI_PIIX4=y CONFIG_APM=y CONFIG_I8257=y -CONFIG_PIIX4=y CONFIG_IDE_ISA=y CONFIG_PFLASH_CFI01=y CONFIG_I8259=y diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig index 725525358d..4e7042f03d 100644 --- a/hw/mips/Kconfig +++ b/hw/mips/Kconfig @@ -1,6 +1,7 @@ config MALTA bool select ISA_SUPERIO + select PIIX4 config MIPSSIM bool From patchwork Thu Jan 5 14:32:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090032 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4D93EC3DA7A for ; Thu, 5 Jan 2023 14:44:27 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJG-0002q9-Kv; Thu, 05 Jan 2023 09:33:34 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJ8-0002kn-Hl; Thu, 05 Jan 2023 09:33:26 -0500 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRIw-0006u3-Iu; Thu, 05 Jan 2023 09:33:17 -0500 Received: by mail-wr1-x42d.google.com with SMTP id m7so1872171wrn.10; Thu, 05 Jan 2023 06:33:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hHk6ePf0VRd2q38GwoD9GjFLpVvV6YZeT24HsIu9nQs=; b=QVwPk808D7OYE8EGmsAXuBfaxZXIxfvwQeOkY1ZOJhabKRcvmcK67tcPmnnic1yzSq 0cvXTRxoLeugxHYKYwIk2PLJGw0pJ1O4AZ0sYQR5wvZCFniuOl4ScE5UqMMJ56iPjk61 bFCgcvMUC3x0sXLB82zXxRZtr1FQKC4uHnmzMbS+YnTDNQ2sjjeXLKszSCT7IK44T/WL fL8IDuJEE3mAJcyehdKyUb++PyNyNzUUwale8D42PcZAp5tRLVyYSnsW8Chq5US5UPC9 8un2h/NayD9AvdVA0VtL/Q1wkS9xmsQpMsC/ZULpORV1JabzADV2F3heIkNdOlFJ4PhD OFZQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hHk6ePf0VRd2q38GwoD9GjFLpVvV6YZeT24HsIu9nQs=; b=Bw5VqlyO+eP/jRHtfaJWSuACU3pKz1ox8KRtoaGRBmKBDPLX7hnBOV8WRs4HNCZhKL 3XtnfYxNCaA5tBun4QBQQlGU0BsHpyaImH+CQywKyheB0mBhcNVzkaS9+L+0l75d9m9/ t9E0y8F6snygqPZaPkzpvJ6sKmzlCqkOv9LpfWTtGynJP1I1MLO/mCuEzsHjvdBcQwN0 hNmkDOpIvW1MiqM2/nJMBc0wB9DBWVmFmHuU9uv/KEiIKPM1be8UZwqs5JqIS9PTXgpB D7o1tAax+sppt2GiPpDBNW5GInE18G+yw3eJLpqB1i+9hHY/4dMe8Ga/BUfzBC5vCMHr 82xw== X-Gm-Message-State: AFqh2kpox9ElmaqIMGJ/RlIuJFZh+QhDWtBDwXZ6S+irYAOads30EO9v 59sG0dH7Msbz6HmZ4p0K+HTbdFxjp9IraQ== X-Google-Smtp-Source: AMrXdXvmphHOYSnvmCz4q4xLXQGf1c+t4pB5SCUfo2vF+FkPESJ5madQNB3+a5Fp4AZFzwGJ3wwZyQ== X-Received: by 2002:adf:fcc6:0:b0:277:7243:5cef with SMTP id f6-20020adffcc6000000b0027772435cefmr34024339wrs.67.1672929191398; Thu, 05 Jan 2023 06:33:11 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:11 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow , Mark Cave-Ayland Subject: [PATCH v5 05/31] hw/usb/hcd-uhci: Introduce TYPE_ defines for device models Date: Thu, 5 Jan 2023 15:32:02 +0100 Message-Id: <20230105143228.244965-6-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=shentey@gmail.com; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Suggested-by: Mark Cave-Ayland Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin Message-Id: <20221022150508.26830-10-shentey@gmail.com> --- hw/usb/hcd-uhci.h | 4 ++++ hw/i386/pc_piix.c | 3 ++- hw/i386/pc_q35.c | 13 +++++++------ hw/isa/piix4.c | 2 +- hw/usb/hcd-uhci.c | 16 ++++++++-------- 5 files changed, 22 insertions(+), 16 deletions(-) diff --git a/hw/usb/hcd-uhci.h b/hw/usb/hcd-uhci.h index c85ab7868e..83e6f548b1 100644 --- a/hw/usb/hcd-uhci.h +++ b/hw/usb/hcd-uhci.h @@ -91,4 +91,8 @@ typedef struct UHCIInfo { void uhci_data_class_init(ObjectClass *klass, void *data); void usb_uhci_common_realize(PCIDevice *dev, Error **errp); +#define TYPE_PIIX3_USB_UHCI "piix3-usb-uhci" +#define TYPE_PIIX4_USB_UHCI "piix4-usb-uhci" +#define TYPE_ICH9_USB_UHCI(fn) "ich9-usb-uhci" #fn + #endif diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index c743122c52..edc0ac8cf1 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -51,6 +51,7 @@ #include "exec/memory.h" #include "hw/acpi/acpi.h" #include "hw/acpi/piix4.h" +#include "hw/usb/hcd-uhci.h" #include "qapi/error.h" #include "qemu/error-report.h" #include "sysemu/xen.h" @@ -306,7 +307,7 @@ static void pc_init1(MachineState *machine, #endif if (pcmc->pci_enabled && machine_usb(machine)) { - pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci"); + pci_create_simple(pci_bus, piix3_devfn + 2, TYPE_PIIX3_USB_UHCI); } if (pcmc->pci_enabled && x86_machine_is_acpi_enabled(X86_MACHINE(pcms))) { diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 65ea226211..83c57c6eb1 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -48,6 +48,7 @@ #include "hw/ide/pci.h" #include "hw/ide/ahci.h" #include "hw/usb.h" +#include "hw/usb/hcd-uhci.h" #include "qapi/error.h" #include "qemu/error-report.h" #include "sysemu/numa.h" @@ -65,15 +66,15 @@ struct ehci_companions { }; static const struct ehci_companions ich9_1d[] = { - { .name = "ich9-usb-uhci1", .func = 0, .port = 0 }, - { .name = "ich9-usb-uhci2", .func = 1, .port = 2 }, - { .name = "ich9-usb-uhci3", .func = 2, .port = 4 }, + { .name = TYPE_ICH9_USB_UHCI(1), .func = 0, .port = 0 }, + { .name = TYPE_ICH9_USB_UHCI(2), .func = 1, .port = 2 }, + { .name = TYPE_ICH9_USB_UHCI(3), .func = 2, .port = 4 }, }; static const struct ehci_companions ich9_1a[] = { - { .name = "ich9-usb-uhci4", .func = 0, .port = 0 }, - { .name = "ich9-usb-uhci5", .func = 1, .port = 2 }, - { .name = "ich9-usb-uhci6", .func = 2, .port = 4 }, + { .name = TYPE_ICH9_USB_UHCI(4), .func = 0, .port = 0 }, + { .name = TYPE_ICH9_USB_UHCI(5), .func = 1, .port = 2 }, + { .name = TYPE_ICH9_USB_UHCI(6), .func = 2, .port = 4 }, }; static int ehci_create_ich9_with_companions(PCIBus *bus, int slot) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 6e9434129d..de60ceef73 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -255,7 +255,7 @@ static void piix4_init(Object *obj) object_initialize_child(obj, "rtc", &s->rtc, TYPE_MC146818_RTC); object_initialize_child(obj, "ide", &s->ide, TYPE_PIIX4_IDE); - object_initialize_child(obj, "uhci", &s->uhci, "piix4-usb-uhci"); + object_initialize_child(obj, "uhci", &s->uhci, TYPE_PIIX4_USB_UHCI); object_initialize_child(obj, "pm", &s->pm, TYPE_PIIX4_PM); qdev_prop_set_uint32(DEVICE(&s->pm), "smb_io_base", 0x1100); diff --git a/hw/usb/hcd-uhci.c b/hw/usb/hcd-uhci.c index d1b5657d72..30ae0104bb 100644 --- a/hw/usb/hcd-uhci.c +++ b/hw/usb/hcd-uhci.c @@ -1292,56 +1292,56 @@ void uhci_data_class_init(ObjectClass *klass, void *data) static UHCIInfo uhci_info[] = { { - .name = "piix3-usb-uhci", + .name = TYPE_PIIX3_USB_UHCI, .vendor_id = PCI_VENDOR_ID_INTEL, .device_id = PCI_DEVICE_ID_INTEL_82371SB_2, .revision = 0x01, .irq_pin = 3, .unplug = true, },{ - .name = "piix4-usb-uhci", + .name = TYPE_PIIX4_USB_UHCI, .vendor_id = PCI_VENDOR_ID_INTEL, .device_id = PCI_DEVICE_ID_INTEL_82371AB_2, .revision = 0x01, .irq_pin = 3, .unplug = true, },{ - .name = "ich9-usb-uhci1", /* 00:1d.0 */ + .name = TYPE_ICH9_USB_UHCI(1), /* 00:1d.0 */ .vendor_id = PCI_VENDOR_ID_INTEL, .device_id = PCI_DEVICE_ID_INTEL_82801I_UHCI1, .revision = 0x03, .irq_pin = 0, .unplug = false, },{ - .name = "ich9-usb-uhci2", /* 00:1d.1 */ + .name = TYPE_ICH9_USB_UHCI(2), /* 00:1d.1 */ .vendor_id = PCI_VENDOR_ID_INTEL, .device_id = PCI_DEVICE_ID_INTEL_82801I_UHCI2, .revision = 0x03, .irq_pin = 1, .unplug = false, },{ - .name = "ich9-usb-uhci3", /* 00:1d.2 */ + .name = TYPE_ICH9_USB_UHCI(3), /* 00:1d.2 */ .vendor_id = PCI_VENDOR_ID_INTEL, .device_id = PCI_DEVICE_ID_INTEL_82801I_UHCI3, .revision = 0x03, .irq_pin = 2, .unplug = false, },{ - .name = "ich9-usb-uhci4", /* 00:1a.0 */ + .name = TYPE_ICH9_USB_UHCI(4), /* 00:1a.0 */ .vendor_id = PCI_VENDOR_ID_INTEL, .device_id = PCI_DEVICE_ID_INTEL_82801I_UHCI4, .revision = 0x03, .irq_pin = 0, .unplug = false, },{ - .name = "ich9-usb-uhci5", /* 00:1a.1 */ + .name = TYPE_ICH9_USB_UHCI(5), /* 00:1a.1 */ .vendor_id = PCI_VENDOR_ID_INTEL, .device_id = PCI_DEVICE_ID_INTEL_82801I_UHCI5, .revision = 0x03, .irq_pin = 1, .unplug = false, },{ - .name = "ich9-usb-uhci6", /* 00:1a.2 */ + .name = TYPE_ICH9_USB_UHCI(6), /* 00:1a.2 */ .vendor_id = PCI_VENDOR_ID_INTEL, .device_id = PCI_DEVICE_ID_INTEL_82801I_UHCI6, .revision = 0x03, From patchwork Thu Jan 5 14:32:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D83A3C3DA7A for ; Thu, 5 Jan 2023 14:41:41 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJK-0002t9-Er; Thu, 05 Jan 2023 09:33:38 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJ8-0002kp-Hw; Thu, 05 Jan 2023 09:33:26 -0500 Received: from mail-wr1-x430.google.com ([2a00:1450:4864:20::430]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRIw-0006uP-Uz; Thu, 05 Jan 2023 09:33:17 -0500 Received: by mail-wr1-x430.google.com with SMTP id s9so4301436wru.13; Thu, 05 Jan 2023 06:33:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=iS/t0s+kO/h2RwOcxnCdWLmYPedCBBrg6QHdOEUU0w4=; b=JT2+b+HNCME0IKpNEKGz1IlJYecfWVYHUcStDRyBa9Sur7UwKzyVJAjjrn6xiezqXV TIxy8J8V/QmQYcubgTrjEL12r/qpgj8ffozdzCsrSCGVEU2XaNGjdEtkkipJ6/RLxJpP WHKKjru0aUppYIBeVkU0hRUH77yVBI/hK8axjrd+gJud9GW0z6LBarI6FdA/edlFb7Co o/nX5wmFLpgaXLZlqmbaE0ZdbXk50KYGpjU4MljuAjwSLuFt5mo5ctTbWu2ntv/iOUQf vqZSkKInKKEIhFB57MGcivOw1KA9DPlDso3TNjiHbWMFH3PFt7LWSvWm7RZGhNnydeGp 5cEA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=iS/t0s+kO/h2RwOcxnCdWLmYPedCBBrg6QHdOEUU0w4=; b=fg8vSJEq1qOQv8AFMy3s3JinfTFlr+2ZYUnlkMOZEYbcfkliCVd/PM91NX0dZlN50T LTiDxL93PuD2OhcGp3iAUNtF1wzZRzQnnOgX9TX6ZTyAtECtrqkGfmLrOWUvLbHygNKz pSpf8mXZiKkirsbcPwDBz8jAvELVKQz3BzFktEgty1EqgyXZeNZwBCUyzpEPiWQi8KdP LKefuyyAiGBWtDdd501z5yiMaSJ7PrItXJd4JYTOYkF2JAomQjoXnwDV7BuVi+Q5hXLS rCUI3nt1HjhxB54K168G5B3vY6K06oq/N9r0Et8BzmKyc/Vewg7KyEUw472MPCk70sU6 zYKg== X-Gm-Message-State: AFqh2kqXxRjNbKRnQ/zHxLErN0iY4lfcF2BVs7b2ZvkDw89owXLzLM0t e4CGI2TuG0A8GicOMqoisAWpbAv2Dol7Ag== X-Google-Smtp-Source: AMrXdXtKMmM0Gy5jTeGZez/wGnQP2ygwLacOSYu6D7StTPhi2p+X77lrSUcn2ImeGCCr2ktHT4E13g== X-Received: by 2002:a5d:6f03:0:b0:28f:31d2:be38 with SMTP id ay3-20020a5d6f03000000b0028f31d2be38mr16337609wrb.43.1672929192550; Thu, 05 Jan 2023 06:33:12 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:12 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow Subject: [PATCH v5 06/31] hw/i386/pc_piix: Associate pci_map_irq_fn as soon as PCI bus is created Date: Thu, 5 Jan 2023 15:32:03 +0100 Message-Id: <20230105143228.244965-7-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=shentey@gmail.com; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Observe that the pci_map_irq_fn's don't depend on the south bridge instance. So associate them immediately when the PCI bus is created to keep things logically together. Signed-off-by: Bernhard Beschow --- hw/i386/pc_piix.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index edc0ac8cf1..d1f7d95936 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -229,6 +229,9 @@ static void pc_init1(MachineState *machine, x86ms->below_4g_mem_size, x86ms->above_4g_mem_size, pci_memory, ram_memory); + pci_bus_map_irqs(pci_bus, + xen_enabled() ? xen_pci_slot_get_pirq + : pci_slot_get_pirq); pcms->bus = pci_bus; pci_dev = pci_create_simple_multifunction(pci_bus, -1, true, type); @@ -236,10 +239,6 @@ static void pc_init1(MachineState *machine, piix3->pic = x86ms->gsi; piix3_devfn = piix3->dev.devfn; isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0")); - - pci_bus_map_irqs(pci_bus, - xen_enabled() ? xen_pci_slot_get_pirq - : pci_slot_get_pirq); } else { pci_bus = NULL; isa_bus = isa_bus_new(NULL, get_system_memory(), system_io, From patchwork Thu Jan 5 14:32:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090036 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 124F0C3DA7D for ; Thu, 5 Jan 2023 14:45:49 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJO-000300-QX; Thu, 05 Jan 2023 09:33:42 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJ8-0002ko-HK; Thu, 05 Jan 2023 09:33:26 -0500 Received: from mail-wr1-x430.google.com ([2a00:1450:4864:20::430]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRIy-0006um-9H; Thu, 05 Jan 2023 09:33:17 -0500 Received: by mail-wr1-x430.google.com with SMTP id h16so36265542wrz.12; Thu, 05 Jan 2023 06:33:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=YpTLCQQN9sJV5BZKqwLD7eLW09/Kk5l3kKtc6B53Yig=; b=EzF7fF3aNLveV8O9Pm4eA13kcNQK+5rCbxp/z7qIVNBov130rDL3IB56Sr6H8w8tQd K8LnISLAf0ZrlOLGL3nf8JVBGT2TYHSY2g2qeoEqK5/CApXRYAFdjbua/ztJFqoC/H20 F/1PrgQWvgzfK4wPH2KYg0OVgKQ7VQyDOCNpAyuIborJ7HLuBR/M/tZGVDPLH+xAKYZX obMsCJcVVZSN6q1+UXdpu4tjIbHaecqtD3/nCs58wsnWCnYVzAwGsEc34FO5DTWip2QH +MIh4JFEm9T3sNGFZyiOnzBMJmjWJPI67C98STyOK1c4/TkGhoyQEt7nYgGalgsYpCVQ XnDA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=YpTLCQQN9sJV5BZKqwLD7eLW09/Kk5l3kKtc6B53Yig=; b=OHHHjaFKZH5T9FDDvZBnx7iJEilkDhDY+PyobDY4a72+bFfpIGtk3gop+NgKFWvuaz G3Th51XaFS5m+f3OSeDxY2d8Okc+E/1ZGdqjTxTdeXJ6FiBe0KApgS0/4Q/1uNw5Vg9q okXpqsvi9zYKadQ0l0nieNfCnAcHlwmI8hw+h1y9krgQTtX1bPiHVmL6JkQ/ByL3Qyn9 e0pDPSv+Zp9gpk2g9Rew7DtpKAFiuHnGnUlEVMX9Vu/ktON2GupOd9xL/Vas/KjQ6g7p EhgGNC6OZvmb0APzMwjMh5ir9MBa0cIVeGStarRRSjKv2sfa4KDoQCMu4SjxsP137rKA Xk9g== X-Gm-Message-State: AFqh2koBzIEUn3Poahq/45UACpYA+htBMViRINlPF8i9A713flgiuBm1 sjvNd2vOL1lGF1RXMsI4O4XvPhjwGKQRTQ== X-Google-Smtp-Source: AMrXdXvCFjW4Kk9R9ho1I4zkCm/wsquEGbIGOF7gwhUDKiz7yEU6TsxmhzyUsuCKHgkNxCNXcQGWSg== X-Received: by 2002:adf:e383:0:b0:242:69f4:cb6f with SMTP id e3-20020adfe383000000b0024269f4cb6fmr32240445wrm.32.1672929193975; Thu, 05 Jan 2023 06:33:13 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:13 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow , Peter Maydell Subject: [PATCH v5 07/31] hw/i386/pc_piix: Allow for setting properties before realizing PIIX3 south bridge Date: Thu, 5 Jan 2023 15:32:04 +0100 Message-Id: <20230105143228.244965-8-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=shentey@gmail.com; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The next patches will need to take advantage of it. Signed-off-by: Bernhard Beschow Reviewed-by: Peter Maydell Reviewed-by: Michael S. Tsirkin Message-Id: <20221022150508.26830-3-shentey@gmail.com> --- hw/i386/pc_piix.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index d1f7d95936..f67893cd7c 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -234,7 +234,8 @@ static void pc_init1(MachineState *machine, : pci_slot_get_pirq); pcms->bus = pci_bus; - pci_dev = pci_create_simple_multifunction(pci_bus, -1, true, type); + pci_dev = pci_new_multifunction(-1, true, type); + pci_realize_and_unref(pci_dev, pci_bus, &error_fatal); piix3 = PIIX3_PCI_DEVICE(pci_dev); piix3->pic = x86ms->gsi; piix3_devfn = piix3->dev.devfn; From patchwork Thu Jan 5 14:32:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 990C8C3DA7A for ; Thu, 5 Jan 2023 14:41:25 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJH-0002r6-8S; Thu, 05 Jan 2023 09:33:35 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJ8-0002ks-Hp; Thu, 05 Jan 2023 09:33:26 -0500 Received: from mail-wr1-x42b.google.com ([2a00:1450:4864:20::42b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRIz-0006vC-0J; Thu, 05 Jan 2023 09:33:19 -0500 Received: by mail-wr1-x42b.google.com with SMTP id w1so24197736wrt.8; Thu, 05 Jan 2023 06:33:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hlJ2V1dMc5xPbrEFwOcXQd68GOIsjh9O4fMLI+RJdrM=; b=DAyf4lCjrSOYrSKAGtW3HXVfwLATRGbUPpwxqmSy10aomeVxI2wDgd0dOvCr/DqHmx VjpH6Bq2UPvw2LYXQppfPyGODig56/Jy98jdbi52fYiAvuvn2kJ4lB/uDv9weNEbzOE6 QbRIFoZ9Muh+NFE0yjukBIFr+MK+HdnbT6FE5hHw+ADQ8bD3KqdADxs0ApA3CsoGOmgz iwPySvZpH7tYlJQLK93FfPJmMC259WCmSTTK52sfgGKreFUeQiYzT7yjCfueFy1cB0DQ c99IpakKbwECfglqtjSWCoKoJqVPxx+qqtmFvMffPtJ+BuvcTt1V9+9MonOG9kUezXzg Ixgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hlJ2V1dMc5xPbrEFwOcXQd68GOIsjh9O4fMLI+RJdrM=; b=YsU0++cTH5mtZ/a38KqSWL4ee3zUgi5kqu6ZD/jmEXhru9ueZaHcWqmLYrr4zdu5VL N6Zy/QD77cW81iIrWQrA0gV99mXpujqtxDzQPsL0V2hr93ZwTl7D8W/qRgll6kqvNZ2R DvgxqaSrTpDBBXLzfOkSpbLrb7DVStoVhzkYPN7DHfynzhnv6kbcnsiUN1FAM0hZ+btD jxZ59lgwrdDuDVE25LB+50PJ0QOekYV4HY/fTcPa6q0Z62hkve3XPfVt7MpodA1+UiZs v0I9dn9HLqZoveBCZl9OtyrZRH7VVKKpv7W8+RuIBR69lop0C2bJerKt0qAsepubxvUc 89ng== X-Gm-Message-State: AFqh2kr/olFhCrQ9KdMkiigGI2fUOGLZxy4vl/DmF+o4jW1Fk1smdwbu BT8tlspHUXi6ex9oasuwNrgXwKT3aB5Xtg== X-Google-Smtp-Source: AMrXdXuYxah6P7CFsFSqFGSXP7DqDQz4r3SFr416HdNhB7UIhuKMm+DGzg6MADn3lMd4ihBf+8ekbQ== X-Received: by 2002:adf:db12:0:b0:242:203c:9ed4 with SMTP id s18-20020adfdb12000000b00242203c9ed4mr33687222wri.55.1672929194937; Thu, 05 Jan 2023 06:33:14 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:14 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow , Thomas Huth Subject: [PATCH v5 08/31] hw/i386/pc: Create RTC controllers in south bridges Date: Thu, 5 Jan 2023 15:32:05 +0100 Message-Id: <20230105143228.244965-9-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=shentey@gmail.com; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Just like in the real hardware (and in PIIX4), create the RTC controllers in the south bridges. Signed-off-by: Bernhard Beschow Reviewed-by: Michael S. Tsirkin Reviewed-by: Thomas Huth Message-Id: <20221022150508.26830-11-shentey@gmail.com> --- include/hw/i386/ich9.h | 2 ++ include/hw/southbridge/piix.h | 3 +++ hw/i386/pc.c | 12 +++++++++++- hw/i386/pc_piix.c | 8 ++++++++ hw/i386/pc_q35.c | 1 + hw/isa/lpc_ich9.c | 8 ++++++++ hw/isa/piix3.c | 15 +++++++++++++++ hw/isa/Kconfig | 2 ++ 8 files changed, 50 insertions(+), 1 deletion(-) diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h index 23ee8e371b..672efc6bce 100644 --- a/include/hw/i386/ich9.h +++ b/include/hw/i386/ich9.h @@ -11,6 +11,7 @@ #include "hw/acpi/acpi.h" #include "hw/acpi/ich9.h" #include "hw/pci/pci_bus.h" +#include "hw/rtc/mc146818rtc.h" #include "qom/object.h" void ich9_lpc_set_irq(void *opaque, int irq_num, int level); @@ -39,6 +40,7 @@ struct ICH9LPCState { */ uint8_t irr[PCI_SLOT_MAX][PCI_NUM_PINS]; + RTCState rtc; APMState apm; ICH9LPCPMRegs pm; uint32_t sci_level; /* track sci level */ diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index 2693778b23..b1fa08dd2b 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -14,6 +14,7 @@ #include "hw/pci/pci.h" #include "qom/object.h" +#include "hw/rtc/mc146818rtc.h" /* PIRQRC[A:D]: PIRQx Route Control Registers */ #define PIIX_PIRQCA 0x60 @@ -52,6 +53,8 @@ struct PIIXState { /* This member isn't used. Just for save/load compatibility */ int32_t pci_irq_levels_vmstate[PIIX_NUM_PIRQS]; + RTCState rtc; + /* Reset Control Register contents */ uint8_t rcr; diff --git a/hw/i386/pc.c b/hw/i386/pc.c index d489ecc0d1..448557333b 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1304,7 +1304,17 @@ void pc_basic_device_init(struct PCMachineState *pcms, pit_alt_irq = qdev_get_gpio_in(hpet, HPET_LEGACY_PIT_INT); rtc_irq = qdev_get_gpio_in(hpet, HPET_LEGACY_RTC_INT); } - *rtc_state = mc146818_rtc_init(isa_bus, 2000, rtc_irq); + + if (rtc_irq) { + qdev_connect_gpio_out(DEVICE(*rtc_state), 0, rtc_irq); + } else { + uint32_t irq = object_property_get_uint(OBJECT(*rtc_state), + "irq", + &error_fatal); + isa_connect_gpio_out(*rtc_state, 0, irq); + } + object_property_add_alias(OBJECT(pcms), "rtc-time", OBJECT(*rtc_state), + "date"); qemu_register_boot_set(pc_boot_set, *rtc_state); diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index f67893cd7c..6bd8e70730 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -32,6 +32,7 @@ #include "hw/i386/pc.h" #include "hw/i386/apic.h" #include "hw/pci-host/i440fx.h" +#include "hw/rtc/mc146818rtc.h" #include "hw/southbridge/piix.h" #include "hw/display/ramfb.h" #include "hw/firmware/smbios.h" @@ -240,10 +241,17 @@ static void pc_init1(MachineState *machine, piix3->pic = x86ms->gsi; piix3_devfn = piix3->dev.devfn; isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0")); + rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(pci_dev), + "rtc")); } else { pci_bus = NULL; isa_bus = isa_bus_new(NULL, get_system_memory(), system_io, &error_abort); + + rtc_state = isa_new(TYPE_MC146818_RTC); + qdev_prop_set_int32(DEVICE(rtc_state), "base_year", 2000); + isa_realize_and_unref(rtc_state, isa_bus, &error_fatal); + i8257_dma_init(isa_bus, 0); pcms->hpet_enabled = false; } diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 83c57c6eb1..da97df69f7 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -239,6 +239,7 @@ static void pc_q35_init(MachineState *machine) lpc = pci_create_simple_multifunction(host_bus, PCI_DEVFN(ICH9_LPC_DEV, ICH9_LPC_FUNC), true, TYPE_ICH9_LPC_DEVICE); + rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(lpc), "rtc")); object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, TYPE_HOTPLUG_HANDLER, diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c index 8d541e2b54..498175c1cc 100644 --- a/hw/isa/lpc_ich9.c +++ b/hw/isa/lpc_ich9.c @@ -663,6 +663,8 @@ static void ich9_lpc_initfn(Object *obj) static const uint8_t acpi_enable_cmd = ICH9_APM_ACPI_ENABLE; static const uint8_t acpi_disable_cmd = ICH9_APM_ACPI_DISABLE; + object_initialize_child(obj, "rtc", &lpc->rtc, TYPE_MC146818_RTC); + object_property_add_uint8_ptr(obj, ACPI_PM_PROP_SCI_INT, &lpc->sci_gsi, OBJ_PROP_FLAG_READ); object_property_add_uint8_ptr(OBJECT(lpc), ACPI_PM_PROP_ACPI_ENABLE_CMD, @@ -728,6 +730,12 @@ static void ich9_lpc_realize(PCIDevice *d, Error **errp) isa_bus_irqs(isa_bus, lpc->gsi); i8257_dma_init(isa_bus, 0); + + /* RTC */ + qdev_prop_set_int32(DEVICE(&lpc->rtc), "base_year", 2000); + if (!qdev_realize(DEVICE(&lpc->rtc), BUS(isa_bus), errp)) { + return; + } } static bool ich9_rst_cnt_needed(void *opaque) diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index 283b971ec4..e8ddb6a602 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -28,6 +28,7 @@ #include "hw/dma/i8257.h" #include "hw/southbridge/piix.h" #include "hw/irq.h" +#include "hw/qdev-properties.h" #include "hw/isa/isa.h" #include "hw/xen/xen.h" #include "sysemu/runstate.h" @@ -301,6 +302,12 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp) PIIX_RCR_IOPORT, &d->rcr_mem, 1); i8257_dma_init(isa_bus, 0); + + /* RTC */ + qdev_prop_set_int32(DEVICE(&d->rtc), "base_year", 2000); + if (!qdev_realize(DEVICE(&d->rtc), BUS(isa_bus), errp)) { + return; + } } static void build_pci_isa_aml(AcpiDevAmlIf *adev, Aml *scope) @@ -327,6 +334,13 @@ static void build_pci_isa_aml(AcpiDevAmlIf *adev, Aml *scope) } } +static void pci_piix3_init(Object *obj) +{ + PIIX3State *d = PIIX3_PCI_DEVICE(obj); + + object_initialize_child(obj, "rtc", &d->rtc, TYPE_MC146818_RTC); +} + static void pci_piix3_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); @@ -353,6 +367,7 @@ static const TypeInfo piix3_pci_type_info = { .name = TYPE_PIIX3_PCI_DEVICE, .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PIIX3State), + .instance_init = pci_piix3_init, .abstract = true, .class_init = pci_piix3_class_init, .interfaces = (InterfaceInfo[]) { diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig index 18b5c6bf3f..af5ec9cd61 100644 --- a/hw/isa/Kconfig +++ b/hw/isa/Kconfig @@ -35,6 +35,7 @@ config PIIX3 bool select I8257 select ISA_BUS + select MC146818RTC config PIIX4 bool @@ -79,3 +80,4 @@ config LPC_ICH9 select ISA_BUS select ACPI_SMBUS select ACPI_X86_ICH + select MC146818RTC From patchwork Thu Jan 5 14:32:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090035 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7BBE9C3DA7A for ; Thu, 5 Jan 2023 14:45:34 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJO-000304-Rf; Thu, 05 Jan 2023 09:33:42 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJ8-0002kq-Hq; Thu, 05 Jan 2023 09:33:26 -0500 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRIz-0006tZ-Ao; Thu, 05 Jan 2023 09:33:18 -0500 Received: by mail-wr1-x42a.google.com with SMTP id s9so4301619wru.13; Thu, 05 Jan 2023 06:33:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zcqulyC8jnDCIpIDtCTuLymIbE/VG9iwcxT+BVL8kvA=; b=GRoYyPo4HQ+vOQ6iGSDSLQ0UR/t+qce35STDoxl2LAVIGNhFPnCmmZkc1sB1xLC0I4 9CuOaOowqf17DFkyAbEx1BYOVewTbu5J8C4pTrJLouVB2dU3D8RAZH76wRXmn0S9vZrK PdMJVps8DGOCnL7jLKtkyKDuljS+q/PWjJ0ciqVwN/Sio5SEoXv/MwXdJmVdaq7aHwjc uEzqYYYJ9TSfGWeovvSCoovSbNGNQQ6z5xul6bPkfNLlc4b2CtTWNTy1xfGYzdf+zXil KD9GbB5RCT9SJQGmNnHp+WpIxF7+/o2ta/yOs45/KK9KbrlFdV99FxO9xyo6gHdgpyMo +xrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zcqulyC8jnDCIpIDtCTuLymIbE/VG9iwcxT+BVL8kvA=; b=La6VCvpoLPdB7rMIDKS8iObLGzAfvMwwWTJQ5UMWba2+e/aD6D+vONDzYQ+9eDQDlv eC7HovjVRFq13/OHwb1KEpguuhq/9gRzQ2LkyNLPv+QPK78JFpUkuacQYlEfaw5uRcpt 83LbQGgwHpFM6U0uMmKCxxTkFJRwVXa3qSv7k36T9tFKp3OsO81KWolB4lcIpOpOStEn TPweNr2djHQ1qd13ilfBkkKIHcgaId/NQsCNSLbToUlkgolFhKVeAj46a9XBL0QOLskr WA/VgWJs7/LopfS8WO7qKJfINehZ0f6vwTR5Bgp7SZmN0bajTxCbG/FeVPp/H3+KI4X7 2UPg== X-Gm-Message-State: AFqh2kqAfHy7ee2Vw7hJBoW3P0P5MWgRKZG0naTtddcy5VWO3B8ZvzZW J6J3u3L0muG46kronRZZlM0utvriz8CwSQ== X-Google-Smtp-Source: AMrXdXvikOrOOQMgRyzMvBHpt9Q+8Tfvl/Ti1moqn+TBH81ixmfQL2HGc+pJV0jE729sGiEK+P0LOA== X-Received: by 2002:a05:6000:382:b0:2b0:eee2:a43e with SMTP id u2-20020a056000038200b002b0eee2a43emr2052996wrf.38.1672929196154; Thu, 05 Jan 2023 06:33:16 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:15 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow , Peter Maydell , Thomas Huth Subject: [PATCH v5 09/31] hw/i386/pc: No need for rtc_state to be an out-parameter Date: Thu, 5 Jan 2023 15:32:06 +0100 Message-Id: <20230105143228.244965-10-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=shentey@gmail.com; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Now that the RTC is created as part of the southbridges it doesn't need to be an out-parameter any longer. Signed-off-by: Bernhard Beschow Reviewed-by: Peter Maydell Reviewed-by: Michael S. Tsirkin Reviewed-by: Thomas Huth Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20221022150508.26830-12-shentey@gmail.com> --- include/hw/i386/pc.h | 2 +- hw/i386/pc.c | 12 ++++++------ hw/i386/pc_piix.c | 2 +- hw/i386/pc_q35.c | 2 +- 4 files changed, 9 insertions(+), 9 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 991f905f5d..dd059e8667 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -169,7 +169,7 @@ uint64_t pc_pci_hole64_start(void); DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); void pc_basic_device_init(struct PCMachineState *pcms, ISABus *isa_bus, qemu_irq *gsi, - ISADevice **rtc_state, + ISADevice *rtc_state, bool create_fdctrl, uint32_t hpet_irqs); void pc_cmos_init(PCMachineState *pcms, diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 448557333b..53a5443e09 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1251,7 +1251,7 @@ static void pc_superio_init(ISABus *isa_bus, bool create_fdctrl, void pc_basic_device_init(struct PCMachineState *pcms, ISABus *isa_bus, qemu_irq *gsi, - ISADevice **rtc_state, + ISADevice *rtc_state, bool create_fdctrl, uint32_t hpet_irqs) { @@ -1306,17 +1306,17 @@ void pc_basic_device_init(struct PCMachineState *pcms, } if (rtc_irq) { - qdev_connect_gpio_out(DEVICE(*rtc_state), 0, rtc_irq); + qdev_connect_gpio_out(DEVICE(rtc_state), 0, rtc_irq); } else { - uint32_t irq = object_property_get_uint(OBJECT(*rtc_state), + uint32_t irq = object_property_get_uint(OBJECT(rtc_state), "irq", &error_fatal); - isa_connect_gpio_out(*rtc_state, 0, irq); + isa_connect_gpio_out(rtc_state, 0, irq); } - object_property_add_alias(OBJECT(pcms), "rtc-time", OBJECT(*rtc_state), + object_property_add_alias(OBJECT(pcms), "rtc-time", OBJECT(rtc_state), "date"); - qemu_register_boot_set(pc_boot_set, *rtc_state); + qemu_register_boot_set(pc_boot_set, rtc_state); if (!xen_enabled() && (x86ms->pit == ON_OFF_AUTO_AUTO || x86ms->pit == ON_OFF_AUTO_ON)) { diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 6bd8e70730..c9d6c3dac3 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -277,7 +277,7 @@ static void pc_init1(MachineState *machine, } /* init basic PC hardware */ - pc_basic_device_init(pcms, isa_bus, x86ms->gsi, &rtc_state, true, + pc_basic_device_init(pcms, isa_bus, x86ms->gsi, rtc_state, true, 0x4); pc_nic_init(pcmc, isa_bus, pci_bus); diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index da97df69f7..58c51fbd9e 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -293,7 +293,7 @@ static void pc_q35_init(MachineState *machine) } /* init basic PC hardware */ - pc_basic_device_init(pcms, isa_bus, x86ms->gsi, &rtc_state, !mc->no_floppy, + pc_basic_device_init(pcms, isa_bus, x86ms->gsi, rtc_state, !mc->no_floppy, 0xff0104); /* connect pm stuff to lpc */ From patchwork Thu Jan 5 14:32:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090004 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DF002C3DA7D for ; Thu, 5 Jan 2023 14:34:22 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJF-0002pl-Qp; Thu, 05 Jan 2023 09:33:33 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJ8-0002kt-Hl; Thu, 05 Jan 2023 09:33:26 -0500 Received: from mail-wr1-x429.google.com ([2a00:1450:4864:20::429]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRJ1-0006wG-Bd; Thu, 05 Jan 2023 09:33:21 -0500 Received: by mail-wr1-x429.google.com with SMTP id bs20so34208946wrb.3; Thu, 05 Jan 2023 06:33:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=4qvNwqj9F69SDLesm7NdhFKbhPEAJii6DuEumqaVs6w=; b=O2wLuSG148ckzp279s1BUHOiVB5Qt64pAf5vYeKGM/N5woxwHbo3iZ/HkRHfij5fuy 7LntYfEzYDUk82IsBUJszgo2SAuwk1r599Cc7OdJElQpG36r7psu3lWMyxQiBuGZLnbh peq5gmgzNfA4vP8N7tYBtJODsbGvDBkKAmcvgg34efuBCm/4Kc57/WZFo45Cn3y+glvI UPtU/0vCeIIAZzZhPZMa331OsjpBULVgGRqp3BwLtoPkGQKuR+93Pf8Ir79ONiHYobgr 7OdvBpVfBj50gb8sDNTE3K4nHqZNtyWYi8nJ4iIrzRJgPXK2yp+xz+GaOdBwBlsS50Wk vGJA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4qvNwqj9F69SDLesm7NdhFKbhPEAJii6DuEumqaVs6w=; b=Hwf+/CBT8sOGzcLvvbcDTkgiMOq0TaaoLvI+TGqoCBOhOAhzBsQiWxoAv7vYj3On8a fbBLPxOXglDVvdfCKoQwKLlwZ0jOgdXS6PKYfM4sKtulaKjuvy78qceaLUSpaH8IOy9m Y8zuz8SGRQDKlTzb6r9pMggTJSAzhTHig1ZIsqZsP+Kw1612XNx1SyIkZsyCI78VSKz6 lG0Ukj+pUSafCBowSVUKweenbYcfOYxZ6FiFpBMFD3R1vqx0GXdP62YsGQJE5oN5oPu7 RpbR+AFPuai+GBTpsNyexnZMm7ni2AXs5TmWGvp4E6Kfd+278qNjM72PnL2CzPBik+M6 nsfA== X-Gm-Message-State: AFqh2kqqMlWTiPBb6DURNP0Qb2Ra8WCRnsf1876arKCB2G15Ebrjmcn9 mRLqNWSE1quv/uhxgkg5wSh7o+4TITMHtg== X-Google-Smtp-Source: AMrXdXtfM9aOOl0+GulsHD//u0/7cl3256ycdn0PJp+U4o9ge0PJZFKGq9IViXdHohD3pd/pN5jrzQ== X-Received: by 2002:adf:cd8c:0:b0:271:c064:3096 with SMTP id q12-20020adfcd8c000000b00271c0643096mr28639532wrj.21.1672929197088; Thu, 05 Jan 2023 06:33:17 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:16 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow Subject: [PATCH v5 10/31] hw/isa/piix3: Create USB controller in host device Date: Thu, 5 Jan 2023 15:32:07 +0100 Message-Id: <20230105143228.244965-11-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=shentey@gmail.com; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The USB controller is an integral part of PIIX3 (function 2). So create it as part of the south bridge. Note that the USB function is optional in QEMU. This is why it gets object_initialize_child()'ed in realize rather than in instance_init. Signed-off-by: Bernhard Beschow Reviewed-by: Michael S. Tsirkin Message-Id: <20221022150508.26830-13-shentey@gmail.com> --- include/hw/southbridge/piix.h | 4 ++++ hw/i386/pc_piix.c | 7 ++----- hw/isa/piix3.c | 17 +++++++++++++++++ hw/isa/Kconfig | 1 + 4 files changed, 24 insertions(+), 5 deletions(-) diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index b1fa08dd2b..5367917182 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -15,6 +15,7 @@ #include "hw/pci/pci.h" #include "qom/object.h" #include "hw/rtc/mc146818rtc.h" +#include "hw/usb/hcd-uhci.h" /* PIRQRC[A:D]: PIRQx Route Control Registers */ #define PIIX_PIRQCA 0x60 @@ -54,12 +55,15 @@ struct PIIXState { int32_t pci_irq_levels_vmstate[PIIX_NUM_PIRQS]; RTCState rtc; + UHCIState uhci; /* Reset Control Register contents */ uint8_t rcr; /* IO memory region for Reset Control Register (PIIX_RCR_IOPORT) */ MemoryRegion rcr_mem; + + bool has_usb; }; typedef struct PIIXState PIIX3State; diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index c9d6c3dac3..bd21aa7f9d 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -52,7 +52,6 @@ #include "exec/memory.h" #include "hw/acpi/acpi.h" #include "hw/acpi/piix4.h" -#include "hw/usb/hcd-uhci.h" #include "qapi/error.h" #include "qemu/error-report.h" #include "sysemu/xen.h" @@ -236,6 +235,8 @@ static void pc_init1(MachineState *machine, pcms->bus = pci_bus; pci_dev = pci_new_multifunction(-1, true, type); + object_property_set_bool(OBJECT(pci_dev), "has-usb", + machine_usb(machine), &error_abort); pci_realize_and_unref(pci_dev, pci_bus, &error_fatal); piix3 = PIIX3_PCI_DEVICE(pci_dev); piix3->pic = x86ms->gsi; @@ -314,10 +315,6 @@ static void pc_init1(MachineState *machine, } #endif - if (pcmc->pci_enabled && machine_usb(machine)) { - pci_create_simple(pci_bus, piix3_devfn + 2, TYPE_PIIX3_USB_UHCI); - } - if (pcmc->pci_enabled && x86_machine_is_acpi_enabled(X86_MACHINE(pcms))) { PCIDevice *piix4_pm; diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index e8ddb6a602..45c20dea17 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -288,6 +288,7 @@ static const MemoryRegionOps rcr_ops = { static void pci_piix3_realize(PCIDevice *dev, Error **errp) { PIIX3State *d = PIIX3_PCI_DEVICE(dev); + PCIBus *pci_bus = pci_get_bus(dev); ISABus *isa_bus; isa_bus = isa_bus_new(DEVICE(d), pci_address_space(dev), @@ -308,6 +309,16 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp) if (!qdev_realize(DEVICE(&d->rtc), BUS(isa_bus), errp)) { return; } + + /* USB */ + if (d->has_usb) { + object_initialize_child(OBJECT(dev), "uhci", &d->uhci, + TYPE_PIIX3_USB_UHCI); + qdev_prop_set_int32(DEVICE(&d->uhci), "addr", dev->devfn + 2); + if (!qdev_realize(DEVICE(&d->uhci), BUS(pci_bus), errp)) { + return; + } + } } static void build_pci_isa_aml(AcpiDevAmlIf *adev, Aml *scope) @@ -341,6 +352,11 @@ static void pci_piix3_init(Object *obj) object_initialize_child(obj, "rtc", &d->rtc, TYPE_MC146818_RTC); } +static Property pci_piix3_props[] = { + DEFINE_PROP_BOOL("has-usb", PIIX3State, has_usb, true), + DEFINE_PROP_END_OF_LIST(), +}; + static void pci_piix3_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); @@ -360,6 +376,7 @@ static void pci_piix3_class_init(ObjectClass *klass, void *data) * pc_piix.c's pc_init1() */ dc->user_creatable = false; + device_class_set_props(dc, pci_piix3_props); adevc->build_dev_aml = build_pci_isa_aml; } diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig index af5ec9cd61..97b8ea7c06 100644 --- a/hw/isa/Kconfig +++ b/hw/isa/Kconfig @@ -36,6 +36,7 @@ config PIIX3 select I8257 select ISA_BUS select MC146818RTC + select USB_UHCI config PIIX4 bool From patchwork Thu Jan 5 14:32:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090012 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7E544C3DA7D for ; Thu, 5 Jan 2023 14:35:25 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJF-0002pA-6v; Thu, 05 Jan 2023 09:33:33 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJ8-0002kw-Hs; Thu, 05 Jan 2023 09:33:26 -0500 Received: from mail-wr1-x430.google.com ([2a00:1450:4864:20::430]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRJ1-0006uP-NO; Thu, 05 Jan 2023 09:33:22 -0500 Received: by mail-wr1-x430.google.com with SMTP id s9so4301729wru.13; Thu, 05 Jan 2023 06:33:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=UtDKJjOdDUHQw7yADYmwFlcBLtnn+75ysT02XrGuN5o=; b=o7TAqV1RtcavjAYiAI7oM+HI3DG8/SaKXzNmU5od5jdta8X/Sp6xRQJjYfMAwRI1Uy n7CZbtQsqRlmxoZqSrVWeO82aZOKc7DoklnadWM3bwfTGv1kMh3m57DzMziDDgwgteYH UB6phBmagVQ934VJhsgcfG/gpK86/gLMIjH6oXmYPdldNfbTjKCr3Rr52L84y8hBK1iv cOBierXpJzYAhoeb8fheoTmH6vZl6tWvDMsWS7MT1FO2/nhKgsoX5lw4PfC7KMOI1Rn4 bA1U7M+Y8PSiTQnzz2SANNdRnDhIclGzC7IcMrxZbCVoosRmo/SvtCOPP5+W6tapTj/l B7NA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=UtDKJjOdDUHQw7yADYmwFlcBLtnn+75ysT02XrGuN5o=; b=FV89L4I//0kOFj1NaTbirG89mviOhYm/ld4UL1bk6F1m+P/wwreHMvtFshpfx2MUMR mtFew/CBLQpkHzei51XYJk/MgsdWyV9xyIUzzrxo1jA4mbCHnE5/V6buKtzLkQ3M4GAQ tdxWZtcRXoCsB9YH0KezycolAndtKf5FJhiyVGRz/VJXOtqMfyG7kfBioFhx+DMFCO55 1No1gXlLHAatp4TTTOyAZbLH77CMZz1yVxYJgM3kkXmqtJkkjiwtXwBtfFfrjw3NjgBQ JfVrh3KJIHwPWFx8WjOmzjQ5G40LUBLxJuFrYik38dWfgBms6WGYC/aRnZe/fZqADOZd nx6Q== X-Gm-Message-State: AFqh2kqcY2FODllGhf1nt+GPZJIbe/rQg4c+QKu4EbkinM19ytJraL4Q yiXUUZ3xH/L6wOBCvd6jZ+P61aibFx1kyw== X-Google-Smtp-Source: AMrXdXttLGrpSs+RoAgElCOO3j/28YArnBbwym6TuAaYyRYWEpEettzKYu4beQmP8m0nxB41gnRhEQ== X-Received: by 2002:a05:6000:4002:b0:298:4baf:ac8a with SMTP id cy2-20020a056000400200b002984bafac8amr9310942wrb.44.1672929198401; Thu, 05 Jan 2023 06:33:18 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:17 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow Subject: [PATCH v5 11/31] hw/isa/piix3: Create power management controller in host device Date: Thu, 5 Jan 2023 15:32:08 +0100 Message-Id: <20230105143228.244965-12-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=shentey@gmail.com; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The power management controller is an integral part of PIIX3 (function 3). So create it as part of the south bridge. Note that the ACPI function is optional in QEMU. This is why it gets object_initialize_child()'ed in realize rather than in instance_init. Signed-off-by: Bernhard Beschow Reviewed-by: Michael S. Tsirkin Message-Id: <20221022150508.26830-14-shentey@gmail.com> --- include/hw/southbridge/piix.h | 6 ++++++ hw/i386/pc_piix.c | 24 ++++++++++++++---------- hw/isa/piix3.c | 14 ++++++++++++++ hw/isa/Kconfig | 1 + 4 files changed, 35 insertions(+), 10 deletions(-) diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index 5367917182..1c291cc954 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -14,6 +14,7 @@ #include "hw/pci/pci.h" #include "qom/object.h" +#include "hw/acpi/piix4.h" #include "hw/rtc/mc146818rtc.h" #include "hw/usb/hcd-uhci.h" @@ -56,6 +57,9 @@ struct PIIXState { RTCState rtc; UHCIState uhci; + PIIX4PMState pm; + + uint32_t smb_io_base; /* Reset Control Register contents */ uint8_t rcr; @@ -63,7 +67,9 @@ struct PIIXState { /* IO memory region for Reset Control Register (PIIX_RCR_IOPORT) */ MemoryRegion rcr_mem; + bool has_acpi; bool has_usb; + bool smm_enabled; }; typedef struct PIIXState PIIX3State; diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index bd21aa7f9d..eaf252187e 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -46,12 +46,12 @@ #include "sysemu/kvm.h" #include "hw/kvm/clock.h" #include "hw/sysbus.h" +#include "hw/i2c/i2c.h" #include "hw/i2c/smbus_eeprom.h" #include "hw/xen/xen-x86.h" #include "hw/xen/xen.h" #include "exec/memory.h" #include "hw/acpi/acpi.h" -#include "hw/acpi/piix4.h" #include "qapi/error.h" #include "qemu/error-report.h" #include "sysemu/xen.h" @@ -97,6 +97,7 @@ static void pc_init1(MachineState *machine, MemoryRegion *system_io = get_system_io(); PCIBus *pci_bus; ISABus *isa_bus; + Object *piix4_pm; int piix3_devfn = -1; qemu_irq smi_irq; GSIState *gsi_state; @@ -237,15 +238,25 @@ static void pc_init1(MachineState *machine, pci_dev = pci_new_multifunction(-1, true, type); object_property_set_bool(OBJECT(pci_dev), "has-usb", machine_usb(machine), &error_abort); + object_property_set_bool(OBJECT(pci_dev), "has-acpi", + x86_machine_is_acpi_enabled(x86ms), + &error_abort); + qdev_prop_set_uint32(DEVICE(pci_dev), "smb_io_base", 0xb100); + object_property_set_bool(OBJECT(pci_dev), "smm-enabled", + x86_machine_is_smm_enabled(x86ms), + &error_abort); pci_realize_and_unref(pci_dev, pci_bus, &error_fatal); + piix3 = PIIX3_PCI_DEVICE(pci_dev); piix3->pic = x86ms->gsi; piix3_devfn = piix3->dev.devfn; isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0")); rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(pci_dev), "rtc")); + piix4_pm = object_resolve_path_component(OBJECT(pci_dev), "pm"); } else { pci_bus = NULL; + piix4_pm = NULL; isa_bus = isa_bus_new(NULL, get_system_memory(), system_io, &error_abort); @@ -315,15 +326,8 @@ static void pc_init1(MachineState *machine, } #endif - if (pcmc->pci_enabled && x86_machine_is_acpi_enabled(X86_MACHINE(pcms))) { - PCIDevice *piix4_pm; - + if (piix4_pm) { smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); - piix4_pm = pci_new(piix3_devfn + 3, TYPE_PIIX4_PM); - qdev_prop_set_uint32(DEVICE(piix4_pm), "smb_io_base", 0xb100); - qdev_prop_set_bit(DEVICE(piix4_pm), "smm-enabled", - x86_machine_is_smm_enabled(x86ms)); - pci_realize_and_unref(piix4_pm, pci_bus, &error_fatal); qdev_connect_gpio_out(DEVICE(piix4_pm), 0, x86ms->gsi[9]); qdev_connect_gpio_out_named(DEVICE(piix4_pm), "smi-irq", 0, smi_irq); @@ -337,7 +341,7 @@ static void pc_init1(MachineState *machine, object_property_allow_set_link, OBJ_PROP_LINK_STRONG); object_property_set_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, - OBJECT(piix4_pm), &error_abort); + piix4_pm, &error_abort); } if (machine->nvdimms_state->is_enabled) { diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index 45c20dea17..ed7d58bc98 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -319,6 +319,17 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp) return; } } + + /* Power Management */ + if (d->has_acpi) { + object_initialize_child(OBJECT(d), "pm", &d->pm, TYPE_PIIX4_PM); + qdev_prop_set_int32(DEVICE(&d->pm), "addr", dev->devfn + 3); + qdev_prop_set_uint32(DEVICE(&d->pm), "smb_io_base", d->smb_io_base); + qdev_prop_set_bit(DEVICE(&d->pm), "smm-enabled", d->smm_enabled); + if (!qdev_realize(DEVICE(&d->pm), BUS(pci_bus), errp)) { + return; + } + } } static void build_pci_isa_aml(AcpiDevAmlIf *adev, Aml *scope) @@ -353,7 +364,10 @@ static void pci_piix3_init(Object *obj) } static Property pci_piix3_props[] = { + DEFINE_PROP_UINT32("smb_io_base", PIIX3State, smb_io_base, 0), + DEFINE_PROP_BOOL("has-acpi", PIIX3State, has_acpi, true), DEFINE_PROP_BOOL("has-usb", PIIX3State, has_usb, true), + DEFINE_PROP_BOOL("smm-enabled", PIIX3State, smm_enabled, false), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig index 97b8ea7c06..6c154d88c7 100644 --- a/hw/isa/Kconfig +++ b/hw/isa/Kconfig @@ -33,6 +33,7 @@ config PC87312 config PIIX3 bool + select ACPI_PIIX4 select I8257 select ISA_BUS select MC146818RTC From patchwork Thu Jan 5 14:32:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090010 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 86E69C3DA7A for ; Thu, 5 Jan 2023 14:35:13 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJK-0002sr-9R; Thu, 05 Jan 2023 09:33:38 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJ8-0002ky-Gm; Thu, 05 Jan 2023 09:33:26 -0500 Received: from mail-wr1-x433.google.com ([2a00:1450:4864:20::433]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRJ3-0006wx-Cc; Thu, 05 Jan 2023 09:33:23 -0500 Received: by mail-wr1-x433.google.com with SMTP id t15so27445969wro.9; Thu, 05 Jan 2023 06:33:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+zrvIg/iEsO75MxAmfzXaQMRN/YVp9nhgg1eJp3yyhE=; b=ADmmfowVZ6uA7SmNRRHrj+KZZcJF04ACFYDCIhqUWquvx++rkvrZqauRFD3v59Bk7Z qYjy+AQ0jJFRm0QfadUdsNOp0ZDuUDrdv0Q2ZRNZ+AN3Z6qAQQW7maugdFaYwspW6HU/ sd2qEYfNsnViiGrayUrxHRT+ZEDaZyIgz15ZDD6e3Ya52VjtcxhTyNxaqNYvvdTxA3bN dAWoulCXqEIrMHSaYlHmw/XoKE1HRKlfaz/7rbleqJ9YmHoPLy3h1Ie+Fzoc/6NFpKwm pZ9Dv2afjce5fKqqSzyw4rafgVEuE4/UwIcVx0rwZjH5gjqOavqcrOngkbP4yxH7C2BG BFgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+zrvIg/iEsO75MxAmfzXaQMRN/YVp9nhgg1eJp3yyhE=; b=VmToFLVfSPB2zmfa4Jzcp5ZN5+apfGtyd7pOM7I9qHGrq2LqmBUjNN0jgW1NxyY728 17YYbUKAdC20sEbbjnzYq7gWKVlJsi8L0jR0L7PJl8rh5ueYspY0CxMjOjvl/j8sV6Dx I+XF/VfTdyMbk8IyeQ9uOeCXpv10+SeALMglt723ntA2RI/7NS/YG4FQ0nB3rpo6CnDC Vj0nDJZ7kB8y1QBx7ujWH5yPYJ2gRyfau4Z6bvftG7SHwgIW9jGIiegfrKA6yfaqImsD VgV3LqygCUipfDxl+N8H8UBfymaNZ7C33/bkX3MPZ0cIsPDJLDhsgbjwe6G1lpRwL5hU Vvig== X-Gm-Message-State: AFqh2kqyNGuRl94S0H8pl34hJc+2dwvHwUE+753rCJYHem+oRQe6pMIH YSz12fnRTZGNTQ7H1R2GDR6Mm++fjT//1Q== X-Google-Smtp-Source: AMrXdXujI9aPxADq0ljd1u6asGsjDV3eqLM636OO9sbD4MKeyGtVf/SnjWSFmSSzJsN7PZZsB+eRrQ== X-Received: by 2002:a5d:5a95:0:b0:29f:7c87:74a7 with SMTP id bp21-20020a5d5a95000000b0029f7c8774a7mr6077045wrb.45.1672929199390; Thu, 05 Jan 2023 06:33:19 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:19 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow Subject: [PATCH v5 12/31] hw/intc/i8259: Make using the isa_pic singleton more type-safe Date: Thu, 5 Jan 2023 15:32:09 +0100 Message-Id: <20230105143228.244965-13-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=shentey@gmail.com; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This even spares some casts in hot code paths along the way. Signed-off-by: Bernhard Beschow Reviewed-by: Mark Cave-Ayland --- Note: The next patch will introduce a class "isa-pic", which is shall not be confused with the isa_pic singleton. --- include/hw/intc/i8259.h | 6 +++--- include/qemu/typedefs.h | 1 + hw/intc/i8259.c | 11 ++++------- 3 files changed, 8 insertions(+), 10 deletions(-) diff --git a/include/hw/intc/i8259.h b/include/hw/intc/i8259.h index e2b1e8c59a..a0e34dd990 100644 --- a/include/hw/intc/i8259.h +++ b/include/hw/intc/i8259.h @@ -3,10 +3,10 @@ /* i8259.c */ -extern DeviceState *isa_pic; +extern PICCommonState *isa_pic; qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); qemu_irq *kvm_i8259_init(ISABus *bus); -int pic_get_output(DeviceState *d); -int pic_read_irq(DeviceState *d); +int pic_get_output(PICCommonState *s); +int pic_read_irq(PICCommonState *s); #endif diff --git a/include/qemu/typedefs.h b/include/qemu/typedefs.h index 688408e048..3d5944d2a4 100644 --- a/include/qemu/typedefs.h +++ b/include/qemu/typedefs.h @@ -98,6 +98,7 @@ typedef struct PCIExpressDevice PCIExpressDevice; typedef struct PCIExpressHost PCIExpressHost; typedef struct PCIHostDeviceAddress PCIHostDeviceAddress; typedef struct PCIHostState PCIHostState; +typedef struct PICCommonState PICCommonState; typedef struct PostcopyDiscardState PostcopyDiscardState; typedef struct Property Property; typedef struct PropertyInfo PropertyInfo; diff --git a/hw/intc/i8259.c b/hw/intc/i8259.c index cc4e21ffec..0261f087b2 100644 --- a/hw/intc/i8259.c +++ b/hw/intc/i8259.c @@ -55,7 +55,7 @@ struct PICClass { #ifdef DEBUG_IRQ_LATENCY static int64_t irq_time[16]; #endif -DeviceState *isa_pic; +PICCommonState *isa_pic; static PICCommonState *slave_pic; /* return the highest priority found in mask (highest = smallest @@ -173,9 +173,8 @@ static void pic_intack(PICCommonState *s, int irq) pic_update_irq(s); } -int pic_read_irq(DeviceState *d) +int pic_read_irq(PICCommonState *s) { - PICCommonState *s = PIC_COMMON(d); int irq, intno; irq = pic_get_irq(s); @@ -354,10 +353,8 @@ static uint64_t pic_ioport_read(void *opaque, hwaddr addr, return ret; } -int pic_get_output(DeviceState *d) +int pic_get_output(PICCommonState *s) { - PICCommonState *s = PIC_COMMON(d); - return (pic_get_irq(s) >= 0); } @@ -426,7 +423,7 @@ qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq) irq_set[i] = qdev_get_gpio_in(dev, i); } - isa_pic = dev; + isa_pic = PIC_COMMON(dev); isadev = i8259_init_chip(TYPE_I8259, bus, false); dev = DEVICE(isadev); From patchwork Thu Jan 5 14:32:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090031 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8162DC3DA7D for ; Thu, 5 Jan 2023 14:43:51 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJG-0002qX-Sd; Thu, 05 Jan 2023 09:33:34 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJ8-0002kz-Hi; Thu, 05 Jan 2023 09:33:26 -0500 Received: from mail-wr1-x432.google.com ([2a00:1450:4864:20::432]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRJ4-0006xI-FP; Thu, 05 Jan 2023 09:33:23 -0500 Received: by mail-wr1-x432.google.com with SMTP id az7so11916074wrb.5; Thu, 05 Jan 2023 06:33:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=f/stOBuXzPq61GBvXikiJZFmsdbNLA8hzR8SMDeaVvE=; b=Zq7hi7IndJ4NmCJuscL9M7umWvmAeuFZX6yl104VtkwPJdt+JyKjOVxxM1ZdHFfb3Z D/hnUoOWhroRDMqbJm+Kr719hVlNQ8Y7NbGx9qiOicYjdAm8Ma2xWOLU5f1Ik5jWUpcL C04mXCXJ4zzvWqBTvf5UWRT7QXBAmB2E9gUQzWUEInUwqEIRaWsxLkkyMvbNA72xxsVd XhXZhHM4MCtyBVs8UX1qoicfE4EuduSSA1rwK+WipYWV4QgJKZQDmbXcJoDkBh63Rvz7 yZJ8Zn4JWzU6DA/pXv2BbCdw6ZS6r4sE3FC1FTtvL0v3SQQylGnSpgvgTqTuOic+/HK5 A8zQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=f/stOBuXzPq61GBvXikiJZFmsdbNLA8hzR8SMDeaVvE=; b=jfjoey07ARF0IlVUbtSD92oD8dqD9hrR+bI1oCaWFOXOJXqoTLQEP3Q37mYP3h1++h 5GsASlMB5d7IIbB7V1p+4Gid7cgphlFoVZobGqH7ew8pT48AFUdxE+DgyzYvgkpv0KjG 7SBQs+foOrl5RswIR+UbbMnpGce6ax9tqVRdQXJZLfOLIoLXJkNtZE0uG4n74OLleP9v EN8ud7RVtLkz/eQH4FrqnLxzf99LMUlKu5kPJo1yY6V7oVxi9YaClMTse/qq18UORATq +1hMoNO4x/yvHVAfsAgfFWF/26Q9np8TTf7OVADWgSmFEQrNBozRBIe34NdBtSQvL2LD pa3Q== X-Gm-Message-State: AFqh2kozbFnFoAUgtxb0iOrVQxanYpxaDxWXo/T3em2k9ciRqWb1U14q rgWqB05kMIdFkJi3MrjQv2jwvxgRVIJVxw== X-Google-Smtp-Source: AMrXdXuQsyJpuizROKSy7VeEZrAkQz7wd++Au3xDLMDQD3L8fu1dVhL4Eckp9mboJs8O3XUrFeK9XQ== X-Received: by 2002:a5d:6283:0:b0:278:806e:e8f8 with SMTP id k3-20020a5d6283000000b00278806ee8f8mr24550734wru.42.1672929200353; Thu, 05 Jan 2023 06:33:20 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:20 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow , Mark Cave-Ayland Subject: [PATCH v5 13/31] hw/intc/i8259: Introduce i8259 proxy "isa-pic" Date: Thu, 5 Jan 2023 15:32:10 +0100 Message-Id: <20230105143228.244965-14-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=shentey@gmail.com; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Having an i8259 proxy allows for ISA PICs to be created and wired up in southbridges. This is especially interesting for PIIX3 for two reasons: First, the southbridge doesn't need to care about the virtualization technology used (KVM, TCG, Xen) due to in-IRQs (where devices get attached) and out-IRQs (which will trigger the IRQs of the respective virtualization technology) are separated. Second, since the in-IRQs are populated with fully initialized qemu_irq's, they can already be wired up inside PIIX3. Cc: Mark Cave-Ayland Signed-off-by: Bernhard Beschow Reviewed-by: Mark Cave-Ayland --- include/hw/intc/i8259.h | 19 +++++++++++++++++++ hw/intc/i8259.c | 27 +++++++++++++++++++++++++++ 2 files changed, 46 insertions(+) diff --git a/include/hw/intc/i8259.h b/include/hw/intc/i8259.h index a0e34dd990..f666f5ee09 100644 --- a/include/hw/intc/i8259.h +++ b/include/hw/intc/i8259.h @@ -1,6 +1,25 @@ #ifndef HW_I8259_H #define HW_I8259_H +#include "qom/object.h" +#include "hw/isa/isa.h" +#include "qemu/typedefs.h" + +#define TYPE_ISA_PIC "isa-pic" +OBJECT_DECLARE_SIMPLE_TYPE(ISAPICState, ISA_PIC) + +/* + * TYPE_ISA_PIC is currently a PIC proxy which allows for interrupt wiring in + * a virtualization technology agnostic way. It could be turned into a proper + * GPIO-based ISA PIC in the future. + */ +struct ISAPICState { + DeviceState parent_obj; + + qemu_irq in_irqs[ISA_NUM_IRQS]; + qemu_irq out_irqs[ISA_NUM_IRQS]; +}; + /* i8259.c */ extern PICCommonState *isa_pic; diff --git a/hw/intc/i8259.c b/hw/intc/i8259.c index 0261f087b2..e99d02136d 100644 --- a/hw/intc/i8259.c +++ b/hw/intc/i8259.c @@ -455,9 +455,36 @@ static const TypeInfo i8259_info = { .class_size = sizeof(PICClass), }; +static void isapic_set_irq(void *opaque, int irq, int level) +{ + ISAPICState *s = opaque; + + qemu_set_irq(s->out_irqs[irq], level); +} + +static void isapic_init(Object *obj) +{ + ISAPICState *s = ISA_PIC(obj); + + qdev_init_gpio_in(DEVICE(s), isapic_set_irq, ISA_NUM_IRQS); + qdev_init_gpio_out(DEVICE(s), s->out_irqs, ISA_NUM_IRQS); + + for (int i = 0; i < ISA_NUM_IRQS; ++i) { + s->in_irqs[i] = qdev_get_gpio_in(DEVICE(s), i); + } +} + +static const TypeInfo isapic_info = { + .name = TYPE_ISA_PIC, + .parent = TYPE_DEVICE, + .instance_size = sizeof(ISAPICState), + .instance_init = isapic_init, +}; + static void pic_register_types(void) { type_register_static(&i8259_info); + type_register_static(&isapic_info); } type_init(pic_register_types) From patchwork Thu Jan 5 14:32:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090020 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B1F2FC53210 for ; Thu, 5 Jan 2023 14:40:25 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJM-0002ws-M5; Thu, 05 Jan 2023 09:33:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJ8-0002l0-GJ; Thu, 05 Jan 2023 09:33:26 -0500 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRJ4-0006u3-ST; Thu, 05 Jan 2023 09:33:24 -0500 Received: by mail-wr1-x42d.google.com with SMTP id m7so1872619wrn.10; Thu, 05 Jan 2023 06:33:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Spss3rYzRpHnKYYLQNIO8kNwJfo2A0bp3WsUMKGw0FY=; b=h6UVtLISpYl3laFxfHPFg1FVu4EbLXM2hESpUr5KW8LD95gM8OcNGBw+ZjoQ+p5DGX QJ6y0RylHKvgAhxvz0VghzSu5l3tbZY/6VJbCc01nMCftTFL169kFjZtwTkJ2+hQHUNY tD2ux4wu1vArI2oLmcAjp74fLEwuOmO5H6ThRLPnkQsCGlEkJ93/GsXvkphh3FjjL4Np bhrjphhANsgmzzlKpZoKxrKzzoYDevPWAdBHT6oEQ/GhXJ3tYO+BCAa45dqFJe71TIi4 iymq/s2Ry+GvYIaN8+3TsFCd7Z+Qmv1WcSN1C/3SiVzBYNFZk1lZmTEesElV2n/U8kby ZUnw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Spss3rYzRpHnKYYLQNIO8kNwJfo2A0bp3WsUMKGw0FY=; b=ZQuEPDaXNpFrBFg2HqSn7DivHpLQO7ZEUDG3O95QVjExYNdR3MTGpyp4npl994Il+T +x+3Q9wu11gFF0RaOELaQbFHVDGZCQydHwk03+/Cz2Ga0flqEQTj+S1ZWA0hvgtNoBCN oiFO8nHlCctNw04oTUBSCDe+/jkMq8YZPqoNcEXsS5fWSWLTF+9V7UtbgwLV32EptW3v gT60H3wfkrOuP+O4mybadTCAylxughpb8CaDoMkyNDqYcDkIORGbncIEDIucFoa5fdqR cdYls1A6IiAqxJF8CTJa2iaM0PzeMTU7L5cv1BW1iNFSiaMnM4IiBsf1HcFsk9gLgGn4 E+1A== X-Gm-Message-State: AFqh2kpR3GOJOWE+/s9rXL3xCUXXL53U1RQdiRhiYnUI7r47Xxw/JovS XpqUKE6QKH8iy43xaA7Qe9Byz/Ke+heSVg== X-Google-Smtp-Source: AMrXdXv8pJDnfDpwXYwzK0JE27eYmw5nyBHRC2UKP87LF4rcu14Qjo8TiySShs5o8iW5JeVCYQVvPA== X-Received: by 2002:a5d:624f:0:b0:24d:12ce:2dca with SMTP id m15-20020a5d624f000000b0024d12ce2dcamr33547881wrv.53.1672929201456; Thu, 05 Jan 2023 06:33:21 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:21 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow Subject: [PATCH v5 14/31] hw/isa/piix3: Create ISA PIC in host device Date: Thu, 5 Jan 2023 15:32:11 +0100 Message-Id: <20230105143228.244965-15-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=shentey@gmail.com; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Use the newly introduced TYPE_ISA_PIC which allows for wiring up devices in the southbridge where the virtualization technology used (KVM, TCG, Xen) is not yet known. Signed-off-by: Bernhard Beschow Reviewed-by: Michael S. Tsirkin Message-Id: <20221022150508.26830-16-shentey@gmail.com> --- include/hw/southbridge/piix.h | 4 ++-- hw/i386/pc_piix.c | 15 +++++++++------ hw/isa/piix3.c | 10 +++++++++- hw/i386/Kconfig | 1 + hw/isa/Kconfig | 1 + 5 files changed, 22 insertions(+), 9 deletions(-) diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index 1c291cc954..7178147b75 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -15,6 +15,7 @@ #include "hw/pci/pci.h" #include "qom/object.h" #include "hw/acpi/piix4.h" +#include "hw/intc/i8259.h" #include "hw/rtc/mc146818rtc.h" #include "hw/usb/hcd-uhci.h" @@ -50,11 +51,10 @@ struct PIIXState { #endif uint64_t pic_levels; - qemu_irq *pic; - /* This member isn't used. Just for save/load compatibility */ int32_t pci_irq_levels_vmstate[PIIX_NUM_PIRQS]; + ISAPICState pic; RTCState rtc; UHCIState uhci; PIIX4PMState pm; diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index eaf252187e..f779251e79 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -219,10 +219,11 @@ static void pc_init1(MachineState *machine, gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled); if (pcmc->pci_enabled) { - PIIX3State *piix3; + DeviceState *dev; PCIDevice *pci_dev; const char *type = xen_enabled() ? TYPE_PIIX3_XEN_DEVICE : TYPE_PIIX3_DEVICE; + int i; pci_bus = i440fx_init(pci_type, i440fx_host, @@ -247,10 +248,12 @@ static void pc_init1(MachineState *machine, &error_abort); pci_realize_and_unref(pci_dev, pci_bus, &error_fatal); - piix3 = PIIX3_PCI_DEVICE(pci_dev); - piix3->pic = x86ms->gsi; - piix3_devfn = piix3->dev.devfn; - isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0")); + dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "pic")); + for (i = 0; i < ISA_NUM_IRQS; i++) { + qdev_connect_gpio_out(dev, i, x86ms->gsi[i]); + } + piix3_devfn = pci_dev->devfn; + isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(pci_dev), "isa.0")); rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(pci_dev), "rtc")); piix4_pm = object_resolve_path_component(OBJECT(pci_dev), "pm"); @@ -259,6 +262,7 @@ static void pc_init1(MachineState *machine, piix4_pm = NULL; isa_bus = isa_bus_new(NULL, get_system_memory(), system_io, &error_abort); + isa_bus_irqs(isa_bus, x86ms->gsi); rtc_state = isa_new(TYPE_MC146818_RTC); qdev_prop_set_int32(DEVICE(rtc_state), "base_year", 2000); @@ -267,7 +271,6 @@ static void pc_init1(MachineState *machine, i8257_dma_init(isa_bus, 0); pcms->hpet_enabled = false; } - isa_bus_irqs(isa_bus, x86ms->gsi); if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) { pc_i8259_create(isa_bus, gsi_state->i8259_irq); diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index ed7d58bc98..88a6bf28ea 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -39,7 +39,7 @@ static void piix3_set_irq_pic(PIIX3State *piix3, int pic_irq) { - qemu_set_irq(piix3->pic[pic_irq], + qemu_set_irq(piix3->pic.in_irqs[pic_irq], !!(piix3->pic_levels & (((1ULL << PIIX_NUM_PIRQS) - 1) << (pic_irq * PIIX_NUM_PIRQS)))); @@ -297,6 +297,13 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp) return; } + /* PIC */ + if (!qdev_realize(DEVICE(&d->pic), NULL, errp)) { + return; + } + + isa_bus_irqs(isa_bus, d->pic.in_irqs); + memory_region_init_io(&d->rcr_mem, OBJECT(dev), &rcr_ops, d, "piix3-reset-control", 1); memory_region_add_subregion_overlap(pci_address_space_io(dev), @@ -360,6 +367,7 @@ static void pci_piix3_init(Object *obj) { PIIX3State *d = PIIX3_PCI_DEVICE(obj); + object_initialize_child(obj, "pic", &d->pic, TYPE_ISA_PIC); object_initialize_child(obj, "rtc", &d->rtc, TYPE_MC146818_RTC); } diff --git a/hw/i386/Kconfig b/hw/i386/Kconfig index d22ac4a4b9..79f5925dbe 100644 --- a/hw/i386/Kconfig +++ b/hw/i386/Kconfig @@ -72,6 +72,7 @@ config I440FX select PC_PCI select PC_ACPI select ACPI_SMBUS + select I8259 select PCI_I440FX select PIIX3 select IDE_PIIX diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig index 6c154d88c7..694c8840de 100644 --- a/hw/isa/Kconfig +++ b/hw/isa/Kconfig @@ -35,6 +35,7 @@ config PIIX3 bool select ACPI_PIIX4 select I8257 + select I8259 select ISA_BUS select MC146818RTC select USB_UHCI From patchwork Thu Jan 5 14:32:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090002 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2187BC3DA7A for ; Thu, 5 Jan 2023 14:34:09 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJE-0002nZ-BK; Thu, 05 Jan 2023 09:33:32 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJ8-0002l2-IA; Thu, 05 Jan 2023 09:33:26 -0500 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRJ5-0006tk-UM; Thu, 05 Jan 2023 09:33:25 -0500 Received: by mail-wr1-x42d.google.com with SMTP id r2so1493862wrv.7; Thu, 05 Jan 2023 06:33:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LRJ7FULpU4Vrnv1iCjxuxZesrQEHxzdK/yoJGxwtQcU=; b=QJTxqwqtXr9y92DyR/OuTCJfexuF1ieBci9GYxHsD6n/4EXEbszXifeTksnPvcmiFY tGVZSLgxBmkD87BUYItIznySIApjgclOKAH4CodbfO1/gHAkpgof+lvC0MxJL96oKTZc cuOXRtjs6vklKqn5ucFenY5SCjXP/bfo1CAbHpae2bkhQkap2jiFixzo065Bkr6OjA2I i04je0QdgFMlPjPNEGVREZVIJXFkO9zo7raIahKlA5SqCwzPc8rYs+maaEUE0ifNJkQt 93WQ5L/lA7ruVcy1aiPIzaD/OGuTtCytXcz+flgRUsXeShzRDzFfHR2fj7T1TWrBf3vu c62g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LRJ7FULpU4Vrnv1iCjxuxZesrQEHxzdK/yoJGxwtQcU=; b=Lj/mdBSQjDXhM+avjvEyFjWx9XqnT3lwG8ZAqzXTw3RznmZlqX7lALG6fZLKEHyvFv 1BAJwvtJSGmdI23VkeoFn4b63eWDmFgfHLCR0DsWcfAPFEIDY+3UMhsFphBcGxovrhu6 38zlW+eostMxuRNcG6QWE98bcgA3oOHImSSNSxbJQGyhQGOYBu3je1X/uKYoADS/Iv4h 8nOyMjaik1jOSIxMSsYCj2MHowIjNiB24xVhnHCDZSgf4PrT5mmxPrF+Pc6MCAB2YbNy LipnyeWf1uWoUDfuqmL06fEkVeb1tVQkOFTmM+qVZA3/vh/xZEdJRymt9u/FNh363I5c chLg== X-Gm-Message-State: AFqh2korIdCodkmsHMqrGP/P58vn96aE4F2c/wqlIQVN004gKFov38DW VRwl92oU9j02QLva3L5dy2MbvROh9V7xuA== X-Google-Smtp-Source: AMrXdXv19oIcn9ScQV2bTzMBVIDZ7WDljti0LaRAhyMla1riyzVPNperx9GYNAYK7hw9ADdgrXUrzw== X-Received: by 2002:a05:6000:694:b0:26c:e7a9:97a9 with SMTP id bo20-20020a056000069400b0026ce7a997a9mr38412120wrb.60.1672929202759; Thu, 05 Jan 2023 06:33:22 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:22 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow Subject: [PATCH v5 15/31] hw/isa/piix3: Create IDE controller in host device Date: Thu, 5 Jan 2023 15:32:12 +0100 Message-Id: <20230105143228.244965-16-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=shentey@gmail.com; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Now that PIIX3 contains the new isa-pic, it is possible to instantiate PIIX3 IDE in the PIIX3 southbridge. PIIX3 IDE wires up its interrupts to the ISA bus in its realize method which requires the interrupt controller to provide fully populated qemu_irqs. This is the case for isa-pic even though the virtualization technology not known yet. Signed-off-by: Bernhard Beschow Reviewed-by: Michael S. Tsirkin Message-Id: <20221022150508.26830-17-shentey@gmail.com> --- include/hw/southbridge/piix.h | 2 ++ hw/i386/pc_piix.c | 15 ++++++--------- hw/isa/piix3.c | 8 ++++++++ hw/i386/Kconfig | 1 - hw/isa/Kconfig | 1 + 5 files changed, 17 insertions(+), 10 deletions(-) diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index 7178147b75..1f22eb1444 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -15,6 +15,7 @@ #include "hw/pci/pci.h" #include "qom/object.h" #include "hw/acpi/piix4.h" +#include "hw/ide/pci.h" #include "hw/intc/i8259.h" #include "hw/rtc/mc146818rtc.h" #include "hw/usb/hcd-uhci.h" @@ -56,6 +57,7 @@ struct PIIXState { ISAPICState pic; RTCState rtc; + PCIIDEState ide; UHCIState uhci; PIIX4PMState pm; diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index f779251e79..f92fa34d76 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -41,7 +41,6 @@ #include "hw/usb.h" #include "net/net.h" #include "hw/ide/pci.h" -#include "hw/ide/piix.h" #include "hw/irq.h" #include "sysemu/kvm.h" #include "hw/kvm/clock.h" @@ -98,7 +97,6 @@ static void pc_init1(MachineState *machine, PCIBus *pci_bus; ISABus *isa_bus; Object *piix4_pm; - int piix3_devfn = -1; qemu_irq smi_irq; GSIState *gsi_state; BusState *idebus[MAX_IDE_BUS]; @@ -252,11 +250,14 @@ static void pc_init1(MachineState *machine, for (i = 0; i < ISA_NUM_IRQS; i++) { qdev_connect_gpio_out(dev, i, x86ms->gsi[i]); } - piix3_devfn = pci_dev->devfn; isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(pci_dev), "isa.0")); rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(pci_dev), "rtc")); piix4_pm = object_resolve_path_component(OBJECT(pci_dev), "pm"); + dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ide")); + pci_ide_create_devs(PCI_DEVICE(dev)); + idebus[0] = qdev_get_child_bus(dev, "ide.0"); + idebus[1] = qdev_get_child_bus(dev, "ide.1"); } else { pci_bus = NULL; piix4_pm = NULL; @@ -270,6 +271,8 @@ static void pc_init1(MachineState *machine, i8257_dma_init(isa_bus, 0); pcms->hpet_enabled = false; + idebus[0] = NULL; + idebus[1] = NULL; } if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) { @@ -298,12 +301,6 @@ static void pc_init1(MachineState *machine, pc_nic_init(pcmc, isa_bus, pci_bus); if (pcmc->pci_enabled) { - PCIDevice *dev; - - dev = pci_create_simple(pci_bus, piix3_devfn + 1, TYPE_PIIX3_IDE); - pci_ide_create_devs(dev); - idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0"); - idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1"); pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); } #ifdef CONFIG_IDE_ISA diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index 88a6bf28ea..a549b1a8a5 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -29,6 +29,7 @@ #include "hw/southbridge/piix.h" #include "hw/irq.h" #include "hw/qdev-properties.h" +#include "hw/ide/piix.h" #include "hw/isa/isa.h" #include "hw/xen/xen.h" #include "sysemu/runstate.h" @@ -317,6 +318,12 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp) return; } + /* IDE */ + qdev_prop_set_int32(DEVICE(&d->ide), "addr", dev->devfn + 1); + if (!qdev_realize(DEVICE(&d->ide), BUS(pci_bus), errp)) { + return; + } + /* USB */ if (d->has_usb) { object_initialize_child(OBJECT(dev), "uhci", &d->uhci, @@ -369,6 +376,7 @@ static void pci_piix3_init(Object *obj) object_initialize_child(obj, "pic", &d->pic, TYPE_ISA_PIC); object_initialize_child(obj, "rtc", &d->rtc, TYPE_MC146818_RTC); + object_initialize_child(obj, "ide", &d->ide, TYPE_PIIX3_IDE); } static Property pci_piix3_props[] = { diff --git a/hw/i386/Kconfig b/hw/i386/Kconfig index 79f5925dbe..39a35467ca 100644 --- a/hw/i386/Kconfig +++ b/hw/i386/Kconfig @@ -75,7 +75,6 @@ config I440FX select I8259 select PCI_I440FX select PIIX3 - select IDE_PIIX select DIMM select SMBIOS select FW_CFG_DMA diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig index 694c8840de..497cc29beb 100644 --- a/hw/isa/Kconfig +++ b/hw/isa/Kconfig @@ -36,6 +36,7 @@ config PIIX3 select ACPI_PIIX4 select I8257 select I8259 + select IDE_PIIX select ISA_BUS select MC146818RTC select USB_UHCI From patchwork Thu Jan 5 14:32:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090023 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 98E3DC3DA7A for ; Thu, 5 Jan 2023 14:40:58 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJL-0002v6-4s; Thu, 05 Jan 2023 09:33:39 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJ9-0002mu-3k; Thu, 05 Jan 2023 09:33:27 -0500 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRJ7-0006tZ-6C; Thu, 05 Jan 2023 09:33:26 -0500 Received: by mail-wr1-x42a.google.com with SMTP id s9so4302032wru.13; Thu, 05 Jan 2023 06:33:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/bpLpaNXFNCOqMhVUmSB3BwAsWhMZztqdMJYCfiAm1E=; b=HMWuCU4X4QDxLHncp0WwXakG5luN0lQQfFKd0tRNxVjpY6fCQk/g5lUYWd7flHDNfH 0bsNsifKGu592j/uRcYM2OhxfLt88q4NoiVivVyC+Ue1RXs7m9uOuyzaRNe3tDLjC5iE YGxVjdVqK6BGVzELJ7RZ+l/P1xFPh2Nxle4BG04R5GrsOzqNSuyHn+c9it/s/dSgFslf cLkUdGN6ftEIOSkvHEP7qhHZhMhvBO88KJlMvX+ibVPa8R/REcoaAFwM2hojPmo0ke4N zuySecoiftm725dtg7kDjbhu6m2dhBY2Z5sjfrYxx6NxvKGyIRk3lU7IDNgdeE3C3K7Q 6d2g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/bpLpaNXFNCOqMhVUmSB3BwAsWhMZztqdMJYCfiAm1E=; b=yz2t+nWMYunUpU/7W2AqN2ZkECf8MV0xFGwgZhd42OX+M1t6Cxk8/aHiv+dXd7wtnZ OiIFMt1DqqZdMtrx71bgPHQ9IlaJp+wwEn5pRSPpFPRB9FOBxnOeYAFOkury8PYBMdBu TX/UJFPyhjY8Z7PRfaxI2Ua6eshIzM7/vVg/ZWKF1hCsxXpYap6qFXGhRy8JgXFAdPtL nTRfMg0oBm/Ea812OldWnm2OAPA2SVAst2B2YxX5kJZ7FmAMg7+gxIYOAwsfgZ9fFCO7 +Pw6yDd4H2S59IoEC0YqDsEF33N1qZBeGiLkkcAqUTUzQmi6t2XpCl9JHSImfS5VmXM4 O5dA== X-Gm-Message-State: AFqh2kon+s9D9+tqZcOAMbAWwMc5DbbRvyjXjIcHoLU5aYR2O7A9KKOC jnWZFT8yPLE7RVoMAzbhZ+tv6RVq0h8LLg== X-Google-Smtp-Source: AMrXdXuORBW13dQ3KC3nMkyBONsiFnGqVI+x4f1XGhCjP+mcpm+mq3Bdmllybk91Skjk9HhTXVB4UA== X-Received: by 2002:adf:f1c9:0:b0:242:1d69:1ba1 with SMTP id z9-20020adff1c9000000b002421d691ba1mr38981231wro.44.1672929203695; Thu, 05 Jan 2023 06:33:23 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:23 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow Subject: [PATCH v5 16/31] hw/isa/piix3: Wire up ACPI interrupt internally Date: Thu, 5 Jan 2023 15:32:13 +0100 Message-Id: <20230105143228.244965-17-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=shentey@gmail.com; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Now that PIIX3 has the PIC integrated, the ACPI controller can be wired up internally. Signed-off-by: Bernhard Beschow Reviewed-by: Michael S. Tsirkin Message-Id: <20221022150508.26830-18-shentey@gmail.com> --- hw/i386/pc_piix.c | 1 - hw/isa/piix3.c | 2 ++ 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index f92fa34d76..aacdb72b7c 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -329,7 +329,6 @@ static void pc_init1(MachineState *machine, if (piix4_pm) { smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); - qdev_connect_gpio_out(DEVICE(piix4_pm), 0, x86ms->gsi[9]); qdev_connect_gpio_out_named(DEVICE(piix4_pm), "smi-irq", 0, smi_irq); pcms->smbus = I2C_BUS(qdev_get_child_bus(DEVICE(piix4_pm), "i2c")); /* TODO: Populate SPD eeprom data. */ diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index a549b1a8a5..6d2ffd449c 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -343,6 +343,8 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp) if (!qdev_realize(DEVICE(&d->pm), BUS(pci_bus), errp)) { return; } + qdev_connect_gpio_out(DEVICE(&d->pm), 0, + qdev_get_gpio_in(DEVICE(&d->pic), 9)); } } From patchwork Thu Jan 5 14:32:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090017 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CB3D6C3DA7A for ; Thu, 5 Jan 2023 14:37:30 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJL-0002wZ-T7; Thu, 05 Jan 2023 09:33:39 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJA-0002nA-7j; Thu, 05 Jan 2023 09:33:29 -0500 Received: from mail-wr1-x434.google.com ([2a00:1450:4864:20::434]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRJ8-0006tS-1b; Thu, 05 Jan 2023 09:33:28 -0500 Received: by mail-wr1-x434.google.com with SMTP id co23so36342690wrb.4; Thu, 05 Jan 2023 06:33:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lx7EgCXB+3A8OfGp+3/2Ac3vzft3Y18ByRxSeeBTdLg=; b=l1PS5pN11KfUOI71BiVebG3AS159Rmpre8r8yf04vZoHpF+5OEzM6FwG6Yafod7+9l 8r32Olw1hTZCR4yBlMvKlBVXjX6G+Tlu5y0B7pgHi8PkIvpsY0GzYhY5MGoED4pN02nX C4ar+TEXkxR7T3VChSP3iebIcVW6D4fnpbK/UNM3XFdbzZHlN/8EuCmnyiEuCsYbFoCS nld4TBsDDXYLD2x1QMrq0hxekXdKOYo6m4TzhPc85TRIQ7gKdopdLTGLw86TrpZKhGwp y3a+Ey/6HAqj+hi2xxHpMHYzWtLbF7nk1Rbx1awX6tSL+ORGU6+9Hob1y4IUHk7skXiG mGiw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lx7EgCXB+3A8OfGp+3/2Ac3vzft3Y18ByRxSeeBTdLg=; b=htPyPBIRsPdCP0ixbePtQ2VRW7+SGVe5DhSwFBug0y2TbugKCC4qsheEEosPN6PPfv nuEt0GFsY80aGBpa6ne20vJMOrSxnucyyYknAkzZ/BSbBSrXLip42ME+4l8TSNSWTJtY fl6z4+BgDx7oHaTwFlSq2vKCZ9tGVeSy55ZnO7oIVig1Anq1pWi9erettP92MDaTtqjm 3/2cToGFa9bBnfnkERjAbk5FGANnxX9lj68bB8POhsYjys1YxsQj0ARDp/Ubi4V2tNBS O9RXfQL3k8W0/ys3uW9UPPXpXB4C0CKWgTbW1MMoeekjTtke3NVvY8aMHbWtKEc5MFRM lJbQ== X-Gm-Message-State: AFqh2ko7bRV5UDyx3rmyS1pRSBh16HCgXZgtbqBIYVXp902f1xpHzcn6 cBMV/YOcXA7P+NjysuUhazeZsANia+Xuig== X-Google-Smtp-Source: AMrXdXtgVzTvykoWZs+93mDWzIZZtPxNE1XSa6HpJusWdv++HDcPuieXj9alBvcUd5KN+I/fGLzKSA== X-Received: by 2002:adf:de8a:0:b0:266:3709:5ce3 with SMTP id w10-20020adfde8a000000b0026637095ce3mr30894943wrl.0.1672929204789; Thu, 05 Jan 2023 06:33:24 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:24 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow Subject: [PATCH v5 17/31] hw/isa/piix3: Resolve redundant PIIX_NUM_PIC_IRQS Date: Thu, 5 Jan 2023 15:32:14 +0100 Message-Id: <20230105143228.244965-18-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=shentey@gmail.com; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org PIIX_NUM_PIC_IRQS is assumed to be the same as ISA_NUM_IRQS, otherwise inconsistencies can occur. Signed-off-by: Bernhard Beschow Reviewed-by: Michael S. Tsirkin Message-Id: <20221022150508.26830-21-shentey@gmail.com> --- include/hw/southbridge/piix.h | 5 ++--- hw/isa/piix3.c | 8 ++++---- 2 files changed, 6 insertions(+), 7 deletions(-) diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index 1f22eb1444..060f2ba60c 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -32,7 +32,6 @@ */ #define PIIX_RCR_IOPORT 0xcf9 -#define PIIX_NUM_PIC_IRQS 16 /* i8259 * 2 */ #define PIIX_NUM_PIRQS 4ULL /* PIRQ[A-D] */ struct PIIXState { @@ -44,10 +43,10 @@ struct PIIXState { * So one PIC level is tracked by PIIX_NUM_PIRQS bits. * * PIRQ is mapped to PIC pins, we track it by - * PIIX_NUM_PIRQS * PIIX_NUM_PIC_IRQS = 64 bits with + * PIIX_NUM_PIRQS * ISA_NUM_IRQS = 64 bits with * pic_irq * PIIX_NUM_PIRQS + pirq */ -#if PIIX_NUM_PIC_IRQS * PIIX_NUM_PIRQS > 64 +#if ISA_NUM_IRQS * PIIX_NUM_PIRQS > 64 #error "unable to encode pic state in 64bit in pic_levels." #endif uint64_t pic_levels; diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index 6d2ffd449c..e813e20639 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -52,7 +52,7 @@ static void piix3_set_irq_level_internal(PIIX3State *piix3, int pirq, int level) uint64_t mask; pic_irq = piix3->dev.config[PIIX_PIRQCA + pirq]; - if (pic_irq >= PIIX_NUM_PIC_IRQS) { + if (pic_irq >= ISA_NUM_IRQS) { return; } @@ -66,7 +66,7 @@ static void piix3_set_irq_level(PIIX3State *piix3, int pirq, int level) int pic_irq; pic_irq = piix3->dev.config[PIIX_PIRQCA + pirq]; - if (pic_irq >= PIIX_NUM_PIC_IRQS) { + if (pic_irq >= ISA_NUM_IRQS) { return; } @@ -87,7 +87,7 @@ static PCIINTxRoute piix3_route_intx_pin_to_irq(void *opaque, int pin) int irq = piix3->dev.config[PIIX_PIRQCA + pin]; PCIINTxRoute route; - if (irq < PIIX_NUM_PIC_IRQS) { + if (irq < ISA_NUM_IRQS) { route.mode = PCI_INTX_ENABLED; route.irq = irq; } else { @@ -119,7 +119,7 @@ static void piix3_write_config(PCIDevice *dev, pci_bus_fire_intx_routing_notifier(pci_get_bus(&piix3->dev)); piix3_update_irq_levels(piix3); - for (pic_irq = 0; pic_irq < PIIX_NUM_PIC_IRQS; pic_irq++) { + for (pic_irq = 0; pic_irq < ISA_NUM_IRQS; pic_irq++) { piix3_set_irq_pic(piix3, pic_irq); } } From patchwork Thu Jan 5 14:32:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090005 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2D42CC3DA7A for ; Thu, 5 Jan 2023 14:34:25 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJH-0002rI-C7; Thu, 05 Jan 2023 09:33:35 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJB-0002nE-AL; Thu, 05 Jan 2023 09:33:29 -0500 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRJ9-0006zY-P8; Thu, 05 Jan 2023 09:33:29 -0500 Received: by mail-wr1-x42a.google.com with SMTP id bn26so16848214wrb.0; Thu, 05 Jan 2023 06:33:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ROZS9DAh1LyOJO5f9sd5J7Flg4V9+Kkad/7x0aYqgvc=; b=T6SnYYfpIT4M4iK35TInehoWva1alsrEeKBPee/UGUxNXQa7/6dX8cELwEgnVFkJNl 32lg/130eKi3eOwH2slkzfKSipbNByn7q5r2EBuYdNBbdzBzcfE+esdOtoBEVLyQExtF rWr/d8ByWyvDqcGDTWH4W0LH59ziM/eo9Gn4Zt7aRDpx+h5hZCl/GUhL5IJqOuQxvChd Q7JgmP8R2KIWQBrTvXkg2IEwRKQwkY/JeS3E/IbEqdeMLD68XbkEX/zTCvgI6byR1Df5 BtZ5c7crVf9opZBGOjEWma9DNrUe5z4d5H0LfS8YyVrKWH03Fny+UOF0q8+jWZmM+lFE qzNw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ROZS9DAh1LyOJO5f9sd5J7Flg4V9+Kkad/7x0aYqgvc=; b=Q6xxZG+lywNiA4M50zReDPPWJUT7RMCY+qotWIBfxZgKNWEWNjc4NVoYPgtfEhSKQ2 gZzsqXukTz6c6z4Pv69PzjHysyzx9hhVUQMhfG7BGVhoN4HF1zYG1/fr2fq+Qx438LfE Ui9HvRItaUCCuzmSgggYuI92dZbp0m/GZMpOMbm5s7lEPWm3tLNrsJsNciljI30p24hX x50d7Y4uo5Kjbw7o7RL/6J19StYJGiTrOXfL7cez9Su3EdDQxMY+dXdRaERqRssHgxjw 0XPoBBtk66aw5xeRnLdGEFPXg9c+M16KaC+7tDVohEv+/V7PdtnAiTzGiclofrYTncRf ajSw== X-Gm-Message-State: AFqh2kp8YHS2C43Fstv9JTFAu/UAiCtOSFcHRJyfodf9fnjFGwwPslCO 3/veS8mH9FQ3QJDTEpvDhCWAY50K63eYfQ== X-Google-Smtp-Source: AMrXdXs7o7hQ4AckhdAfY6BHRGdcoQ/h4hwoDRVTpiBOHOyQzEDWTd3qdlMbx+16nzLuRBHlk7pGhw== X-Received: by 2002:a5d:5910:0:b0:27c:7c2a:f700 with SMTP id v16-20020a5d5910000000b0027c7c2af700mr20721080wrd.8.1672929205811; Thu, 05 Jan 2023 06:33:25 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:25 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow Subject: [PATCH v5 18/31] hw/isa/piix3: Rename pci_piix3_props for sharing with PIIX4 Date: Thu, 5 Jan 2023 15:32:15 +0100 Message-Id: <20230105143228.244965-19-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=shentey@gmail.com; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin Message-Id: <20221022150508.26830-22-shentey@gmail.com> --- hw/isa/piix3.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index e813e20639..c6659bbfda 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -381,7 +381,7 @@ static void pci_piix3_init(Object *obj) object_initialize_child(obj, "ide", &d->ide, TYPE_PIIX3_IDE); } -static Property pci_piix3_props[] = { +static Property pci_piix_props[] = { DEFINE_PROP_UINT32("smb_io_base", PIIX3State, smb_io_base, 0), DEFINE_PROP_BOOL("has-acpi", PIIX3State, has_acpi, true), DEFINE_PROP_BOOL("has-usb", PIIX3State, has_usb, true), @@ -408,7 +408,7 @@ static void pci_piix3_class_init(ObjectClass *klass, void *data) * pc_piix.c's pc_init1() */ dc->user_creatable = false; - device_class_set_props(dc, pci_piix3_props); + device_class_set_props(dc, pci_piix_props); adevc->build_dev_aml = build_pci_isa_aml; } From patchwork Thu Jan 5 14:32:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090029 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3A75DC3DA7D for ; Thu, 5 Jan 2023 14:43:37 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJM-0002wi-Cd; Thu, 05 Jan 2023 09:33:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJB-0002nX-JP; Thu, 05 Jan 2023 09:33:30 -0500 Received: from mail-wr1-x42b.google.com ([2a00:1450:4864:20::42b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRJA-0006vC-0l; Thu, 05 Jan 2023 09:33:29 -0500 Received: by mail-wr1-x42b.google.com with SMTP id w1so24198367wrt.8; Thu, 05 Jan 2023 06:33:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=oNVX7gPoz1BSpxO3xGWjfBNYIjlgV62/Ccs00KSMxZU=; b=hHNfnG1nk7CSCSUhXiR5l737YelJiVBFnzpCr+KqJ3VdQYPpYL0pojEFE0CDVJINh7 v8XblEF0S4NnZGieU53BaETECNBulE8lLLYZZLoe0hcy1ZPU1vnUzTsB+BLQfTV0qGcR ka7fAC1QXSlgDTsfPqKw9+rBjhVoowT4zIpjNsle+NsqTQidBMHLfWHF96PP0mRv175D t+lXlAk5Xnw6Ov32EUJ+XKpzFQRsz7+47nLotxvFK9EGq8FyinPue/3TgmMehzl8pqME 6XszRHsAyit4mZtDjhLQ38LiRL3MBeAFTjO/uujpI1Y4ti0IEhkpqByQBtUVdGeha5ps 6iDw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=oNVX7gPoz1BSpxO3xGWjfBNYIjlgV62/Ccs00KSMxZU=; b=nM9IEQ8/XQ8L79XNkgcjYYzLzkhGKoU/cs/JTXXOGIDr75+CLapplHR/UW1AFwcrut 5bAHQSkRZvUK7d2qhzPbsmPxh4ojXgPxzl+1s7Xynd+fehU/Fng9p3IQkKi+BXcqy22L 1vFhAAv1FYrTPi6ElcWl6Qvj//XqhkEVBwAk/qSNXDnjU2LCjXK7ZOYIT1p1nmZzAg1H Wt7QspG5tWqLuu58QPWAns44fN8VMPFB2bqK9VS3B52aGe/SmbP8ta/i3h9hiaC5Byh6 nYP5uQMp+ko7xgWHzD9k4KagbLieoPK++cAtFj0U17WFI88zCSTD+HBbacRNW5Iu1RZR ziWA== X-Gm-Message-State: AFqh2kqu2dNks3uQYFd6N/YeXCsVh/G9/FMzZeaq0/nAug2zoyN/xXPH nuh8hv2s1MpiYdd3aZigaWmyudKT1uprLA== X-Google-Smtp-Source: AMrXdXu3UVc4JqU7h15aBaRue4qJOaTMUI5JFgx3lCR44Su2iU/Q5/oHUeRBMA8MJMiTa0QRPoMfDw== X-Received: by 2002:adf:e8c3:0:b0:28f:29b3:1a85 with SMTP id k3-20020adfe8c3000000b0028f29b31a85mr14808335wrn.2.1672929206766; Thu, 05 Jan 2023 06:33:26 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:26 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow Subject: [PATCH v5 19/31] hw/isa/piix3: Rename piix3_reset() for sharing with PIIX4 Date: Thu, 5 Jan 2023 15:32:16 +0100 Message-Id: <20230105143228.244965-20-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=shentey@gmail.com; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin Message-Id: <20221022150508.26830-23-shentey@gmail.com> --- hw/isa/piix3.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index c6659bbfda..d674130fc9 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -145,7 +145,7 @@ static void piix3_write_config_xen(PCIDevice *dev, piix3_write_config(dev, address, val, len); } -static void piix3_reset(DeviceState *dev) +static void piix_reset(DeviceState *dev) { PIIX3State *d = PIIX3_PCI_DEVICE(dev); uint8_t *pci_conf = d->dev.config; @@ -395,7 +395,7 @@ static void pci_piix3_class_init(ObjectClass *klass, void *data) PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass); - dc->reset = piix3_reset; + dc->reset = piix_reset; dc->desc = "ISA bridge"; dc->vmsd = &vmstate_piix3; dc->hotpluggable = false; From patchwork Thu Jan 5 14:32:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090019 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EFEE8C3DA7A for ; Thu, 5 Jan 2023 14:39:20 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJN-0002xE-5F; Thu, 05 Jan 2023 09:33:41 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJC-0002nk-UI; Thu, 05 Jan 2023 09:33:31 -0500 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRJA-0006tk-Vo; Thu, 05 Jan 2023 09:33:30 -0500 Received: by mail-wr1-x42d.google.com with SMTP id r2so1494135wrv.7; Thu, 05 Jan 2023 06:33:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=yxTwn3T8SKicpRZkBUMmS8trNtCu2Q41suXsMyXog+8=; b=gINMJ+uTzPmXqiowOw1byQ9//SxloycTMc1bPoTbCkypZj6iwsK4EGCRyjGjbIHSdP CEeUOqw6zeD1dfkKCI9k901tdXYQq3/Hic1jS6IOAsJlhBl/sukEjPyxv88gnJEJsLg9 mr3ytaQ4lA1w2ChXBvjhC8ERLNt32CsVaeotzEfLKJbKE8AtNMJ/s6JPJUkDTofsQwT8 EbcigWxNbYm7dH8K595NMwG/i4tUSV+gxzpUQJqYVbdFEPG1dctJi3VQ8LZ2qlHBHsQP JrThY8jTxPDIpPFvma99mRaUVIbno3iwGDyLEDk0nsaqeSL3r7mfeX1K/TMu4RjoKEGv V7sQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yxTwn3T8SKicpRZkBUMmS8trNtCu2Q41suXsMyXog+8=; b=zn5lO2UnSgjr3ildOS4ozL35ZLpTRDa6uL2yDjCrC1BrW1uYW+wAJvO3t6/qIoZ7zt cSYPn+g2ogNlAx4drHNa6GTvgyF1XAkFXIh1JA8LWYu4X9Lv4Q0GCGvvC1QtEu5iBrm7 gVAz/gvJprEYt5DN1rld01+oEuRBRb8vbbqcH1u1Bay0SRVp/tj/wDUsamC8jg7FxgTP 4LMnz9KhuOLY4fMWF8cUI4O/9lXdAqWVU5+611E/2qj6dJj193qPtnr+AJ13237J8feG YyYh6nC+F5R0nLnO1SBS8PEkr6DVTkxZTfakBNnmcXVXc27niD9y1EMPYSN+lWiyI9++ grrw== X-Gm-Message-State: AFqh2koOsZEdB90FJz3b5sVZbeLI48YDGFVoeuxUahBQ94bvGaDPbH5t Gc/lkHL6Hl20+9rOJkLUYK/ZUU99+rZJ1A== X-Google-Smtp-Source: AMrXdXuKxnpmdpK1tR069BQ0BOFRAsUOjecrl5xgbtMw3EOOHi99gREvl0h8bx0Euok8BcxENCsm7Q== X-Received: by 2002:adf:e9c6:0:b0:287:9c01:3a49 with SMTP id l6-20020adfe9c6000000b002879c013a49mr16592409wrn.41.1672929207740; Thu, 05 Jan 2023 06:33:27 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:27 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow Subject: [PATCH v5 20/31] hw/isa/piix3: Drop the "3" from PIIX base class Date: Thu, 5 Jan 2023 15:32:17 +0100 Message-Id: <20230105143228.244965-21-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=shentey@gmail.com; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This commit marks the finalization of the PIIX3 preparations to be merged with PIIX4. In particular, PIIXState is prepared to be reused in piix4.c. Signed-off-by: Bernhard Beschow Reviewed-by: Michael S. Tsirkin Message-Id: <20221022150508.26830-25-shentey@gmail.com> --- include/hw/southbridge/piix.h | 6 ++-- hw/isa/piix3.c | 60 +++++++++++++++++------------------ 2 files changed, 32 insertions(+), 34 deletions(-) diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index 060f2ba60c..5753c68710 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -72,11 +72,9 @@ struct PIIXState { bool has_usb; bool smm_enabled; }; -typedef struct PIIXState PIIX3State; -#define TYPE_PIIX3_PCI_DEVICE "pci-piix3" -DECLARE_INSTANCE_CHECKER(PIIX3State, PIIX3_PCI_DEVICE, - TYPE_PIIX3_PCI_DEVICE) +#define TYPE_PIIX_PCI_DEVICE "pci-piix" +OBJECT_DECLARE_SIMPLE_TYPE(PIIXState, PIIX_PCI_DEVICE) #define TYPE_PIIX3_DEVICE "PIIX3" #define TYPE_PIIX3_XEN_DEVICE "PIIX3-xen" diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index d674130fc9..4ce1653406 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -38,7 +38,7 @@ #define XEN_PIIX_NUM_PIRQS 128ULL -static void piix3_set_irq_pic(PIIX3State *piix3, int pic_irq) +static void piix3_set_irq_pic(PIIXState *piix3, int pic_irq) { qemu_set_irq(piix3->pic.in_irqs[pic_irq], !!(piix3->pic_levels & @@ -46,7 +46,7 @@ static void piix3_set_irq_pic(PIIX3State *piix3, int pic_irq) (pic_irq * PIIX_NUM_PIRQS)))); } -static void piix3_set_irq_level_internal(PIIX3State *piix3, int pirq, int level) +static void piix3_set_irq_level_internal(PIIXState *piix3, int pirq, int level) { int pic_irq; uint64_t mask; @@ -61,7 +61,7 @@ static void piix3_set_irq_level_internal(PIIX3State *piix3, int pirq, int level) piix3->pic_levels |= mask * !!level; } -static void piix3_set_irq_level(PIIX3State *piix3, int pirq, int level) +static void piix3_set_irq_level(PIIXState *piix3, int pirq, int level) { int pic_irq; @@ -77,13 +77,13 @@ static void piix3_set_irq_level(PIIX3State *piix3, int pirq, int level) static void piix3_set_irq(void *opaque, int pirq, int level) { - PIIX3State *piix3 = opaque; + PIIXState *piix3 = opaque; piix3_set_irq_level(piix3, pirq, level); } static PCIINTxRoute piix3_route_intx_pin_to_irq(void *opaque, int pin) { - PIIX3State *piix3 = opaque; + PIIXState *piix3 = opaque; int irq = piix3->dev.config[PIIX_PIRQCA + pin]; PCIINTxRoute route; @@ -98,7 +98,7 @@ static PCIINTxRoute piix3_route_intx_pin_to_irq(void *opaque, int pin) } /* irq routing is changed. so rebuild bitmap */ -static void piix3_update_irq_levels(PIIX3State *piix3) +static void piix3_update_irq_levels(PIIXState *piix3) { PCIBus *bus = pci_get_bus(&piix3->dev); int pirq; @@ -114,7 +114,7 @@ static void piix3_write_config(PCIDevice *dev, { pci_default_write_config(dev, address, val, len); if (ranges_overlap(address, len, PIIX_PIRQCA, 4)) { - PIIX3State *piix3 = PIIX3_PCI_DEVICE(dev); + PIIXState *piix3 = PIIX_PCI_DEVICE(dev); int pic_irq; pci_bus_fire_intx_routing_notifier(pci_get_bus(&piix3->dev)); @@ -147,7 +147,7 @@ static void piix3_write_config_xen(PCIDevice *dev, static void piix_reset(DeviceState *dev) { - PIIX3State *d = PIIX3_PCI_DEVICE(dev); + PIIXState *d = PIIX_PCI_DEVICE(dev); uint8_t *pci_conf = d->dev.config; pci_conf[0x04] = 0x07; /* master, memory and I/O */ @@ -188,7 +188,7 @@ static void piix_reset(DeviceState *dev) static int piix3_post_load(void *opaque, int version_id) { - PIIX3State *piix3 = opaque; + PIIXState *piix3 = opaque; int pirq; /* @@ -211,7 +211,7 @@ static int piix3_post_load(void *opaque, int version_id) static int piix3_pre_save(void *opaque) { int i; - PIIX3State *piix3 = opaque; + PIIXState *piix3 = opaque; for (i = 0; i < ARRAY_SIZE(piix3->pci_irq_levels_vmstate); i++) { piix3->pci_irq_levels_vmstate[i] = @@ -223,7 +223,7 @@ static int piix3_pre_save(void *opaque) static bool piix3_rcr_needed(void *opaque) { - PIIX3State *piix3 = opaque; + PIIXState *piix3 = opaque; return (piix3->rcr != 0); } @@ -234,7 +234,7 @@ static const VMStateDescription vmstate_piix3_rcr = { .minimum_version_id = 1, .needed = piix3_rcr_needed, .fields = (VMStateField[]) { - VMSTATE_UINT8(rcr, PIIX3State), + VMSTATE_UINT8(rcr, PIIXState), VMSTATE_END_OF_LIST() } }; @@ -246,8 +246,8 @@ static const VMStateDescription vmstate_piix3 = { .post_load = piix3_post_load, .pre_save = piix3_pre_save, .fields = (VMStateField[]) { - VMSTATE_PCI_DEVICE(dev, PIIX3State), - VMSTATE_INT32_ARRAY_V(pci_irq_levels_vmstate, PIIX3State, + VMSTATE_PCI_DEVICE(dev, PIIXState), + VMSTATE_INT32_ARRAY_V(pci_irq_levels_vmstate, PIIXState, PIIX_NUM_PIRQS, 3), VMSTATE_END_OF_LIST() }, @@ -260,7 +260,7 @@ static const VMStateDescription vmstate_piix3 = { static void rcr_write(void *opaque, hwaddr addr, uint64_t val, unsigned len) { - PIIX3State *d = opaque; + PIIXState *d = opaque; if (val & 4) { qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); @@ -271,7 +271,7 @@ static void rcr_write(void *opaque, hwaddr addr, uint64_t val, unsigned len) static uint64_t rcr_read(void *opaque, hwaddr addr, unsigned len) { - PIIX3State *d = opaque; + PIIXState *d = opaque; return d->rcr; } @@ -288,7 +288,7 @@ static const MemoryRegionOps rcr_ops = { static void pci_piix3_realize(PCIDevice *dev, Error **errp) { - PIIX3State *d = PIIX3_PCI_DEVICE(dev); + PIIXState *d = PIIX_PCI_DEVICE(dev); PCIBus *pci_bus = pci_get_bus(dev); ISABus *isa_bus; @@ -374,7 +374,7 @@ static void build_pci_isa_aml(AcpiDevAmlIf *adev, Aml *scope) static void pci_piix3_init(Object *obj) { - PIIX3State *d = PIIX3_PCI_DEVICE(obj); + PIIXState *d = PIIX_PCI_DEVICE(obj); object_initialize_child(obj, "pic", &d->pic, TYPE_ISA_PIC); object_initialize_child(obj, "rtc", &d->rtc, TYPE_MC146818_RTC); @@ -382,10 +382,10 @@ static void pci_piix3_init(Object *obj) } static Property pci_piix_props[] = { - DEFINE_PROP_UINT32("smb_io_base", PIIX3State, smb_io_base, 0), - DEFINE_PROP_BOOL("has-acpi", PIIX3State, has_acpi, true), - DEFINE_PROP_BOOL("has-usb", PIIX3State, has_usb, true), - DEFINE_PROP_BOOL("smm-enabled", PIIX3State, smm_enabled, false), + DEFINE_PROP_UINT32("smb_io_base", PIIXState, smb_io_base, 0), + DEFINE_PROP_BOOL("has-acpi", PIIXState, has_acpi, true), + DEFINE_PROP_BOOL("has-usb", PIIXState, has_usb, true), + DEFINE_PROP_BOOL("smm-enabled", PIIXState, smm_enabled, false), DEFINE_PROP_END_OF_LIST(), }; @@ -412,10 +412,10 @@ static void pci_piix3_class_init(ObjectClass *klass, void *data) adevc->build_dev_aml = build_pci_isa_aml; } -static const TypeInfo piix3_pci_type_info = { - .name = TYPE_PIIX3_PCI_DEVICE, +static const TypeInfo piix_pci_type_info = { + .name = TYPE_PIIX_PCI_DEVICE, .parent = TYPE_PCI_DEVICE, - .instance_size = sizeof(PIIX3State), + .instance_size = sizeof(PIIXState), .instance_init = pci_piix3_init, .abstract = true, .class_init = pci_piix3_class_init, @@ -429,7 +429,7 @@ static const TypeInfo piix3_pci_type_info = { static void piix3_realize(PCIDevice *dev, Error **errp) { ERRP_GUARD(); - PIIX3State *piix3 = PIIX3_PCI_DEVICE(dev); + PIIXState *piix3 = PIIX_PCI_DEVICE(dev); PCIBus *pci_bus = pci_get_bus(dev); pci_piix3_realize(dev, errp); @@ -451,14 +451,14 @@ static void piix3_class_init(ObjectClass *klass, void *data) static const TypeInfo piix3_info = { .name = TYPE_PIIX3_DEVICE, - .parent = TYPE_PIIX3_PCI_DEVICE, + .parent = TYPE_PIIX_PCI_DEVICE, .class_init = piix3_class_init, }; static void piix3_xen_realize(PCIDevice *dev, Error **errp) { ERRP_GUARD(); - PIIX3State *piix3 = PIIX3_PCI_DEVICE(dev); + PIIXState *piix3 = PIIX_PCI_DEVICE(dev); PCIBus *pci_bus = pci_get_bus(dev); pci_piix3_realize(dev, errp); @@ -485,13 +485,13 @@ static void piix3_xen_class_init(ObjectClass *klass, void *data) static const TypeInfo piix3_xen_info = { .name = TYPE_PIIX3_XEN_DEVICE, - .parent = TYPE_PIIX3_PCI_DEVICE, + .parent = TYPE_PIIX_PCI_DEVICE, .class_init = piix3_xen_class_init, }; static void piix3_register_types(void) { - type_register_static(&piix3_pci_type_info); + type_register_static(&piix_pci_type_info); type_register_static(&piix3_info); type_register_static(&piix3_xen_info); } From patchwork Thu Jan 5 14:32:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090006 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 68C46C3DA7D for ; Thu, 5 Jan 2023 14:34:30 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJN-0002yV-Rv; Thu, 05 Jan 2023 09:33:41 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJF-0002p7-7N; Thu, 05 Jan 2023 09:33:33 -0500 Received: from mail-wr1-x42b.google.com ([2a00:1450:4864:20::42b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRJC-0006vC-RT; Thu, 05 Jan 2023 09:33:32 -0500 Received: by mail-wr1-x42b.google.com with SMTP id w1so24198529wrt.8; Thu, 05 Jan 2023 06:33:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=uXlrvOa3A/irt3N+CTuOpnNg0yCdkaNUaBnHde+1e/4=; b=EGkLae+aa7DCTgooD4E7AWXwhGT9RKLCmyTKxq4naIZX1UvZsM2v5Zxa32we1Rt+DQ ICkvZ6T/l8wdnYsymnB74RKebWTr2Gu2DAa5bb2oGBBEbjNjwQBpH04Nw0/Gfnd3LR/Y c08FzQYbCzyb4HYwhx87B1GB2oj25t6GDK/MiOtUdA8AexuUgBRFwVVPP1Syk1fPtR7W +4Ka6JaEJ2VioxqMw0OAFu6UsHby9DAZ8GgsN9mY2KisCrpO1FekmzHXJ5wCPizQk2gy ZBITdmrDdZVsSbeSuzjV/9J49S5lAoY45mptD4L4PgS1vmv98g4MiUvJJg2B0CEVHDCL z02A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=uXlrvOa3A/irt3N+CTuOpnNg0yCdkaNUaBnHde+1e/4=; b=AcVCAu58WIPWYQAbapBgsjIvx95NDttcWtUsPoed4uYsaF0+iTlZDXKtEm7agNwufP pl1kWQ5VCKXZhgzgLHTRLehoM0+6T4wXSo9hQQB0vGbPGdEYPB8XMa+K6/zYdv/foBfz LbGEfG00JbjjxEYYyCT4LyFzI0+pHVWA39a9E5quBaeuNRG+XC0ZwPU5F6E9V/2rbeHJ cSqgNfepMoEmqu84S1k5VSqqn088LVIoWWPQb2aHiKLFWA8gwBLSZNXtvRrFT/xyftYn bhzZ5cnwKpG0EAjctXij//EWtbND6NlJSOv0dHzZBA5qSterV42npFfbJe76bDEDTZtd ap6w== X-Gm-Message-State: AFqh2kqd6CA0JD+XdvE2Nu49xAjpiJGtKB2mokpidhUJImzrQtkiAUPq m7QKnQNqQuESRP0HO4VPofPsTTcO3A0Vgg== X-Google-Smtp-Source: AMrXdXtj0SdMc6mm3wNWpOXMcYNjYX0cZvtcHuTsKX7nIboVnS0x3qAmjYK8TtJz/zUILJ8sNZKJXw== X-Received: by 2002:adf:e610:0:b0:272:ca60:e5ad with SMTP id p16-20020adfe610000000b00272ca60e5admr31385532wrm.59.1672929209578; Thu, 05 Jan 2023 06:33:29 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:29 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow Subject: [PATCH v5 21/31] hw/isa/piix4: Make PIIX4's ACPI and USB functions optional Date: Thu, 5 Jan 2023 15:32:18 +0100 Message-Id: <20230105143228.244965-22-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=shentey@gmail.com; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This aligns PIIX4 with PIIX3. Signed-off-by: Bernhard Beschow Reviewed-by: Michael S. Tsirkin Message-Id: <20221022150508.26830-30-shentey@gmail.com> --- hw/isa/piix4.c | 44 ++++++++++++++++++++++++++++++++------------ hw/mips/malta.c | 6 ++++-- 2 files changed, 36 insertions(+), 14 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index de60ceef73..de4133f573 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -51,9 +51,16 @@ struct PIIX4State { PCIIDEState ide; UHCIState uhci; PIIX4PMState pm; + + uint32_t smb_io_base; + /* Reset Control Register */ MemoryRegion rcr_mem; uint8_t rcr; + + bool has_acpi; + bool has_usb; + bool smm_enabled; }; OBJECT_DECLARE_SIMPLE_TYPE(PIIX4State, PIIX4_PCI_DEVICE) @@ -234,17 +241,26 @@ static void piix4_realize(PCIDevice *dev, Error **errp) } /* USB */ - qdev_prop_set_int32(DEVICE(&s->uhci), "addr", dev->devfn + 2); - if (!qdev_realize(DEVICE(&s->uhci), BUS(pci_bus), errp)) { - return; + if (s->has_usb) { + object_initialize_child(OBJECT(dev), "uhci", &s->uhci, + TYPE_PIIX4_USB_UHCI); + qdev_prop_set_int32(DEVICE(&s->uhci), "addr", dev->devfn + 2); + if (!qdev_realize(DEVICE(&s->uhci), BUS(pci_bus), errp)) { + return; + } } /* ACPI controller */ - qdev_prop_set_int32(DEVICE(&s->pm), "addr", dev->devfn + 3); - if (!qdev_realize(DEVICE(&s->pm), BUS(pci_bus), errp)) { - return; + if (s->has_acpi) { + object_initialize_child(OBJECT(s), "pm", &s->pm, TYPE_PIIX4_PM); + qdev_prop_set_int32(DEVICE(&s->pm), "addr", dev->devfn + 3); + qdev_prop_set_uint32(DEVICE(&s->pm), "smb_io_base", s->smb_io_base); + qdev_prop_set_bit(DEVICE(&s->pm), "smm-enabled", s->smm_enabled); + if (!qdev_realize(DEVICE(&s->pm), BUS(pci_bus), errp)) { + return; + } + qdev_connect_gpio_out(DEVICE(&s->pm), 0, s->isa[9]); } - qdev_connect_gpio_out(DEVICE(&s->pm), 0, s->isa[9]); pci_bus_irqs(pci_bus, piix4_set_irq, s, PIIX_NUM_PIRQS); } @@ -255,13 +271,16 @@ static void piix4_init(Object *obj) object_initialize_child(obj, "rtc", &s->rtc, TYPE_MC146818_RTC); object_initialize_child(obj, "ide", &s->ide, TYPE_PIIX4_IDE); - object_initialize_child(obj, "uhci", &s->uhci, TYPE_PIIX4_USB_UHCI); - - object_initialize_child(obj, "pm", &s->pm, TYPE_PIIX4_PM); - qdev_prop_set_uint32(DEVICE(&s->pm), "smb_io_base", 0x1100); - qdev_prop_set_bit(DEVICE(&s->pm), "smm-enabled", 0); } +static Property piix4_props[] = { + DEFINE_PROP_UINT32("smb_io_base", PIIX4State, smb_io_base, 0), + DEFINE_PROP_BOOL("has-acpi", PIIX4State, has_acpi, true), + DEFINE_PROP_BOOL("has-usb", PIIX4State, has_usb, true), + DEFINE_PROP_BOOL("smm-enabled", PIIX4State, smm_enabled, false), + DEFINE_PROP_END_OF_LIST(), +}; + static void piix4_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); @@ -280,6 +299,7 @@ static void piix4_class_init(ObjectClass *klass, void *data) */ dc->user_creatable = false; dc->hotpluggable = false; + device_class_set_props(dc, piix4_props); } static const TypeInfo piix4_info = { diff --git a/hw/mips/malta.c b/hw/mips/malta.c index ef3e10dc4d..a930a91f00 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -1448,8 +1448,10 @@ void mips_malta_init(MachineState *machine) empty_slot_init("GT64120", 0, 0x20000000); /* Southbridge */ - piix4 = pci_create_simple_multifunction(pci_bus, PIIX4_PCI_DEVFN, true, - TYPE_PIIX4_PCI_DEVICE); + piix4 = pci_new_multifunction(PIIX4_PCI_DEVFN, true, + TYPE_PIIX4_PCI_DEVICE); + qdev_prop_set_uint32(DEVICE(piix4), "smb_io_base", 0x1100); + pci_realize_and_unref(piix4, pci_bus, &error_fatal); isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(piix4), "isa.0")); dev = DEVICE(object_resolve_path_component(OBJECT(piix4), "ide")); From patchwork Thu Jan 5 14:32:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090015 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 48BE7C3DA7A for ; Thu, 5 Jan 2023 14:37:00 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJS-00035H-Qx; Thu, 05 Jan 2023 09:33:46 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJG-0002q4-GR; Thu, 05 Jan 2023 09:33:34 -0500 Received: from mail-wr1-x436.google.com ([2a00:1450:4864:20::436]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRJE-00072E-TG; Thu, 05 Jan 2023 09:33:34 -0500 Received: by mail-wr1-x436.google.com with SMTP id w1so24198613wrt.8; Thu, 05 Jan 2023 06:33:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cyIaDXUUe1E2lKeSs+MY3/RWeIYYGkm/0q2/wOL9FL0=; b=l/p9xp2BXiqo7l0rW7wMRwbrFFtiGX6hJorvNnPn7KqasSnxNrALe1Qb4TjRYQgdh/ kOBAcaacAzU0yoG6iE4wupGIZacuZEf46ST7vwWYKYSmMLMcX5f9AgmDwl2uwg+4vghH Bh+BvxYqrVjNp2RNki84KYsC6BiSPrT6t5uHdTT0Dznwl53RyXRMFWkMhLe93T7/zU1M XjUz/y2h147paTnQKJkI9RHt5Xq6uJjhcBnZV+0xtSLIv2ql1o1hVbndBUib09CK/XZS 5yFIlS8hczfryRTLKRTaxar75YhiIBg2PSe0sr4xS/Y4JwMBEUUbSIO1mgx4+cJfkqS8 r+ag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cyIaDXUUe1E2lKeSs+MY3/RWeIYYGkm/0q2/wOL9FL0=; b=fm40XxkIvF/gEH7kIMtR4VN/KxxbNvIgkxyBwSuAu/06wW0jPQNCcpjWviuhXCZ17v pGSn53iBKGW39zLUIvKUnzIgRU4JblNUbDXvp9FAwr49VHoWmFIYcCY5c+ZrHk5MUCOC bTrUqdDXKfw8QXNpiwwECDhRapwaKzHm9zF/BRXJei+ITFZCYWhk1AuVzfj5JzoAeiZL zwTG2qkEdlp2oQW2xb3nU5eJPS3+z4+7gb2dj6bvLsJtXAmZnKpQvyjmJGQaxiRjYwnW 5YQf40fjAREBBWWLOTGxB7aQOfh+UWpBz6HqxI/nrVLonJIoAAeVoyA+e5F+D+PRsllU UHDQ== X-Gm-Message-State: AFqh2kq/LqGo+Gwm4ZROxSMJIKHKOW6jG3foiddw/ZYBQwS9O0wBUxW6 zvTnvcZ7nukippWCnXVaEj1/kAUTFDLPDg== X-Google-Smtp-Source: AMrXdXtFCOm57qUdsz444K5XSp61OrjQpFebDFlNgMRNLHASqOmLAh8IsjchUBAOvpgxPxFxUM53yg== X-Received: by 2002:a5d:4f8f:0:b0:279:f285:15f9 with SMTP id d15-20020a5d4f8f000000b00279f28515f9mr23185736wru.58.1672929210915; Thu, 05 Jan 2023 06:33:30 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:30 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow Subject: [PATCH v5 22/31] hw/isa/piix4: Remove unused inbound ISA interrupt lines Date: Thu, 5 Jan 2023 15:32:19 +0100 Message-Id: <20230105143228.244965-23-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=shentey@gmail.com; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The Malta board, which is the only user of PIIX4, doesn't connect to the exported interrupt lines. PIIX3 doesn't expose such intterupt lines either, so remove them for PIIX4 for simplicity and consistency. Signed-off-by: Bernhard Beschow Reviewed-by: Michael S. Tsirkin Message-Id: <20221022150508.26830-32-shentey@gmail.com> --- hw/isa/piix4.c | 8 -------- 1 file changed, 8 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index de4133f573..9edaa5de3e 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -155,12 +155,6 @@ static void piix4_request_i8259_irq(void *opaque, int irq, int level) qemu_set_irq(s->cpu_intr, level); } -static void piix4_set_i8259_irq(void *opaque, int irq, int level) -{ - PIIX4State *s = opaque; - qemu_set_irq(s->isa[irq], level); -} - static void piix4_rcr_write(void *opaque, hwaddr addr, uint64_t val, unsigned int len) { @@ -204,8 +198,6 @@ static void piix4_realize(PCIDevice *dev, Error **errp) return; } - qdev_init_gpio_in_named(DEVICE(dev), piix4_set_i8259_irq, - "isa", ISA_NUM_IRQS); qdev_init_gpio_out_named(DEVICE(dev), &s->cpu_intr, "intr", 1); From patchwork Thu Jan 5 14:32:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090021 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AE8AAC3DA7A for ; Thu, 5 Jan 2023 14:40:25 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJN-0002xF-54; Thu, 05 Jan 2023 09:33:41 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJH-0002rP-EP; Thu, 05 Jan 2023 09:33:35 -0500 Received: from mail-wr1-x433.google.com ([2a00:1450:4864:20::433]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRJF-0006wx-KE; Thu, 05 Jan 2023 09:33:35 -0500 Received: by mail-wr1-x433.google.com with SMTP id t15so27446654wro.9; Thu, 05 Jan 2023 06:33:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=yuUPAL39BWQGniG6VAc4FaCcHuPduEkKF2hR1Xdinn4=; b=X5ZrIhOF9LXM6nJQasmeXduF35wv9NS/jw6uLanOfTOIFutsLOa2AMTsz3QyWSeZ7H PtKs+CmoHL+Wc9qa5c2kCoY/zZVmgk9zpY6XAn2za+26N/oasSSEK7BSVUXDc9A7FL4G sNMmfxcqbs/ZoffhqbDvyYfhsPqzsTJAY4ZuMNPdkL7daEh2nBB4ouzLviCdfhICVQC+ nXEkOEjX6MdDlrYXiueGTeZJaQWA9L+C7ufjwtxG53qA1wb3AywlwwoSrQoGbx5Fb/gX RT/b6Sgv+wQylFVTs40Wrz/HPMYDIjJTpkWxpf9y8N5sQX1kUKQJJiExs2TobfSKPKxB ZRCQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yuUPAL39BWQGniG6VAc4FaCcHuPduEkKF2hR1Xdinn4=; b=vczqWPDtTeY2Nuvgz2KRh+9tYGyVgs1NmH6x3nhooETxepFBQGCtaT5x0yJVWueqfE GVBupVSbTmAagEvCXhBlH4pARwDTPJ61Vy4Y3qFGbdeuNhfa4DM2CDZ4oo9yARJX0XrB i0SlthynLnLP+Zie9ALM5hl98BIoJ9L+n9zoouo/2JT3adbwBlUZ8J3Jb4EhvAid705k LPfq9KaDrmZnVr04XaWumfuDlQHhR/UwmZ99Wcws+TMkUpZpPzfOHiZ+B+8Xd7G+h8Do Y4lu6RIkVmP72YzwDxta8ysZXRfR7fJe/CuN9i4Nrrg++V3kKVXwrUpYn14sNpYhEFmA kykw== X-Gm-Message-State: AFqh2koY1HnGDbrRV4JRs5vraxGfOXrgGuspYfohee5DluNjhrZZBZ+d qHZOA+whe/HyJEAVjwxqWDAzTc/no+dHLQ== X-Google-Smtp-Source: AMrXdXuWSAIkzl32hgjoItI1U9dyc1NTvrr8xbglThVKFtGFuV3gM9FqY1itZ0oMMatd1SgKdezIMw== X-Received: by 2002:a5d:6049:0:b0:2a6:4dfb:80c8 with SMTP id j9-20020a5d6049000000b002a64dfb80c8mr3532841wrt.19.1672929212216; Thu, 05 Jan 2023 06:33:32 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:31 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow Subject: [PATCH v5 23/31] hw/isa/piix4: Use ISA PIC device Date: Thu, 5 Jan 2023 15:32:20 +0100 Message-Id: <20230105143228.244965-24-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=shentey@gmail.com; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Aligns the code with PIIX3 such that PIIXState can be used in PIIX4, too. Signed-off-by: Bernhard Beschow Reviewed-by: Michael S. Tsirkin Message-Id: <20221022150508.26830-33-shentey@gmail.com> --- hw/isa/piix4.c | 28 ++++++++++------------------ hw/mips/malta.c | 11 +++++++++-- hw/mips/Kconfig | 1 + 3 files changed, 20 insertions(+), 20 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 9edaa5de3e..eae4db0182 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -44,9 +44,8 @@ struct PIIX4State { PCIDevice dev; - qemu_irq cpu_intr; - qemu_irq *isa; + ISAPICState pic; RTCState rtc; PCIIDEState ide; UHCIState uhci; @@ -82,7 +81,7 @@ static void piix4_set_irq(void *opaque, int irq_num, int level) pic_level |= pci_bus_get_irq_level(bus, i); } } - qemu_set_irq(s->isa[pic_irq], pic_level); + qemu_set_irq(s->pic.in_irqs[pic_irq], pic_level); } } @@ -149,12 +148,6 @@ static const VMStateDescription vmstate_piix4 = { } }; -static void piix4_request_i8259_irq(void *opaque, int irq, int level) -{ - PIIX4State *s = opaque; - qemu_set_irq(s->cpu_intr, level); -} - static void piix4_rcr_write(void *opaque, hwaddr addr, uint64_t val, unsigned int len) { @@ -190,7 +183,6 @@ static void piix4_realize(PCIDevice *dev, Error **errp) PIIX4State *s = PIIX4_PCI_DEVICE(dev); PCIBus *pci_bus = pci_get_bus(dev); ISABus *isa_bus; - qemu_irq *i8259_out_irq; isa_bus = isa_bus_new(DEVICE(dev), pci_address_space(dev), pci_address_space_io(dev), errp); @@ -198,20 +190,18 @@ static void piix4_realize(PCIDevice *dev, Error **errp) return; } - qdev_init_gpio_out_named(DEVICE(dev), &s->cpu_intr, - "intr", 1); - memory_region_init_io(&s->rcr_mem, OBJECT(dev), &piix4_rcr_ops, s, "reset-control", 1); memory_region_add_subregion_overlap(pci_address_space_io(dev), PIIX_RCR_IOPORT, &s->rcr_mem, 1); /* initialize i8259 pic */ - i8259_out_irq = qemu_allocate_irqs(piix4_request_i8259_irq, s, 1); - s->isa = i8259_init(isa_bus, *i8259_out_irq); + if (!qdev_realize(DEVICE(&s->pic), NULL, errp)) { + return; + } /* initialize ISA irqs */ - isa_bus_irqs(isa_bus, s->isa); + isa_bus_irqs(isa_bus, s->pic.in_irqs); /* initialize pit */ i8254_pit_init(isa_bus, 0x40, 0, NULL); @@ -224,7 +214,7 @@ static void piix4_realize(PCIDevice *dev, Error **errp) if (!qdev_realize(DEVICE(&s->rtc), BUS(isa_bus), errp)) { return; } - s->rtc.irq = isa_get_irq(ISA_DEVICE(&s->rtc), s->rtc.isairq); + s->rtc.irq = qdev_get_gpio_in(DEVICE(&s->pic), s->rtc.isairq); /* IDE */ qdev_prop_set_int32(DEVICE(&s->ide), "addr", dev->devfn + 1); @@ -251,7 +241,8 @@ static void piix4_realize(PCIDevice *dev, Error **errp) if (!qdev_realize(DEVICE(&s->pm), BUS(pci_bus), errp)) { return; } - qdev_connect_gpio_out(DEVICE(&s->pm), 0, s->isa[9]); + qdev_connect_gpio_out(DEVICE(&s->pm), 0, + qdev_get_gpio_in(DEVICE(&s->pic), 9)); } pci_bus_irqs(pci_bus, piix4_set_irq, s, PIIX_NUM_PIRQS); @@ -261,6 +252,7 @@ static void piix4_init(Object *obj) { PIIX4State *s = PIIX4_PCI_DEVICE(obj); + object_initialize_child(obj, "pic", &s->pic, TYPE_ISA_PIC); object_initialize_child(obj, "rtc", &s->rtc, TYPE_MC146818_RTC); object_initialize_child(obj, "ide", &s->ide, TYPE_PIIX4_IDE); } diff --git a/hw/mips/malta.c b/hw/mips/malta.c index a930a91f00..1bb493353b 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -29,6 +29,7 @@ #include "qemu/guest-random.h" #include "hw/clock.h" #include "hw/southbridge/piix.h" +#include "hw/intc/i8259.h" #include "hw/isa/superio.h" #include "hw/char/serial.h" #include "net/net.h" @@ -1280,10 +1281,11 @@ void mips_malta_init(MachineState *machine) PCIBus *pci_bus; ISABus *isa_bus; qemu_irq cbus_irq, i8259_irq; + qemu_irq *i8259; I2CBus *smbus; DriveInfo *dinfo; int fl_idx = 0; - int be; + int be, i; MaltaState *s; PCIDevice *piix4; DeviceState *dev; @@ -1458,7 +1460,12 @@ void mips_malta_init(MachineState *machine) pci_ide_create_devs(PCI_DEVICE(dev)); /* Interrupt controller */ - qdev_connect_gpio_out_named(DEVICE(piix4), "intr", 0, i8259_irq); + dev = DEVICE(object_resolve_path_component(OBJECT(piix4), "pic")); + i8259 = i8259_init(isa_bus, i8259_irq); + for (i = 0; i < ISA_NUM_IRQS; i++) { + qdev_connect_gpio_out(dev, i, i8259[i]); + } + g_free(i8259); pci_bus_map_irqs(pci_bus, pci_slot_get_pirq); diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig index 4e7042f03d..d156de812c 100644 --- a/hw/mips/Kconfig +++ b/hw/mips/Kconfig @@ -1,5 +1,6 @@ config MALTA bool + select I8259 select ISA_SUPERIO select PIIX4 From patchwork Thu Jan 5 14:32:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090011 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5F5A7C3DA7D for ; Thu, 5 Jan 2023 14:35:20 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJP-00031d-Vr; Thu, 05 Jan 2023 09:33:44 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJJ-0002rd-3k; Thu, 05 Jan 2023 09:33:37 -0500 Received: from mail-wm1-x334.google.com ([2a00:1450:4864:20::334]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRJH-000733-8G; Thu, 05 Jan 2023 09:33:36 -0500 Received: by mail-wm1-x334.google.com with SMTP id k26-20020a05600c1c9a00b003d972646a7dso1431473wms.5; Thu, 05 Jan 2023 06:33:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=2W2KrNb+t7zThSMmV7Yn1JPyvbrTPUj8QIREtNm4oAU=; b=i0y5ZK/lw/6OZegwSDpb3aAXA7JF1/79pSsI7yy28uQXNbAlnYJPJQOANcmto68Lwc 56x6KtX52eS8MqUF9+udEBwDuthAxaKBfKy+uu0SVwpFBfxbidFYCtgtDqpcP82KRovX YtOB57uhxn6vkOEZt+FSvnFcxW/E+x1ghLdZp7LZN+CKNIhHXh4djJewYDHzXEUESooD 4Wjdk6dD4Fq/789xpNlxV5rMJq/f9kECsAcBAMisho2YPc8SGD807D0D7EIArv8p8pn3 OP9VcEPnVja4ko47mQIl1kzsTAvJUNaPWSYk1wy8Gv1m+iCHIEenZOPGvrJtzi7DpG55 KckQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2W2KrNb+t7zThSMmV7Yn1JPyvbrTPUj8QIREtNm4oAU=; b=5Y4VXwUbbb53OZf+gVQvY8paczSm2r5MCvhw+67xyW7ABReJoHK2hN1K7mo6Bmeipw B7AcDrM/fhjxI27DlFaTLexULtRxAMBPjvxYdp6PPgvFNnOYLxucYyCxFS/ab7v/ArMg ciqr93vXGVJOyB8JyssSmu/IYj2Ic01A2M88l9Nc54kTzwOphHE5W7VGUvMGG25Kp+C/ WAGqDAbNk8swvCq9SuaHl9vnOJIKeuDkBnsMHKcbZbYyP1WCgKtn87/Zz0V/k/tsyLkM FpCk+jMHtHRh3mWGiJ4G7AUCX8MXSY6b8jkJcjnv7eGGS7Y3Fj3RlgWsPQWOKHFCJmv0 MSpA== X-Gm-Message-State: AFqh2kpTvwDgY1slPxEbWJE5ghlQYThsDAL2mtUt7VKkOrisf1/lVit4 054z63luHlnfccRc9gaEXY6HNMlAId8TDg== X-Google-Smtp-Source: AMrXdXtvJ6QnZqPqoDQ//KpSPwncmBtQC6stWn6W5wTpqa2vKHCxg8PomMbJkm05O6UjmNFM5PoE4w== X-Received: by 2002:a05:600c:46cd:b0:3d9:a145:4d1a with SMTP id q13-20020a05600c46cd00b003d9a1454d1amr16151872wmo.34.1672929213313; Thu, 05 Jan 2023 06:33:33 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:32 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow Subject: [PATCH v5 24/31] hw/isa/piix4: Reuse struct PIIXState from PIIX3 Date: Thu, 5 Jan 2023 15:32:21 +0100 Message-Id: <20230105143228.244965-25-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=shentey@gmail.com; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Now that PIIX4 also uses the "proxy-pic", both implementations can share the same struct. Signed-off-by: Bernhard Beschow Reviewed-by: Michael S. Tsirkin Message-Id: <20221022150508.26830-34-shentey@gmail.com> --- hw/isa/piix4.c | 51 +++++++++++++++----------------------------------- 1 file changed, 15 insertions(+), 36 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index eae4db0182..ce88377630 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -42,32 +42,10 @@ #include "sysemu/runstate.h" #include "qom/object.h" -struct PIIX4State { - PCIDevice dev; - - ISAPICState pic; - RTCState rtc; - PCIIDEState ide; - UHCIState uhci; - PIIX4PMState pm; - - uint32_t smb_io_base; - - /* Reset Control Register */ - MemoryRegion rcr_mem; - uint8_t rcr; - - bool has_acpi; - bool has_usb; - bool smm_enabled; -}; - -OBJECT_DECLARE_SIMPLE_TYPE(PIIX4State, PIIX4_PCI_DEVICE) - static void piix4_set_irq(void *opaque, int irq_num, int level) { int i, pic_irq, pic_level; - PIIX4State *s = opaque; + PIIXState *s = opaque; PCIBus *bus = pci_get_bus(&s->dev); /* now we change the pic irq level according to the piix irq mappings */ @@ -87,7 +65,7 @@ static void piix4_set_irq(void *opaque, int irq_num, int level) static void piix4_isa_reset(DeviceState *dev) { - PIIX4State *d = PIIX4_PCI_DEVICE(dev); + PIIXState *d = PIIX_PCI_DEVICE(dev); uint8_t *pci_conf = d->dev.config; pci_conf[0x04] = 0x07; // master, memory and I/O @@ -122,12 +100,13 @@ static void piix4_isa_reset(DeviceState *dev) pci_conf[0xac] = 0x00; pci_conf[0xae] = 0x00; + d->pic_levels = 0; /* not used in PIIX4 */ d->rcr = 0; } static int piix4_post_load(void *opaque, int version_id) { - PIIX4State *s = opaque; + PIIXState *s = opaque; if (version_id == 2) { s->rcr = 0; @@ -142,8 +121,8 @@ static const VMStateDescription vmstate_piix4 = { .minimum_version_id = 2, .post_load = piix4_post_load, .fields = (VMStateField[]) { - VMSTATE_PCI_DEVICE(dev, PIIX4State), - VMSTATE_UINT8_V(rcr, PIIX4State, 3), + VMSTATE_PCI_DEVICE(dev, PIIXState), + VMSTATE_UINT8_V(rcr, PIIXState, 3), VMSTATE_END_OF_LIST() } }; @@ -151,7 +130,7 @@ static const VMStateDescription vmstate_piix4 = { static void piix4_rcr_write(void *opaque, hwaddr addr, uint64_t val, unsigned int len) { - PIIX4State *s = opaque; + PIIXState *s = opaque; if (val & 4) { qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); @@ -163,7 +142,7 @@ static void piix4_rcr_write(void *opaque, hwaddr addr, uint64_t val, static uint64_t piix4_rcr_read(void *opaque, hwaddr addr, unsigned int len) { - PIIX4State *s = opaque; + PIIXState *s = opaque; return s->rcr; } @@ -180,7 +159,7 @@ static const MemoryRegionOps piix4_rcr_ops = { static void piix4_realize(PCIDevice *dev, Error **errp) { - PIIX4State *s = PIIX4_PCI_DEVICE(dev); + PIIXState *s = PIIX_PCI_DEVICE(dev); PCIBus *pci_bus = pci_get_bus(dev); ISABus *isa_bus; @@ -250,7 +229,7 @@ static void piix4_realize(PCIDevice *dev, Error **errp) static void piix4_init(Object *obj) { - PIIX4State *s = PIIX4_PCI_DEVICE(obj); + PIIXState *s = PIIX_PCI_DEVICE(obj); object_initialize_child(obj, "pic", &s->pic, TYPE_ISA_PIC); object_initialize_child(obj, "rtc", &s->rtc, TYPE_MC146818_RTC); @@ -258,10 +237,10 @@ static void piix4_init(Object *obj) } static Property piix4_props[] = { - DEFINE_PROP_UINT32("smb_io_base", PIIX4State, smb_io_base, 0), - DEFINE_PROP_BOOL("has-acpi", PIIX4State, has_acpi, true), - DEFINE_PROP_BOOL("has-usb", PIIX4State, has_usb, true), - DEFINE_PROP_BOOL("smm-enabled", PIIX4State, smm_enabled, false), + DEFINE_PROP_UINT32("smb_io_base", PIIXState, smb_io_base, 0), + DEFINE_PROP_BOOL("has-acpi", PIIXState, has_acpi, true), + DEFINE_PROP_BOOL("has-usb", PIIXState, has_usb, true), + DEFINE_PROP_BOOL("smm-enabled", PIIXState, smm_enabled, false), DEFINE_PROP_END_OF_LIST(), }; @@ -289,7 +268,7 @@ static void piix4_class_init(ObjectClass *klass, void *data) static const TypeInfo piix4_info = { .name = TYPE_PIIX4_PCI_DEVICE, .parent = TYPE_PCI_DEVICE, - .instance_size = sizeof(PIIX4State), + .instance_size = sizeof(PIIXState), .instance_init = piix4_init, .class_init = piix4_class_init, .interfaces = (InterfaceInfo[]) { From patchwork Thu Jan 5 14:32:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 80432C53210 for ; Thu, 5 Jan 2023 14:43:17 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJN-0002xw-JF; Thu, 05 Jan 2023 09:33:41 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJJ-0002re-Vu; Thu, 05 Jan 2023 09:33:38 -0500 Received: from mail-wr1-x430.google.com ([2a00:1450:4864:20::430]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRJH-0006um-TM; Thu, 05 Jan 2023 09:33:37 -0500 Received: by mail-wr1-x430.google.com with SMTP id h16so36266543wrz.12; Thu, 05 Jan 2023 06:33:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=rI5ck4pq8f2FtDuchxwBlAR4qaTa9QQd309iHKTmL90=; b=lC/zvzeOedB6FK1MBXUnFslXFs57X/jsoo7KuSnbSSIrpDz5xeRJkMia6/0I39t69c 9f25ghFmWxajZKF0U/fuioQP+JYhGOxFwciIbKQrA4zTu1Cg5EaOT2Im4xCJwTSs39Tn Jd6L5jbwdCWdt20By52yfJO3fnUmwhw17KqB1dj1Njv5teRIBwwKOxQgPcmpNcRDjurD o4a+7T6cgs4iD+C7B+qt0cMHsxqc8xfUPjS2xll48Vwx3T5pgHrnwmdk/fICp+db6FKg hkffxtSe/gpMAqwVUBe8dJRXZibScVJvthEobggt2eJoQbFSfn02IrVO3Mm8G+obkNoJ swtA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rI5ck4pq8f2FtDuchxwBlAR4qaTa9QQd309iHKTmL90=; b=Tad0iWMz0hFrTiFz991XjBRCXV1H6QLRw5ZOO5FoR0hg9/dae+abqDTvyKOiXthQeN dqClVaS/XNAlwSWFb1ljEjk2Yvy9ROx0yVgH9S2aZVO2Txk1FIgqulUv/nd72/cCBL8Q EywNt4I7LUO83CyTBqxn5kgHSkg8PV1ECvxyhf0LM9xoUMtMy7kObm+YYJuwBwbn52Wv 3ZKhCPp//4npuF+QKfPeueSBi3lQQJXg12AFnwAh/7TizzuR1OWghrp+DU+/0+KWO8Qw E4NAf0tkXRelCBhKrofMOxiAJp2fJDkZXpT7XNssuVerhFCXUX/BoDQ286io2owZwU4H 55OA== X-Gm-Message-State: AFqh2kpo3eenKarpVxYkH6uGsa4m74IJzjV29UFDu0FGWW8GTo8Q2FaL aglL9NgqbwAQ1HZcplGkRCUvFZgxseMYTg== X-Google-Smtp-Source: AMrXdXv9QjldrAnXScDIw8GuMrU6ANF/RNuITfjuPmkDn0Ld4WEmedCVRKh4ytLTxR4jtWuGZUOkmA== X-Received: by 2002:adf:e9d1:0:b0:242:5fe3:b61b with SMTP id l17-20020adfe9d1000000b002425fe3b61bmr31190284wrn.23.1672929214646; Thu, 05 Jan 2023 06:33:34 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:34 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow Subject: [PATCH v5 25/31] hw/isa/piix4: Rename reset control operations to match PIIX3 Date: Thu, 5 Jan 2023 15:32:22 +0100 Message-Id: <20230105143228.244965-26-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=shentey@gmail.com; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Both implementations are the same and will be shared upon merging. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin Message-Id: <20221022150508.26830-35-shentey@gmail.com> --- hw/isa/piix4.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index ce88377630..de7cde192f 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -127,7 +127,7 @@ static const VMStateDescription vmstate_piix4 = { } }; -static void piix4_rcr_write(void *opaque, hwaddr addr, uint64_t val, +static void rcr_write(void *opaque, hwaddr addr, uint64_t val, unsigned int len) { PIIXState *s = opaque; @@ -140,16 +140,16 @@ static void piix4_rcr_write(void *opaque, hwaddr addr, uint64_t val, s->rcr = val & 2; /* keep System Reset type only */ } -static uint64_t piix4_rcr_read(void *opaque, hwaddr addr, unsigned int len) +static uint64_t rcr_read(void *opaque, hwaddr addr, unsigned int len) { PIIXState *s = opaque; return s->rcr; } -static const MemoryRegionOps piix4_rcr_ops = { - .read = piix4_rcr_read, - .write = piix4_rcr_write, +static const MemoryRegionOps rcr_ops = { + .read = rcr_read, + .write = rcr_write, .endianness = DEVICE_LITTLE_ENDIAN, .impl = { .min_access_size = 1, @@ -169,7 +169,7 @@ static void piix4_realize(PCIDevice *dev, Error **errp) return; } - memory_region_init_io(&s->rcr_mem, OBJECT(dev), &piix4_rcr_ops, s, + memory_region_init_io(&s->rcr_mem, OBJECT(dev), &rcr_ops, s, "reset-control", 1); memory_region_add_subregion_overlap(pci_address_space_io(dev), PIIX_RCR_IOPORT, &s->rcr_mem, 1); From patchwork Thu Jan 5 14:32:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090039 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 24968C3DA7D for ; Thu, 5 Jan 2023 14:46:11 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJT-00037X-D0; Thu, 05 Jan 2023 09:33:47 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJM-0002wd-3a; Thu, 05 Jan 2023 09:33:40 -0500 Received: from mail-wr1-x42b.google.com ([2a00:1450:4864:20::42b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRJJ-0006vC-B2; Thu, 05 Jan 2023 09:33:39 -0500 Received: by mail-wr1-x42b.google.com with SMTP id w1so24198838wrt.8; Thu, 05 Jan 2023 06:33:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Zr1ioA6SjyrnMmwipMJLcdraYQPIIWJge112HiDfGD4=; b=GlttNvZrsvNcLBMIXoX436tchncswlD7zULhhnv6QohmQsoM6XkEZ/nf39DzCSlMIW c75RX4o43WywssmIWXgpCUX2u43+y+31OYPkefs5y8lPR/i3le2+N35wZW8UGb0NRFO8 uTGgMi7RprEse4MK39mDEjWSkc7coLrvkqz29fIvAdu4AaqjqLB0JcvtHlUdNmeGotNk SlUunf3qb0yKgt5l08JsdJ1LdL6x0V89lfyIr0uldPk3spnsN2zfbD24w4EXf0vfhPpc +ICYpX0Y9xq1XPNHp+I3t9jw2/5BdKX7cLii1WHDc5mbQi/yxJ7lbwqDLxmV1UeANzGS bEmQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Zr1ioA6SjyrnMmwipMJLcdraYQPIIWJge112HiDfGD4=; b=S/JpYyKPaPqnNVApys922Xmo68ETFE9G1oIbbpDaOc1olbJYzHoE1rBGi7v6e8X01g RuKz+Zs07KZtVQtQ9OTV1c1Z65eg5XMYH4NuJgy5l2EQmzBpwaOLl5cF/YgeLOryE2jp +sLhR23ZIzF982ONA4MAV3NZ4fh0MArizXQeT42S/RVRsvtjLzyniTXrPVm2BDcGSnCd 6gMm3BC4Dy478uRWMqPcrq9LkLO3gCUa18eubh4RL0o94A4yS03qjEiq55vUHn1l9emk d2GX40EtdTmT/tdCTW2kIBCwp6yJal+BXCGuZ4/5SIBExaxIUkrYP0ZepTg9peX2cN24 ljsQ== X-Gm-Message-State: AFqh2krPfu1w7SFqVL/APUDtPoZhKXChEHfEUlrvuNXLWpak8xGzYTK6 jiv+x9Jsz/VdmR73fyGOfKoXjLw55pwusQ== X-Google-Smtp-Source: AMrXdXutBps783Ne8znCDoeITQxI15KH7LSQtGv7y4aB+T8Eo/oucYgZHAT/u6v/qXebEtM9lJs3Bw== X-Received: by 2002:a5d:6dc4:0:b0:2b4:e5e:1e16 with SMTP id d4-20020a5d6dc4000000b002b40e5e1e16mr1336246wrz.35.1672929215889; Thu, 05 Jan 2023 06:33:35 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:35 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow Subject: [PATCH v5 26/31] hw/isa/piix3: Merge hw/isa/piix4.c Date: Thu, 5 Jan 2023 15:32:23 +0100 Message-Id: <20230105143228.244965-27-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=shentey@gmail.com; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Now that the PIIX3 and PIIX4 device models are sufficiently consolidated, their implementations can be merged into one file for further consolidation. Signed-off-by: Bernhard Beschow Reviewed-by: Michael S. Tsirkin Message-Id: <20221022150508.26830-37-shentey@gmail.com> --- hw/isa/{piix3.c => piix.c} | 158 ++++++++++++++++++++ hw/isa/piix4.c | 285 ------------------------------------- MAINTAINERS | 6 +- hw/i386/Kconfig | 2 +- hw/isa/Kconfig | 12 +- hw/isa/meson.build | 3 +- hw/mips/Kconfig | 2 +- 7 files changed, 165 insertions(+), 303 deletions(-) rename hw/isa/{piix3.c => piix.c} (75%) delete mode 100644 hw/isa/piix4.c diff --git a/hw/isa/piix3.c b/hw/isa/piix.c similarity index 75% rename from hw/isa/piix3.c rename to hw/isa/piix.c index 4ce1653406..81cb4e64ab 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix.c @@ -2,6 +2,7 @@ * QEMU PIIX PCI ISA Bridge Emulation * * Copyright (c) 2006 Fabrice Bellard + * Copyright (c) 2018 Hervé Poussineau * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -27,6 +28,7 @@ #include "qapi/error.h" #include "hw/dma/i8257.h" #include "hw/southbridge/piix.h" +#include "hw/timer/i8254.h" #include "hw/irq.h" #include "hw/qdev-properties.h" #include "hw/ide/piix.h" @@ -81,6 +83,27 @@ static void piix3_set_irq(void *opaque, int pirq, int level) piix3_set_irq_level(piix3, pirq, level); } +static void piix4_set_irq(void *opaque, int irq_num, int level) +{ + int i, pic_irq, pic_level; + PIIXState *s = opaque; + PCIBus *bus = pci_get_bus(&s->dev); + + /* now we change the pic irq level according to the piix irq mappings */ + /* XXX: optimize */ + pic_irq = s->dev.config[PIIX_PIRQCA + irq_num]; + if (pic_irq < ISA_NUM_IRQS) { + /* The pic level is the logical OR of all the PCI irqs mapped to it. */ + pic_level = 0; + for (i = 0; i < PIIX_NUM_PIRQS; i++) { + if (pic_irq == s->dev.config[PIIX_PIRQCA + i]) { + pic_level |= pci_bus_get_irq_level(bus, i); + } + } + qemu_set_irq(s->pic.in_irqs[pic_irq], pic_level); + } +} + static PCIINTxRoute piix3_route_intx_pin_to_irq(void *opaque, int pin) { PIIXState *piix3 = opaque; @@ -208,6 +231,17 @@ static int piix3_post_load(void *opaque, int version_id) return 0; } +static int piix4_post_load(void *opaque, int version_id) +{ + PIIXState *s = opaque; + + if (version_id == 2) { + s->rcr = 0; + } + + return 0; +} + static int piix3_pre_save(void *opaque) { int i; @@ -257,6 +291,17 @@ static const VMStateDescription vmstate_piix3 = { } }; +static const VMStateDescription vmstate_piix4 = { + .name = "PIIX4", + .version_id = 3, + .minimum_version_id = 2, + .post_load = piix4_post_load, + .fields = (VMStateField[]) { + VMSTATE_PCI_DEVICE(dev, PIIXState), + VMSTATE_UINT8_V(rcr, PIIXState, 3), + VMSTATE_END_OF_LIST() + } +}; static void rcr_write(void *opaque, hwaddr addr, uint64_t val, unsigned len) { @@ -489,11 +534,124 @@ static const TypeInfo piix3_xen_info = { .class_init = piix3_xen_class_init, }; +static void piix4_realize(PCIDevice *dev, Error **errp) +{ + PIIXState *s = PIIX_PCI_DEVICE(dev); + PCIBus *pci_bus = pci_get_bus(dev); + ISABus *isa_bus; + + isa_bus = isa_bus_new(DEVICE(dev), pci_address_space(dev), + pci_address_space_io(dev), errp); + if (!isa_bus) { + return; + } + + memory_region_init_io(&s->rcr_mem, OBJECT(dev), &rcr_ops, s, + "reset-control", 1); + memory_region_add_subregion_overlap(pci_address_space_io(dev), + PIIX_RCR_IOPORT, &s->rcr_mem, 1); + + /* initialize i8259 pic */ + if (!qdev_realize(DEVICE(&s->pic), NULL, errp)) { + return; + } + + /* initialize ISA irqs */ + isa_bus_irqs(isa_bus, s->pic.in_irqs); + + /* initialize pit */ + i8254_pit_init(isa_bus, 0x40, 0, NULL); + + /* DMA */ + i8257_dma_init(isa_bus, 0); + + /* RTC */ + qdev_prop_set_int32(DEVICE(&s->rtc), "base_year", 2000); + if (!qdev_realize(DEVICE(&s->rtc), BUS(isa_bus), errp)) { + return; + } + s->rtc.irq = qdev_get_gpio_in(DEVICE(&s->pic), s->rtc.isairq); + + /* IDE */ + qdev_prop_set_int32(DEVICE(&s->ide), "addr", dev->devfn + 1); + if (!qdev_realize(DEVICE(&s->ide), BUS(pci_bus), errp)) { + return; + } + + /* USB */ + if (s->has_usb) { + object_initialize_child(OBJECT(dev), "uhci", &s->uhci, + TYPE_PIIX4_USB_UHCI); + qdev_prop_set_int32(DEVICE(&s->uhci), "addr", dev->devfn + 2); + if (!qdev_realize(DEVICE(&s->uhci), BUS(pci_bus), errp)) { + return; + } + } + + /* ACPI controller */ + if (s->has_acpi) { + object_initialize_child(OBJECT(s), "pm", &s->pm, TYPE_PIIX4_PM); + qdev_prop_set_int32(DEVICE(&s->pm), "addr", dev->devfn + 3); + qdev_prop_set_uint32(DEVICE(&s->pm), "smb_io_base", s->smb_io_base); + qdev_prop_set_bit(DEVICE(&s->pm), "smm-enabled", s->smm_enabled); + if (!qdev_realize(DEVICE(&s->pm), BUS(pci_bus), errp)) { + return; + } + qdev_connect_gpio_out(DEVICE(&s->pm), 0, + qdev_get_gpio_in(DEVICE(&s->pic), 9)); + } + + pci_bus_irqs(pci_bus, piix4_set_irq, s, PIIX_NUM_PIRQS); +} + +static void piix4_init(Object *obj) +{ + PIIXState *s = PIIX_PCI_DEVICE(obj); + + object_initialize_child(obj, "pic", &s->pic, TYPE_ISA_PIC); + object_initialize_child(obj, "rtc", &s->rtc, TYPE_MC146818_RTC); + object_initialize_child(obj, "ide", &s->ide, TYPE_PIIX4_IDE); +} + +static void piix4_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); + + k->realize = piix4_realize; + k->vendor_id = PCI_VENDOR_ID_INTEL; + k->device_id = PCI_DEVICE_ID_INTEL_82371AB_0; + k->class_id = PCI_CLASS_BRIDGE_ISA; + dc->reset = piix_reset; + dc->desc = "ISA bridge"; + dc->vmsd = &vmstate_piix4; + /* + * Reason: part of PIIX4 southbridge, needs to be wired up, + * e.g. by mips_malta_init() + */ + dc->user_creatable = false; + dc->hotpluggable = false; + device_class_set_props(dc, pci_piix_props); +} + +static const TypeInfo piix4_info = { + .name = TYPE_PIIX4_PCI_DEVICE, + .parent = TYPE_PCI_DEVICE, + .instance_size = sizeof(PIIXState), + .instance_init = piix4_init, + .class_init = piix4_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, +}; + static void piix3_register_types(void) { type_register_static(&piix_pci_type_info); type_register_static(&piix3_info); type_register_static(&piix3_xen_info); + type_register_static(&piix4_info); } type_init(piix3_register_types) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c deleted file mode 100644 index de7cde192f..0000000000 --- a/hw/isa/piix4.c +++ /dev/null @@ -1,285 +0,0 @@ -/* - * QEMU PIIX4 PCI Bridge Emulation - * - * Copyright (c) 2006 Fabrice Bellard - * Copyright (c) 2018 Hervé Poussineau - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "qemu/osdep.h" -#include "qapi/error.h" -#include "hw/irq.h" -#include "hw/southbridge/piix.h" -#include "hw/pci/pci.h" -#include "hw/ide/piix.h" -#include "hw/isa/isa.h" -#include "hw/intc/i8259.h" -#include "hw/dma/i8257.h" -#include "hw/timer/i8254.h" -#include "hw/rtc/mc146818rtc.h" -#include "hw/ide/pci.h" -#include "hw/acpi/piix4.h" -#include "hw/usb/hcd-uhci.h" -#include "migration/vmstate.h" -#include "sysemu/reset.h" -#include "sysemu/runstate.h" -#include "qom/object.h" - -static void piix4_set_irq(void *opaque, int irq_num, int level) -{ - int i, pic_irq, pic_level; - PIIXState *s = opaque; - PCIBus *bus = pci_get_bus(&s->dev); - - /* now we change the pic irq level according to the piix irq mappings */ - /* XXX: optimize */ - pic_irq = s->dev.config[PIIX_PIRQCA + irq_num]; - if (pic_irq < ISA_NUM_IRQS) { - /* The pic level is the logical OR of all the PCI irqs mapped to it. */ - pic_level = 0; - for (i = 0; i < PIIX_NUM_PIRQS; i++) { - if (pic_irq == s->dev.config[PIIX_PIRQCA + i]) { - pic_level |= pci_bus_get_irq_level(bus, i); - } - } - qemu_set_irq(s->pic.in_irqs[pic_irq], pic_level); - } -} - -static void piix4_isa_reset(DeviceState *dev) -{ - PIIXState *d = PIIX_PCI_DEVICE(dev); - uint8_t *pci_conf = d->dev.config; - - pci_conf[0x04] = 0x07; // master, memory and I/O - pci_conf[0x05] = 0x00; - pci_conf[0x06] = 0x00; - pci_conf[0x07] = 0x02; // PCI_status_devsel_medium - pci_conf[0x4c] = 0x4d; - pci_conf[0x4e] = 0x03; - pci_conf[0x4f] = 0x00; - pci_conf[0x60] = 0x80; - pci_conf[0x61] = 0x80; - pci_conf[0x62] = 0x80; - pci_conf[0x63] = 0x80; - pci_conf[0x69] = 0x02; - pci_conf[0x70] = 0x80; - pci_conf[0x76] = 0x0c; - pci_conf[0x77] = 0x0c; - pci_conf[0x78] = 0x02; - pci_conf[0x79] = 0x00; - pci_conf[0x80] = 0x00; - pci_conf[0x82] = 0x00; - pci_conf[0xa0] = 0x08; - pci_conf[0xa2] = 0x00; - pci_conf[0xa3] = 0x00; - pci_conf[0xa4] = 0x00; - pci_conf[0xa5] = 0x00; - pci_conf[0xa6] = 0x00; - pci_conf[0xa7] = 0x00; - pci_conf[0xa8] = 0x0f; - pci_conf[0xaa] = 0x00; - pci_conf[0xab] = 0x00; - pci_conf[0xac] = 0x00; - pci_conf[0xae] = 0x00; - - d->pic_levels = 0; /* not used in PIIX4 */ - d->rcr = 0; -} - -static int piix4_post_load(void *opaque, int version_id) -{ - PIIXState *s = opaque; - - if (version_id == 2) { - s->rcr = 0; - } - - return 0; -} - -static const VMStateDescription vmstate_piix4 = { - .name = "PIIX4", - .version_id = 3, - .minimum_version_id = 2, - .post_load = piix4_post_load, - .fields = (VMStateField[]) { - VMSTATE_PCI_DEVICE(dev, PIIXState), - VMSTATE_UINT8_V(rcr, PIIXState, 3), - VMSTATE_END_OF_LIST() - } -}; - -static void rcr_write(void *opaque, hwaddr addr, uint64_t val, - unsigned int len) -{ - PIIXState *s = opaque; - - if (val & 4) { - qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); - return; - } - - s->rcr = val & 2; /* keep System Reset type only */ -} - -static uint64_t rcr_read(void *opaque, hwaddr addr, unsigned int len) -{ - PIIXState *s = opaque; - - return s->rcr; -} - -static const MemoryRegionOps rcr_ops = { - .read = rcr_read, - .write = rcr_write, - .endianness = DEVICE_LITTLE_ENDIAN, - .impl = { - .min_access_size = 1, - .max_access_size = 1, - }, -}; - -static void piix4_realize(PCIDevice *dev, Error **errp) -{ - PIIXState *s = PIIX_PCI_DEVICE(dev); - PCIBus *pci_bus = pci_get_bus(dev); - ISABus *isa_bus; - - isa_bus = isa_bus_new(DEVICE(dev), pci_address_space(dev), - pci_address_space_io(dev), errp); - if (!isa_bus) { - return; - } - - memory_region_init_io(&s->rcr_mem, OBJECT(dev), &rcr_ops, s, - "reset-control", 1); - memory_region_add_subregion_overlap(pci_address_space_io(dev), - PIIX_RCR_IOPORT, &s->rcr_mem, 1); - - /* initialize i8259 pic */ - if (!qdev_realize(DEVICE(&s->pic), NULL, errp)) { - return; - } - - /* initialize ISA irqs */ - isa_bus_irqs(isa_bus, s->pic.in_irqs); - - /* initialize pit */ - i8254_pit_init(isa_bus, 0x40, 0, NULL); - - /* DMA */ - i8257_dma_init(isa_bus, 0); - - /* RTC */ - qdev_prop_set_int32(DEVICE(&s->rtc), "base_year", 2000); - if (!qdev_realize(DEVICE(&s->rtc), BUS(isa_bus), errp)) { - return; - } - s->rtc.irq = qdev_get_gpio_in(DEVICE(&s->pic), s->rtc.isairq); - - /* IDE */ - qdev_prop_set_int32(DEVICE(&s->ide), "addr", dev->devfn + 1); - if (!qdev_realize(DEVICE(&s->ide), BUS(pci_bus), errp)) { - return; - } - - /* USB */ - if (s->has_usb) { - object_initialize_child(OBJECT(dev), "uhci", &s->uhci, - TYPE_PIIX4_USB_UHCI); - qdev_prop_set_int32(DEVICE(&s->uhci), "addr", dev->devfn + 2); - if (!qdev_realize(DEVICE(&s->uhci), BUS(pci_bus), errp)) { - return; - } - } - - /* ACPI controller */ - if (s->has_acpi) { - object_initialize_child(OBJECT(s), "pm", &s->pm, TYPE_PIIX4_PM); - qdev_prop_set_int32(DEVICE(&s->pm), "addr", dev->devfn + 3); - qdev_prop_set_uint32(DEVICE(&s->pm), "smb_io_base", s->smb_io_base); - qdev_prop_set_bit(DEVICE(&s->pm), "smm-enabled", s->smm_enabled); - if (!qdev_realize(DEVICE(&s->pm), BUS(pci_bus), errp)) { - return; - } - qdev_connect_gpio_out(DEVICE(&s->pm), 0, - qdev_get_gpio_in(DEVICE(&s->pic), 9)); - } - - pci_bus_irqs(pci_bus, piix4_set_irq, s, PIIX_NUM_PIRQS); -} - -static void piix4_init(Object *obj) -{ - PIIXState *s = PIIX_PCI_DEVICE(obj); - - object_initialize_child(obj, "pic", &s->pic, TYPE_ISA_PIC); - object_initialize_child(obj, "rtc", &s->rtc, TYPE_MC146818_RTC); - object_initialize_child(obj, "ide", &s->ide, TYPE_PIIX4_IDE); -} - -static Property piix4_props[] = { - DEFINE_PROP_UINT32("smb_io_base", PIIXState, smb_io_base, 0), - DEFINE_PROP_BOOL("has-acpi", PIIXState, has_acpi, true), - DEFINE_PROP_BOOL("has-usb", PIIXState, has_usb, true), - DEFINE_PROP_BOOL("smm-enabled", PIIXState, smm_enabled, false), - DEFINE_PROP_END_OF_LIST(), -}; - -static void piix4_class_init(ObjectClass *klass, void *data) -{ - DeviceClass *dc = DEVICE_CLASS(klass); - PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); - - k->realize = piix4_realize; - k->vendor_id = PCI_VENDOR_ID_INTEL; - k->device_id = PCI_DEVICE_ID_INTEL_82371AB_0; - k->class_id = PCI_CLASS_BRIDGE_ISA; - dc->reset = piix4_isa_reset; - dc->desc = "ISA bridge"; - dc->vmsd = &vmstate_piix4; - /* - * Reason: part of PIIX4 southbridge, needs to be wired up, - * e.g. by mips_malta_init() - */ - dc->user_creatable = false; - dc->hotpluggable = false; - device_class_set_props(dc, piix4_props); -} - -static const TypeInfo piix4_info = { - .name = TYPE_PIIX4_PCI_DEVICE, - .parent = TYPE_PCI_DEVICE, - .instance_size = sizeof(PIIXState), - .instance_init = piix4_init, - .class_init = piix4_class_init, - .interfaces = (InterfaceInfo[]) { - { INTERFACE_CONVENTIONAL_PCI_DEVICE }, - { }, - }, -}; - -static void piix4_register_types(void) -{ - type_register_static(&piix4_info); -} - -type_init(piix4_register_types) diff --git a/MAINTAINERS b/MAINTAINERS index 7a40d4d865..569042c3a1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1236,7 +1236,7 @@ Malta M: Philippe Mathieu-Daudé R: Aurelien Jarno S: Odd Fixes -F: hw/isa/piix4.c +F: hw/isa/piix.c F: hw/acpi/piix4.c F: hw/mips/malta.c F: hw/mips/gt64xxx_pci.c @@ -1654,7 +1654,7 @@ F: hw/pci-host/pam.c F: include/hw/pci-host/i440fx.h F: include/hw/pci-host/q35.h F: include/hw/pci-host/pam.h -F: hw/isa/piix3.c +F: hw/isa/piix.c F: hw/isa/lpc_ich9.c F: hw/i2c/smbus_ich9.c F: hw/acpi/piix4.c @@ -2344,7 +2344,7 @@ PIIX4 South Bridge (i82371AB) M: Hervé Poussineau M: Philippe Mathieu-Daudé S: Maintained -F: hw/isa/piix4.c +F: hw/isa/piix.c F: include/hw/southbridge/piix.h Firmware configuration (fw_cfg) diff --git a/hw/i386/Kconfig b/hw/i386/Kconfig index 39a35467ca..15442ddbdf 100644 --- a/hw/i386/Kconfig +++ b/hw/i386/Kconfig @@ -74,7 +74,7 @@ config I440FX select ACPI_SMBUS select I8259 select PCI_I440FX - select PIIX3 + select PIIX select DIMM select SMBIOS select FW_CFG_DMA diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig index 497cc29beb..847d20423a 100644 --- a/hw/isa/Kconfig +++ b/hw/isa/Kconfig @@ -31,17 +31,7 @@ config PC87312 select FDC_ISA select IDE_ISA -config PIIX3 - bool - select ACPI_PIIX4 - select I8257 - select I8259 - select IDE_PIIX - select ISA_BUS - select MC146818RTC - select USB_UHCI - -config PIIX4 +config PIIX bool # For historical reasons, SuperIO devices are created in the board # for PIIX4. diff --git a/hw/isa/meson.build b/hw/isa/meson.build index 8bf678ca0a..314bbd0860 100644 --- a/hw/isa/meson.build +++ b/hw/isa/meson.build @@ -3,8 +3,7 @@ softmmu_ss.add(when: 'CONFIG_I82378', if_true: files('i82378.c')) softmmu_ss.add(when: 'CONFIG_ISA_BUS', if_true: files('isa-bus.c')) softmmu_ss.add(when: 'CONFIG_ISA_SUPERIO', if_true: files('isa-superio.c')) softmmu_ss.add(when: 'CONFIG_PC87312', if_true: files('pc87312.c')) -softmmu_ss.add(when: 'CONFIG_PIIX3', if_true: files('piix3.c')) -softmmu_ss.add(when: 'CONFIG_PIIX4', if_true: files('piix4.c')) +softmmu_ss.add(when: 'CONFIG_PIIX', if_true: files('piix.c')) softmmu_ss.add(when: 'CONFIG_SMC37C669', if_true: files('smc37c669-superio.c')) softmmu_ss.add(when: 'CONFIG_VT82C686', if_true: files('vt82c686.c')) diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig index d156de812c..5b16ff4ed2 100644 --- a/hw/mips/Kconfig +++ b/hw/mips/Kconfig @@ -2,7 +2,7 @@ config MALTA bool select I8259 select ISA_SUPERIO - select PIIX4 + select PIIX config MIPSSIM bool From patchwork Thu Jan 5 14:32:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090030 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 390F6C3DA7D for ; Thu, 5 Jan 2023 14:43:40 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJR-00033Z-47; Thu, 05 Jan 2023 09:33:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJN-0002xA-11; Thu, 05 Jan 2023 09:33:41 -0500 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRJL-00074Q-Bu; Thu, 05 Jan 2023 09:33:40 -0500 Received: by mail-wr1-x42c.google.com with SMTP id z16so19830411wrw.1; Thu, 05 Jan 2023 06:33:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=nWHVV9vda19NyRvqLRkxjGUSWjvbhCUasXFZrRPoMVo=; b=UDiHdVqQOBeHwH7grDRrTQuGos6rn9dsizXa/bCoA/GkfXxPlCjbE8oZ+kCWlPZ79H G+LYDmlbe6mIC8sYOCITZadYKk1v8ndkc7XCOWhoGtF7PJ7OMS/LIjPBPfLMxpT7nbUu o9F/fFIx8tpjDdTusqvWen1io5OGickBauKGTXDTO7+EVd2ytI0EAliR2ORak83pF4tD E+W19FkJheaiEVdImi0tyq4d2KEpX7T2Cam+VvVZmxLOysJMaTwOOajVQpPW/o88J+cB 8LZK1RS60+6Np4yyeJ3YR9MJMd/WYbLPZw60LpZAASNnw48IlyOCfoOJXQXI0P8fCKyd NSzA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nWHVV9vda19NyRvqLRkxjGUSWjvbhCUasXFZrRPoMVo=; b=QpGZg4xuaPW6A46uQTtVtCikMFl1EYOcbK5AlsLXvAhdXzY8FC2p3B3+eLksjO49ZH JBhCkP4v8lGsh+jr6gvb0Fq69agT9Tb0IIsln5JQDL153ZrLvsJuzXWhNW3TbYlUCHN/ /bLwE7yK3r0/0XVvXyC+3nnTwPB7xmiqTBLXRIEhv4Qt6AZG60pmksp9fDw+/En7stw7 s6f2yg9eMPcvKdr9aOlEQ+4aXJ5P38fR4rFdW9LtVPzzhWL83RR9p82bVH5KY3P0TB6y 5VFICgqvQVEz2Dr6xrpJSAuyNnpVEf3qIFs88d+6gh6m3YqDr7j6ye/f6mljS9wwMiMB MRWQ== X-Gm-Message-State: AFqh2krGgbFGrcB5yRndzEbZyiaHLUjUKKP1QJOy1tVVwWQrS03LbF8+ CZZ3vDwpe1iTFTWVFdJi2NNrDYBrfS4W/w== X-Google-Smtp-Source: AMrXdXsfqcj9oHXpfHEXK7jkIKXjBt6MaHkEJjHF4sD2kKwyZqIkgSFShnfpMZtf+LqBUHPeUxn2dQ== X-Received: by 2002:a5d:4ac5:0:b0:273:bdf5:663a with SMTP id y5-20020a5d4ac5000000b00273bdf5663amr36063641wrs.26.1672929217336; Thu, 05 Jan 2023 06:33:37 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:36 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow Subject: [PATCH v5 27/31] hw/isa/piix: Harmonize names of reset control memory regions Date: Thu, 5 Jan 2023 15:32:24 +0100 Message-Id: <20230105143228.244965-28-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=shentey@gmail.com; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org There is no need for having different names here. Having the same name further allows code to be shared between PIIX3 and PIIX4. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin Message-Id: <20221022150508.26830-38-shentey@gmail.com> --- hw/isa/piix.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/isa/piix.c b/hw/isa/piix.c index 81cb4e64ab..d8cd80e859 100644 --- a/hw/isa/piix.c +++ b/hw/isa/piix.c @@ -351,7 +351,7 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp) isa_bus_irqs(isa_bus, d->pic.in_irqs); memory_region_init_io(&d->rcr_mem, OBJECT(dev), &rcr_ops, d, - "piix3-reset-control", 1); + "piix-reset-control", 1); memory_region_add_subregion_overlap(pci_address_space_io(dev), PIIX_RCR_IOPORT, &d->rcr_mem, 1); @@ -547,7 +547,7 @@ static void piix4_realize(PCIDevice *dev, Error **errp) } memory_region_init_io(&s->rcr_mem, OBJECT(dev), &rcr_ops, s, - "reset-control", 1); + "piix-reset-control", 1); memory_region_add_subregion_overlap(pci_address_space_io(dev), PIIX_RCR_IOPORT, &s->rcr_mem, 1); From patchwork Thu Jan 5 14:32:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090008 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 23ADEC3DA7D for ; Thu, 5 Jan 2023 14:34:49 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJS-00036L-Vk; Thu, 05 Jan 2023 09:33:46 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJN-0002y4-KK; Thu, 05 Jan 2023 09:33:41 -0500 Received: from mail-wr1-x432.google.com ([2a00:1450:4864:20::432]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRJL-0006xI-HU; Thu, 05 Jan 2023 09:33:41 -0500 Received: by mail-wr1-x432.google.com with SMTP id az7so11916972wrb.5; Thu, 05 Jan 2023 06:33:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=OKI3pQf10L0CafJmgzqflOFdUTw3VE2jrgkDejTMPzM=; b=qYZglaoFBTEGeTXWzO3UWijT1wgZm8+ecWnl3Vz9o4HAIqmTTsus1Km/cnzgZ5G5WL BlYZAJhz4mQDN17JHQI9qZmkKVgV9g+IyORhRCOzAK4VLl29bdwRCmtOggT4H+jQeYLd d+j0ELH0f6p5GZM32cyNuU6Yl0Q53eq9c49kQ4xZ6QsCJNvtjPelwchcV8ljNacV2Y1I IdZRVT65152ioMiUU9LHK43y3X7S4+QckjcnANMdgPDUCzzQIbWovmoRoNxEDxLSrFWe zVrjduJBxEVDdED+RE/b9zCCKZIDMYt09TV7hELxuAczwky6ijh64QUQAGIlf9kB4lsA GoRA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OKI3pQf10L0CafJmgzqflOFdUTw3VE2jrgkDejTMPzM=; b=OQD2Vn9JOHTxcVCHe0ggypEt1opvt6FhlcoGOSGMBO9XmbkAMp4cmj8nrFnRtdbkAw 4pr1MFce1zBpJqtLys0bXwXIISVJW/w/f5+K84/O98Nw6ZEC9Jmw5aE4i5hHwU3GSTi3 Y8G2vFhkaFVqFmeCeCz1PzMgzdMWCVxJqwtHIqytuUR5wQszx4e/eR62USDYdHuaiJ6n Eh74ymSIcD5TqyYgXX4m7eX81qtkFkRmOzU03sU+zOtQ9E0HVxi13OrA5jJHiNFgUMMW LCTOB2DK1T4y8pjfXAAWLvebBmKSJ60a0d9EwRH/EqNBWEq4qIrg57YixntWnlRzhCsq 49VA== X-Gm-Message-State: AFqh2kpF12u3goK3vuZ7LFs0F0HivrkicT6S+EP9VUhU3/YCLdrtKhRy tV1JCtMHVIZmqJxFUdY/wFVpN3O/z84AHA== X-Google-Smtp-Source: AMrXdXt79fSEj6PcRyg5CT8XgGHuCLPioHmO1m7r0Y/JgVmELLv/yX7HeGE7L/RlgWKzdqA4dGrZAw== X-Received: by 2002:adf:e383:0:b0:242:69f4:cb6f with SMTP id e3-20020adfe383000000b0024269f4cb6fmr32241422wrm.32.1672929218280; Thu, 05 Jan 2023 06:33:38 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:37 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow Subject: [PATCH v5 28/31] hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4 Date: Thu, 5 Jan 2023 15:32:25 +0100 Message-Id: <20230105143228.244965-29-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=shentey@gmail.com; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Resolves duplicate code. Signed-off-by: Bernhard Beschow Reviewed-by: Michael S. Tsirkin Message-Id: <20221022150508.26830-39-shentey@gmail.com> --- hw/isa/piix.c | 65 +++++++-------------------------------------------- 1 file changed, 9 insertions(+), 56 deletions(-) diff --git a/hw/isa/piix.c b/hw/isa/piix.c index d8cd80e859..0132f6e70a 100644 --- a/hw/isa/piix.c +++ b/hw/isa/piix.c @@ -331,7 +331,8 @@ static const MemoryRegionOps rcr_ops = { }, }; -static void pci_piix3_realize(PCIDevice *dev, Error **errp) +static void pci_piix_realize(PCIDevice *dev, const char *uhci_type, + Error **errp) { PIIXState *d = PIIX_PCI_DEVICE(dev); PCIBus *pci_bus = pci_get_bus(dev); @@ -371,8 +372,7 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp) /* USB */ if (d->has_usb) { - object_initialize_child(OBJECT(dev), "uhci", &d->uhci, - TYPE_PIIX3_USB_UHCI); + object_initialize_child(OBJECT(dev), "uhci", &d->uhci, uhci_type); qdev_prop_set_int32(DEVICE(&d->uhci), "addr", dev->devfn + 2); if (!qdev_realize(DEVICE(&d->uhci), BUS(pci_bus), errp)) { return; @@ -477,7 +477,7 @@ static void piix3_realize(PCIDevice *dev, Error **errp) PIIXState *piix3 = PIIX_PCI_DEVICE(dev); PCIBus *pci_bus = pci_get_bus(dev); - pci_piix3_realize(dev, errp); + pci_piix_realize(dev, TYPE_PIIX3_USB_UHCI, errp); if (*errp) { return; } @@ -506,7 +506,7 @@ static void piix3_xen_realize(PCIDevice *dev, Error **errp) PIIXState *piix3 = PIIX_PCI_DEVICE(dev); PCIBus *pci_bus = pci_get_bus(dev); - pci_piix3_realize(dev, errp); + pci_piix_realize(dev, TYPE_PIIX3_USB_UHCI, errp); if (*errp) { return; } @@ -536,71 +536,24 @@ static const TypeInfo piix3_xen_info = { static void piix4_realize(PCIDevice *dev, Error **errp) { + ERRP_GUARD(); PIIXState *s = PIIX_PCI_DEVICE(dev); PCIBus *pci_bus = pci_get_bus(dev); ISABus *isa_bus; - isa_bus = isa_bus_new(DEVICE(dev), pci_address_space(dev), - pci_address_space_io(dev), errp); - if (!isa_bus) { - return; - } - - memory_region_init_io(&s->rcr_mem, OBJECT(dev), &rcr_ops, s, - "piix-reset-control", 1); - memory_region_add_subregion_overlap(pci_address_space_io(dev), - PIIX_RCR_IOPORT, &s->rcr_mem, 1); - - /* initialize i8259 pic */ - if (!qdev_realize(DEVICE(&s->pic), NULL, errp)) { + pci_piix_realize(dev, TYPE_PIIX4_USB_UHCI, errp); + if (*errp) { return; } - /* initialize ISA irqs */ - isa_bus_irqs(isa_bus, s->pic.in_irqs); + isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(dev), "isa.0")); /* initialize pit */ i8254_pit_init(isa_bus, 0x40, 0, NULL); - /* DMA */ - i8257_dma_init(isa_bus, 0); - /* RTC */ - qdev_prop_set_int32(DEVICE(&s->rtc), "base_year", 2000); - if (!qdev_realize(DEVICE(&s->rtc), BUS(isa_bus), errp)) { - return; - } s->rtc.irq = qdev_get_gpio_in(DEVICE(&s->pic), s->rtc.isairq); - /* IDE */ - qdev_prop_set_int32(DEVICE(&s->ide), "addr", dev->devfn + 1); - if (!qdev_realize(DEVICE(&s->ide), BUS(pci_bus), errp)) { - return; - } - - /* USB */ - if (s->has_usb) { - object_initialize_child(OBJECT(dev), "uhci", &s->uhci, - TYPE_PIIX4_USB_UHCI); - qdev_prop_set_int32(DEVICE(&s->uhci), "addr", dev->devfn + 2); - if (!qdev_realize(DEVICE(&s->uhci), BUS(pci_bus), errp)) { - return; - } - } - - /* ACPI controller */ - if (s->has_acpi) { - object_initialize_child(OBJECT(s), "pm", &s->pm, TYPE_PIIX4_PM); - qdev_prop_set_int32(DEVICE(&s->pm), "addr", dev->devfn + 3); - qdev_prop_set_uint32(DEVICE(&s->pm), "smb_io_base", s->smb_io_base); - qdev_prop_set_bit(DEVICE(&s->pm), "smm-enabled", s->smm_enabled); - if (!qdev_realize(DEVICE(&s->pm), BUS(pci_bus), errp)) { - return; - } - qdev_connect_gpio_out(DEVICE(&s->pm), 0, - qdev_get_gpio_in(DEVICE(&s->pic), 9)); - } - pci_bus_irqs(pci_bus, piix4_set_irq, s, PIIX_NUM_PIRQS); } From patchwork Thu Jan 5 14:32:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090027 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9ECDEC3DA7D for ; Thu, 5 Jan 2023 14:43:17 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJR-00033j-Vl; Thu, 05 Jan 2023 09:33:46 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJO-0002zl-IZ; Thu, 05 Jan 2023 09:33:42 -0500 Received: from mail-wr1-x430.google.com ([2a00:1450:4864:20::430]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRJM-0006um-Q6; Thu, 05 Jan 2023 09:33:42 -0500 Received: by mail-wr1-x430.google.com with SMTP id h16so36266780wrz.12; Thu, 05 Jan 2023 06:33:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cKyAwLwM8Pm09xe6hbUORuW9/AEhRnyrnWLTrc7e2kA=; b=STfUzGDq9/+MvAktXcfZbRv4y8WuW9IJEOsiP0Jjm3nPQaru2zpa7qWlDVp3+CnqXi HBX82KZBmXE6LdPihd8St9Ub+q05S6pzb2I03TQH3ThkPyM9noPz5nVrgli9FWGKlTPh fAcBJSyqbBv8QlQburpu0qg2xDC5Qk5PkANZ1wRWWaqi7RCGMOSgIpPPNnNciYT2P7DT 3QOP3cZQzjO2v+yqxeYLsVcZcjjAu1Fh6Oe5y+5JPi7hlciLYQXGUD8ZWw3Bz4cuXCEq Jdai83X1QzIaYT+acmhu4fYB0zWWOo1+DFvqoayK0P9yql1GnNrCEIDuZ8GFKRa9diuY jsdw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cKyAwLwM8Pm09xe6hbUORuW9/AEhRnyrnWLTrc7e2kA=; b=zIgsnHkrcc1CSubZ4HvMgWzCXRw/qFXS7vrcpnhpXhPRzZ7XQabnC+DpCLNlFP0gZk dooJ2UJv8+slxJW1DizrCa8JfGtzMuHY6FKtkYroR4UDLfb1bnl8dvg2bviROeN6ZEBN RqfaNc6JNqMIanxMO7M8/nolp+iNpMb6QqXK1pSnXG9iCv2EWfZ/xqrpHq6OsHXNn/kG q3Qpm4ToH4RFmoIGyGlwHI1veOLkAIvxYq5zpTpRQN/doWgl/TTBV/1H+dqhfkPtwhbt X6WQjakGKvmOWgT6eCtr/ouGvLzICdNs4yXCeFU17E96uCba/P31ej6/eP8d+kSG1YsA fnhA== X-Gm-Message-State: AFqh2kqdiIOtXoBEf/dHVA6XuxYnmqIYh3HPRm4xKhpdaaxUe0UDv6sQ BMszMZ3hxUwmqnWDL41rvmRZnh/8ygozdQ== X-Google-Smtp-Source: AMrXdXsDQeomYJrIAUSfbkuj6cVqE7f7FkOaVJUS6SLc4ia6/eMz/oesgleHcuNIv+q3bUy7uhzY1w== X-Received: by 2002:adf:fec6:0:b0:242:3e7e:aa26 with SMTP id q6-20020adffec6000000b002423e7eaa26mr32380548wrs.30.1672929219488; Thu, 05 Jan 2023 06:33:39 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:39 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow Subject: [PATCH v5 29/31] hw/isa/piix: Rename functions to be shared for interrupt triggering Date: Thu, 5 Jan 2023 15:32:26 +0100 Message-Id: <20230105143228.244965-30-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=shentey@gmail.com; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org PIIX4 will get the same optimizations which are already implemented for PIIX3. Signed-off-by: Bernhard Beschow Reviewed-by: Michael S. Tsirkin Message-Id: <20221022150508.26830-40-shentey@gmail.com> --- hw/isa/piix.c | 56 +++++++++++++++++++++++++-------------------------- 1 file changed, 28 insertions(+), 28 deletions(-) diff --git a/hw/isa/piix.c b/hw/isa/piix.c index 0132f6e70a..33ea5275ec 100644 --- a/hw/isa/piix.c +++ b/hw/isa/piix.c @@ -40,47 +40,47 @@ #define XEN_PIIX_NUM_PIRQS 128ULL -static void piix3_set_irq_pic(PIIXState *piix3, int pic_irq) +static void piix_set_irq_pic(PIIXState *piix, int pic_irq) { - qemu_set_irq(piix3->pic.in_irqs[pic_irq], - !!(piix3->pic_levels & + qemu_set_irq(piix->pic.in_irqs[pic_irq], + !!(piix->pic_levels & (((1ULL << PIIX_NUM_PIRQS) - 1) << (pic_irq * PIIX_NUM_PIRQS)))); } -static void piix3_set_irq_level_internal(PIIXState *piix3, int pirq, int level) +static void piix_set_irq_level_internal(PIIXState *piix, int pirq, int level) { int pic_irq; uint64_t mask; - pic_irq = piix3->dev.config[PIIX_PIRQCA + pirq]; + pic_irq = piix->dev.config[PIIX_PIRQCA + pirq]; if (pic_irq >= ISA_NUM_IRQS) { return; } mask = 1ULL << ((pic_irq * PIIX_NUM_PIRQS) + pirq); - piix3->pic_levels &= ~mask; - piix3->pic_levels |= mask * !!level; + piix->pic_levels &= ~mask; + piix->pic_levels |= mask * !!level; } -static void piix3_set_irq_level(PIIXState *piix3, int pirq, int level) +static void piix_set_irq_level(PIIXState *piix, int pirq, int level) { int pic_irq; - pic_irq = piix3->dev.config[PIIX_PIRQCA + pirq]; + pic_irq = piix->dev.config[PIIX_PIRQCA + pirq]; if (pic_irq >= ISA_NUM_IRQS) { return; } - piix3_set_irq_level_internal(piix3, pirq, level); + piix_set_irq_level_internal(piix, pirq, level); - piix3_set_irq_pic(piix3, pic_irq); + piix_set_irq_pic(piix, pic_irq); } -static void piix3_set_irq(void *opaque, int pirq, int level) +static void piix_set_irq(void *opaque, int pirq, int level) { - PIIXState *piix3 = opaque; - piix3_set_irq_level(piix3, pirq, level); + PIIXState *piix = opaque; + piix_set_irq_level(piix, pirq, level); } static void piix4_set_irq(void *opaque, int irq_num, int level) @@ -121,29 +121,29 @@ static PCIINTxRoute piix3_route_intx_pin_to_irq(void *opaque, int pin) } /* irq routing is changed. so rebuild bitmap */ -static void piix3_update_irq_levels(PIIXState *piix3) +static void piix_update_irq_levels(PIIXState *piix) { - PCIBus *bus = pci_get_bus(&piix3->dev); + PCIBus *bus = pci_get_bus(&piix->dev); int pirq; - piix3->pic_levels = 0; + piix->pic_levels = 0; for (pirq = 0; pirq < PIIX_NUM_PIRQS; pirq++) { - piix3_set_irq_level(piix3, pirq, pci_bus_get_irq_level(bus, pirq)); + piix_set_irq_level(piix, pirq, pci_bus_get_irq_level(bus, pirq)); } } -static void piix3_write_config(PCIDevice *dev, - uint32_t address, uint32_t val, int len) +static void piix_write_config(PCIDevice *dev, uint32_t address, uint32_t val, + int len) { pci_default_write_config(dev, address, val, len); if (ranges_overlap(address, len, PIIX_PIRQCA, 4)) { - PIIXState *piix3 = PIIX_PCI_DEVICE(dev); + PIIXState *piix = PIIX_PCI_DEVICE(dev); int pic_irq; - pci_bus_fire_intx_routing_notifier(pci_get_bus(&piix3->dev)); - piix3_update_irq_levels(piix3); + pci_bus_fire_intx_routing_notifier(pci_get_bus(&piix->dev)); + piix_update_irq_levels(piix); for (pic_irq = 0; pic_irq < ISA_NUM_IRQS; pic_irq++) { - piix3_set_irq_pic(piix3, pic_irq); + piix_set_irq_pic(piix, pic_irq); } } } @@ -165,7 +165,7 @@ static void piix3_write_config_xen(PCIDevice *dev, } } - piix3_write_config(dev, address, val, len); + piix_write_config(dev, address, val, len); } static void piix_reset(DeviceState *dev) @@ -225,7 +225,7 @@ static int piix3_post_load(void *opaque, int version_id) */ piix3->pic_levels = 0; for (pirq = 0; pirq < PIIX_NUM_PIRQS; pirq++) { - piix3_set_irq_level_internal(piix3, pirq, + piix_set_irq_level_internal(piix3, pirq, pci_bus_get_irq_level(pci_get_bus(&piix3->dev), pirq)); } return 0; @@ -482,7 +482,7 @@ static void piix3_realize(PCIDevice *dev, Error **errp) return; } - pci_bus_irqs(pci_bus, piix3_set_irq, piix3, PIIX_NUM_PIRQS); + pci_bus_irqs(pci_bus, piix_set_irq, piix3, PIIX_NUM_PIRQS); pci_bus_set_route_irq_fn(pci_bus, piix3_route_intx_pin_to_irq); } @@ -490,7 +490,7 @@ static void piix3_class_init(ObjectClass *klass, void *data) { PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); - k->config_write = piix3_write_config; + k->config_write = piix_write_config; k->realize = piix3_realize; } From patchwork Thu Jan 5 14:32:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090016 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 58D2AC3DA7A for ; Thu, 5 Jan 2023 14:37:26 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJU-00038R-0o; Thu, 05 Jan 2023 09:33:48 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJP-00030r-KR; Thu, 05 Jan 2023 09:33:43 -0500 Received: from mail-wr1-x430.google.com ([2a00:1450:4864:20::430]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRJO-0006uP-0e; Thu, 05 Jan 2023 09:33:43 -0500 Received: by mail-wr1-x430.google.com with SMTP id s9so4302859wru.13; Thu, 05 Jan 2023 06:33:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zuCBNECzW2xUKqTH2aggcsIdi9V+87vm/4qa1pOYyVQ=; b=M3HbKJP3wafkZuaJIMsohPZQFEhEhdaWWWGh5qxZLPi6y9GuM8E7raF8iQQ1wJlRyL MzUCPzY00gvRAkqdCGHH3MPp5BoKyzRMGXO039ChUbXRgrLqaNmgYE/hexElwCX18Gyz TbfmpoaVOTowb2UYPUK9D8ZpuzFbTww0cCzMx/1AgEoDbDt8To1rXklrWK7+3hhYIWKo wr3Y0enfskA7lFFSKfNfyXr+1XbJ4UBaSf5nu3/rewutJcvS4EpK78poyr4CuOfq9vPW 2bkSO4yEZg5Oru7h4uhmW//mvHm0jOsQFyBuxjFPg1CSJ4PCmdJnAQ16BSNThB0Yt5Tf 7VGw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zuCBNECzW2xUKqTH2aggcsIdi9V+87vm/4qa1pOYyVQ=; b=LbSoEC24LAJrMIGKTjaI/WdS0yxqCk6Owbx1ow93Teg9mAPUHRi2mk+/kP2tt1Wxvf 8MWOSLpWVQVkotiqY/wFcwz47IaA8TtslUwwwywhECUjFxLa1KRvMNLRQc3U98FGtsck JUH0aiteU317zR6j3TreUDiegSEAITbCpoSiT6kJP+fOi9UQ1yeQ6CQiCaml1PmlKlhQ wZfhfbCLtzrRZecysZrCY0O/GWfSWtKMGz3HRxlB9ZyY2krtdGKaS5Yn1Af5IC9067Nv G4gf01C3ma/vQ2+3jMYrT2XQCyfNfC2D0+fOOWI/+uVzFFffLI/uVtJWr091DfPjZPf2 idRg== X-Gm-Message-State: AFqh2kpu5DI5I8VY7ApeKidOXzHXRkqGSlTWZ54XPozHuAXWlO+c2a2d ugm+w17jht7gH/TRdQtj463GHKFJi/mr3A== X-Google-Smtp-Source: AMrXdXuyGNhOgHyLT318bico26JRfDH6iSKfy7r/dxFFD8oo9aISnNvQfh9zA+t8gMCOSZ1lRzqeqw== X-Received: by 2002:a5d:5a19:0:b0:242:1ef7:9ad5 with SMTP id bq25-20020a5d5a19000000b002421ef79ad5mr35491583wrb.68.1672929220729; Thu, 05 Jan 2023 06:33:40 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:40 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow Subject: [PATCH v5 30/31] hw/isa/piix: Consolidate IRQ triggering Date: Thu, 5 Jan 2023 15:32:27 +0100 Message-Id: <20230105143228.244965-31-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=shentey@gmail.com; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Speeds up PIIX4 which resolves an old TODO. Signed-off-by: Bernhard Beschow Reviewed-by: Michael S. Tsirkin Message-Id: <20221022150508.26830-41-shentey@gmail.com> --- hw/isa/piix.c | 26 +++----------------------- 1 file changed, 3 insertions(+), 23 deletions(-) diff --git a/hw/isa/piix.c b/hw/isa/piix.c index 33ea5275ec..f125a6175f 100644 --- a/hw/isa/piix.c +++ b/hw/isa/piix.c @@ -83,27 +83,6 @@ static void piix_set_irq(void *opaque, int pirq, int level) piix_set_irq_level(piix, pirq, level); } -static void piix4_set_irq(void *opaque, int irq_num, int level) -{ - int i, pic_irq, pic_level; - PIIXState *s = opaque; - PCIBus *bus = pci_get_bus(&s->dev); - - /* now we change the pic irq level according to the piix irq mappings */ - /* XXX: optimize */ - pic_irq = s->dev.config[PIIX_PIRQCA + irq_num]; - if (pic_irq < ISA_NUM_IRQS) { - /* The pic level is the logical OR of all the PCI irqs mapped to it. */ - pic_level = 0; - for (i = 0; i < PIIX_NUM_PIRQS; i++) { - if (pic_irq == s->dev.config[PIIX_PIRQCA + i]) { - pic_level |= pci_bus_get_irq_level(bus, i); - } - } - qemu_set_irq(s->pic.in_irqs[pic_irq], pic_level); - } -} - static PCIINTxRoute piix3_route_intx_pin_to_irq(void *opaque, int pin) { PIIXState *piix3 = opaque; @@ -239,7 +218,7 @@ static int piix4_post_load(void *opaque, int version_id) s->rcr = 0; } - return 0; + return piix3_post_load(opaque, version_id); } static int piix3_pre_save(void *opaque) @@ -554,7 +533,7 @@ static void piix4_realize(PCIDevice *dev, Error **errp) /* RTC */ s->rtc.irq = qdev_get_gpio_in(DEVICE(&s->pic), s->rtc.isairq); - pci_bus_irqs(pci_bus, piix4_set_irq, s, PIIX_NUM_PIRQS); + pci_bus_irqs(pci_bus, piix_set_irq, s, PIIX_NUM_PIRQS); } static void piix4_init(Object *obj) @@ -571,6 +550,7 @@ static void piix4_class_init(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); + k->config_write = piix_write_config; k->realize = piix4_realize; k->vendor_id = PCI_VENDOR_ID_INTEL; k->device_id = PCI_DEVICE_ID_INTEL_82371AB_0; From patchwork Thu Jan 5 14:32:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13090014 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 629D4C3DA7A for ; Thu, 5 Jan 2023 14:36:06 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pDRJU-00038U-IG; Thu, 05 Jan 2023 09:33:48 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pDRJR-00033i-UZ; Thu, 05 Jan 2023 09:33:45 -0500 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pDRJQ-000765-5d; Thu, 05 Jan 2023 09:33:45 -0500 Received: by mail-wr1-x435.google.com with SMTP id bk16so23104222wrb.11; Thu, 05 Jan 2023 06:33:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=dn+yeGFQIMdJW7Gi0bvDMswZATWnQh3mXrYoXnwfAnI=; b=UMhxxgs0gFPOwgYC7PELHwAV7mrn5OyKlTiYKBrsDMtCnIgG/Wg/uGq/NPUC5fJz71 +c+VoH5EszqDGyn2BpVOdTZKKAN6kOgutSRmUSWFlEXxj22ev8+8+ongvsSQSnO++ztg LoBdL0Lobq6ZyC8xzMFbyIG/qxHFIp9xJnTzZEfRho9FyP6cJZ/jVxQN9Bwb6FwBrFg1 rl0wynJxWPpuuZCHeyDXcIHMUiy2KmicX8junZ/o+83pa0WY9zGw9TkRdyPFtOpmRNUR 3LoniIV0+v6ARq0q+KlQA6baRm/9q0e9Be6DXwVgQuM/tzRYO4lD0GI9asUKQOUdP75J iptg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=dn+yeGFQIMdJW7Gi0bvDMswZATWnQh3mXrYoXnwfAnI=; b=HQKdFTWkO5gyvdrs02tzDXMyRIMYMD+y9vAGS5SmGrAE5nXFdDh2K9LeJkXYveX43b 9i+rnzKESLnyFw5nYF41XrxJW7lJOHJUi4a7TtxFr7lv1WX7/1n5wgy7j3dlhD2duvWh 72JiUPc24ghtyJAu+2alz6v4WG7UokdYoKwWt09RVIBRND1N63F1oQqx4cIN4vIkcSVD PhOdbrIWZ6ghHk6VIyyq801NhQOFhbQD0rUONV4kpiYEvzEaJqKDtmw7hoEdUSCpSvto Mwsy9IDINButFHApN9Cr1Ehe4e4mj1+CN6TJaN3ytL/42teQ9A3rcLF+ldOlABc7162z 7Ceg== X-Gm-Message-State: AFqh2kpmVsrEYyUxq136Qs9716YXq+9mFLHPtGxvQ0pq4xL5swkBRitl ggk5E0llW53xqAQSwEojDrRYDnoC8RMetg== X-Google-Smtp-Source: AMrXdXvACijv0+rR06rvHCNEJQEMQCKmbFfBaxa0DFEPk1yg7yWxIT5ZQQND2wKrq6Onbu+Tzbi/lw== X-Received: by 2002:adf:f74e:0:b0:22e:6227:34e4 with SMTP id z14-20020adff74e000000b0022e622734e4mr30685185wrp.0.1672929221965; Thu, 05 Jan 2023 06:33:41 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:41 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Ani Sinha , Richard Henderson , Jiaxun Yang , Aurelien Jarno , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Igor Mammedov , Marcel Apfelbaum , John Snow , Gerd Hoffmann , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow , Thomas Huth Subject: [PATCH v5 31/31] hw/isa/piix: Share PIIX3's base class with PIIX4 Date: Thu, 5 Jan 2023 15:32:28 +0100 Message-Id: <20230105143228.244965-32-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=shentey@gmail.com; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Having a common base class will allow for substituting PIIX3 with PIIX4 and vice versa. Moreover, it makes PIIX4 implement the acpi-dev-aml-interface. Signed-off-by: Bernhard Beschow Reviewed-by: Michael S. Tsirkin Reviewed-by: Thomas Huth Message-Id: <20221022150508.26830-42-shentey@gmail.com> --- hw/isa/piix.c | 49 ++++++++++++++++++++++--------------------------- 1 file changed, 22 insertions(+), 27 deletions(-) diff --git a/hw/isa/piix.c b/hw/isa/piix.c index f125a6175f..54a1246a9d 100644 --- a/hw/isa/piix.c +++ b/hw/isa/piix.c @@ -396,13 +396,12 @@ static void build_pci_isa_aml(AcpiDevAmlIf *adev, Aml *scope) } } -static void pci_piix3_init(Object *obj) +static void pci_piix_init(Object *obj) { PIIXState *d = PIIX_PCI_DEVICE(obj); object_initialize_child(obj, "pic", &d->pic, TYPE_ISA_PIC); object_initialize_child(obj, "rtc", &d->rtc, TYPE_MC146818_RTC); - object_initialize_child(obj, "ide", &d->ide, TYPE_PIIX3_IDE); } static Property pci_piix_props[] = { @@ -413,7 +412,7 @@ static Property pci_piix_props[] = { DEFINE_PROP_END_OF_LIST(), }; -static void pci_piix3_class_init(ObjectClass *klass, void *data) +static void pci_piix_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); @@ -421,11 +420,8 @@ static void pci_piix3_class_init(ObjectClass *klass, void *data) dc->reset = piix_reset; dc->desc = "ISA bridge"; - dc->vmsd = &vmstate_piix3; dc->hotpluggable = false; k->vendor_id = PCI_VENDOR_ID_INTEL; - /* 82371SB PIIX3 PCI-to-ISA bridge (Step A1) */ - k->device_id = PCI_DEVICE_ID_INTEL_82371SB_0; k->class_id = PCI_CLASS_BRIDGE_ISA; /* * Reason: part of PIIX3 southbridge, needs to be wired up by @@ -440,9 +436,9 @@ static const TypeInfo piix_pci_type_info = { .name = TYPE_PIIX_PCI_DEVICE, .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PIIXState), - .instance_init = pci_piix3_init, + .instance_init = pci_piix_init, .abstract = true, - .class_init = pci_piix3_class_init, + .class_init = pci_piix_class_init, .interfaces = (InterfaceInfo[]) { { INTERFACE_CONVENTIONAL_PCI_DEVICE }, { TYPE_ACPI_DEV_AML_IF }, @@ -465,17 +461,29 @@ static void piix3_realize(PCIDevice *dev, Error **errp) pci_bus_set_route_irq_fn(pci_bus, piix3_route_intx_pin_to_irq); } +static void piix3_init(Object *obj) +{ + PIIXState *d = PIIX_PCI_DEVICE(obj); + + object_initialize_child(obj, "ide", &d->ide, TYPE_PIIX3_IDE); +} + static void piix3_class_init(ObjectClass *klass, void *data) { + DeviceClass *dc = DEVICE_CLASS(klass); PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); k->config_write = piix_write_config; k->realize = piix3_realize; + /* 82371SB PIIX3 PCI-to-ISA bridge (Step A1) */ + k->device_id = PCI_DEVICE_ID_INTEL_82371SB_0; + dc->vmsd = &vmstate_piix3; } static const TypeInfo piix3_info = { .name = TYPE_PIIX3_DEVICE, .parent = TYPE_PIIX_PCI_DEVICE, + .instance_init = piix3_init, .class_init = piix3_class_init, }; @@ -501,15 +509,20 @@ static void piix3_xen_realize(PCIDevice *dev, Error **errp) static void piix3_xen_class_init(ObjectClass *klass, void *data) { + DeviceClass *dc = DEVICE_CLASS(klass); PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); k->config_write = piix3_write_config_xen; k->realize = piix3_xen_realize; + /* 82371SB PIIX3 PCI-to-ISA bridge (Step A1) */ + k->device_id = PCI_DEVICE_ID_INTEL_82371SB_0; + dc->vmsd = &vmstate_piix3; } static const TypeInfo piix3_xen_info = { .name = TYPE_PIIX3_XEN_DEVICE, .parent = TYPE_PIIX_PCI_DEVICE, + .instance_init = piix3_init, .class_init = piix3_xen_class_init, }; @@ -540,8 +553,6 @@ static void piix4_init(Object *obj) { PIIXState *s = PIIX_PCI_DEVICE(obj); - object_initialize_child(obj, "pic", &s->pic, TYPE_ISA_PIC); - object_initialize_child(obj, "rtc", &s->rtc, TYPE_MC146818_RTC); object_initialize_child(obj, "ide", &s->ide, TYPE_PIIX4_IDE); } @@ -552,31 +563,15 @@ static void piix4_class_init(ObjectClass *klass, void *data) k->config_write = piix_write_config; k->realize = piix4_realize; - k->vendor_id = PCI_VENDOR_ID_INTEL; k->device_id = PCI_DEVICE_ID_INTEL_82371AB_0; - k->class_id = PCI_CLASS_BRIDGE_ISA; - dc->reset = piix_reset; - dc->desc = "ISA bridge"; dc->vmsd = &vmstate_piix4; - /* - * Reason: part of PIIX4 southbridge, needs to be wired up, - * e.g. by mips_malta_init() - */ - dc->user_creatable = false; - dc->hotpluggable = false; - device_class_set_props(dc, pci_piix_props); } static const TypeInfo piix4_info = { .name = TYPE_PIIX4_PCI_DEVICE, - .parent = TYPE_PCI_DEVICE, - .instance_size = sizeof(PIIXState), + .parent = TYPE_PIIX_PCI_DEVICE, .instance_init = piix4_init, .class_init = piix4_class_init, - .interfaces = (InterfaceInfo[]) { - { INTERFACE_CONVENTIONAL_PCI_DEVICE }, - { }, - }, }; static void piix3_register_types(void)