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[92.176.231.205]) by smtp.gmail.com with ESMTPSA id bp28-20020a5d5a9c000000b00273cd321a1bsm4553900wrb.107.2023.01.07.11.18.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Jan 2023 11:18:32 -0800 (PST) From: Javier Martinez Canillas To: linux-kernel@vger.kernel.org Subject: [PATCH v2 01/13] drm/panel-asus-z00t-tm5p5-n35596: Drop custom DSI write macros Date: Sat, 7 Jan 2023 20:18:10 +0100 Message-Id: <20230107191822.3787147-2-javierm@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230107191822.3787147-1-javierm@redhat.com> References: <20230107191822.3787147-1-javierm@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sam Ravnborg , Javier Martinez Canillas , dri-devel@lists.freedesktop.org, Thierry Reding Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" There are macros for these already in the header, use that instead and delete the custom DSI write macros defined in the driver. Signed-off-by: Javier Martinez Canillas Reviewed-by: Sam Ravnborg --- Changes in v2: - Add Sam Ravnborg's Reviewed-by tag. .../drm/panel/panel-asus-z00t-tm5p5-n35596.c | 96 ++++++++----------- 1 file changed, 40 insertions(+), 56 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-asus-z00t-tm5p5-n35596.c b/drivers/gpu/drm/panel/panel-asus-z00t-tm5p5-n35596.c index b3235781e6ba..075a7af81eff 100644 --- a/drivers/gpu/drm/panel/panel-asus-z00t-tm5p5-n35596.c +++ b/drivers/gpu/drm/panel/panel-asus-z00t-tm5p5-n35596.c @@ -24,22 +24,6 @@ static inline struct tm5p5_nt35596 *to_tm5p5_nt35596(struct drm_panel *panel) return container_of(panel, struct tm5p5_nt35596, panel); } -#define dsi_generic_write_seq(dsi, seq...) do { \ - static const u8 d[] = { seq }; \ - int ret; \ - ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \ - if (ret < 0) \ - return ret; \ - } while (0) - -#define dsi_dcs_write_seq(dsi, seq...) do { \ - static const u8 d[] = { seq }; \ - int ret; \ - ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \ - if (ret < 0) \ - return ret; \ - } while (0) - static void tm5p5_nt35596_reset(struct tm5p5_nt35596 *ctx) { gpiod_set_value_cansleep(ctx->reset_gpio, 1); @@ -54,46 +38,46 @@ static int tm5p5_nt35596_on(struct tm5p5_nt35596 *ctx) { struct mipi_dsi_device *dsi = ctx->dsi; - dsi_generic_write_seq(dsi, 0xff, 0x05); - dsi_generic_write_seq(dsi, 0xfb, 0x01); - dsi_generic_write_seq(dsi, 0xc5, 0x31); - dsi_generic_write_seq(dsi, 0xff, 0x04); - dsi_generic_write_seq(dsi, 0x01, 0x84); - dsi_generic_write_seq(dsi, 0x05, 0x25); - dsi_generic_write_seq(dsi, 0x06, 0x01); - dsi_generic_write_seq(dsi, 0x07, 0x20); - dsi_generic_write_seq(dsi, 0x08, 0x06); - dsi_generic_write_seq(dsi, 0x09, 0x08); - dsi_generic_write_seq(dsi, 0x0a, 0x10); - dsi_generic_write_seq(dsi, 0x0b, 0x10); - dsi_generic_write_seq(dsi, 0x0c, 0x10); - dsi_generic_write_seq(dsi, 0x0d, 0x14); - dsi_generic_write_seq(dsi, 0x0e, 0x14); - dsi_generic_write_seq(dsi, 0x0f, 0x14); - dsi_generic_write_seq(dsi, 0x10, 0x14); - dsi_generic_write_seq(dsi, 0x11, 0x14); - dsi_generic_write_seq(dsi, 0x12, 0x14); - dsi_generic_write_seq(dsi, 0x17, 0xf3); - dsi_generic_write_seq(dsi, 0x18, 0xc0); - dsi_generic_write_seq(dsi, 0x19, 0xc0); - dsi_generic_write_seq(dsi, 0x1a, 0xc0); - dsi_generic_write_seq(dsi, 0x1b, 0xb3); - dsi_generic_write_seq(dsi, 0x1c, 0xb3); - dsi_generic_write_seq(dsi, 0x1d, 0xb3); - dsi_generic_write_seq(dsi, 0x1e, 0xb3); - dsi_generic_write_seq(dsi, 0x1f, 0xb3); - dsi_generic_write_seq(dsi, 0x20, 0xb3); - dsi_generic_write_seq(dsi, 0xfb, 0x01); - dsi_generic_write_seq(dsi, 0xff, 0x00); - dsi_generic_write_seq(dsi, 0xfb, 0x01); - dsi_generic_write_seq(dsi, 0x35, 0x01); - dsi_generic_write_seq(dsi, 0xd3, 0x06); - dsi_generic_write_seq(dsi, 0xd4, 0x04); - dsi_generic_write_seq(dsi, 0x5e, 0x0d); - dsi_generic_write_seq(dsi, 0x11, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xff, 0x05); + mipi_dsi_generic_write_seq(dsi, 0xfb, 0x01); + mipi_dsi_generic_write_seq(dsi, 0xc5, 0x31); + mipi_dsi_generic_write_seq(dsi, 0xff, 0x04); + mipi_dsi_generic_write_seq(dsi, 0x01, 0x84); + mipi_dsi_generic_write_seq(dsi, 0x05, 0x25); + mipi_dsi_generic_write_seq(dsi, 0x06, 0x01); + mipi_dsi_generic_write_seq(dsi, 0x07, 0x20); + mipi_dsi_generic_write_seq(dsi, 0x08, 0x06); + mipi_dsi_generic_write_seq(dsi, 0x09, 0x08); + mipi_dsi_generic_write_seq(dsi, 0x0a, 0x10); + mipi_dsi_generic_write_seq(dsi, 0x0b, 0x10); + mipi_dsi_generic_write_seq(dsi, 0x0c, 0x10); + mipi_dsi_generic_write_seq(dsi, 0x0d, 0x14); + mipi_dsi_generic_write_seq(dsi, 0x0e, 0x14); + mipi_dsi_generic_write_seq(dsi, 0x0f, 0x14); + mipi_dsi_generic_write_seq(dsi, 0x10, 0x14); + mipi_dsi_generic_write_seq(dsi, 0x11, 0x14); + mipi_dsi_generic_write_seq(dsi, 0x12, 0x14); + mipi_dsi_generic_write_seq(dsi, 0x17, 0xf3); + mipi_dsi_generic_write_seq(dsi, 0x18, 0xc0); + mipi_dsi_generic_write_seq(dsi, 0x19, 0xc0); + mipi_dsi_generic_write_seq(dsi, 0x1a, 0xc0); + mipi_dsi_generic_write_seq(dsi, 0x1b, 0xb3); + mipi_dsi_generic_write_seq(dsi, 0x1c, 0xb3); + mipi_dsi_generic_write_seq(dsi, 0x1d, 0xb3); + mipi_dsi_generic_write_seq(dsi, 0x1e, 0xb3); + mipi_dsi_generic_write_seq(dsi, 0x1f, 0xb3); + mipi_dsi_generic_write_seq(dsi, 0x20, 0xb3); + mipi_dsi_generic_write_seq(dsi, 0xfb, 0x01); + mipi_dsi_generic_write_seq(dsi, 0xff, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xfb, 0x01); + mipi_dsi_generic_write_seq(dsi, 0x35, 0x01); + mipi_dsi_generic_write_seq(dsi, 0xd3, 0x06); + mipi_dsi_generic_write_seq(dsi, 0xd4, 0x04); + mipi_dsi_generic_write_seq(dsi, 0x5e, 0x0d); + mipi_dsi_generic_write_seq(dsi, 0x11, 0x00); msleep(100); - dsi_generic_write_seq(dsi, 0x29, 0x00); - dsi_generic_write_seq(dsi, 0x53, 0x24); + mipi_dsi_generic_write_seq(dsi, 0x29, 0x00); + mipi_dsi_generic_write_seq(dsi, 0x53, 0x24); return 0; } @@ -117,7 +101,7 @@ static int tm5p5_nt35596_off(struct tm5p5_nt35596 *ctx) return ret; } - dsi_dcs_write_seq(dsi, 0x4f, 0x01); + mipi_dsi_dcs_write_seq(dsi, 0x4f, 0x01); return 0; } From patchwork Sat Jan 7 19:18:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Javier Martinez Canillas X-Patchwork-Id: 13092308 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2ECF5C54EBC for ; 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[92.176.231.205]) by smtp.gmail.com with ESMTPSA id bp28-20020a5d5a9c000000b00273cd321a1bsm4553900wrb.107.2023.01.07.11.18.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Jan 2023 11:18:33 -0800 (PST) From: Javier Martinez Canillas To: linux-kernel@vger.kernel.org Subject: [PATCH v2 02/13] drm/panel-sitronix-st7703: Drop custom DSI write macros Date: Sat, 7 Jan 2023 20:18:11 +0100 Message-Id: <20230107191822.3787147-3-javierm@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230107191822.3787147-1-javierm@redhat.com> References: <20230107191822.3787147-1-javierm@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ondrej Jirman , Purism Kernel Team , Sam Ravnborg , =?utf-8?q?Guido_G=C3=BCnther?= , Javier Martinez Canillas , dri-devel@lists.freedesktop.org, Thierry Reding Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" There are macros for these already in the header, use that instead and delete the custom DSI write macros defined in the driver. Signed-off-by: Javier Martinez Canillas Reviewed-by: Sam Ravnborg Reviewed-by: Guido Günther --- Changes in v2: - Add Sam Ravnborg's Reviewed-by tag. - Fix identation on macro usage (Sam Ravnborg). drivers/gpu/drm/panel/panel-sitronix-st7703.c | 341 +++++++++--------- 1 file changed, 162 insertions(+), 179 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c index 86a472b01360..6747ca237ced 100644 --- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c +++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c @@ -73,14 +73,6 @@ static inline struct st7703 *panel_to_st7703(struct drm_panel *panel) return container_of(panel, struct st7703, panel); } -#define dsi_generic_write_seq(dsi, seq...) do { \ - static const u8 d[] = { seq }; \ - int ret; \ - ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \ - if (ret < 0) \ - return ret; \ - } while (0) - static int jh057n_init_sequence(struct st7703 *ctx) { struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); @@ -90,50 +82,50 @@ static int jh057n_init_sequence(struct st7703 *ctx) * resemble the ST7703 but the number of parameters often don't match * so it's likely a clone. */ - dsi_generic_write_seq(dsi, ST7703_CMD_SETEXTC, - 0xF1, 0x12, 0x83); - dsi_generic_write_seq(dsi, ST7703_CMD_SETRGBIF, - 0x10, 0x10, 0x05, 0x05, 0x03, 0xFF, 0x00, 0x00, - 0x00, 0x00); - dsi_generic_write_seq(dsi, ST7703_CMD_SETSCR, - 0x73, 0x73, 0x50, 0x50, 0x00, 0x00, 0x08, 0x70, - 0x00); - dsi_generic_write_seq(dsi, ST7703_CMD_SETVDC, 0x4E); - dsi_generic_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0B); - dsi_generic_write_seq(dsi, ST7703_CMD_SETCYC, 0x80); - dsi_generic_write_seq(dsi, ST7703_CMD_SETDISP, 0xF0, 0x12, 0x30); - dsi_generic_write_seq(dsi, ST7703_CMD_SETEQ, - 0x07, 0x07, 0x0B, 0x0B, 0x03, 0x0B, 0x00, 0x00, - 0x00, 0x00, 0xFF, 0x00, 0xC0, 0x10); - dsi_generic_write_seq(dsi, ST7703_CMD_SETBGP, 0x08, 0x08); + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETEXTC, + 0xF1, 0x12, 0x83); + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETRGBIF, + 0x10, 0x10, 0x05, 0x05, 0x03, 0xFF, 0x00, 0x00, + 0x00, 0x00); + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETSCR, + 0x73, 0x73, 0x50, 0x50, 0x00, 0x00, 0x08, 0x70, + 0x00); + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETVDC, 0x4E); + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0B); + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETCYC, 0x80); + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETDISP, 0xF0, 0x12, 0x30); + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETEQ, + 0x07, 0x07, 0x0B, 0x0B, 0x03, 0x0B, 0x00, 0x00, + 0x00, 0x00, 0xFF, 0x00, 0xC0, 0x10); + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETBGP, 0x08, 0x08); msleep(20); - dsi_generic_write_seq(dsi, ST7703_CMD_SETVCOM, 0x3F, 0x3F); - dsi_generic_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00); - dsi_generic_write_seq(dsi, ST7703_CMD_SETGIP1, - 0x82, 0x10, 0x06, 0x05, 0x9E, 0x0A, 0xA5, 0x12, - 0x31, 0x23, 0x37, 0x83, 0x04, 0xBC, 0x27, 0x38, - 0x0C, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0C, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x75, 0x75, 0x31, 0x88, - 0x88, 0x88, 0x88, 0x88, 0x88, 0x13, 0x88, 0x64, - 0x64, 0x20, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, - 0x02, 0x88, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); - dsi_generic_write_seq(dsi, ST7703_CMD_SETGIP2, - 0x02, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x02, 0x46, 0x02, 0x88, - 0x88, 0x88, 0x88, 0x88, 0x88, 0x64, 0x88, 0x13, - 0x57, 0x13, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, - 0x75, 0x88, 0x23, 0x14, 0x00, 0x00, 0x02, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x0A, - 0xA5, 0x00, 0x00, 0x00, 0x00); - dsi_generic_write_seq(dsi, ST7703_CMD_SETGAMMA, - 0x00, 0x09, 0x0E, 0x29, 0x2D, 0x3C, 0x41, 0x37, - 0x07, 0x0B, 0x0D, 0x10, 0x11, 0x0F, 0x10, 0x11, - 0x18, 0x00, 0x09, 0x0E, 0x29, 0x2D, 0x3C, 0x41, - 0x37, 0x07, 0x0B, 0x0D, 0x10, 0x11, 0x0F, 0x10, - 0x11, 0x18); + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETVCOM, 0x3F, 0x3F); + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00); + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETGIP1, + 0x82, 0x10, 0x06, 0x05, 0x9E, 0x0A, 0xA5, 0x12, + 0x31, 0x23, 0x37, 0x83, 0x04, 0xBC, 0x27, 0x38, + 0x0C, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0C, 0x00, + 0x03, 0x00, 0x00, 0x00, 0x75, 0x75, 0x31, 0x88, + 0x88, 0x88, 0x88, 0x88, 0x88, 0x13, 0x88, 0x64, + 0x64, 0x20, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, + 0x02, 0x88, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETGIP2, + 0x02, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x46, 0x02, 0x88, + 0x88, 0x88, 0x88, 0x88, 0x88, 0x64, 0x88, 0x13, + 0x57, 0x13, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, + 0x75, 0x88, 0x23, 0x14, 0x00, 0x00, 0x02, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x0A, + 0xA5, 0x00, 0x00, 0x00, 0x00); + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETGAMMA, + 0x00, 0x09, 0x0E, 0x29, 0x2D, 0x3C, 0x41, 0x37, + 0x07, 0x0B, 0x0D, 0x10, 0x11, 0x0F, 0x10, 0x11, + 0x18, 0x00, 0x09, 0x0E, 0x29, 0x2D, 0x3C, 0x41, + 0x37, 0x07, 0x0B, 0x0D, 0x10, 0x11, 0x0F, 0x10, + 0x11, 0x18); return 0; } @@ -162,15 +154,6 @@ static const struct st7703_panel_desc jh057n00900_panel_desc = { .init_sequence = jh057n_init_sequence, }; -#define dsi_dcs_write_seq(dsi, cmd, seq...) do { \ - static const u8 d[] = { seq }; \ - int ret; \ - ret = mipi_dsi_dcs_write(dsi, cmd, d, ARRAY_SIZE(d)); \ - if (ret < 0) \ - return ret; \ - } while (0) - - static int xbd599_init_sequence(struct st7703 *ctx) { struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); @@ -180,154 +163,154 @@ static int xbd599_init_sequence(struct st7703 *ctx) */ /* Magic sequence to unlock user commands below. */ - dsi_dcs_write_seq(dsi, ST7703_CMD_SETEXTC, 0xF1, 0x12, 0x83); - - dsi_dcs_write_seq(dsi, ST7703_CMD_SETMIPI, - 0x33, /* VC_main = 0, Lane_Number = 3 (4 lanes) */ - 0x81, /* DSI_LDO_SEL = 1.7V, RTERM = 90 Ohm */ - 0x05, /* IHSRX = x6 (Low High Speed driving ability) */ - 0xF9, /* TX_CLK_SEL = fDSICLK/16 */ - 0x0E, /* HFP_OSC (min. HFP number in DSI mode) */ - 0x0E, /* HBP_OSC (min. HBP number in DSI mode) */ - /* The rest is undocumented in ST7703 datasheet */ - 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x44, 0x25, 0x00, 0x91, 0x0a, 0x00, 0x00, 0x02, - 0x4F, 0x11, 0x00, 0x00, 0x37); - - dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER_EXT, - 0x25, /* PCCS = 2, ECP_DC_DIV = 1/4 HSYNC */ - 0x22, /* DT = 15ms XDK_ECP = x2 */ - 0x20, /* PFM_DC_DIV = /1 */ - 0x03 /* ECP_SYNC_EN = 1, VGX_SYNC_EN = 1 */); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETEXTC, 0xF1, 0x12, 0x83); + + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETMIPI, + 0x33, /* VC_main = 0, Lane_Number = 3 (4 lanes) */ + 0x81, /* DSI_LDO_SEL = 1.7V, RTERM = 90 Ohm */ + 0x05, /* IHSRX = x6 (Low High Speed driving ability) */ + 0xF9, /* TX_CLK_SEL = fDSICLK/16 */ + 0x0E, /* HFP_OSC (min. HFP number in DSI mode) */ + 0x0E, /* HBP_OSC (min. HBP number in DSI mode) */ + /* The rest is undocumented in ST7703 datasheet */ + 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x44, 0x25, 0x00, 0x91, 0x0a, 0x00, 0x00, 0x02, + 0x4F, 0x11, 0x00, 0x00, 0x37); + + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER_EXT, + 0x25, /* PCCS = 2, ECP_DC_DIV = 1/4 HSYNC */ + 0x22, /* DT = 15ms XDK_ECP = x2 */ + 0x20, /* PFM_DC_DIV = /1 */ + 0x03 /* ECP_SYNC_EN = 1, VGX_SYNC_EN = 1 */); /* RGB I/F porch timing */ - dsi_dcs_write_seq(dsi, ST7703_CMD_SETRGBIF, - 0x10, /* VBP_RGB_GEN */ - 0x10, /* VFP_RGB_GEN */ - 0x05, /* DE_BP_RGB_GEN */ - 0x05, /* DE_FP_RGB_GEN */ - /* The rest is undocumented in ST7703 datasheet */ - 0x03, 0xFF, - 0x00, 0x00, - 0x00, 0x00); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETRGBIF, + 0x10, /* VBP_RGB_GEN */ + 0x10, /* VFP_RGB_GEN */ + 0x05, /* DE_BP_RGB_GEN */ + 0x05, /* DE_FP_RGB_GEN */ + /* The rest is undocumented in ST7703 datasheet */ + 0x03, 0xFF, + 0x00, 0x00, + 0x00, 0x00); /* Source driving settings. */ - dsi_dcs_write_seq(dsi, ST7703_CMD_SETSCR, - 0x73, /* N_POPON */ - 0x73, /* N_NOPON */ - 0x50, /* I_POPON */ - 0x50, /* I_NOPON */ - 0x00, /* SCR[31,24] */ - 0xC0, /* SCR[23,16] */ - 0x08, /* SCR[15,8] */ - 0x70, /* SCR[7,0] */ - 0x00 /* Undocumented */); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETSCR, + 0x73, /* N_POPON */ + 0x73, /* N_NOPON */ + 0x50, /* I_POPON */ + 0x50, /* I_NOPON */ + 0x00, /* SCR[31,24] */ + 0xC0, /* SCR[23,16] */ + 0x08, /* SCR[15,8] */ + 0x70, /* SCR[7,0] */ + 0x00 /* Undocumented */); /* NVDDD_SEL = -1.8V, VDDD_SEL = out of range (possibly 1.9V?) */ - dsi_dcs_write_seq(dsi, ST7703_CMD_SETVDC, 0x4E); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETVDC, 0x4E); /* * SS_PANEL = 1 (reverse scan), GS_PANEL = 0 (normal scan) * REV_PANEL = 1 (normally black panel), BGR_PANEL = 1 (BGR) */ - dsi_dcs_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0B); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0B); /* Zig-Zag Type C column inversion. */ - dsi_dcs_write_seq(dsi, ST7703_CMD_SETCYC, 0x80); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETCYC, 0x80); /* Set display resolution. */ - dsi_dcs_write_seq(dsi, ST7703_CMD_SETDISP, - 0xF0, /* NL = 240 */ - 0x12, /* RES_V_LSB = 0, BLK_CON = VSSD, - * RESO_SEL = 720RGB - */ - 0xF0 /* WHITE_GND_EN = 1 (GND), - * WHITE_FRAME_SEL = 7 frames, - * ISC = 0 frames - */); - - dsi_dcs_write_seq(dsi, ST7703_CMD_SETEQ, - 0x00, /* PNOEQ */ - 0x00, /* NNOEQ */ - 0x0B, /* PEQGND */ - 0x0B, /* NEQGND */ - 0x10, /* PEQVCI */ - 0x10, /* NEQVCI */ - 0x00, /* PEQVCI1 */ - 0x00, /* NEQVCI1 */ - 0x00, /* reserved */ - 0x00, /* reserved */ - 0xFF, /* reserved */ - 0x00, /* reserved */ - 0xC0, /* ESD_DET_DATA_WHITE = 1, ESD_WHITE_EN = 1 */ - 0x10 /* SLPIN_OPTION = 1 (no need vsync after sleep-in) - * VEDIO_NO_CHECK_EN = 0 - * ESD_WHITE_GND_EN = 0 - * ESD_DET_TIME_SEL = 0 frames - */); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETDISP, + 0xF0, /* NL = 240 */ + 0x12, /* RES_V_LSB = 0, BLK_CON = VSSD, + * RESO_SEL = 720RGB + */ + 0xF0 /* WHITE_GND_EN = 1 (GND), + * WHITE_FRAME_SEL = 7 frames, + * ISC = 0 frames + */); + + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETEQ, + 0x00, /* PNOEQ */ + 0x00, /* NNOEQ */ + 0x0B, /* PEQGND */ + 0x0B, /* NEQGND */ + 0x10, /* PEQVCI */ + 0x10, /* NEQVCI */ + 0x00, /* PEQVCI1 */ + 0x00, /* NEQVCI1 */ + 0x00, /* reserved */ + 0x00, /* reserved */ + 0xFF, /* reserved */ + 0x00, /* reserved */ + 0xC0, /* ESD_DET_DATA_WHITE = 1, ESD_WHITE_EN = 1 */ + 0x10 /* SLPIN_OPTION = 1 (no need vsync after sleep-in) + * VEDIO_NO_CHECK_EN = 0 + * ESD_WHITE_GND_EN = 0 + * ESD_DET_TIME_SEL = 0 frames + */); /* Undocumented command. */ - dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_C6, 0x01, 0x00, 0xFF, 0xFF, 0x00); - - dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER, - 0x74, /* VBTHS, VBTLS: VGH = 17V, VBL = -11V */ - 0x00, /* FBOFF_VGH = 0, FBOFF_VGL = 0 */ - 0x32, /* VRP */ - 0x32, /* VRN */ - 0x77, /* reserved */ - 0xF1, /* APS = 1 (small), - * VGL_DET_EN = 1, VGH_DET_EN = 1, - * VGL_TURBO = 1, VGH_TURBO = 1 - */ - 0xFF, /* VGH1_L_DIV, VGL1_L_DIV (1.5MHz) */ - 0xFF, /* VGH1_R_DIV, VGL1_R_DIV (1.5MHz) */ - 0xCC, /* VGH2_L_DIV, VGL2_L_DIV (2.6MHz) */ - 0xCC, /* VGH2_R_DIV, VGL2_R_DIV (2.6MHz) */ - 0x77, /* VGH3_L_DIV, VGL3_L_DIV (4.5MHz) */ - 0x77 /* VGH3_R_DIV, VGL3_R_DIV (4.5MHz) */); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_C6, 0x01, 0x00, 0xFF, 0xFF, 0x00); + + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER, + 0x74, /* VBTHS, VBTLS: VGH = 17V, VBL = -11V */ + 0x00, /* FBOFF_VGH = 0, FBOFF_VGL = 0 */ + 0x32, /* VRP */ + 0x32, /* VRN */ + 0x77, /* reserved */ + 0xF1, /* APS = 1 (small), + * VGL_DET_EN = 1, VGH_DET_EN = 1, + * VGL_TURBO = 1, VGH_TURBO = 1 + */ + 0xFF, /* VGH1_L_DIV, VGL1_L_DIV (1.5MHz) */ + 0xFF, /* VGH1_R_DIV, VGL1_R_DIV (1.5MHz) */ + 0xCC, /* VGH2_L_DIV, VGL2_L_DIV (2.6MHz) */ + 0xCC, /* VGH2_R_DIV, VGL2_R_DIV (2.6MHz) */ + 0x77, /* VGH3_L_DIV, VGL3_L_DIV (4.5MHz) */ + 0x77 /* VGH3_R_DIV, VGL3_R_DIV (4.5MHz) */); /* Reference voltage. */ - dsi_dcs_write_seq(dsi, ST7703_CMD_SETBGP, - 0x07, /* VREF_SEL = 4.2V */ - 0x07 /* NVREF_SEL = 4.2V */); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETBGP, + 0x07, /* VREF_SEL = 4.2V */ + 0x07 /* NVREF_SEL = 4.2V */); msleep(20); - dsi_dcs_write_seq(dsi, ST7703_CMD_SETVCOM, - 0x2C, /* VCOMDC_F = -0.67V */ - 0x2C /* VCOMDC_B = -0.67V */); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETVCOM, + 0x2C, /* VCOMDC_F = -0.67V */ + 0x2C /* VCOMDC_B = -0.67V */); /* Undocumented command. */ - dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00); /* This command is to set forward GIP timing. */ - dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP1, - 0x82, 0x10, 0x06, 0x05, 0xA2, 0x0A, 0xA5, 0x12, - 0x31, 0x23, 0x37, 0x83, 0x04, 0xBC, 0x27, 0x38, - 0x0C, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0C, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x75, 0x75, 0x31, 0x88, - 0x88, 0x88, 0x88, 0x88, 0x88, 0x13, 0x88, 0x64, - 0x64, 0x20, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, - 0x02, 0x88, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP1, + 0x82, 0x10, 0x06, 0x05, 0xA2, 0x0A, 0xA5, 0x12, + 0x31, 0x23, 0x37, 0x83, 0x04, 0xBC, 0x27, 0x38, + 0x0C, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0C, 0x00, + 0x03, 0x00, 0x00, 0x00, 0x75, 0x75, 0x31, 0x88, + 0x88, 0x88, 0x88, 0x88, 0x88, 0x13, 0x88, 0x64, + 0x64, 0x20, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, + 0x02, 0x88, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); /* This command is to set backward GIP timing. */ - dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP2, - 0x02, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x02, 0x46, 0x02, 0x88, - 0x88, 0x88, 0x88, 0x88, 0x88, 0x64, 0x88, 0x13, - 0x57, 0x13, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, - 0x75, 0x88, 0x23, 0x14, 0x00, 0x00, 0x02, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x0A, - 0xA5, 0x00, 0x00, 0x00, 0x00); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP2, + 0x02, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x46, 0x02, 0x88, + 0x88, 0x88, 0x88, 0x88, 0x88, 0x64, 0x88, 0x13, + 0x57, 0x13, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, + 0x75, 0x88, 0x23, 0x14, 0x00, 0x00, 0x02, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x0A, + 0xA5, 0x00, 0x00, 0x00, 0x00); /* Adjust the gamma characteristics of the panel. */ - dsi_dcs_write_seq(dsi, ST7703_CMD_SETGAMMA, - 0x00, 0x09, 0x0D, 0x23, 0x27, 0x3C, 0x41, 0x35, - 0x07, 0x0D, 0x0E, 0x12, 0x13, 0x10, 0x12, 0x12, - 0x18, 0x00, 0x09, 0x0D, 0x23, 0x27, 0x3C, 0x41, - 0x35, 0x07, 0x0D, 0x0E, 0x12, 0x13, 0x10, 0x12, - 0x12, 0x18); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGAMMA, + 0x00, 0x09, 0x0D, 0x23, 0x27, 0x3C, 0x41, 0x35, + 0x07, 0x0D, 0x0E, 0x12, 0x13, 0x10, 0x12, 0x12, + 0x18, 0x00, 0x09, 0x0D, 0x23, 0x27, 0x3C, 0x41, + 0x35, 0x07, 0x0D, 0x0E, 0x12, 0x13, 0x10, 0x12, + 0x12, 0x18); return 0; } @@ -499,7 +482,7 @@ static int allpixelson_set(void *data, u64 val) struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); dev_dbg(ctx->dev, "Setting all pixels on\n"); - dsi_generic_write_seq(dsi, ST7703_CMD_ALL_PIXEL_ON); + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_ALL_PIXEL_ON); msleep(val * 1000); /* Reset the panel to get video back */ drm_panel_disable(&ctx->panel); From patchwork Sat Jan 7 19:18:12 2023 Content-Type: text/plain; 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[92.176.231.205]) by smtp.gmail.com with ESMTPSA id bp28-20020a5d5a9c000000b00273cd321a1bsm4553900wrb.107.2023.01.07.11.18.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Jan 2023 11:18:34 -0800 (PST) From: Javier Martinez Canillas To: linux-kernel@vger.kernel.org Subject: [PATCH v2 03/13] drm/panel-leadtek-ltk050h3146w: Drop custom DSI write macro Date: Sat, 7 Jan 2023 20:18:12 +0100 Message-Id: <20230107191822.3787147-4-javierm@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230107191822.3787147-1-javierm@redhat.com> References: <20230107191822.3787147-1-javierm@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sam Ravnborg , Javier Martinez Canillas , dri-devel@lists.freedesktop.org, Thierry Reding Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" There is a macro for this already in the header, use that instead and delete the custom DSI write macro defined in the driver. Signed-off-by: Javier Martinez Canillas Reviewed-by: Sam Ravnborg --- Changes in v2: - Add Sam Ravnborg's Reviewed-by tag. - Fix identation on macro usage (Sam Ravnborg). .../drm/panel/panel-leadtek-ltk050h3146w.c | 106 ++++++++---------- 1 file changed, 49 insertions(+), 57 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-leadtek-ltk050h3146w.c b/drivers/gpu/drm/panel/panel-leadtek-ltk050h3146w.c index 5619f186d28c..d2efd887484b 100644 --- a/drivers/gpu/drm/panel/panel-leadtek-ltk050h3146w.c +++ b/drivers/gpu/drm/panel/panel-leadtek-ltk050h3146w.c @@ -244,14 +244,6 @@ struct ltk050h3146w *panel_to_ltk050h3146w(struct drm_panel *panel) return container_of(panel, struct ltk050h3146w, panel); } -#define dsi_dcs_write_seq(dsi, cmd, seq...) do { \ - static const u8 b[] = { cmd, seq }; \ - int ret; \ - ret = mipi_dsi_dcs_write_buffer(dsi, b, ARRAY_SIZE(b)); \ - if (ret < 0) \ - return ret; \ - } while (0) - static int ltk050h3146w_init_sequence(struct ltk050h3146w *ctx) { struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); @@ -261,55 +253,55 @@ static int ltk050h3146w_init_sequence(struct ltk050h3146w *ctx) * Init sequence was supplied by the panel vendor without much * documentation. */ - dsi_dcs_write_seq(dsi, 0xdf, 0x93, 0x65, 0xf8); - dsi_dcs_write_seq(dsi, 0xb0, 0x01, 0x03, 0x02, 0x00, 0x64, 0x06, - 0x01); - dsi_dcs_write_seq(dsi, 0xb2, 0x00, 0xb5); - dsi_dcs_write_seq(dsi, 0xb3, 0x00, 0xb5); - dsi_dcs_write_seq(dsi, 0xb7, 0x00, 0xbf, 0x00, 0x00, 0xbf, 0x00); - - dsi_dcs_write_seq(dsi, 0xb9, 0x00, 0xc4, 0x23, 0x07); - dsi_dcs_write_seq(dsi, 0xbb, 0x02, 0x01, 0x24, 0x00, 0x28, 0x0f, - 0x28, 0x04, 0xcc, 0xcc, 0xcc); - dsi_dcs_write_seq(dsi, 0xbc, 0x0f, 0x04); - dsi_dcs_write_seq(dsi, 0xbe, 0x1e, 0xf2); - dsi_dcs_write_seq(dsi, 0xc0, 0x26, 0x03); - dsi_dcs_write_seq(dsi, 0xc1, 0x00, 0x12); - dsi_dcs_write_seq(dsi, 0xc3, 0x04, 0x02, 0x02, 0x76, 0x01, 0x80, - 0x80); - dsi_dcs_write_seq(dsi, 0xc4, 0x24, 0x80, 0xb4, 0x81, 0x12, 0x0f, - 0x16, 0x00, 0x00); - dsi_dcs_write_seq(dsi, 0xc8, 0x7f, 0x72, 0x67, 0x5d, 0x5d, 0x50, - 0x56, 0x41, 0x59, 0x57, 0x55, 0x70, 0x5b, 0x5f, - 0x4f, 0x47, 0x38, 0x23, 0x08, 0x7f, 0x72, 0x67, - 0x5d, 0x5d, 0x50, 0x56, 0x41, 0x59, 0x57, 0x55, - 0x70, 0x5b, 0x5f, 0x4f, 0x47, 0x38, 0x23, 0x08); - dsi_dcs_write_seq(dsi, 0xd0, 0x1e, 0x1f, 0x57, 0x58, 0x48, 0x4a, - 0x44, 0x46, 0x40, 0x1f, 0x42, 0x1f, 0x1f, 0x1f, - 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f); - dsi_dcs_write_seq(dsi, 0xd1, 0x1e, 0x1f, 0x57, 0x58, 0x49, 0x4b, - 0x45, 0x47, 0x41, 0x1f, 0x43, 0x1f, 0x1f, 0x1f, - 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f); - dsi_dcs_write_seq(dsi, 0xd2, 0x1f, 0x1e, 0x17, 0x18, 0x07, 0x05, - 0x0b, 0x09, 0x03, 0x1f, 0x01, 0x1f, 0x1f, 0x1f, - 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f); - dsi_dcs_write_seq(dsi, 0xd3, 0x1f, 0x1e, 0x17, 0x18, 0x06, 0x04, - 0x0a, 0x08, 0x02, 0x1f, 0x00, 0x1f, 0x1f, 0x1f, - 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f); - dsi_dcs_write_seq(dsi, 0xd4, 0x00, 0x00, 0x00, 0x0c, 0x06, 0x20, - 0x01, 0x02, 0x00, 0x60, 0x15, 0xb0, 0x30, 0x03, - 0x04, 0x00, 0x60, 0x72, 0x0a, 0x00, 0x60, 0x08); - dsi_dcs_write_seq(dsi, 0xd5, 0x00, 0x06, 0x06, 0x00, 0x30, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xbc, 0x50, 0x00, 0x05, - 0x21, 0x00, 0x60); - dsi_dcs_write_seq(dsi, 0xdd, 0x2c, 0xa3, 0x00); - dsi_dcs_write_seq(dsi, 0xde, 0x02); - dsi_dcs_write_seq(dsi, 0xb2, 0x32, 0x1c); - dsi_dcs_write_seq(dsi, 0xb7, 0x3b, 0x70, 0x00, 0x04); - dsi_dcs_write_seq(dsi, 0xc1, 0x11); - dsi_dcs_write_seq(dsi, 0xbb, 0x21, 0x22, 0x23, 0x24, 0x36, 0x37); - dsi_dcs_write_seq(dsi, 0xc2, 0x20, 0x38, 0x1e, 0x84); - dsi_dcs_write_seq(dsi, 0xde, 0x00); + mipi_dsi_dcs_write_seq(dsi, 0xdf, 0x93, 0x65, 0xf8); + mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x01, 0x03, 0x02, 0x00, 0x64, 0x06, + 0x01); + mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x00, 0xb5); + mipi_dsi_dcs_write_seq(dsi, 0xb3, 0x00, 0xb5); + mipi_dsi_dcs_write_seq(dsi, 0xb7, 0x00, 0xbf, 0x00, 0x00, 0xbf, 0x00); + + mipi_dsi_dcs_write_seq(dsi, 0xb9, 0x00, 0xc4, 0x23, 0x07); + mipi_dsi_dcs_write_seq(dsi, 0xbb, 0x02, 0x01, 0x24, 0x00, 0x28, 0x0f, + 0x28, 0x04, 0xcc, 0xcc, 0xcc); + mipi_dsi_dcs_write_seq(dsi, 0xbc, 0x0f, 0x04); + mipi_dsi_dcs_write_seq(dsi, 0xbe, 0x1e, 0xf2); + mipi_dsi_dcs_write_seq(dsi, 0xc0, 0x26, 0x03); + mipi_dsi_dcs_write_seq(dsi, 0xc1, 0x00, 0x12); + mipi_dsi_dcs_write_seq(dsi, 0xc3, 0x04, 0x02, 0x02, 0x76, 0x01, 0x80, + 0x80); + mipi_dsi_dcs_write_seq(dsi, 0xc4, 0x24, 0x80, 0xb4, 0x81, 0x12, 0x0f, + 0x16, 0x00, 0x00); + mipi_dsi_dcs_write_seq(dsi, 0xc8, 0x7f, 0x72, 0x67, 0x5d, 0x5d, 0x50, + 0x56, 0x41, 0x59, 0x57, 0x55, 0x70, 0x5b, 0x5f, + 0x4f, 0x47, 0x38, 0x23, 0x08, 0x7f, 0x72, 0x67, + 0x5d, 0x5d, 0x50, 0x56, 0x41, 0x59, 0x57, 0x55, + 0x70, 0x5b, 0x5f, 0x4f, 0x47, 0x38, 0x23, 0x08); + mipi_dsi_dcs_write_seq(dsi, 0xd0, 0x1e, 0x1f, 0x57, 0x58, 0x48, 0x4a, + 0x44, 0x46, 0x40, 0x1f, 0x42, 0x1f, 0x1f, 0x1f, + 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f); + mipi_dsi_dcs_write_seq(dsi, 0xd1, 0x1e, 0x1f, 0x57, 0x58, 0x49, 0x4b, + 0x45, 0x47, 0x41, 0x1f, 0x43, 0x1f, 0x1f, 0x1f, + 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f); + mipi_dsi_dcs_write_seq(dsi, 0xd2, 0x1f, 0x1e, 0x17, 0x18, 0x07, 0x05, + 0x0b, 0x09, 0x03, 0x1f, 0x01, 0x1f, 0x1f, 0x1f, + 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f); + mipi_dsi_dcs_write_seq(dsi, 0xd3, 0x1f, 0x1e, 0x17, 0x18, 0x06, 0x04, + 0x0a, 0x08, 0x02, 0x1f, 0x00, 0x1f, 0x1f, 0x1f, + 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f); + mipi_dsi_dcs_write_seq(dsi, 0xd4, 0x00, 0x00, 0x00, 0x0c, 0x06, 0x20, + 0x01, 0x02, 0x00, 0x60, 0x15, 0xb0, 0x30, 0x03, + 0x04, 0x00, 0x60, 0x72, 0x0a, 0x00, 0x60, 0x08); + mipi_dsi_dcs_write_seq(dsi, 0xd5, 0x00, 0x06, 0x06, 0x00, 0x30, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xbc, 0x50, 0x00, 0x05, + 0x21, 0x00, 0x60); + mipi_dsi_dcs_write_seq(dsi, 0xdd, 0x2c, 0xa3, 0x00); + mipi_dsi_dcs_write_seq(dsi, 0xde, 0x02); + mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x32, 0x1c); + mipi_dsi_dcs_write_seq(dsi, 0xb7, 0x3b, 0x70, 0x00, 0x04); + mipi_dsi_dcs_write_seq(dsi, 0xc1, 0x11); + mipi_dsi_dcs_write_seq(dsi, 0xbb, 0x21, 0x22, 0x23, 0x24, 0x36, 0x37); + mipi_dsi_dcs_write_seq(dsi, 0xc2, 0x20, 0x38, 0x1e, 0x84); + mipi_dsi_dcs_write_seq(dsi, 0xde, 0x00); ret = mipi_dsi_dcs_set_tear_on(dsi, 1); if (ret < 0) { From patchwork Sat Jan 7 19:18:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Javier Martinez Canillas X-Patchwork-Id: 13092309 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2567AC54EBC for ; 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[92.176.231.205]) by smtp.gmail.com with ESMTPSA id bp28-20020a5d5a9c000000b00273cd321a1bsm4553900wrb.107.2023.01.07.11.18.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Jan 2023 11:18:36 -0800 (PST) From: Javier Martinez Canillas To: linux-kernel@vger.kernel.org Subject: [PATCH v2 04/13] drm/panel-elida-kd35t133: Drop custom DSI write macro Date: Sat, 7 Jan 2023 20:18:13 +0100 Message-Id: <20230107191822.3787147-5-javierm@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230107191822.3787147-1-javierm@redhat.com> References: <20230107191822.3787147-1-javierm@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sam Ravnborg , Javier Martinez Canillas , dri-devel@lists.freedesktop.org, Thierry Reding Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" There is a macro for this already in the header, use that instead and delete the custom DSI write macro defined in the driver. Signed-off-by: Javier Martinez Canillas Reviewed-by: Sam Ravnborg --- Changes in v2: - Add Sam Ravnborg's Reviewed-by tag. - Fix identation on macro usage (Sam Ravnborg). drivers/gpu/drm/panel/panel-elida-kd35t133.c | 46 ++++++++------------ 1 file changed, 19 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-elida-kd35t133.c b/drivers/gpu/drm/panel/panel-elida-kd35t133.c index eee714cf3f49..e7be15b68102 100644 --- a/drivers/gpu/drm/panel/panel-elida-kd35t133.c +++ b/drivers/gpu/drm/panel/panel-elida-kd35t133.c @@ -51,14 +51,6 @@ static inline struct kd35t133 *panel_to_kd35t133(struct drm_panel *panel) return container_of(panel, struct kd35t133, panel); } -#define dsi_dcs_write_seq(dsi, cmd, seq...) do { \ - static const u8 b[] = { cmd, seq }; \ - int ret; \ - ret = mipi_dsi_dcs_write_buffer(dsi, b, ARRAY_SIZE(b)); \ - if (ret < 0) \ - return ret; \ - } while (0) - static int kd35t133_init_sequence(struct kd35t133 *ctx) { struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); @@ -68,25 +60,25 @@ static int kd35t133_init_sequence(struct kd35t133 *ctx) * Init sequence was supplied by the panel vendor with minimal * documentation. */ - dsi_dcs_write_seq(dsi, KD35T133_CMD_POSITIVEGAMMA, - 0x00, 0x13, 0x18, 0x04, 0x0f, 0x06, 0x3a, 0x56, - 0x4d, 0x03, 0x0a, 0x06, 0x30, 0x3e, 0x0f); - dsi_dcs_write_seq(dsi, KD35T133_CMD_NEGATIVEGAMMA, - 0x00, 0x13, 0x18, 0x01, 0x11, 0x06, 0x38, 0x34, - 0x4d, 0x06, 0x0d, 0x0b, 0x31, 0x37, 0x0f); - dsi_dcs_write_seq(dsi, KD35T133_CMD_POWERCONTROL1, 0x18, 0x17); - dsi_dcs_write_seq(dsi, KD35T133_CMD_POWERCONTROL2, 0x41); - dsi_dcs_write_seq(dsi, KD35T133_CMD_VCOMCONTROL, 0x00, 0x1a, 0x80); - dsi_dcs_write_seq(dsi, MIPI_DCS_SET_ADDRESS_MODE, 0x48); - dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PIXEL_FORMAT, 0x55); - dsi_dcs_write_seq(dsi, KD35T133_CMD_INTERFACEMODECTRL, 0x00); - dsi_dcs_write_seq(dsi, KD35T133_CMD_FRAMERATECTRL, 0xa0); - dsi_dcs_write_seq(dsi, KD35T133_CMD_DISPLAYINVERSIONCTRL, 0x02); - dsi_dcs_write_seq(dsi, KD35T133_CMD_DISPLAYFUNCTIONCTRL, - 0x20, 0x02); - dsi_dcs_write_seq(dsi, KD35T133_CMD_SETIMAGEFUNCTION, 0x00); - dsi_dcs_write_seq(dsi, KD35T133_CMD_ADJUSTCONTROL3, - 0xa9, 0x51, 0x2c, 0x82); + mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_POSITIVEGAMMA, + 0x00, 0x13, 0x18, 0x04, 0x0f, 0x06, 0x3a, 0x56, + 0x4d, 0x03, 0x0a, 0x06, 0x30, 0x3e, 0x0f); + mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_NEGATIVEGAMMA, + 0x00, 0x13, 0x18, 0x01, 0x11, 0x06, 0x38, 0x34, + 0x4d, 0x06, 0x0d, 0x0b, 0x31, 0x37, 0x0f); + mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_POWERCONTROL1, 0x18, 0x17); + mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_POWERCONTROL2, 0x41); + mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_VCOMCONTROL, 0x00, 0x1a, 0x80); + mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_ADDRESS_MODE, 0x48); + mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PIXEL_FORMAT, 0x55); + mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_INTERFACEMODECTRL, 0x00); + mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_FRAMERATECTRL, 0xa0); + mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_DISPLAYINVERSIONCTRL, 0x02); + mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_DISPLAYFUNCTIONCTRL, + 0x20, 0x02); + mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_SETIMAGEFUNCTION, 0x00); + mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_ADJUSTCONTROL3, + 0xa9, 0x51, 0x2c, 0x82); mipi_dsi_dcs_write(dsi, MIPI_DCS_ENTER_INVERT_MODE, NULL, 0); dev_dbg(dev, "Panel init sequence done\n"); From patchwork Sat Jan 7 19:18:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Javier Martinez Canillas X-Patchwork-Id: 13092312 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 59097C54EBE for ; Sat, 7 Jan 2023 19:18:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5B31210E906; Sat, 7 Jan 2023 19:18:48 +0000 (UTC) Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9974310E1C1 for ; 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[92.176.231.205]) by smtp.gmail.com with ESMTPSA id bp28-20020a5d5a9c000000b00273cd321a1bsm4553900wrb.107.2023.01.07.11.18.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Jan 2023 11:18:37 -0800 (PST) From: Javier Martinez Canillas To: linux-kernel@vger.kernel.org Subject: [PATCH v2 05/13] drm/panel-boe-bf060y8m-aj0: Drop custom DSI write macro Date: Sat, 7 Jan 2023 20:18:14 +0100 Message-Id: <20230107191822.3787147-6-javierm@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230107191822.3787147-1-javierm@redhat.com> References: <20230107191822.3787147-1-javierm@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sam Ravnborg , Javier Martinez Canillas , dri-devel@lists.freedesktop.org, Thierry Reding Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" There is a macro for this already in the header, use that instead and delete the custom DSI write macro defined in the driver. Signed-off-by: Javier Martinez Canillas Reviewed-by: Sam Ravnborg --- Changes in v2: - Add Sam Ravnborg's Reviewed-by tag. - Fix identation on macro usage (Sam Ravnborg). .../gpu/drm/panel/panel-boe-bf060y8m-aj0.c | 42 ++++++++----------- 1 file changed, 17 insertions(+), 25 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c b/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c index ad58840eda41..90098b753e3b 100644 --- a/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c +++ b/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c @@ -43,14 +43,6 @@ struct boe_bf060y8m_aj0 *to_boe_bf060y8m_aj0(struct drm_panel *panel) return container_of(panel, struct boe_bf060y8m_aj0, panel); } -#define dsi_dcs_write_seq(dsi, seq...) do { \ - static const u8 d[] = { seq }; \ - int ret; \ - ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \ - if (ret < 0) \ - return ret; \ - } while (0) - static void boe_bf060y8m_aj0_reset(struct boe_bf060y8m_aj0 *boe) { gpiod_set_value_cansleep(boe->reset_gpio, 0); @@ -67,12 +59,12 @@ static int boe_bf060y8m_aj0_on(struct boe_bf060y8m_aj0 *boe) struct device *dev = &dsi->dev; int ret; - dsi_dcs_write_seq(dsi, 0xb0, 0xa5, 0x00); - dsi_dcs_write_seq(dsi, 0xb2, 0x00, 0x4c); - dsi_dcs_write_seq(dsi, MIPI_DCS_SET_3D_CONTROL, 0x10); - dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, DCS_ALLOW_HBM_RANGE); - dsi_dcs_write_seq(dsi, 0xf8, - 0x00, 0x08, 0x10, 0x00, 0x22, 0x00, 0x00, 0x2d); + mipi_dsi_dcs_write_seq(dsi, 0xb0, 0xa5, 0x00); + mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x00, 0x4c); + mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_3D_CONTROL, 0x10); + mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, DCS_ALLOW_HBM_RANGE); + mipi_dsi_dcs_write_seq(dsi, 0xf8, + 0x00, 0x08, 0x10, 0x00, 0x22, 0x00, 0x00, 0x2d); ret = mipi_dsi_dcs_exit_sleep_mode(dsi); if (ret < 0) { @@ -81,17 +73,17 @@ static int boe_bf060y8m_aj0_on(struct boe_bf060y8m_aj0 *boe) } msleep(30); - dsi_dcs_write_seq(dsi, 0xb0, 0xa5, 0x00); - dsi_dcs_write_seq(dsi, 0xc0, - 0x08, 0x48, 0x65, 0x33, 0x33, 0x33, - 0x2a, 0x31, 0x39, 0x20, 0x09); - dsi_dcs_write_seq(dsi, 0xc1, 0x00, 0x00, 0x00, 0x1f, 0x1f, - 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, - 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f); - dsi_dcs_write_seq(dsi, 0xe2, 0x20, 0x04, 0x10, 0x12, 0x92, - 0x4f, 0x8f, 0x44, 0x84, 0x83, 0x83, 0x83, - 0x5c, 0x5c, 0x5c); - dsi_dcs_write_seq(dsi, 0xde, 0x01, 0x2c, 0x00, 0x77, 0x3e); + mipi_dsi_dcs_write_seq(dsi, 0xb0, 0xa5, 0x00); + mipi_dsi_dcs_write_seq(dsi, 0xc0, + 0x08, 0x48, 0x65, 0x33, 0x33, 0x33, + 0x2a, 0x31, 0x39, 0x20, 0x09); + mipi_dsi_dcs_write_seq(dsi, 0xc1, 0x00, 0x00, 0x00, 0x1f, 0x1f, + 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, + 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f); + mipi_dsi_dcs_write_seq(dsi, 0xe2, 0x20, 0x04, 0x10, 0x12, 0x92, + 0x4f, 0x8f, 0x44, 0x84, 0x83, 0x83, 0x83, + 0x5c, 0x5c, 0x5c); + mipi_dsi_dcs_write_seq(dsi, 0xde, 0x01, 0x2c, 0x00, 0x77, 0x3e); msleep(30); From patchwork Sat Jan 7 19:18:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Javier Martinez Canillas X-Patchwork-Id: 13092315 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 89D33C54EBC for ; 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[92.176.231.205]) by smtp.gmail.com with ESMTPSA id bp28-20020a5d5a9c000000b00273cd321a1bsm4553900wrb.107.2023.01.07.11.18.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Jan 2023 11:18:39 -0800 (PST) From: Javier Martinez Canillas To: linux-kernel@vger.kernel.org Subject: [PATCH v2 06/13] drm/panel-novatek-nt35950: Drop custom DSI write macro Date: Sat, 7 Jan 2023 20:18:15 +0100 Message-Id: <20230107191822.3787147-7-javierm@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230107191822.3787147-1-javierm@redhat.com> References: <20230107191822.3787147-1-javierm@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sam Ravnborg , Javier Martinez Canillas , dri-devel@lists.freedesktop.org, Thierry Reding Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" There is a macro for this already in the header, use that instead and delete the custom DSI write macro defined in the driver. Signed-off-by: Javier Martinez Canillas Reviewed-by: Sam Ravnborg --- Changes in v2: - Add Sam Ravnborg's Reviewed-by tag. drivers/gpu/drm/panel/panel-novatek-nt35950.c | 14 +++----------- 1 file changed, 3 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35950.c b/drivers/gpu/drm/panel/panel-novatek-nt35950.c index 3a844917da07..abf752b36a52 100644 --- a/drivers/gpu/drm/panel/panel-novatek-nt35950.c +++ b/drivers/gpu/drm/panel/panel-novatek-nt35950.c @@ -89,14 +89,6 @@ static inline struct nt35950 *to_nt35950(struct drm_panel *panel) return container_of(panel, struct nt35950, panel); } -#define dsi_dcs_write_seq(dsi, seq...) do { \ - static const u8 d[] = { seq }; \ - int ret; \ - ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \ - if (ret < 0) \ - return ret; \ - } while (0) - static void nt35950_reset(struct nt35950 *nt) { gpiod_set_value_cansleep(nt->reset_gpio, 1); @@ -338,7 +330,7 @@ static int nt35950_on(struct nt35950 *nt) return ret; /* Unknown command */ - dsi_dcs_write_seq(dsi, 0xd4, 0x88, 0x88); + mipi_dsi_dcs_write_seq(dsi, 0xd4, 0x88, 0x88); /* CMD2 Page 7 */ ret = nt35950_set_cmd2_page(nt, 7); @@ -346,10 +338,10 @@ static int nt35950_on(struct nt35950 *nt) return ret; /* Enable SubPixel Rendering */ - dsi_dcs_write_seq(dsi, MCS_PARAM_SPR_EN, 0x01); + mipi_dsi_dcs_write_seq(dsi, MCS_PARAM_SPR_EN, 0x01); /* SPR Mode: YYG Rainbow-RGB */ - dsi_dcs_write_seq(dsi, MCS_PARAM_SPR_MODE, MCS_SPR_MODE_YYG_RAINBOW_RGB); + mipi_dsi_dcs_write_seq(dsi, MCS_PARAM_SPR_MODE, MCS_SPR_MODE_YYG_RAINBOW_RGB); /* CMD3 */ ret = nt35950_inject_black_image(nt); From patchwork Sat Jan 7 19:18:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Javier Martinez Canillas X-Patchwork-Id: 13092313 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 83067C54EBC for ; Sat, 7 Jan 2023 19:19:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8391910E90E; Sat, 7 Jan 2023 19:18:48 +0000 (UTC) Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by gabe.freedesktop.org (Postfix) with ESMTPS id DCFDA10E35A for ; Sat, 7 Jan 2023 19:18:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1673119123; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ttV0XcYX1fJWmH88XgdEow2vXwmHcFArdkGg5SIJWK0=; b=WVeuH6eeyHlMZEAaU5jLkrElosbTBGfwZSDtFXkbjDzC5Ye2uJRH5XOy88uA71XLOXqceF hLO2vIzdrClekjkxshRVPYAzdywkbrRDQYE8dRhHgS2Oo4vss2kGR5qKJ++T5FvvDKof9h 2z9m2CXnz5W9XQjVgXyZ7CbM4unvwZ4= Received: from mail-wm1-f71.google.com (mail-wm1-f71.google.com [209.85.128.71]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_128_GCM_SHA256) id us-mta-159-2_H5AgoUNLm3nst_luSJ0Q-1; Sat, 07 Jan 2023 14:18:41 -0500 X-MC-Unique: 2_H5AgoUNLm3nst_luSJ0Q-1 Received: by mail-wm1-f71.google.com with SMTP id fl12-20020a05600c0b8c00b003d96f0a7f36so2722739wmb.1 for ; Sat, 07 Jan 2023 11:18:41 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ttV0XcYX1fJWmH88XgdEow2vXwmHcFArdkGg5SIJWK0=; b=gmgFD78cJjJ3QbWOYz2s1Xtttu87ChCFHxkNxCe8kxFntmBT6isLgxupn3dSx2cNVn /CH5zJllPA65fRdkbAX5EXTUGxisPA9exGCxwBvUrz1mKzbKfWllvJXOs2MHfNGwhLjO 9xtS7XGvv1HzpwmvEcVcCVSYpzSJavDSpCWAe9eGMI8OXi2s9V5Jkp9CD9naeGKGzWVG wWBlv9gteL+zEfCN7W1ueJdt7AV7MMoT/e6jWACn6oRjVvU2P4yoIWG0tshcHBdDCa6F 4xD1QsY0fhx9rmzHh9keQZj+rs5hHKCj7jeIEcxu434FIsxBEO9ZcwtIaT5QccajtgOf CAJA== X-Gm-Message-State: AFqh2kp+jcz1Pb6MvL5E5ftsCaSc9MUm9i9huVmoG5khZPry9XPuEGly EZv9gunWamv7xLoVOBF+x2CxHwkYUFVmFx+rncsZP+JNSexGEoEs2Gx4fmNIteSiKsIGWjYpLTf WAtNO0YqRoNz1IiJHqVQqokqq7y9y X-Received: by 2002:a05:600c:3506:b0:3cf:803b:d7cc with SMTP id h6-20020a05600c350600b003cf803bd7ccmr45485997wmq.33.1673119120698; Sat, 07 Jan 2023 11:18:40 -0800 (PST) X-Google-Smtp-Source: AMrXdXsqRumGFiFSh2jflHPYUHsPzJdMy9PeAGY0Mpa8khexDGjR9FKqpABGnvJs8fvLrfT0jXlJ6w== X-Received: by 2002:a05:600c:3506:b0:3cf:803b:d7cc with SMTP id h6-20020a05600c350600b003cf803bd7ccmr45485988wmq.33.1673119120509; Sat, 07 Jan 2023 11:18:40 -0800 (PST) Received: from minerva.home (205.pool92-176-231.dynamic.orange.es. [92.176.231.205]) by smtp.gmail.com with ESMTPSA id bp28-20020a5d5a9c000000b00273cd321a1bsm4553900wrb.107.2023.01.07.11.18.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Jan 2023 11:18:40 -0800 (PST) From: Javier Martinez Canillas To: linux-kernel@vger.kernel.org Subject: [PATCH v2 07/13] drm/panel-jdi-fhd-r63452: Drop custom DSI write macros Date: Sat, 7 Jan 2023 20:18:16 +0100 Message-Id: <20230107191822.3787147-8-javierm@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230107191822.3787147-1-javierm@redhat.com> References: <20230107191822.3787147-1-javierm@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sam Ravnborg , Javier Martinez Canillas , dri-devel@lists.freedesktop.org, Thierry Reding Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" There are macros for these already in the header, use that instead and delete the custom DSI write macros defined in the driver. Signed-off-by: Javier Martinez Canillas Reviewed-by: Sam Ravnborg --- Changes in v2: - Add Sam Ravnborg's Reviewed-by tag. - Fix identation on macro usage (Sam Ravnborg). drivers/gpu/drm/panel/panel-jdi-fhd-r63452.c | 58 +++++++------------- 1 file changed, 21 insertions(+), 37 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-jdi-fhd-r63452.c b/drivers/gpu/drm/panel/panel-jdi-fhd-r63452.c index d8765b2294fb..8912757a6f42 100644 --- a/drivers/gpu/drm/panel/panel-jdi-fhd-r63452.c +++ b/drivers/gpu/drm/panel/panel-jdi-fhd-r63452.c @@ -29,22 +29,6 @@ static inline struct jdi_fhd_r63452 *to_jdi_fhd_r63452(struct drm_panel *panel) return container_of(panel, struct jdi_fhd_r63452, panel); } -#define dsi_generic_write_seq(dsi, seq...) do { \ - static const u8 d[] = { seq }; \ - int ret; \ - ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \ - if (ret < 0) \ - return ret; \ - } while (0) - -#define dsi_dcs_write_seq(dsi, seq...) do { \ - static const u8 d[] = { seq }; \ - int ret; \ - ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \ - if (ret < 0) \ - return ret; \ - } while (0) - static void jdi_fhd_r63452_reset(struct jdi_fhd_r63452 *ctx) { gpiod_set_value_cansleep(ctx->reset_gpio, 0); @@ -63,12 +47,12 @@ static int jdi_fhd_r63452_on(struct jdi_fhd_r63452 *ctx) dsi->mode_flags |= MIPI_DSI_MODE_LPM; - dsi_generic_write_seq(dsi, 0xb0, 0x00); - dsi_generic_write_seq(dsi, 0xd6, 0x01); - dsi_generic_write_seq(dsi, 0xec, - 0x64, 0xdc, 0xec, 0x3b, 0x52, 0x00, 0x0b, 0x0b, - 0x13, 0x15, 0x68, 0x0b, 0xb5); - dsi_generic_write_seq(dsi, 0xb0, 0x03); + mipi_dsi_generic_write_seq(dsi, 0xb0, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xd6, 0x01); + mipi_dsi_generic_write_seq(dsi, 0xec, + 0x64, 0xdc, 0xec, 0x3b, 0x52, 0x00, 0x0b, 0x0b, + 0x13, 0x15, 0x68, 0x0b, 0xb5); + mipi_dsi_generic_write_seq(dsi, 0xb0, 0x03); ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK); if (ret < 0) { @@ -76,7 +60,7 @@ static int jdi_fhd_r63452_on(struct jdi_fhd_r63452 *ctx) return ret; } - dsi_dcs_write_seq(dsi, MIPI_DCS_SET_ADDRESS_MODE, 0x00); + mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_ADDRESS_MODE, 0x00); ret = mipi_dsi_dcs_set_pixel_format(dsi, 0x77); if (ret < 0) { @@ -108,10 +92,10 @@ static int jdi_fhd_r63452_on(struct jdi_fhd_r63452 *ctx) return ret; } - dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x24); - dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00); - dsi_dcs_write_seq(dsi, MIPI_DCS_SET_CABC_MIN_BRIGHTNESS, 0x00); - dsi_dcs_write_seq(dsi, 0x84, 0x00); + mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x24); + mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00); + mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_CABC_MIN_BRIGHTNESS, 0x00); + mipi_dsi_dcs_write_seq(dsi, 0x84, 0x00); ret = mipi_dsi_dcs_set_display_on(dsi); if (ret < 0) { @@ -127,10 +111,10 @@ static int jdi_fhd_r63452_on(struct jdi_fhd_r63452 *ctx) } msleep(80); - dsi_generic_write_seq(dsi, 0xb0, 0x04); - dsi_dcs_write_seq(dsi, 0x84, 0x00); - dsi_generic_write_seq(dsi, 0xc8, 0x11); - dsi_generic_write_seq(dsi, 0xb0, 0x03); + mipi_dsi_generic_write_seq(dsi, 0xb0, 0x04); + mipi_dsi_dcs_write_seq(dsi, 0x84, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xc8, 0x11); + mipi_dsi_generic_write_seq(dsi, 0xb0, 0x03); return 0; } @@ -143,12 +127,12 @@ static int jdi_fhd_r63452_off(struct jdi_fhd_r63452 *ctx) dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; - dsi_generic_write_seq(dsi, 0xb0, 0x00); - dsi_generic_write_seq(dsi, 0xd6, 0x01); - dsi_generic_write_seq(dsi, 0xec, - 0x64, 0xdc, 0xec, 0x3b, 0x52, 0x00, 0x0b, 0x0b, - 0x13, 0x15, 0x68, 0x0b, 0x95); - dsi_generic_write_seq(dsi, 0xb0, 0x03); + mipi_dsi_generic_write_seq(dsi, 0xb0, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xd6, 0x01); + mipi_dsi_generic_write_seq(dsi, 0xec, + 0x64, 0xdc, 0xec, 0x3b, 0x52, 0x00, 0x0b, 0x0b, + 0x13, 0x15, 0x68, 0x0b, 0x95); + mipi_dsi_generic_write_seq(dsi, 0xb0, 0x03); ret = mipi_dsi_dcs_set_display_off(dsi); if (ret < 0) { From patchwork Sat Jan 7 19:18:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Javier Martinez Canillas X-Patchwork-Id: 13092314 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7D2A2C54EBE for ; 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[92.176.231.205]) by smtp.gmail.com with ESMTPSA id bp28-20020a5d5a9c000000b00273cd321a1bsm4553900wrb.107.2023.01.07.11.18.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Jan 2023 11:18:41 -0800 (PST) From: Javier Martinez Canillas To: linux-kernel@vger.kernel.org Subject: [PATCH v2 08/13] drm/panel-samsung-s6e88a0-ams452ef01: Drop custom DSI write macro Date: Sat, 7 Jan 2023 20:18:17 +0100 Message-Id: <20230107191822.3787147-9-javierm@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230107191822.3787147-1-javierm@redhat.com> References: <20230107191822.3787147-1-javierm@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sam Ravnborg , Javier Martinez Canillas , dri-devel@lists.freedesktop.org, Thierry Reding Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" There is a macro for this already in the header, use that instead and delete the custom DSI write macro defined in the driver. Signed-off-by: Javier Martinez Canillas Reviewed-by: Sam Ravnborg --- Changes in v2: - Add Sam Ravnborg's Reviewed-by tag. - Fix identation on macro usage (Sam Ravnborg). .../panel/panel-samsung-s6e88a0-ams452ef01.c | 44 ++++++++----------- 1 file changed, 18 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c b/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c index 97ff7a18545c..7431cae7427e 100644 --- a/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c +++ b/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c @@ -28,14 +28,6 @@ s6e88a0_ams452ef01 *to_s6e88a0_ams452ef01(struct drm_panel *panel) return container_of(panel, struct s6e88a0_ams452ef01, panel); } -#define dsi_dcs_write_seq(dsi, seq...) do { \ - static const u8 d[] = { seq }; \ - int ret; \ - ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \ - if (ret < 0) \ - return ret; \ - } while (0) - static void s6e88a0_ams452ef01_reset(struct s6e88a0_ams452ef01 *ctx) { gpiod_set_value_cansleep(ctx->reset_gpio, 1); @@ -54,8 +46,8 @@ static int s6e88a0_ams452ef01_on(struct s6e88a0_ams452ef01 *ctx) dsi->mode_flags |= MIPI_DSI_MODE_LPM; - dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a); // enable LEVEL2 commands - dsi_dcs_write_seq(dsi, 0xcc, 0x4c); // set Pixel Clock Divider polarity + mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a); // enable LEVEL2 commands + mipi_dsi_dcs_write_seq(dsi, 0xcc, 0x4c); // set Pixel Clock Divider polarity ret = mipi_dsi_dcs_exit_sleep_mode(dsi); if (ret < 0) { @@ -65,23 +57,23 @@ static int s6e88a0_ams452ef01_on(struct s6e88a0_ams452ef01 *ctx) msleep(120); // set default brightness/gama - dsi_dcs_write_seq(dsi, 0xca, - 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, // V255 RR,GG,BB - 0x80, 0x80, 0x80, // V203 R,G,B - 0x80, 0x80, 0x80, // V151 R,G,B - 0x80, 0x80, 0x80, // V87 R,G,B - 0x80, 0x80, 0x80, // V51 R,G,B - 0x80, 0x80, 0x80, // V35 R,G,B - 0x80, 0x80, 0x80, // V23 R,G,B - 0x80, 0x80, 0x80, // V11 R,G,B - 0x6b, 0x68, 0x71, // V3 R,G,B - 0x00, 0x00, 0x00); // V1 R,G,B + mipi_dsi_dcs_write_seq(dsi, 0xca, + 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, // V255 RR,GG,BB + 0x80, 0x80, 0x80, // V203 R,G,B + 0x80, 0x80, 0x80, // V151 R,G,B + 0x80, 0x80, 0x80, // V87 R,G,B + 0x80, 0x80, 0x80, // V51 R,G,B + 0x80, 0x80, 0x80, // V35 R,G,B + 0x80, 0x80, 0x80, // V23 R,G,B + 0x80, 0x80, 0x80, // V11 R,G,B + 0x6b, 0x68, 0x71, // V3 R,G,B + 0x00, 0x00, 0x00); // V1 R,G,B // set default Amoled Off Ratio - dsi_dcs_write_seq(dsi, 0xb2, 0x40, 0x0a, 0x17, 0x00, 0x0a); - dsi_dcs_write_seq(dsi, 0xb6, 0x2c, 0x0b); // set default elvss voltage - dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00); - dsi_dcs_write_seq(dsi, 0xf7, 0x03); // gamma/aor update - dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5); // disable LEVEL2 commands + mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x40, 0x0a, 0x17, 0x00, 0x0a); + mipi_dsi_dcs_write_seq(dsi, 0xb6, 0x2c, 0x0b); // set default elvss voltage + mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00); + mipi_dsi_dcs_write_seq(dsi, 0xf7, 0x03); // gamma/aor update + mipi_dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5); // disable LEVEL2 commands ret = mipi_dsi_dcs_set_display_on(dsi); if (ret < 0) { From patchwork Sat Jan 7 19:18:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Javier Martinez Canillas X-Patchwork-Id: 13092316 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 42CCAC54EBE for ; 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[92.176.231.205]) by smtp.gmail.com with ESMTPSA id bp28-20020a5d5a9c000000b00273cd321a1bsm4553900wrb.107.2023.01.07.11.18.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Jan 2023 11:18:42 -0800 (PST) From: Javier Martinez Canillas To: linux-kernel@vger.kernel.org Subject: [PATCH v2 09/13] drm/panel-samsung-sofef00: Drop custom DSI write macro Date: Sat, 7 Jan 2023 20:18:18 +0100 Message-Id: <20230107191822.3787147-10-javierm@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230107191822.3787147-1-javierm@redhat.com> References: <20230107191822.3787147-1-javierm@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sam Ravnborg , Javier Martinez Canillas , dri-devel@lists.freedesktop.org, Thierry Reding Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" There is a macro for this already in the header, use that instead and delete the custom DSI write macro defined in the driver. Signed-off-by: Javier Martinez Canillas Reviewed-by: Sam Ravnborg --- Changes in v2: - Add Sam Ravnborg's Reviewed-by tag. drivers/gpu/drm/panel/panel-samsung-sofef00.c | 24 +++++++------------ 1 file changed, 8 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-samsung-sofef00.c b/drivers/gpu/drm/panel/panel-samsung-sofef00.c index 1a0d24595faa..9db49a028930 100644 --- a/drivers/gpu/drm/panel/panel-samsung-sofef00.c +++ b/drivers/gpu/drm/panel/panel-samsung-sofef00.c @@ -34,14 +34,6 @@ struct sofef00_panel *to_sofef00_panel(struct drm_panel *panel) return container_of(panel, struct sofef00_panel, panel); } -#define dsi_dcs_write_seq(dsi, seq...) do { \ - static const u8 d[] = { seq }; \ - int ret; \ - ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \ - if (ret < 0) \ - return ret; \ - } while (0) - static void sofef00_panel_reset(struct sofef00_panel *ctx) { gpiod_set_value_cansleep(ctx->reset_gpio, 0); @@ -67,7 +59,7 @@ static int sofef00_panel_on(struct sofef00_panel *ctx) } usleep_range(10000, 11000); - dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a); + mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a); ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK); if (ret < 0) { @@ -75,13 +67,13 @@ static int sofef00_panel_on(struct sofef00_panel *ctx) return ret; } - dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5); - dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a); - dsi_dcs_write_seq(dsi, 0xb0, 0x07); - dsi_dcs_write_seq(dsi, 0xb6, 0x12); - dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5); - dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x20); - dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00); + mipi_dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5); + mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a); + mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x07); + mipi_dsi_dcs_write_seq(dsi, 0xb6, 0x12); + mipi_dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5); + mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x20); + mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00); ret = mipi_dsi_dcs_set_display_on(dsi); if (ret < 0) { From patchwork Sat Jan 7 19:18:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Javier Martinez Canillas X-Patchwork-Id: 13092318 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 15806C46467 for ; Sat, 7 Jan 2023 19:19:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 605A610E35E; Sat, 7 Jan 2023 19:19:04 +0000 (UTC) Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2486510E363 for ; Sat, 7 Jan 2023 19:18:50 +0000 (UTC) DKIM-Signature: v=1; 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[92.176.231.205]) by smtp.gmail.com with ESMTPSA id bp28-20020a5d5a9c000000b00273cd321a1bsm4553900wrb.107.2023.01.07.11.18.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Jan 2023 11:18:44 -0800 (PST) From: Javier Martinez Canillas To: linux-kernel@vger.kernel.org Subject: [PATCH v2 10/13] drm/panel-sharp-ls060t1sx01: Drop custom DSI write macro Date: Sat, 7 Jan 2023 20:18:19 +0100 Message-Id: <20230107191822.3787147-11-javierm@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230107191822.3787147-1-javierm@redhat.com> References: <20230107191822.3787147-1-javierm@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sam Ravnborg , Javier Martinez Canillas , dri-devel@lists.freedesktop.org, Thierry Reding Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" There is a macro for this already in the header, use that instead and delete the custom DSI write macro defined in the driver. Signed-off-by: Javier Martinez Canillas Reviewed-by: Sam Ravnborg --- Changes in v2: - Add Sam Ravnborg's Reviewed-by tag. .../gpu/drm/panel/panel-sharp-ls060t1sx01.c | 19 ++----------------- 1 file changed, 2 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-sharp-ls060t1sx01.c b/drivers/gpu/drm/panel/panel-sharp-ls060t1sx01.c index 8a4e0c1fe73f..68f52eaaf4fa 100644 --- a/drivers/gpu/drm/panel/panel-sharp-ls060t1sx01.c +++ b/drivers/gpu/drm/panel/panel-sharp-ls060t1sx01.c @@ -32,12 +32,6 @@ static inline struct sharp_ls060 *to_sharp_ls060(struct drm_panel *panel) return container_of(panel, struct sharp_ls060, panel); } -#define dsi_dcs_write_seq(dsi, seq...) ({ \ - static const u8 d[] = { seq }; \ - \ - mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \ - }) - static void sharp_ls060_reset(struct sharp_ls060 *ctx) { gpiod_set_value_cansleep(ctx->reset_gpio, 0); @@ -56,17 +50,8 @@ static int sharp_ls060_on(struct sharp_ls060 *ctx) dsi->mode_flags |= MIPI_DSI_MODE_LPM; - ret = dsi_dcs_write_seq(dsi, 0xbb, 0x13); - if (ret < 0) { - dev_err(dev, "Failed to send command: %d\n", ret); - return ret; - } - - ret = dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_MEMORY_START); - if (ret < 0) { - dev_err(dev, "Failed to send command: %d\n", ret); - return ret; - } + mipi_dsi_dcs_write_seq(dsi, 0xbb, 0x13); + mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_MEMORY_START); ret = mipi_dsi_dcs_exit_sleep_mode(dsi); if (ret < 0) { From patchwork Sat Jan 7 19:18:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Javier Martinez Canillas X-Patchwork-Id: 13092319 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E57D7C54EBC for ; Sat, 7 Jan 2023 19:19:12 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 04F5010E35F; Sat, 7 Jan 2023 19:19:05 +0000 (UTC) Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0609D10E362 for ; Sat, 7 Jan 2023 19:18:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1673119128; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=vpnPFBzRW6eHCPCk8Ls0t1EZjEyRqRYmlX28Isym++A=; b=he0hPdRcG/HVoYCV3S4vM9D7MS/6oYkZLAAR6F43Uv3wUGnt6DhchRMaYSSenttn8eb+SX 0x97tf/ImSYqvNCpw852KEl8KIQ5uNoxND3ZaUi5sw4kKwJ6QMr9bGwZLBn2dLlkFPZKo0 CVTb9guVFLu4wDfUHBfbWfGUEaEaAAE= Received: from mail-wm1-f72.google.com (mail-wm1-f72.google.com [209.85.128.72]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_128_GCM_SHA256) id us-mta-5-5O1cn2SCPQOV9gh0fETlsg-1; Sat, 07 Jan 2023 14:18:46 -0500 X-MC-Unique: 5O1cn2SCPQOV9gh0fETlsg-1 Received: by mail-wm1-f72.google.com with SMTP id c7-20020a1c3507000000b003d355c13ba8so2710011wma.6 for ; Sat, 07 Jan 2023 11:18:46 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vpnPFBzRW6eHCPCk8Ls0t1EZjEyRqRYmlX28Isym++A=; b=HZ95bssVOTzEI+yxjMUo/tBmoyrzwzgkJyGOITCHoFnpCDmw6OElNu/PbXUtGS8VqU v/iM8QP6lR+Ag1hsy44NWDe2e3InAOtUbeVy2FxulBcDSGAT8oGF4mKUua6ERhYzjenp NOVp1u7fwxyxvrkQAFAeYItK2Y3+Ylhk4xWN1uq5Joz4SwL/EZeznOd63Lcbcx3HbhED Dt7h9H2HuS0CQJ9lTMCYWbXsfdqsjyS9aDiSiMMigAJWJ6aqQdNAHtyafnc5HPcW8qMr dTKm+8KNNVfrcxZtT+tOjb4+SZQp8azuP38mdpx107pRhoMUaWDPqbGsCjC7fNCpj7g8 EcsQ== X-Gm-Message-State: AFqh2kpBurliShjYjCs7dSXrO/qwozN6s8GgxYkYUOkalbDoplIpBxcC dmXg0dfVCiiG3KLfn0pdvjjD/XCZpFPcgs7vZxUqEZE8Lr0kiuWuZ75rio02J/MZxofOphCQmJ1 7dQBdkwz0SGx6v1gzGMVZyO1sAE9X X-Received: by 2002:a5d:620f:0:b0:242:9e3:72b8 with SMTP id y15-20020a5d620f000000b0024209e372b8mr43020251wru.31.1673119125784; Sat, 07 Jan 2023 11:18:45 -0800 (PST) X-Google-Smtp-Source: AMrXdXvGRowZHlkk4D63NFUoqF99EB2JPISpBuBanleVv/OAGREuj85b6r46NB2BstsyZH7AAsnhZQ== X-Received: by 2002:a5d:620f:0:b0:242:9e3:72b8 with SMTP id y15-20020a5d620f000000b0024209e372b8mr43020244wru.31.1673119125605; Sat, 07 Jan 2023 11:18:45 -0800 (PST) Received: from minerva.home (205.pool92-176-231.dynamic.orange.es. [92.176.231.205]) by smtp.gmail.com with ESMTPSA id bp28-20020a5d5a9c000000b00273cd321a1bsm4553900wrb.107.2023.01.07.11.18.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Jan 2023 11:18:45 -0800 (PST) From: Javier Martinez Canillas To: linux-kernel@vger.kernel.org Subject: [PATCH v2 11/13] drm/panel-mantix-mlaf057we51: Drop custom DSI write macro Date: Sat, 7 Jan 2023 20:18:20 +0100 Message-Id: <20230107191822.3787147-12-javierm@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230107191822.3787147-1-javierm@redhat.com> References: <20230107191822.3787147-1-javierm@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Purism Kernel Team , Sam Ravnborg , =?utf-8?q?Guido_G=C3=BCnther?= , Javier Martinez Canillas , dri-devel@lists.freedesktop.org, Thierry Reding Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" There is a macro for this already in the header, use that instead and delete the custom DSI write macro defined in the driver. Signed-off-by: Javier Martinez Canillas Reviewed-by: Sam Ravnborg Reviewed-by: Guido Günther --- Changes in v2: - Add Sam Ravnborg's Reviewed-by tag. .../gpu/drm/panel/panel-mantix-mlaf057we51.c | 24 +++++++------------ 1 file changed, 8 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c b/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c index 772e3b6acece..9243b2ad828d 100644 --- a/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c +++ b/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c @@ -45,14 +45,6 @@ static inline struct mantix *panel_to_mantix(struct drm_panel *panel) return container_of(panel, struct mantix, panel); } -#define dsi_generic_write_seq(dsi, seq...) do { \ - static const u8 d[] = { seq }; \ - int ret; \ - ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \ - if (ret < 0) \ - return ret; \ - } while (0) - static int mantix_init_sequence(struct mantix *ctx) { struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); @@ -61,18 +53,18 @@ static int mantix_init_sequence(struct mantix *ctx) /* * Init sequence was supplied by the panel vendor. */ - dsi_generic_write_seq(dsi, MANTIX_CMD_OTP_STOP_RELOAD_MIPI, 0x5A); + mipi_dsi_generic_write_seq(dsi, MANTIX_CMD_OTP_STOP_RELOAD_MIPI, 0x5A); - dsi_generic_write_seq(dsi, MANTIX_CMD_INT_CANCEL, 0x03); - dsi_generic_write_seq(dsi, MANTIX_CMD_OTP_STOP_RELOAD_MIPI, 0x5A, 0x03); - dsi_generic_write_seq(dsi, 0x80, 0xA9, 0x00); + mipi_dsi_generic_write_seq(dsi, MANTIX_CMD_INT_CANCEL, 0x03); + mipi_dsi_generic_write_seq(dsi, MANTIX_CMD_OTP_STOP_RELOAD_MIPI, 0x5A, 0x03); + mipi_dsi_generic_write_seq(dsi, 0x80, 0xA9, 0x00); - dsi_generic_write_seq(dsi, MANTIX_CMD_OTP_STOP_RELOAD_MIPI, 0x5A, 0x09); - dsi_generic_write_seq(dsi, 0x80, 0x64, 0x00, 0x64, 0x00, 0x00); + mipi_dsi_generic_write_seq(dsi, MANTIX_CMD_OTP_STOP_RELOAD_MIPI, 0x5A, 0x09); + mipi_dsi_generic_write_seq(dsi, 0x80, 0x64, 0x00, 0x64, 0x00, 0x00); msleep(20); - dsi_generic_write_seq(dsi, MANTIX_CMD_SPI_FINISH, 0xA5); - dsi_generic_write_seq(dsi, MANTIX_CMD_OTP_STOP_RELOAD_MIPI, 0x00, 0x2F); + mipi_dsi_generic_write_seq(dsi, MANTIX_CMD_SPI_FINISH, 0xA5); + mipi_dsi_generic_write_seq(dsi, MANTIX_CMD_OTP_STOP_RELOAD_MIPI, 0x00, 0x2F); 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[92.176.231.205]) by smtp.gmail.com with ESMTPSA id bp28-20020a5d5a9c000000b00273cd321a1bsm4553900wrb.107.2023.01.07.11.18.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Jan 2023 11:18:46 -0800 (PST) From: Javier Martinez Canillas To: linux-kernel@vger.kernel.org Subject: [PATCH v2 12/13] drm/panel-sony-tulip-truly-nt35521: Drop custom DSI write macro Date: Sat, 7 Jan 2023 20:18:21 +0100 Message-Id: <20230107191822.3787147-13-javierm@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230107191822.3787147-1-javierm@redhat.com> References: <20230107191822.3787147-1-javierm@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sam Ravnborg , Javier Martinez Canillas , dri-devel@lists.freedesktop.org, Thierry Reding Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" There is a macro for this already in the header, use that instead and delete the custom DSI write macro defined in the driver. Signed-off-by: Javier Martinez Canillas Reviewed-by: Sam Ravnborg --- Changes in v2: - Add Sam Ravnborg's Reviewed-by tag. - Fix identation on macro usage (Sam Ravnborg). .../panel/panel-sony-tulip-truly-nt35521.c | 398 +++++++++--------- 1 file changed, 195 insertions(+), 203 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-sony-tulip-truly-nt35521.c b/drivers/gpu/drm/panel/panel-sony-tulip-truly-nt35521.c index fa9be3c299c0..ee5d20ecc577 100644 --- a/drivers/gpu/drm/panel/panel-sony-tulip-truly-nt35521.c +++ b/drivers/gpu/drm/panel/panel-sony-tulip-truly-nt35521.c @@ -33,14 +33,6 @@ struct truly_nt35521 *to_truly_nt35521(struct drm_panel *panel) return container_of(panel, struct truly_nt35521, panel); } -#define dsi_generic_write_seq(dsi, seq...) do { \ - static const u8 d[] = { seq }; \ - int ret; \ - ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \ - if (ret < 0) \ - return ret; \ - } while (0) - static void truly_nt35521_reset(struct truly_nt35521 *ctx) { gpiod_set_value_cansleep(ctx->reset_gpio, 1); @@ -59,200 +51,200 @@ static int truly_nt35521_on(struct truly_nt35521 *ctx) dsi->mode_flags |= MIPI_DSI_MODE_LPM; - dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x00); - dsi_generic_write_seq(dsi, 0xff, 0xaa, 0x55, 0xa5, 0x80); - dsi_generic_write_seq(dsi, 0x6f, 0x11, 0x00); - dsi_generic_write_seq(dsi, 0xf7, 0x20, 0x00); - dsi_generic_write_seq(dsi, 0x6f, 0x01); - dsi_generic_write_seq(dsi, 0xb1, 0x21); - dsi_generic_write_seq(dsi, 0xbd, 0x01, 0xa0, 0x10, 0x08, 0x01); - dsi_generic_write_seq(dsi, 0xb8, 0x01, 0x02, 0x0c, 0x02); - dsi_generic_write_seq(dsi, 0xbb, 0x11, 0x11); - dsi_generic_write_seq(dsi, 0xbc, 0x00, 0x00); - dsi_generic_write_seq(dsi, 0xb6, 0x02); - dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x01); - dsi_generic_write_seq(dsi, 0xb0, 0x09, 0x09); - dsi_generic_write_seq(dsi, 0xb1, 0x09, 0x09); - dsi_generic_write_seq(dsi, 0xbc, 0x8c, 0x00); - dsi_generic_write_seq(dsi, 0xbd, 0x8c, 0x00); - dsi_generic_write_seq(dsi, 0xca, 0x00); - dsi_generic_write_seq(dsi, 0xc0, 0x04); - dsi_generic_write_seq(dsi, 0xbe, 0xb5); - dsi_generic_write_seq(dsi, 0xb3, 0x35, 0x35); - dsi_generic_write_seq(dsi, 0xb4, 0x25, 0x25); - dsi_generic_write_seq(dsi, 0xb9, 0x43, 0x43); - dsi_generic_write_seq(dsi, 0xba, 0x24, 0x24); - dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x02); - dsi_generic_write_seq(dsi, 0xee, 0x03); - dsi_generic_write_seq(dsi, 0xb0, - 0x00, 0xb2, 0x00, 0xb3, 0x00, 0xb6, 0x00, 0xc3, - 0x00, 0xce, 0x00, 0xe1, 0x00, 0xf3, 0x01, 0x11); - dsi_generic_write_seq(dsi, 0xb1, - 0x01, 0x2e, 0x01, 0x5c, 0x01, 0x82, 0x01, 0xc3, - 0x01, 0xfe, 0x02, 0x00, 0x02, 0x37, 0x02, 0x77); - dsi_generic_write_seq(dsi, 0xb2, - 0x02, 0xa1, 0x02, 0xd7, 0x02, 0xfe, 0x03, 0x2c, - 0x03, 0x4b, 0x03, 0x63, 0x03, 0x8f, 0x03, 0x90); - dsi_generic_write_seq(dsi, 0xb3, 0x03, 0x96, 0x03, 0x98); - dsi_generic_write_seq(dsi, 0xb4, - 0x00, 0x81, 0x00, 0x8b, 0x00, 0x9c, 0x00, 0xa9, - 0x00, 0xb5, 0x00, 0xcb, 0x00, 0xdf, 0x01, 0x02); - dsi_generic_write_seq(dsi, 0xb5, - 0x01, 0x1f, 0x01, 0x51, 0x01, 0x7a, 0x01, 0xbf, - 0x01, 0xfa, 0x01, 0xfc, 0x02, 0x34, 0x02, 0x76); - dsi_generic_write_seq(dsi, 0xb6, - 0x02, 0x9f, 0x02, 0xd7, 0x02, 0xfc, 0x03, 0x2c, - 0x03, 0x4a, 0x03, 0x63, 0x03, 0x8f, 0x03, 0xa2); - dsi_generic_write_seq(dsi, 0xb7, 0x03, 0xb8, 0x03, 0xba); - dsi_generic_write_seq(dsi, 0xb8, - 0x00, 0x01, 0x00, 0x02, 0x00, 0x0e, 0x00, 0x2a, - 0x00, 0x41, 0x00, 0x67, 0x00, 0x87, 0x00, 0xb9); - dsi_generic_write_seq(dsi, 0xb9, - 0x00, 0xe2, 0x01, 0x22, 0x01, 0x54, 0x01, 0xa3, - 0x01, 0xe6, 0x01, 0xe7, 0x02, 0x24, 0x02, 0x67); - dsi_generic_write_seq(dsi, 0xba, - 0x02, 0x93, 0x02, 0xcd, 0x02, 0xf6, 0x03, 0x31, - 0x03, 0x6c, 0x03, 0xe9, 0x03, 0xef, 0x03, 0xf4); - dsi_generic_write_seq(dsi, 0xbb, 0x03, 0xf6, 0x03, 0xf7); - dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x03); - dsi_generic_write_seq(dsi, 0xb0, 0x22, 0x00); - dsi_generic_write_seq(dsi, 0xb1, 0x22, 0x00); - dsi_generic_write_seq(dsi, 0xb2, 0x05, 0x00, 0x60, 0x00, 0x00); - dsi_generic_write_seq(dsi, 0xb3, 0x05, 0x00, 0x60, 0x00, 0x00); - dsi_generic_write_seq(dsi, 0xb4, 0x05, 0x00, 0x60, 0x00, 0x00); - dsi_generic_write_seq(dsi, 0xb5, 0x05, 0x00, 0x60, 0x00, 0x00); - dsi_generic_write_seq(dsi, 0xba, 0x53, 0x00, 0x60, 0x00, 0x00); - dsi_generic_write_seq(dsi, 0xbb, 0x53, 0x00, 0x60, 0x00, 0x00); - dsi_generic_write_seq(dsi, 0xbc, 0x53, 0x00, 0x60, 0x00, 0x00); - dsi_generic_write_seq(dsi, 0xbd, 0x53, 0x00, 0x60, 0x00, 0x00); - dsi_generic_write_seq(dsi, 0xc0, 0x00, 0x34, 0x00, 0x00); - dsi_generic_write_seq(dsi, 0xc1, 0x00, 0x00, 0x34, 0x00); - dsi_generic_write_seq(dsi, 0xc2, 0x00, 0x00, 0x34, 0x00); - dsi_generic_write_seq(dsi, 0xc3, 0x00, 0x00, 0x34, 0x00); - dsi_generic_write_seq(dsi, 0xc4, 0x60); - dsi_generic_write_seq(dsi, 0xc5, 0xc0); - dsi_generic_write_seq(dsi, 0xc6, 0x00); - dsi_generic_write_seq(dsi, 0xc7, 0x00); - dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x05); - dsi_generic_write_seq(dsi, 0xb0, 0x17, 0x06); - dsi_generic_write_seq(dsi, 0xb1, 0x17, 0x06); - dsi_generic_write_seq(dsi, 0xb2, 0x17, 0x06); - dsi_generic_write_seq(dsi, 0xb3, 0x17, 0x06); - dsi_generic_write_seq(dsi, 0xb4, 0x17, 0x06); - dsi_generic_write_seq(dsi, 0xb5, 0x17, 0x06); - dsi_generic_write_seq(dsi, 0xb6, 0x17, 0x06); - dsi_generic_write_seq(dsi, 0xb7, 0x17, 0x06); - dsi_generic_write_seq(dsi, 0xb8, 0x00); - dsi_generic_write_seq(dsi, 0xb9, 0x00, 0x03); - dsi_generic_write_seq(dsi, 0xba, 0x00, 0x00); - dsi_generic_write_seq(dsi, 0xbb, 0x02, 0x03); - dsi_generic_write_seq(dsi, 0xbc, 0x02, 0x03); - dsi_generic_write_seq(dsi, 0xbd, 0x03, 0x03, 0x00, 0x03, 0x03); - dsi_generic_write_seq(dsi, 0xc0, 0x0b); - dsi_generic_write_seq(dsi, 0xc1, 0x09); - dsi_generic_write_seq(dsi, 0xc2, 0xa6); - dsi_generic_write_seq(dsi, 0xc3, 0x05); - dsi_generic_write_seq(dsi, 0xc4, 0x00); - dsi_generic_write_seq(dsi, 0xc5, 0x02); - dsi_generic_write_seq(dsi, 0xc6, 0x22); - dsi_generic_write_seq(dsi, 0xc7, 0x03); - dsi_generic_write_seq(dsi, 0xc8, 0x07, 0x20); - dsi_generic_write_seq(dsi, 0xc9, 0x03, 0x20); - dsi_generic_write_seq(dsi, 0xca, 0x01, 0x60); - dsi_generic_write_seq(dsi, 0xcb, 0x01, 0x60); - dsi_generic_write_seq(dsi, 0xcc, 0x00, 0x00, 0x02); - dsi_generic_write_seq(dsi, 0xcd, 0x00, 0x00, 0x02); - dsi_generic_write_seq(dsi, 0xce, 0x00, 0x00, 0x02); - dsi_generic_write_seq(dsi, 0xcf, 0x00, 0x00, 0x02); - dsi_generic_write_seq(dsi, 0xd1, 0x00, 0x05, 0x01, 0x07, 0x10); - dsi_generic_write_seq(dsi, 0xd2, 0x10, 0x05, 0x05, 0x03, 0x10); - dsi_generic_write_seq(dsi, 0xd3, 0x20, 0x00, 0x43, 0x07, 0x10); - dsi_generic_write_seq(dsi, 0xd4, 0x30, 0x00, 0x43, 0x07, 0x10); - dsi_generic_write_seq(dsi, 0xd0, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); - dsi_generic_write_seq(dsi, 0xd5, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00); - dsi_generic_write_seq(dsi, 0xd6, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00); - dsi_generic_write_seq(dsi, 0xd7, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00); - dsi_generic_write_seq(dsi, 0xd8, 0x00, 0x00, 0x00, 0x00, 0x00); - dsi_generic_write_seq(dsi, 0xe5, 0x06); - dsi_generic_write_seq(dsi, 0xe6, 0x06); - dsi_generic_write_seq(dsi, 0xe7, 0x00); - dsi_generic_write_seq(dsi, 0xe8, 0x06); - dsi_generic_write_seq(dsi, 0xe9, 0x06); - dsi_generic_write_seq(dsi, 0xea, 0x06); - dsi_generic_write_seq(dsi, 0xeb, 0x00); - dsi_generic_write_seq(dsi, 0xec, 0x00); - dsi_generic_write_seq(dsi, 0xed, 0x30); - dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x06); - dsi_generic_write_seq(dsi, 0xb0, 0x31, 0x31); - dsi_generic_write_seq(dsi, 0xb1, 0x31, 0x31); - dsi_generic_write_seq(dsi, 0xb2, 0x2d, 0x2e); - dsi_generic_write_seq(dsi, 0xb3, 0x31, 0x34); - dsi_generic_write_seq(dsi, 0xb4, 0x29, 0x2a); - dsi_generic_write_seq(dsi, 0xb5, 0x12, 0x10); - dsi_generic_write_seq(dsi, 0xb6, 0x18, 0x16); - dsi_generic_write_seq(dsi, 0xb7, 0x00, 0x02); - dsi_generic_write_seq(dsi, 0xb8, 0x08, 0x31); - dsi_generic_write_seq(dsi, 0xb9, 0x31, 0x31); - dsi_generic_write_seq(dsi, 0xba, 0x31, 0x31); - dsi_generic_write_seq(dsi, 0xbb, 0x31, 0x08); - dsi_generic_write_seq(dsi, 0xbc, 0x03, 0x01); - dsi_generic_write_seq(dsi, 0xbd, 0x17, 0x19); - dsi_generic_write_seq(dsi, 0xbe, 0x11, 0x13); - dsi_generic_write_seq(dsi, 0xbf, 0x2a, 0x29); - dsi_generic_write_seq(dsi, 0xc0, 0x34, 0x31); - dsi_generic_write_seq(dsi, 0xc1, 0x2e, 0x2d); - dsi_generic_write_seq(dsi, 0xc2, 0x31, 0x31); - dsi_generic_write_seq(dsi, 0xc3, 0x31, 0x31); - dsi_generic_write_seq(dsi, 0xc4, 0x31, 0x31); - dsi_generic_write_seq(dsi, 0xc5, 0x31, 0x31); - dsi_generic_write_seq(dsi, 0xc6, 0x2e, 0x2d); - dsi_generic_write_seq(dsi, 0xc7, 0x31, 0x34); - dsi_generic_write_seq(dsi, 0xc8, 0x29, 0x2a); - dsi_generic_write_seq(dsi, 0xc9, 0x17, 0x19); - dsi_generic_write_seq(dsi, 0xca, 0x11, 0x13); - dsi_generic_write_seq(dsi, 0xcb, 0x03, 0x01); - dsi_generic_write_seq(dsi, 0xcc, 0x08, 0x31); - dsi_generic_write_seq(dsi, 0xcd, 0x31, 0x31); - dsi_generic_write_seq(dsi, 0xce, 0x31, 0x31); - dsi_generic_write_seq(dsi, 0xcf, 0x31, 0x08); - dsi_generic_write_seq(dsi, 0xd0, 0x00, 0x02); - dsi_generic_write_seq(dsi, 0xd1, 0x12, 0x10); - dsi_generic_write_seq(dsi, 0xd2, 0x18, 0x16); - dsi_generic_write_seq(dsi, 0xd3, 0x2a, 0x29); - dsi_generic_write_seq(dsi, 0xd4, 0x34, 0x31); - dsi_generic_write_seq(dsi, 0xd5, 0x2d, 0x2e); - dsi_generic_write_seq(dsi, 0xd6, 0x31, 0x31); - dsi_generic_write_seq(dsi, 0xd7, 0x31, 0x31); - dsi_generic_write_seq(dsi, 0xe5, 0x31, 0x31); - dsi_generic_write_seq(dsi, 0xe6, 0x31, 0x31); - dsi_generic_write_seq(dsi, 0xd8, 0x00, 0x00, 0x00, 0x00, 0x00); - dsi_generic_write_seq(dsi, 0xd9, 0x00, 0x00, 0x00, 0x00, 0x00); - dsi_generic_write_seq(dsi, 0xe7, 0x00); - dsi_generic_write_seq(dsi, 0x6f, 0x02); - dsi_generic_write_seq(dsi, 0xf7, 0x47); - dsi_generic_write_seq(dsi, 0x6f, 0x0a); - dsi_generic_write_seq(dsi, 0xf7, 0x02); - dsi_generic_write_seq(dsi, 0x6f, 0x17); - dsi_generic_write_seq(dsi, 0xf4, 0x60); - dsi_generic_write_seq(dsi, 0x6f, 0x01); - dsi_generic_write_seq(dsi, 0xf9, 0x46); - dsi_generic_write_seq(dsi, 0x6f, 0x11); - dsi_generic_write_seq(dsi, 0xf3, 0x01); - dsi_generic_write_seq(dsi, 0x35, 0x00); - dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x00); - dsi_generic_write_seq(dsi, 0xd9, 0x02, 0x03, 0x00); - dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x00, 0x00); - dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x00); - dsi_generic_write_seq(dsi, 0xb1, 0x6c, 0x21); - dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x00, 0x00); - dsi_generic_write_seq(dsi, 0x35, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xff, 0xaa, 0x55, 0xa5, 0x80); + mipi_dsi_generic_write_seq(dsi, 0x6f, 0x11, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xf7, 0x20, 0x00); + mipi_dsi_generic_write_seq(dsi, 0x6f, 0x01); + mipi_dsi_generic_write_seq(dsi, 0xb1, 0x21); + mipi_dsi_generic_write_seq(dsi, 0xbd, 0x01, 0xa0, 0x10, 0x08, 0x01); + mipi_dsi_generic_write_seq(dsi, 0xb8, 0x01, 0x02, 0x0c, 0x02); + mipi_dsi_generic_write_seq(dsi, 0xbb, 0x11, 0x11); + mipi_dsi_generic_write_seq(dsi, 0xbc, 0x00, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xb6, 0x02); + mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x01); + mipi_dsi_generic_write_seq(dsi, 0xb0, 0x09, 0x09); + mipi_dsi_generic_write_seq(dsi, 0xb1, 0x09, 0x09); + mipi_dsi_generic_write_seq(dsi, 0xbc, 0x8c, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xbd, 0x8c, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xca, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xc0, 0x04); + mipi_dsi_generic_write_seq(dsi, 0xbe, 0xb5); + mipi_dsi_generic_write_seq(dsi, 0xb3, 0x35, 0x35); + mipi_dsi_generic_write_seq(dsi, 0xb4, 0x25, 0x25); + mipi_dsi_generic_write_seq(dsi, 0xb9, 0x43, 0x43); + mipi_dsi_generic_write_seq(dsi, 0xba, 0x24, 0x24); + mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x02); + mipi_dsi_generic_write_seq(dsi, 0xee, 0x03); + mipi_dsi_generic_write_seq(dsi, 0xb0, + 0x00, 0xb2, 0x00, 0xb3, 0x00, 0xb6, 0x00, 0xc3, + 0x00, 0xce, 0x00, 0xe1, 0x00, 0xf3, 0x01, 0x11); + mipi_dsi_generic_write_seq(dsi, 0xb1, + 0x01, 0x2e, 0x01, 0x5c, 0x01, 0x82, 0x01, 0xc3, + 0x01, 0xfe, 0x02, 0x00, 0x02, 0x37, 0x02, 0x77); + mipi_dsi_generic_write_seq(dsi, 0xb2, + 0x02, 0xa1, 0x02, 0xd7, 0x02, 0xfe, 0x03, 0x2c, + 0x03, 0x4b, 0x03, 0x63, 0x03, 0x8f, 0x03, 0x90); + mipi_dsi_generic_write_seq(dsi, 0xb3, 0x03, 0x96, 0x03, 0x98); + mipi_dsi_generic_write_seq(dsi, 0xb4, + 0x00, 0x81, 0x00, 0x8b, 0x00, 0x9c, 0x00, 0xa9, + 0x00, 0xb5, 0x00, 0xcb, 0x00, 0xdf, 0x01, 0x02); + mipi_dsi_generic_write_seq(dsi, 0xb5, + 0x01, 0x1f, 0x01, 0x51, 0x01, 0x7a, 0x01, 0xbf, + 0x01, 0xfa, 0x01, 0xfc, 0x02, 0x34, 0x02, 0x76); + mipi_dsi_generic_write_seq(dsi, 0xb6, + 0x02, 0x9f, 0x02, 0xd7, 0x02, 0xfc, 0x03, 0x2c, + 0x03, 0x4a, 0x03, 0x63, 0x03, 0x8f, 0x03, 0xa2); + mipi_dsi_generic_write_seq(dsi, 0xb7, 0x03, 0xb8, 0x03, 0xba); + mipi_dsi_generic_write_seq(dsi, 0xb8, + 0x00, 0x01, 0x00, 0x02, 0x00, 0x0e, 0x00, 0x2a, + 0x00, 0x41, 0x00, 0x67, 0x00, 0x87, 0x00, 0xb9); + mipi_dsi_generic_write_seq(dsi, 0xb9, + 0x00, 0xe2, 0x01, 0x22, 0x01, 0x54, 0x01, 0xa3, + 0x01, 0xe6, 0x01, 0xe7, 0x02, 0x24, 0x02, 0x67); + mipi_dsi_generic_write_seq(dsi, 0xba, + 0x02, 0x93, 0x02, 0xcd, 0x02, 0xf6, 0x03, 0x31, + 0x03, 0x6c, 0x03, 0xe9, 0x03, 0xef, 0x03, 0xf4); + mipi_dsi_generic_write_seq(dsi, 0xbb, 0x03, 0xf6, 0x03, 0xf7); + mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x03); + mipi_dsi_generic_write_seq(dsi, 0xb0, 0x22, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xb1, 0x22, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xb2, 0x05, 0x00, 0x60, 0x00, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xb3, 0x05, 0x00, 0x60, 0x00, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xb4, 0x05, 0x00, 0x60, 0x00, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xb5, 0x05, 0x00, 0x60, 0x00, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xba, 0x53, 0x00, 0x60, 0x00, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xbb, 0x53, 0x00, 0x60, 0x00, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xbc, 0x53, 0x00, 0x60, 0x00, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xbd, 0x53, 0x00, 0x60, 0x00, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xc0, 0x00, 0x34, 0x00, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xc1, 0x00, 0x00, 0x34, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xc2, 0x00, 0x00, 0x34, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xc3, 0x00, 0x00, 0x34, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xc4, 0x60); + mipi_dsi_generic_write_seq(dsi, 0xc5, 0xc0); + mipi_dsi_generic_write_seq(dsi, 0xc6, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xc7, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x05); + mipi_dsi_generic_write_seq(dsi, 0xb0, 0x17, 0x06); + mipi_dsi_generic_write_seq(dsi, 0xb1, 0x17, 0x06); + mipi_dsi_generic_write_seq(dsi, 0xb2, 0x17, 0x06); + mipi_dsi_generic_write_seq(dsi, 0xb3, 0x17, 0x06); + mipi_dsi_generic_write_seq(dsi, 0xb4, 0x17, 0x06); + mipi_dsi_generic_write_seq(dsi, 0xb5, 0x17, 0x06); + mipi_dsi_generic_write_seq(dsi, 0xb6, 0x17, 0x06); + mipi_dsi_generic_write_seq(dsi, 0xb7, 0x17, 0x06); + mipi_dsi_generic_write_seq(dsi, 0xb8, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xb9, 0x00, 0x03); + mipi_dsi_generic_write_seq(dsi, 0xba, 0x00, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xbb, 0x02, 0x03); + mipi_dsi_generic_write_seq(dsi, 0xbc, 0x02, 0x03); + mipi_dsi_generic_write_seq(dsi, 0xbd, 0x03, 0x03, 0x00, 0x03, 0x03); + mipi_dsi_generic_write_seq(dsi, 0xc0, 0x0b); + mipi_dsi_generic_write_seq(dsi, 0xc1, 0x09); + mipi_dsi_generic_write_seq(dsi, 0xc2, 0xa6); + mipi_dsi_generic_write_seq(dsi, 0xc3, 0x05); + mipi_dsi_generic_write_seq(dsi, 0xc4, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xc5, 0x02); + mipi_dsi_generic_write_seq(dsi, 0xc6, 0x22); + mipi_dsi_generic_write_seq(dsi, 0xc7, 0x03); + mipi_dsi_generic_write_seq(dsi, 0xc8, 0x07, 0x20); + mipi_dsi_generic_write_seq(dsi, 0xc9, 0x03, 0x20); + mipi_dsi_generic_write_seq(dsi, 0xca, 0x01, 0x60); + mipi_dsi_generic_write_seq(dsi, 0xcb, 0x01, 0x60); + mipi_dsi_generic_write_seq(dsi, 0xcc, 0x00, 0x00, 0x02); + mipi_dsi_generic_write_seq(dsi, 0xcd, 0x00, 0x00, 0x02); + mipi_dsi_generic_write_seq(dsi, 0xce, 0x00, 0x00, 0x02); + mipi_dsi_generic_write_seq(dsi, 0xcf, 0x00, 0x00, 0x02); + mipi_dsi_generic_write_seq(dsi, 0xd1, 0x00, 0x05, 0x01, 0x07, 0x10); + mipi_dsi_generic_write_seq(dsi, 0xd2, 0x10, 0x05, 0x05, 0x03, 0x10); + mipi_dsi_generic_write_seq(dsi, 0xd3, 0x20, 0x00, 0x43, 0x07, 0x10); + mipi_dsi_generic_write_seq(dsi, 0xd4, 0x30, 0x00, 0x43, 0x07, 0x10); + mipi_dsi_generic_write_seq(dsi, 0xd0, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xd5, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xd6, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xd7, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xd8, 0x00, 0x00, 0x00, 0x00, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xe5, 0x06); + mipi_dsi_generic_write_seq(dsi, 0xe6, 0x06); + mipi_dsi_generic_write_seq(dsi, 0xe7, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xe8, 0x06); + mipi_dsi_generic_write_seq(dsi, 0xe9, 0x06); + mipi_dsi_generic_write_seq(dsi, 0xea, 0x06); + mipi_dsi_generic_write_seq(dsi, 0xeb, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xec, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xed, 0x30); + mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x06); + mipi_dsi_generic_write_seq(dsi, 0xb0, 0x31, 0x31); + mipi_dsi_generic_write_seq(dsi, 0xb1, 0x31, 0x31); + mipi_dsi_generic_write_seq(dsi, 0xb2, 0x2d, 0x2e); + mipi_dsi_generic_write_seq(dsi, 0xb3, 0x31, 0x34); + mipi_dsi_generic_write_seq(dsi, 0xb4, 0x29, 0x2a); + mipi_dsi_generic_write_seq(dsi, 0xb5, 0x12, 0x10); + mipi_dsi_generic_write_seq(dsi, 0xb6, 0x18, 0x16); + mipi_dsi_generic_write_seq(dsi, 0xb7, 0x00, 0x02); + mipi_dsi_generic_write_seq(dsi, 0xb8, 0x08, 0x31); + mipi_dsi_generic_write_seq(dsi, 0xb9, 0x31, 0x31); + mipi_dsi_generic_write_seq(dsi, 0xba, 0x31, 0x31); + mipi_dsi_generic_write_seq(dsi, 0xbb, 0x31, 0x08); + mipi_dsi_generic_write_seq(dsi, 0xbc, 0x03, 0x01); + mipi_dsi_generic_write_seq(dsi, 0xbd, 0x17, 0x19); + mipi_dsi_generic_write_seq(dsi, 0xbe, 0x11, 0x13); + mipi_dsi_generic_write_seq(dsi, 0xbf, 0x2a, 0x29); + mipi_dsi_generic_write_seq(dsi, 0xc0, 0x34, 0x31); + mipi_dsi_generic_write_seq(dsi, 0xc1, 0x2e, 0x2d); + mipi_dsi_generic_write_seq(dsi, 0xc2, 0x31, 0x31); + mipi_dsi_generic_write_seq(dsi, 0xc3, 0x31, 0x31); + mipi_dsi_generic_write_seq(dsi, 0xc4, 0x31, 0x31); + mipi_dsi_generic_write_seq(dsi, 0xc5, 0x31, 0x31); + mipi_dsi_generic_write_seq(dsi, 0xc6, 0x2e, 0x2d); + mipi_dsi_generic_write_seq(dsi, 0xc7, 0x31, 0x34); + mipi_dsi_generic_write_seq(dsi, 0xc8, 0x29, 0x2a); + mipi_dsi_generic_write_seq(dsi, 0xc9, 0x17, 0x19); + mipi_dsi_generic_write_seq(dsi, 0xca, 0x11, 0x13); + mipi_dsi_generic_write_seq(dsi, 0xcb, 0x03, 0x01); + mipi_dsi_generic_write_seq(dsi, 0xcc, 0x08, 0x31); + mipi_dsi_generic_write_seq(dsi, 0xcd, 0x31, 0x31); + mipi_dsi_generic_write_seq(dsi, 0xce, 0x31, 0x31); + mipi_dsi_generic_write_seq(dsi, 0xcf, 0x31, 0x08); + mipi_dsi_generic_write_seq(dsi, 0xd0, 0x00, 0x02); + mipi_dsi_generic_write_seq(dsi, 0xd1, 0x12, 0x10); + mipi_dsi_generic_write_seq(dsi, 0xd2, 0x18, 0x16); + mipi_dsi_generic_write_seq(dsi, 0xd3, 0x2a, 0x29); + mipi_dsi_generic_write_seq(dsi, 0xd4, 0x34, 0x31); + mipi_dsi_generic_write_seq(dsi, 0xd5, 0x2d, 0x2e); + mipi_dsi_generic_write_seq(dsi, 0xd6, 0x31, 0x31); + mipi_dsi_generic_write_seq(dsi, 0xd7, 0x31, 0x31); + mipi_dsi_generic_write_seq(dsi, 0xe5, 0x31, 0x31); + mipi_dsi_generic_write_seq(dsi, 0xe6, 0x31, 0x31); + mipi_dsi_generic_write_seq(dsi, 0xd8, 0x00, 0x00, 0x00, 0x00, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xd9, 0x00, 0x00, 0x00, 0x00, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xe7, 0x00); + mipi_dsi_generic_write_seq(dsi, 0x6f, 0x02); + mipi_dsi_generic_write_seq(dsi, 0xf7, 0x47); + mipi_dsi_generic_write_seq(dsi, 0x6f, 0x0a); + mipi_dsi_generic_write_seq(dsi, 0xf7, 0x02); + mipi_dsi_generic_write_seq(dsi, 0x6f, 0x17); + mipi_dsi_generic_write_seq(dsi, 0xf4, 0x60); + mipi_dsi_generic_write_seq(dsi, 0x6f, 0x01); + mipi_dsi_generic_write_seq(dsi, 0xf9, 0x46); + mipi_dsi_generic_write_seq(dsi, 0x6f, 0x11); + mipi_dsi_generic_write_seq(dsi, 0xf3, 0x01); + mipi_dsi_generic_write_seq(dsi, 0x35, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xd9, 0x02, 0x03, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x00, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x00); + mipi_dsi_generic_write_seq(dsi, 0xb1, 0x6c, 0x21); + mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x00, 0x00); + mipi_dsi_generic_write_seq(dsi, 0x35, 0x00); ret = mipi_dsi_dcs_exit_sleep_mode(dsi); if (ret < 0) { @@ -268,7 +260,7 @@ static int truly_nt35521_on(struct truly_nt35521 *ctx) } usleep_range(1000, 2000); - dsi_generic_write_seq(dsi, 0x53, 0x24); + mipi_dsi_generic_write_seq(dsi, 0x53, 0x24); return 0; } From patchwork Sat Jan 7 19:18:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Javier Martinez Canillas X-Patchwork-Id: 13092320 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AD83AC54EBE for ; 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[92.176.231.205]) by smtp.gmail.com with ESMTPSA id bp28-20020a5d5a9c000000b00273cd321a1bsm4553900wrb.107.2023.01.07.11.18.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Jan 2023 11:18:47 -0800 (PST) From: Javier Martinez Canillas To: linux-kernel@vger.kernel.org Subject: [PATCH v2 13/13] drm/panel-xinpeng-xpp055c272: Drop custom DSI write macro Date: Sat, 7 Jan 2023 20:18:22 +0100 Message-Id: <20230107191822.3787147-14-javierm@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230107191822.3787147-1-javierm@redhat.com> References: <20230107191822.3787147-1-javierm@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sam Ravnborg , Javier Martinez Canillas , dri-devel@lists.freedesktop.org, Thierry Reding Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" There is a macro for this already in the header, use that instead and delete the custom DSI write macro defined in the driver. Signed-off-by: Javier Martinez Canillas Reviewed-by: Sam Ravnborg --- Changes in v2: - Add Sam Ravnborg's Reviewed-by tag. - Fix identation on macro usage (Sam Ravnborg). - Fix generic DSI and DCS commands write discrepancy (Sam Ravnborg). .../gpu/drm/panel/panel-xinpeng-xpp055c272.c | 112 ++++++++---------- 1 file changed, 52 insertions(+), 60 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c b/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c index 2c54733ee241..8670386498a4 100644 --- a/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c +++ b/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c @@ -60,14 +60,6 @@ static inline struct xpp055c272 *panel_to_xpp055c272(struct drm_panel *panel) return container_of(panel, struct xpp055c272, panel); } -#define dsi_generic_write_seq(dsi, cmd, seq...) do { \ - static const u8 b[] = { cmd, seq }; \ - int ret; \ - ret = mipi_dsi_dcs_write_buffer(dsi, b, ARRAY_SIZE(b)); \ - if (ret < 0) \ - return ret; \ - } while (0) - static int xpp055c272_init_sequence(struct xpp055c272 *ctx) { struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); @@ -77,60 +69,60 @@ static int xpp055c272_init_sequence(struct xpp055c272 *ctx) * Init sequence was supplied by the panel vendor without much * documentation. */ - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETEXTC, 0xf1, 0x12, 0x83); - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETMIPI, - 0x33, 0x81, 0x05, 0xf9, 0x0e, 0x0e, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x25, - 0x00, 0x91, 0x0a, 0x00, 0x00, 0x02, 0x4f, 0x01, - 0x00, 0x00, 0x37); - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPOWER_EXT, 0x25); - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPCR, 0x02, 0x11, 0x00); - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETRGBIF, - 0x0c, 0x10, 0x0a, 0x50, 0x03, 0xff, 0x00, 0x00, - 0x00, 0x00); - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETSCR, - 0x73, 0x73, 0x50, 0x50, 0x00, 0x00, 0x08, 0x70, - 0x00); - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETVDC, 0x46); - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPANEL, 0x0b); - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETCYC, 0x80); - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETDISP, 0xc8, 0x12, 0x30); - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETEQ, - 0x07, 0x07, 0x0B, 0x0B, 0x03, 0x0B, 0x00, 0x00, - 0x00, 0x00, 0xFF, 0x00, 0xC0, 0x10); - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPOWER, - 0x53, 0x00, 0x1e, 0x1e, 0x77, 0xe1, 0xcc, 0xdd, - 0x67, 0x77, 0x33, 0x33); - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETECO, 0x00, 0x00, 0xff, - 0xff, 0x01, 0xff); - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETBGP, 0x09, 0x09); + mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETEXTC, 0xf1, 0x12, 0x83); + mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETMIPI, + 0x33, 0x81, 0x05, 0xf9, 0x0e, 0x0e, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x25, + 0x00, 0x91, 0x0a, 0x00, 0x00, 0x02, 0x4f, 0x01, + 0x00, 0x00, 0x37); + mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETPOWER_EXT, 0x25); + mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETPCR, 0x02, 0x11, 0x00); + mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETRGBIF, + 0x0c, 0x10, 0x0a, 0x50, 0x03, 0xff, 0x00, 0x00, + 0x00, 0x00); + mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETSCR, + 0x73, 0x73, 0x50, 0x50, 0x00, 0x00, 0x08, 0x70, + 0x00); + mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETVDC, 0x46); + mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETPANEL, 0x0b); + mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETCYC, 0x80); + mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETDISP, 0xc8, 0x12, 0x30); + mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETEQ, + 0x07, 0x07, 0x0B, 0x0B, 0x03, 0x0B, 0x00, 0x00, + 0x00, 0x00, 0xFF, 0x00, 0xC0, 0x10); + mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETPOWER, + 0x53, 0x00, 0x1e, 0x1e, 0x77, 0xe1, 0xcc, 0xdd, + 0x67, 0x77, 0x33, 0x33); + mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETECO, 0x00, 0x00, 0xff, + 0xff, 0x01, 0xff); + mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETBGP, 0x09, 0x09); msleep(20); - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETVCOM, 0x87, 0x95); - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETGIP1, - 0xc2, 0x10, 0x05, 0x05, 0x10, 0x05, 0xa0, 0x12, - 0x31, 0x23, 0x3f, 0x81, 0x0a, 0xa0, 0x37, 0x18, - 0x00, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x80, - 0x01, 0x00, 0x00, 0x00, 0x48, 0xf8, 0x86, 0x42, - 0x08, 0x88, 0x88, 0x80, 0x88, 0x88, 0x88, 0x58, - 0xf8, 0x87, 0x53, 0x18, 0x88, 0x88, 0x81, 0x88, - 0x88, 0x88, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETGIP2, - 0x00, 0x1a, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x1f, 0x88, 0x81, 0x35, - 0x78, 0x88, 0x88, 0x85, 0x88, 0x88, 0x88, 0x0f, - 0x88, 0x80, 0x24, 0x68, 0x88, 0x88, 0x84, 0x88, - 0x88, 0x88, 0x23, 0x10, 0x00, 0x00, 0x1c, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x05, - 0xa0, 0x00, 0x00, 0x00, 0x00); - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETGAMMA, - 0x00, 0x06, 0x08, 0x2a, 0x31, 0x3f, 0x38, 0x36, - 0x07, 0x0c, 0x0d, 0x11, 0x13, 0x12, 0x13, 0x11, - 0x18, 0x00, 0x06, 0x08, 0x2a, 0x31, 0x3f, 0x38, - 0x36, 0x07, 0x0c, 0x0d, 0x11, 0x13, 0x12, 0x13, - 0x11, 0x18); + mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETVCOM, 0x87, 0x95); + mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETGIP1, + 0xc2, 0x10, 0x05, 0x05, 0x10, 0x05, 0xa0, 0x12, + 0x31, 0x23, 0x3f, 0x81, 0x0a, 0xa0, 0x37, 0x18, + 0x00, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x80, + 0x01, 0x00, 0x00, 0x00, 0x48, 0xf8, 0x86, 0x42, + 0x08, 0x88, 0x88, 0x80, 0x88, 0x88, 0x88, 0x58, + 0xf8, 0x87, 0x53, 0x18, 0x88, 0x88, 0x81, 0x88, + 0x88, 0x88, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); + mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETGIP2, + 0x00, 0x1a, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x1f, 0x88, 0x81, 0x35, + 0x78, 0x88, 0x88, 0x85, 0x88, 0x88, 0x88, 0x0f, + 0x88, 0x80, 0x24, 0x68, 0x88, 0x88, 0x84, 0x88, + 0x88, 0x88, 0x23, 0x10, 0x00, 0x00, 0x1c, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x05, + 0xa0, 0x00, 0x00, 0x00, 0x00); + mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETGAMMA, + 0x00, 0x06, 0x08, 0x2a, 0x31, 0x3f, 0x38, 0x36, + 0x07, 0x0c, 0x0d, 0x11, 0x13, 0x12, 0x13, 0x11, + 0x18, 0x00, 0x06, 0x08, 0x2a, 0x31, 0x3f, 0x38, + 0x36, 0x07, 0x0c, 0x0d, 0x11, 0x13, 0x12, 0x13, + 0x11, 0x18); msleep(60);