From patchwork Mon Jan 9 01:10:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13092818 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23566C678D5 for ; Mon, 9 Jan 2023 01:11:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233575AbjAIBLI (ORCPT ); Sun, 8 Jan 2023 20:11:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36758 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232002AbjAIBK4 (ORCPT ); Sun, 8 Jan 2023 20:10:56 -0500 Received: from mail-lf1-x131.google.com (mail-lf1-x131.google.com [IPv6:2a00:1450:4864:20::131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BA17FE77 for ; Sun, 8 Jan 2023 17:10:54 -0800 (PST) Received: by mail-lf1-x131.google.com with SMTP id d30so5806911lfv.8 for ; Sun, 08 Jan 2023 17:10:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=dL4Xu20jvCsbnyMv0f6YqClfUKZ4GC2lko393EIPIXY=; b=mu6A6jHutpdVwt1f1kSSRftnhL6dc/jUSHEoPVGyrcS9fTxQexylHTYytm6zNVWNP5 mN5UTyjn+EGDAqViRl6c5mXuPCOaTVBbxNhxrwDVv464C7SSRWi1bg7Hj+PPgcxsOG7h 6fQovwEm7siw0QPJ4+aHUjti4DwDEGnn2u8I1KrIKoQsBVc9T3kt4CbAH6NzLHWDUtsx 6a96uq6h7EPh08JNBejiaBTSp/bIOnFenBWpBHirHWQ/3unR+7FpSsL8kWSuHEEtq4Pw LXUgsIrmbYoKu7qO5ADniVawLs54gO7D4ZGfzYgVTJGyYuYN4G7fG6ksSy6yVFmk+4cl KKug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=dL4Xu20jvCsbnyMv0f6YqClfUKZ4GC2lko393EIPIXY=; b=ytA7UUWgfJ7vpJqfCgvpN+HihQUvh+iszzSm7y+yTMPqPMJeRaC6stYN7qB1o6C1FV WQhkGfxM350Zqzc3t/O7DoIis2Qrg0tjFEdrlpsN8FsLeFZ4QvWonfudPvgoy8dZrUo2 VNgViygF67XdXZdem5YJGFGhL6WAGGDSgrZfz61SuOwOyfCEwP/v9JLJyhTKzbkz5YRf WIIqEimC86B9zo7oLsTfvnYQdOTdck/1bh1s6KbRb2ei9KLlMWslRVVbgUvo0u4/FC3f fVqFgqIrLD+5uGsr1T9+r+Bnl3GU/Kx9r0t51BICq676B2MTHqrvIycx2XpqyAdsa+ji iSpA== X-Gm-Message-State: AFqh2krORD7Xq0Ru65ryiB8/9W9fu1W5FNuGv9g1Knwwhktk3jAeUXnC e41p192RIrfUfx/CgKvGD2clLw== X-Google-Smtp-Source: AMrXdXta/OnBThuKG726eVFVun1XP0teA5Lh2eyWBpA+/2JIGddBeg82l3ZtvR1QLol82+UmF4dbGg== X-Received: by 2002:a05:6512:3b27:b0:4ca:94cc:a288 with SMTP id f39-20020a0565123b2700b004ca94cca288mr20786248lfv.27.1673226653079; Sun, 08 Jan 2023 17:10:53 -0800 (PST) Received: from eriador.lan (dzccz6yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id y4-20020a0565123f0400b004cc590975f7sm1324346lfa.183.2023.01.08.17.10.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 Jan 2023 17:10:52 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v4 1/4] dt-bindings: display/msm: convert MDP5 schema to YAML format Date: Mon, 9 Jan 2023 03:10:48 +0200 Message-Id: <20230109011051.263391-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230109011051.263391-1-dmitry.baryshkov@linaro.org> References: <20230109011051.263391-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Convert the mdp5.txt into the yaml format. Changes to the existing (txt) schema: - MSM8996 has additional "iommu" clock, define it separately - Add new properties used on some of platforms: - interconnects, interconnect-names - iommus - power-domains - operating-points-v2, opp-table Signed-off-by: Dmitry Baryshkov --- .../devicetree/bindings/display/msm/mdp5.txt | 132 ----------------- .../bindings/display/msm/qcom,mdp5.yaml | 138 ++++++++++++++++++ 2 files changed, 138 insertions(+), 132 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/msm/mdp5.txt create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml diff --git a/Documentation/devicetree/bindings/display/msm/mdp5.txt b/Documentation/devicetree/bindings/display/msm/mdp5.txt deleted file mode 100644 index 65d03c58dee6..000000000000 --- a/Documentation/devicetree/bindings/display/msm/mdp5.txt +++ /dev/null @@ -1,132 +0,0 @@ -Qualcomm adreno/snapdragon MDP5 display controller - -Description: - -This is the bindings documentation for the MDP5 display -controller found in SoCs like MSM8974, APQ8084, MSM8916, MSM8994 and MSM8996. - -MDP5: -Required properties: -- compatible: - * "qcom,mdp5" - MDP5 -- reg: Physical base address and length of the controller's registers. -- reg-names: The names of register regions. The following regions are required: - * "mdp_phys" -- interrupts: Interrupt line from MDP5 to MDSS interrupt controller. -- clocks: device clocks. See ../clocks/clock-bindings.txt for details. -- clock-names: the following clocks are required. -- * "bus" -- * "iface" -- * "core" -- * "vsync" -- ports: contains the list of output ports from MDP. These connect to interfaces - that are external to the MDP hardware, such as HDMI, DSI, EDP etc (LVDS is a - special case since it is a part of the MDP block itself). - - Each output port contains an endpoint that describes how it is connected to an - external interface. These are described by the standard properties documented - here: - Documentation/devicetree/bindings/graph.txt - Documentation/devicetree/bindings/media/video-interfaces.txt - - The availability of output ports can vary across SoC revisions: - - For MSM8974 and APQ8084: - Port 0 -> MDP_INTF0 (eDP) - Port 1 -> MDP_INTF1 (DSI1) - Port 2 -> MDP_INTF2 (DSI2) - Port 3 -> MDP_INTF3 (HDMI) - - For MSM8916: - Port 0 -> MDP_INTF1 (DSI1) - - For MSM8994 and MSM8996: - Port 0 -> MDP_INTF1 (DSI1) - Port 1 -> MDP_INTF2 (DSI2) - Port 2 -> MDP_INTF3 (HDMI) - -Optional properties: -- clock-names: the following clocks are optional: - * "lut" - * "tbu" - * "tbu_rt" - -Example: - -/ { - ... - - mdss: mdss@1a00000 { - compatible = "qcom,mdss"; - reg = <0x1a00000 0x1000>, - <0x1ac8000 0x3000>; - reg-names = "mdss_phys", "vbif_phys"; - - power-domains = <&gcc MDSS_GDSC>; - - clocks = <&gcc GCC_MDSS_AHB_CLK>, - <&gcc GCC_MDSS_AXI_CLK>, - <&gcc GCC_MDSS_VSYNC_CLK>; - clock-names = "iface", - "bus", - "vsync" - - interrupts = <0 72 0>; - - interrupt-controller; - #interrupt-cells = <1>; - - #address-cells = <1>; - #size-cells = <1>; - ranges; - - mdp: mdp@1a01000 { - compatible = "qcom,mdp5"; - reg = <0x1a01000 0x90000>; - reg-names = "mdp_phys"; - - interrupt-parent = <&mdss>; - interrupts = <0 0>; - - clocks = <&gcc GCC_MDSS_AHB_CLK>, - <&gcc GCC_MDSS_AXI_CLK>, - <&gcc GCC_MDSS_MDP_CLK>, - <&gcc GCC_MDSS_VSYNC_CLK>; - clock-names = "iface", - "bus", - "core", - "vsync"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - mdp5_intf1_out: endpoint { - remote-endpoint = <&dsi0_in>; - }; - }; - }; - }; - - dsi0: dsi@1a98000 { - ... - ports { - ... - port@0 { - reg = <0>; - dsi0_in: endpoint { - remote-endpoint = <&mdp5_intf1_out>; - }; - }; - ... - }; - ... - }; - - dsi_phy0: dsi-phy@1a98300 { - ... - }; - }; -}; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml b/Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml new file mode 100644 index 000000000000..cbcbe8b47e9b --- /dev/null +++ b/Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml @@ -0,0 +1,138 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/qcom,mdp5.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Adreno/Snapdragon Mobile Display controller (MDP5) + +description: > + MDP5 display controller found in SoCs like MSM8974, APQ8084, MSM8916, MSM8994 + and MSM8996. + +maintainers: + - Dmitry Baryshkov + - Rob Clark + +properties: + compatible: + const: qcom,mdp5 + + reg: + maxItems: 1 + + reg-names: + items: + - const: mdp_phys + + interrupts: + maxItems: 1 + + clocks: + minItems: 4 + maxItems: 7 + + clock-names: + oneOf: + - minItems: 4 + items: + - const: iface + - const: bus + - const: core + - const: vsync + - const: lut + - const: tbu + - const: tbu_rt + #MSM8996 has additional iommu clock + - items: + - const: iface + - const: bus + - const: core + - const: iommu + - const: vsync + + interconnects: + minItems: 1 + items: + - description: Interconnect path from mdp0 (or a single mdp) port to the data bus + - description: Interconnect path from mdp1 port to the data bus + - description: Interconnect path from rotator port to the data bus + + interconnect-names: + minItems: 1 + items: + - const: mdp0-mem + - const: mdp1-mem + - const: rotator-mem + + iommus: + items: + - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0 + + power-domains: + maxItems: 1 + + operating-points-v2: true + opp-table: + type: object + + ports: + $ref: /schemas/graph.yaml#/properties/ports + description: | + Contains the list of output ports from DPU device. These ports + connect to interfaces that are external to the DPU hardware, + such as DSI, DP etc. MDP5 devices support up to 4 ports:: + one or two DSI ports, HDMI and eDP. + + patternProperties: + "^port@[0-3]+$": + $ref: /schemas/graph.yaml#/properties/port + + # at least one port is required + required: + - port@0 + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - ports + +additionalProperties: false + +examples: + - | + #include + #include + display-controller@1a01000 { + compatible = "qcom,mdp5"; + reg = <0x1a01000 0x90000>; + reg-names = "mdp_phys"; + + interrupt-parent = <&mdss>; + interrupts = <0>; + + clocks = <&gcc GCC_MDSS_AHB_CLK>, + <&gcc GCC_MDSS_AXI_CLK>, + <&gcc GCC_MDSS_MDP_CLK>, + <&gcc GCC_MDSS_VSYNC_CLK>; + clock-names = "iface", + "bus", + "core", + "vsync"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; + }; + }; +... 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[2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id y4-20020a0565123f0400b004cc590975f7sm1324346lfa.183.2023.01.08.17.10.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 Jan 2023 17:10:53 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v4 2/4] dt-bindings: display/msm: add SoC-specific compats to qcom,mdp5.yaml Date: Mon, 9 Jan 2023 03:10:49 +0200 Message-Id: <20230109011051.263391-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230109011051.263391-1-dmitry.baryshkov@linaro.org> References: <20230109011051.263391-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add platform-specific compatible entries to the qcom,mdp5.yaml to allow distinguishing between various platforms. For msm8998 list qcom,msm8998-dpu rather than -mdp5 to allow this binding to be handled by either of the drivers. Signed-off-by: Dmitry Baryshkov --- .../bindings/display/msm/qcom,mdp5.yaml | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml b/Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml index cbcbe8b47e9b..681d6ac48d33 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml @@ -16,7 +16,22 @@ maintainers: properties: compatible: - const: qcom,mdp5 + oneOf: + - const: qcom,mdp5 + deprecated: true + - items: + - enum: + - qcom,apq8084-mdp5 + - qcom,msm8916-mdp5 + - qcom,msm8917-mdp5 + - qcom,msm8953-mdp5 + - qcom,msm8974-mdp5 + - qcom,msm8976-mdp5 + - qcom,msm8994-mdp5 + - qcom,msm8996-mdp5 + - qcom,sdm630-mdp5 + - qcom,sdm660-mdp5 + - const: qcom,mdp5 reg: maxItems: 1 From patchwork Mon Jan 9 01:10:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13092820 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E764EC61DB3 for ; Mon, 9 Jan 2023 01:11:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233652AbjAIBLL (ORCPT ); Sun, 8 Jan 2023 20:11:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36772 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233641AbjAIBK7 (ORCPT ); Sun, 8 Jan 2023 20:10:59 -0500 Received: from mail-lf1-x12b.google.com (mail-lf1-x12b.google.com [IPv6:2a00:1450:4864:20::12b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0F45D1092 for ; Sun, 8 Jan 2023 17:10:56 -0800 (PST) Received: by mail-lf1-x12b.google.com with SMTP id bf43so10726165lfb.6 for ; Sun, 08 Jan 2023 17:10:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=yO6+pl3S8OkJkK2cFQimnv5gJx6WicWkwN1eiLMeT7Q=; b=Vsz2WQvesd6Tz/AJqarptl/OBMOqv9EH82JbvOaC98ZXf1mgVYR+eLkGuG3ygXVYSP fi0uRsd/UvZwjmeJjrDHo8TkeRzCpMJ7vPKDQgAPslTSCKBouJ1P4c8iuvU3d0WVji8s kPtpuMZiw9T+NXwtWb8OGTxwTYif2D0rOoylBtaHLEsxq2SiDavUT3q+VctVo5g2U8hf GPQsNHyZEI+HeES2uVxYhKdrM3X2U4ZS5IMSeGnS+8szqCt+084vcziYC4E3MdhR4aZt yxoz1xN7ienhEzr/j2J/HDwNj+JaFWRSZPBv43hQ3gUJzeq7xIgOjysEZcZ7yX8kEoEj pSXw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yO6+pl3S8OkJkK2cFQimnv5gJx6WicWkwN1eiLMeT7Q=; b=S1JMuQUMKv0Rj0yZXWiOI6cPIb3PdrfVj9VKb60Sj4LR0LXEKiCmC/Q9nrMbQlWYxU V2tvw7DRvEzi1lkY1ooYSQ36aP4scysZiu7nwp2QbLqkWcT1guCQSIR/IM4JgFwRXJX2 RMm/r/LK8u0dbIpRckKZsRD4sFJ2+1m5HJ4XDT4UycXHGp71BVrBEQQ8TQ+AErb+LfJo WnU+YA4WAKKyYiPoweTUEa6e5wKSUtnHy5I0o2Vlg4xim4SZ/TGDRmy51YsYQ4Xe0KRS qW5Xj8TslE9dD6kPiOz7xpKb9Nkm+DrWE8Th+RXZOSqwcTX/Un3pAlurYPgM077dXnYX KCHA== X-Gm-Message-State: AFqh2krvA6qaPbh8sW5DY3y8Kf6hT/Xw2Ezmc+hz4tKoKcGnzR8BNQL2 UDMjRxHiVOfNk+7DTUqt1SZs0w== X-Google-Smtp-Source: AMrXdXv2hWpbxPQMuDdYGKPXDGoAnivFnkcYWNDLosztuDcFM30jI24yfADvP/twwdv+3nd0CpkU5A== X-Received: by 2002:a05:6512:23a3:b0:4cb:6bcb:de4e with SMTP id c35-20020a05651223a300b004cb6bcbde4emr5312952lfv.24.1673226654486; Sun, 08 Jan 2023 17:10:54 -0800 (PST) Received: from eriador.lan (dzccz6yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id y4-20020a0565123f0400b004cc590975f7sm1324346lfa.183.2023.01.08.17.10.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 Jan 2023 17:10:54 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v4 3/4] ARM: dts: qcom-msm8974: add SoC specific compat string to mdp5 node Date: Mon, 9 Jan 2023 03:10:50 +0200 Message-Id: <20230109011051.263391-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230109011051.263391-1-dmitry.baryshkov@linaro.org> References: <20230109011051.263391-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add SoC-specific compat string to the MDP5 device node to ease distinguishing between various platforms. Signed-off-by: Dmitry Baryshkov --- arch/arm/boot/dts/qcom-msm8974.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 8d216a3c0851..0cd59088f9c7 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -1549,7 +1549,7 @@ mdss: mdss@fd900000 { ranges; mdp: mdp@fd900000 { - compatible = "qcom,mdp5"; + compatible = "qcom,msm8974-mdp5", "qcom,mdp5"; reg = <0xfd900100 0x22000>; reg-names = "mdp_phys"; From patchwork Mon Jan 9 01:10:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13092819 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5840DC54EBC for ; Mon, 9 Jan 2023 01:11:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232002AbjAIBLK (ORCPT ); Sun, 8 Jan 2023 20:11:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36776 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233652AbjAIBK7 (ORCPT ); Sun, 8 Jan 2023 20:10:59 -0500 Received: from mail-lf1-x12c.google.com (mail-lf1-x12c.google.com [IPv6:2a00:1450:4864:20::12c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A591310A6 for ; Sun, 8 Jan 2023 17:10:56 -0800 (PST) Received: by mail-lf1-x12c.google.com with SMTP id bf43so10726185lfb.6 for ; Sun, 08 Jan 2023 17:10:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Mrb15vphKcBSHFcYnw0cLYDDRYFrhAD7+lVEbzPfwQ8=; b=DzjwldrFRM/SHHoKRzWBMA+AWaV82fo68viuncsnu8O6OiRuHEykHxc2ysDVOHDjbP kn81BvGTDs0gof2CapyMiIrOr/6ytEEfM1wXufOCNSVJDh2q1mZHtZGllsPphoGbgwJ6 dLrsI9ipfN6JEYtmVzHWHBf6MFOYlifDevxP2hWyKIw9ipZepsRsvXS+DpKrhuhgde0t Rs2YWAAaiYoJponbu6BJMQDDWthCPg9PGMGmCc0xL4THu4CZlzpW1/qHPJoz7BOokw1v dyYCIf38xSmzGW/HytkkWlAdS4af/ht6XxwpQB4qtRsiGp6rE/reaNuz1pmUgmSMhDI1 MDiA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Mrb15vphKcBSHFcYnw0cLYDDRYFrhAD7+lVEbzPfwQ8=; b=jHZRP/bC4qAPGDYQfwSlm5l3Bj71EVEQpo/8Ajja3iTGqNMAMI8KVayGSHBcoAeR3M VdnN2ybi7nqhaBrz2/+P6c+MkzwHTrET26xCkfxMiSq/GTw3oaQadhrTi02xuBuNPXBx pGi29LLLVyQJc3qldn2VHhz3AKdgnAPZLlaLic21IA+/oYeQjnq1YqMn5a43T/eo5X7N QN0FfoioW376Ygs1fC4ZcaP5Nrckix4WaJS5qAa2tV1fmfXl2tEz+yZgNyAAcOnkthXi KUcgBSenUa/dEh0zmi8GG2UBhRLPwho6F63CX9fWbhpjZ84QE/P61WXwVeWBYq3po0XI GYNw== X-Gm-Message-State: AFqh2kqZpJMmVbePmRPq/Z6jelrEThvPxFAV9mJURvhyMXJE8H9oCOxF v5IiEGMEwfW7742/qNOHscFpUA== X-Google-Smtp-Source: AMrXdXvcAYu2xtCiIMX6dwNaNYih1HPUhZuiR2pXIWP+JTUcaZUXj6ag6IHHhJ8aHyhW++d6psWa0A== X-Received: by 2002:ac2:5dd9:0:b0:4b5:9365:cd4f with SMTP id x25-20020ac25dd9000000b004b59365cd4fmr16354288lfq.42.1673226655092; Sun, 08 Jan 2023 17:10:55 -0800 (PST) Received: from eriador.lan (dzccz6yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id y4-20020a0565123f0400b004cc590975f7sm1324346lfa.183.2023.01.08.17.10.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 Jan 2023 17:10:54 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v4 4/4] arm64: dts: qcom: add SoC specific compat strings to mdp5 nodes Date: Mon, 9 Jan 2023 03:10:51 +0200 Message-Id: <20230109011051.263391-5-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230109011051.263391-1-dmitry.baryshkov@linaro.org> References: <20230109011051.263391-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add SoC-specific compat string to the MDP5 device nodes to ease distinguishing between various platforms. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 2 +- arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 +- arch/arm64/boot/dts/qcom/sdm630.dtsi | 2 +- arch/arm64/boot/dts/qcom/sdm660.dtsi | 2 ++ 4 files changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 2ca8e977fc2a..0a23fb6efae8 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -989,7 +989,7 @@ mdss: mdss@1a00000 { ranges; mdp: mdp@1a01000 { - compatible = "qcom,mdp5"; + compatible = "qcom,msm8916-mdp5", "qcom,mdp5"; reg = <0x01a01000 0x89000>; reg-names = "mdp_phys"; diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index d31464204f69..b5cd1bcad5eb 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -931,7 +931,7 @@ mdss: mdss@900000 { status = "disabled"; mdp: mdp@901000 { - compatible = "qcom,mdp5"; + compatible = "qcom,msm8996-mdp5", "qcom,mdp5"; reg = <0x00901000 0x90000>; reg-names = "mdp_phys"; diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 13e6a4fbba27..65addd4c672e 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -1498,7 +1498,7 @@ mdss: mdss@c900000 { status = "disabled"; mdp: mdp@c901000 { - compatible = "qcom,mdp5"; + compatible = "qcom,sdm630-mdp5", "qcom,mdp5"; reg = <0x0c901000 0x89000>; reg-names = "mdp_phys"; diff --git a/arch/arm64/boot/dts/qcom/sdm660.dtsi b/arch/arm64/boot/dts/qcom/sdm660.dtsi index d52123cb5cd3..cdaa0d7a66f3 100644 --- a/arch/arm64/boot/dts/qcom/sdm660.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm660.dtsi @@ -142,6 +142,8 @@ &gpucc { }; &mdp { + compatible = "qcom,sdm660-mdp5", "qcom,mdp5"; + ports { port@1 { reg = <1>;