From patchwork Thu Jan 12 02:24:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Brown X-Patchwork-Id: 13097374 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DCD49C46467 for ; Thu, 12 Jan 2023 02:24:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230201AbjALCYq (ORCPT ); Wed, 11 Jan 2023 21:24:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41168 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236145AbjALCYo (ORCPT ); Wed, 11 Jan 2023 21:24:44 -0500 Received: from mail-pj1-x102a.google.com (mail-pj1-x102a.google.com [IPv6:2607:f8b0:4864:20::102a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A3DFD4565B for ; Wed, 11 Jan 2023 18:24:43 -0800 (PST) Received: by mail-pj1-x102a.google.com with SMTP id dw9so16307497pjb.5 for ; Wed, 11 Jan 2023 18:24:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=schmorgal.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=03eAFj9VhLKHE3IgtLCemPDAW1kmJII0gHscpQ7Af5w=; b=NaeGT+ZHNnDqVq6wHYwLgqS3MCHmyUtekrP6W+D8fY4wOOETOwqwh9ivS1bP4rnmBj pDiu6GOUTHXLIBlINQmoVEwxJdzkei277kLCuTn2AjBapRmjGBnvcXGg8j0eAf6LR3xy s92HZ1KtwO2AYF5hKZShi69Xs6r7tSYGQblQE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=03eAFj9VhLKHE3IgtLCemPDAW1kmJII0gHscpQ7Af5w=; b=xjkuVY70EDokhUTfMH/625AfEnnKR482VfWYHfOUkvxk1nbqHogGTc7Sd7NkQFV6NC y5AgmjRMc/0Pt3XbVRkNtCzVMC4PCazND/uh12e6q096eZ2eWZlq8a+qQwod7YmRszGD IBVTkkh3CYijsOU/gcGyKKzTaIqpm9ldosdY9E6WOC30Vkc2JncuFl4g3vtBZQIGVYqa iU1uJhWtIxCirHKEyigzgDvxOFdnNPnH/9inmPpPJZ44g2VShbP9iOdKrVJSgJKjy7Pt xATOSseKr7vnBRYyvAyLBari0fQuIwL8VnK30CiAd5d/IyKsDhkk0zlqLfwKxOIjwL0f PoXA== X-Gm-Message-State: AFqh2kpgpiz9M1Bl5mqJGjWKGhDn6LkXH2gRNBGf1saR18OLxS3SASNL RPJgdj4DJCoiW/4zGof5aBt70g== X-Google-Smtp-Source: AMrXdXueLe3ArJ0YcRr4V8ldwL628GLgmHIiB/vcHzF0uEqhpfYdwI+1U07Nt4oSzbXFLjKReQUcHg== X-Received: by 2002:a17:902:bb97:b0:193:24bf:345e with SMTP id m23-20020a170902bb9700b0019324bf345emr14901419pls.62.1673490283094; Wed, 11 Jan 2023 18:24:43 -0800 (PST) Received: from doug-ryzen-5700G.. ([192.183.212.197]) by smtp.gmail.com with ESMTPSA id a1-20020a1709027e4100b00193020e8a90sm10759135pln.294.2023.01.11.18.24.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Jan 2023 18:24:42 -0800 (PST) From: Doug Brown To: Ulf Hansson , Adrian Hunter Cc: Rob Herring , Krzysztof Kozlowski , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, Doug Brown Subject: [PATCH v4 1/8] mmc: sdhci-pxav2: add initial support for PXA168 V1 controller Date: Wed, 11 Jan 2023 18:24:09 -0800 Message-Id: <20230112022416.8474-2-doug@schmorgal.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230112022416.8474-1-doug@schmorgal.com> References: <20230112022416.8474-1-doug@schmorgal.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Add a new compatible string for the version 1 controller used in the PXA168, along with necessary quirks. Use a separate ops struct in preparation for a silicon bug workaround only necessary on V1. Signed-off-by: Doug Brown Acked-by: Adrian Hunter --- drivers/mmc/host/sdhci-pxav2.c | 40 +++++++++++++++++++++++++++------- 1 file changed, 32 insertions(+), 8 deletions(-) diff --git a/drivers/mmc/host/sdhci-pxav2.c b/drivers/mmc/host/sdhci-pxav2.c index f18906b5575f..5707d597ecae 100644 --- a/drivers/mmc/host/sdhci-pxav2.c +++ b/drivers/mmc/host/sdhci-pxav2.c @@ -101,6 +101,24 @@ static void pxav2_mmc_set_bus_width(struct sdhci_host *host, int width) writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL); } +struct sdhci_pxa_variant { + const struct sdhci_ops *ops; + unsigned int extra_quirks; +}; + +static const struct sdhci_ops pxav1_sdhci_ops = { + .set_clock = sdhci_set_clock, + .get_max_clock = sdhci_pltfm_clk_get_max_clock, + .set_bus_width = pxav2_mmc_set_bus_width, + .reset = pxav2_reset, + .set_uhs_signaling = sdhci_set_uhs_signaling, +}; + +static const struct sdhci_pxa_variant __maybe_unused pxav1_variant = { + .ops = &pxav1_sdhci_ops, + .extra_quirks = SDHCI_QUIRK_NO_BUSY_IRQ | SDHCI_QUIRK_32BIT_DMA_SIZE, +}; + static const struct sdhci_ops pxav2_sdhci_ops = { .set_clock = sdhci_set_clock, .get_max_clock = sdhci_pltfm_clk_get_max_clock, @@ -109,11 +127,14 @@ static const struct sdhci_ops pxav2_sdhci_ops = { .set_uhs_signaling = sdhci_set_uhs_signaling, }; +static const struct sdhci_pxa_variant pxav2_variant = { + .ops = &pxav2_sdhci_ops, +}; + #ifdef CONFIG_OF static const struct of_device_id sdhci_pxav2_of_match[] = { - { - .compatible = "mrvl,pxav2-mmc", - }, + { .compatible = "mrvl,pxav1-mmc", .data = &pxav1_variant, }, + { .compatible = "mrvl,pxav2-mmc", .data = &pxav2_variant, }, {}, }; MODULE_DEVICE_TABLE(of, sdhci_pxav2_of_match); @@ -157,7 +178,7 @@ static int sdhci_pxav2_probe(struct platform_device *pdev) struct sdhci_pxa_platdata *pdata = pdev->dev.platform_data; struct device *dev = &pdev->dev; struct sdhci_host *host = NULL; - const struct of_device_id *match; + const struct sdhci_pxa_variant *variant; int ret; struct clk *clk; @@ -185,10 +206,12 @@ static int sdhci_pxav2_probe(struct platform_device *pdev) | SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN; - match = of_match_device(of_match_ptr(sdhci_pxav2_of_match), &pdev->dev); - if (match) { + variant = of_device_get_match_data(dev); + if (variant) pdata = pxav2_get_mmc_pdata(dev); - } + else + variant = &pxav2_variant; + if (pdata) { if (pdata->flags & PXA_FLAG_CARD_PERMANENT) { /* on-chip device */ @@ -208,7 +231,8 @@ static int sdhci_pxav2_probe(struct platform_device *pdev) host->mmc->pm_caps |= pdata->pm_caps; } - host->ops = &pxav2_sdhci_ops; + host->quirks |= variant->extra_quirks; + host->ops = variant->ops; ret = sdhci_add_host(host); if (ret) From patchwork Thu Jan 12 02:24:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Brown X-Patchwork-Id: 13097375 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 57BE5C5479D for ; Thu, 12 Jan 2023 02:24:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236389AbjALCYt (ORCPT ); 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([192.183.212.197]) by smtp.gmail.com with ESMTPSA id a1-20020a1709027e4100b00193020e8a90sm10759135pln.294.2023.01.11.18.24.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Jan 2023 18:24:45 -0800 (PST) From: Doug Brown To: Ulf Hansson , Adrian Hunter Cc: Rob Herring , Krzysztof Kozlowski , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, Doug Brown Subject: [PATCH v4 2/8] mmc: sdhci-pxav2: enable CONFIG_MMC_SDHCI_IO_ACCESSORS Date: Wed, 11 Jan 2023 18:24:10 -0800 Message-Id: <20230112022416.8474-3-doug@schmorgal.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230112022416.8474-1-doug@schmorgal.com> References: <20230112022416.8474-1-doug@schmorgal.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Enable CONFIG_MMC_SDHCI_IO_ACCESSORS for the pxav2 driver. The read_w callback is needed for a silicon bug workaround in the PXA168. Signed-off-by: Doug Brown Acked-by: Adrian Hunter --- drivers/mmc/host/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index 5e19a961c34d..b9e9185c86a6 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -360,6 +360,7 @@ config MMC_SDHCI_PXAV2 depends on MMC_SDHCI_PLTFM depends on ARCH_MMP || COMPILE_TEST default CPU_PXA910 + select MMC_SDHCI_IO_ACCESSORS help This selects the Marvell(R) PXAV2 SD Host Controller. If you have a PXA9XX platform with SD Host Controller From patchwork Thu Jan 12 02:24:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Brown X-Patchwork-Id: 13097376 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4F649C46467 for ; Thu, 12 Jan 2023 02:24:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235584AbjALCYv (ORCPT ); Wed, 11 Jan 2023 21:24:51 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41216 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236149AbjALCYt (ORCPT ); Wed, 11 Jan 2023 21:24:49 -0500 Received: from mail-pj1-x1031.google.com (mail-pj1-x1031.google.com [IPv6:2607:f8b0:4864:20::1031]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9E68945667 for ; Wed, 11 Jan 2023 18:24:48 -0800 (PST) Received: by mail-pj1-x1031.google.com with SMTP id o1-20020a17090a678100b00219cf69e5f0so22090364pjj.2 for ; Wed, 11 Jan 2023 18:24:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=schmorgal.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=p1/rux+dB2ue+u77r+Lmx539KLyGVCKrU+T8EBWwu5M=; b=BCgXNyeKTVBT9UE6QAv6NmVnff6UTk9WyIeZsC/z2ZVmo1faxKQ3YA206RrErs6MF3 XZA+R7YDuKksSYOCsjmYPJqFeVWi6Mw1IL2gYKnYI3MKtl7hj1m3e9pnWVB8TpEdy0y8 zPmtwfGm863DRYUHZpZM6f649LY/TGdJC6Cyg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=p1/rux+dB2ue+u77r+Lmx539KLyGVCKrU+T8EBWwu5M=; b=Z76dmhlfNvlFd3/PsS/51SX17x07ULi+vl1rnrKv3AfTR8AqdgSsJ3v324xrhclqHM PD83odX8lVRq4pARKDECRavtaboRLuCl4dQBBElmYmek7VgYdc2jYQ+V9hZCLBghoNGT Jhdr7RiogUbulKPJx5MiJtw8MB05JiZMPs3lfh2HGT5shiFwgL5pcpZ/K3FCeq8MtEFc 0eKhPUYhyWXZWSP/Y5hbyj7oTFapaMNmVSRgBSjulcHJHYybQHOxp4mbRpGL+WhpvubB +Ip4whPblYiMz2y2OGn8I5lCTh0wqLXKlGaBPowZROmXfayo5QeUv21d4mZG7/7G8rQn Pb6A== X-Gm-Message-State: AFqh2kq6emH3EBUJ2dyXi4YgOyVuDMrIQETqH/y7B7arltCDeuB37yFi 4n35NkF5vL3sBA5dHsyVlqv68w== X-Google-Smtp-Source: AMrXdXvECWA8coKk4wsGAHUYpVCwg7e0sEcYrN8RFbpskoFvlfaqSiO9qS48kVhqHzDEYmq4zRN54w== X-Received: by 2002:a17:903:32d1:b0:191:3b7b:3c2c with SMTP id i17-20020a17090332d100b001913b7b3c2cmr6720108plr.22.1673490288056; Wed, 11 Jan 2023 18:24:48 -0800 (PST) Received: from doug-ryzen-5700G.. ([192.183.212.197]) by smtp.gmail.com with ESMTPSA id a1-20020a1709027e4100b00193020e8a90sm10759135pln.294.2023.01.11.18.24.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Jan 2023 18:24:47 -0800 (PST) From: Doug Brown To: Ulf Hansson , Adrian Hunter Cc: Rob Herring , Krzysztof Kozlowski , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, Doug Brown Subject: [PATCH v4 3/8] mmc: sdhci-pxav2: add register workaround for PXA168 silicon bug Date: Wed, 11 Jan 2023 18:24:11 -0800 Message-Id: <20230112022416.8474-4-doug@schmorgal.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230112022416.8474-1-doug@schmorgal.com> References: <20230112022416.8474-1-doug@schmorgal.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org The PXA168 has a documented silicon bug that results in a data abort exception when accessing the SDHCI_HOST_VERSION register on SDH2 and SDH4 through a 16-bit read. Implement the workaround described in the errata, which performs a 32-bit read from a lower address instead. This is safe to use on all four SDH peripherals. Signed-off-by: Doug Brown Acked-by: Adrian Hunter --- drivers/mmc/host/sdhci-pxav2.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/mmc/host/sdhci-pxav2.c b/drivers/mmc/host/sdhci-pxav2.c index 5707d597ecae..5e01dab94426 100644 --- a/drivers/mmc/host/sdhci-pxav2.c +++ b/drivers/mmc/host/sdhci-pxav2.c @@ -80,6 +80,15 @@ static void pxav2_reset(struct sdhci_host *host, u8 mask) } } +static u16 pxav1_readw(struct sdhci_host *host, int reg) +{ + /* Workaround for data abort exception on SDH2 and SDH4 on PXA168 */ + if (reg == SDHCI_HOST_VERSION) + return readl(host->ioaddr + SDHCI_HOST_VERSION - 2) >> 16; + + return readw(host->ioaddr + reg); +} + static void pxav2_mmc_set_bus_width(struct sdhci_host *host, int width) { u8 ctrl; @@ -107,6 +116,7 @@ struct sdhci_pxa_variant { }; static const struct sdhci_ops pxav1_sdhci_ops = { + .read_w = pxav1_readw, .set_clock = sdhci_set_clock, .get_max_clock = sdhci_pltfm_clk_get_max_clock, .set_bus_width = pxav2_mmc_set_bus_width, From patchwork Thu Jan 12 02:24:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Brown X-Patchwork-Id: 13097377 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E7A13C63797 for ; Thu, 12 Jan 2023 02:24:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231698AbjALCYx (ORCPT ); Wed, 11 Jan 2023 21:24:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41258 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232981AbjALCYw (ORCPT ); Wed, 11 Jan 2023 21:24:52 -0500 Received: from mail-pj1-x1034.google.com (mail-pj1-x1034.google.com [IPv6:2607:f8b0:4864:20::1034]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E9BE845667 for ; Wed, 11 Jan 2023 18:24:50 -0800 (PST) Received: by mail-pj1-x1034.google.com with SMTP id o7-20020a17090a0a0700b00226c9b82c3aso19286480pjo.3 for ; Wed, 11 Jan 2023 18:24:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=schmorgal.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=WqYz5wS1ns0kl8A6NpaJdCKujdrpwt6VlQVEZ72mUB8=; b=QOS7WiMWfYDs1y9SsDzoqFHoFj7KVINu8oto0dX/B6GFNqulWAzxAp+uuhFK3iYu8k eE/ZlXLP0sEW3NZMh3Z8J4rNno2ReLv5d72TYum/ZEmFuVR6LTK2Q++p53KfBz0vyVjH wzlBBZAQX90fr0Lgo1YaTCEqILhuOWLPTbxJc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WqYz5wS1ns0kl8A6NpaJdCKujdrpwt6VlQVEZ72mUB8=; b=R0DngEoTNiwr3gG6bRkWL8RsA9yzCzqRYCc2MZYAsvfR0YAwLwgjUlVUAByQloxY0o 9KgBXkJeN0bBSMVgpfhkDzfAm97nbCPJCI7g7mNVHliTnFHnKkWmsU9ghGJXXtYKTwdn QZY7A62iNNAxnBcKFtQrfadTsStU5D7N6ve0P4Mh6nmBq/XMngDi6rZbFr1lk/SrKf0T 6YwKe5j399yZLmOMJscH9199ojrSvzv8DryY+eAS0VBNrFAZMrsCDpvX0KDiZ4F9Bmp2 PEE8gYm5kHWtsJCtpeq1z3wnSoflyTdjShzLCBkm3pvpiH7LJPLUJmKP0tIt9OYaZOmR LEUA== X-Gm-Message-State: AFqh2kqwswHqNNwecNfLBhVVJJfiZ1V5VbaVa+dShRn8EJ+dxlI66vPC zXgFMyWaT/uuGbmKQBDwvaW98Q== X-Google-Smtp-Source: AMrXdXs8YVTtSgtQI0SsDou7pLushjCRXkuTArvOSq3Ndys0bT4xBEwdBNDh0JBZYvvWwqWbCtdAWw== X-Received: by 2002:a17:902:9a88:b0:194:4449:56ef with SMTP id w8-20020a1709029a8800b00194444956efmr6825629plp.30.1673490290516; Wed, 11 Jan 2023 18:24:50 -0800 (PST) Received: from doug-ryzen-5700G.. ([192.183.212.197]) by smtp.gmail.com with ESMTPSA id a1-20020a1709027e4100b00193020e8a90sm10759135pln.294.2023.01.11.18.24.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Jan 2023 18:24:49 -0800 (PST) From: Doug Brown To: Ulf Hansson , Adrian Hunter Cc: Rob Herring , Krzysztof Kozlowski , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, Doug Brown Subject: [PATCH v4 4/8] mmc: sdhci-pxav2: change clock name to match DT bindings Date: Wed, 11 Jan 2023 18:24:12 -0800 Message-Id: <20230112022416.8474-5-doug@schmorgal.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230112022416.8474-1-doug@schmorgal.com> References: <20230112022416.8474-1-doug@schmorgal.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org The devicetree bindings for this driver specify that the two allowed clock names are io and core. Change this driver to look for io, but allow any name if it fails for backwards compatibility. Follow the same pattern used in sdhci-pxav3, but add support for EPROBE_DEFER. Get rid of an unnecessary pdev->dev while we're at it. Signed-off-by: Doug Brown Acked-by: Adrian Hunter --- drivers/mmc/host/sdhci-pxav2.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/sdhci-pxav2.c b/drivers/mmc/host/sdhci-pxav2.c index 5e01dab94426..f5c86e1ba734 100644 --- a/drivers/mmc/host/sdhci-pxav2.c +++ b/drivers/mmc/host/sdhci-pxav2.c @@ -199,16 +199,18 @@ static int sdhci_pxav2_probe(struct platform_device *pdev) pltfm_host = sdhci_priv(host); - clk = devm_clk_get(dev, "PXA-SDHCLK"); + clk = devm_clk_get(dev, "io"); + if (IS_ERR(clk) && PTR_ERR(clk) != -EPROBE_DEFER) + clk = devm_clk_get(dev, NULL); if (IS_ERR(clk)) { - dev_err(dev, "failed to get io clock\n"); ret = PTR_ERR(clk); + dev_err_probe(dev, ret, "failed to get io clock\n"); goto free; } pltfm_host->clk = clk; ret = clk_prepare_enable(clk); if (ret) { - dev_err(&pdev->dev, "failed to enable io clock\n"); + dev_err(dev, "failed to enable io clock\n"); goto free; } From patchwork Thu Jan 12 02:24:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Brown X-Patchwork-Id: 13097378 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE928C5479D for ; Thu, 12 Jan 2023 02:24:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231395AbjALCYz (ORCPT ); Wed, 11 Jan 2023 21:24:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41300 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232981AbjALCYx (ORCPT ); Wed, 11 Jan 2023 21:24:53 -0500 Received: from mail-pj1-x102c.google.com (mail-pj1-x102c.google.com [IPv6:2607:f8b0:4864:20::102c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 38A3744C56 for ; Wed, 11 Jan 2023 18:24:53 -0800 (PST) Received: by mail-pj1-x102c.google.com with SMTP id o13so14228439pjg.2 for ; Wed, 11 Jan 2023 18:24:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=schmorgal.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lWCr/YXdDUyPASQrplk+fJu9/v4utJbMHhi33acQ5XM=; b=MbOlu5oRT/kwKuLcQm+WfpA66ETGwI/6pT0fCj1R57kpsdq+5e3yKoX/WggwYebOEN 1vBCK3Z6fooe09k7tYFzYhbyP85O1si7gf9qXkGtDuFopaKBHhq+PkVNgQO8BXBtxy3u /uEOsHH22lewuuj+sDAHLAsPc9Y17lKkgxF78= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lWCr/YXdDUyPASQrplk+fJu9/v4utJbMHhi33acQ5XM=; b=vX+iNklPnT0c50FEHVnoZuYzwRsX7w9LpidG/x6VCV/HLmXrvkMCzMvI1AOyMho1+Z PyDSFLYP/tprfuHR0L6RCxRwG5OOBrx/0y4+Knhu4jJ+h1XnYIsx1zFaAh7Zd2+YDJqO 0CNkAi+mvQti3RUEf1PrZIGW6vcG7wIXUCh8oJSkEzZQxAakxOyhBeZCqwGCRMebx4TQ a1dH+miduEtJ73UcLeJ/32wA3vYgF/K+48U0SaJiymVeX2GyRh0ETzUdzGEcLdDmIq0z tGrtXXBdDZP/zxPiMOuyYpxLImxbEstZi0y7IatidokqGf+DlKGM16HWUcJVqgxMu5eR Mgrg== X-Gm-Message-State: AFqh2kqY+SCg36zN8/h+dVkiP4anAZDztBmB2gVnTzp7QJfKQgCltQ2M 26h+aUG2qlWNbYvS9w9KQLJEzA== X-Google-Smtp-Source: AMrXdXvX9ykjlHOwrc8I3VTRauJgtZRWEOLmx13qVPKe5okF96ILjCtjFgHjVf3rEQRh0vLroRrQVg== X-Received: by 2002:a17:903:1355:b0:193:3a92:f4bd with SMTP id jl21-20020a170903135500b001933a92f4bdmr4888980plb.47.1673490292698; Wed, 11 Jan 2023 18:24:52 -0800 (PST) Received: from doug-ryzen-5700G.. ([192.183.212.197]) by smtp.gmail.com with ESMTPSA id a1-20020a1709027e4100b00193020e8a90sm10759135pln.294.2023.01.11.18.24.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Jan 2023 18:24:52 -0800 (PST) From: Doug Brown To: Ulf Hansson , Adrian Hunter Cc: Rob Herring , Krzysztof Kozlowski , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, Doug Brown Subject: [PATCH v4 5/8] mmc: sdhci-pxav2: add optional core clock Date: Wed, 11 Jan 2023 18:24:13 -0800 Message-Id: <20230112022416.8474-6-doug@schmorgal.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230112022416.8474-1-doug@schmorgal.com> References: <20230112022416.8474-1-doug@schmorgal.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Add ability to have an optional core clock just like the pxav3 driver. The PXA168 needs this because its SDHC controllers have separate core and io clocks that both need to be enabled. This also correctly matches the documented devicetree bindings for this driver. Signed-off-by: Doug Brown Acked-by: Adrian Hunter --- drivers/mmc/host/sdhci-pxav2.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-pxav2.c b/drivers/mmc/host/sdhci-pxav2.c index f5c86e1ba734..b10f55b478fc 100644 --- a/drivers/mmc/host/sdhci-pxav2.c +++ b/drivers/mmc/host/sdhci-pxav2.c @@ -191,7 +191,7 @@ static int sdhci_pxav2_probe(struct platform_device *pdev) const struct sdhci_pxa_variant *variant; int ret; - struct clk *clk; + struct clk *clk, *clk_core; host = sdhci_pltfm_init(pdev, NULL, 0); if (IS_ERR(host)) @@ -214,6 +214,12 @@ static int sdhci_pxav2_probe(struct platform_device *pdev) goto free; } + clk_core = devm_clk_get_optional_enabled(dev, "core"); + if (IS_ERR(clk_core)) { + dev_err_probe(dev, PTR_ERR(clk_core), "failed to enable core clock\n"); + goto disable_clk; + } + host->quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN; From patchwork Thu Jan 12 02:24:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Brown X-Patchwork-Id: 13097379 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 75E24C54EBC for ; Thu, 12 Jan 2023 02:24:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232981AbjALCY5 (ORCPT ); Wed, 11 Jan 2023 21:24:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41372 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236498AbjALCY4 (ORCPT ); Wed, 11 Jan 2023 21:24:56 -0500 Received: from mail-pl1-x62d.google.com (mail-pl1-x62d.google.com [IPv6:2607:f8b0:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8C80D4566D for ; Wed, 11 Jan 2023 18:24:55 -0800 (PST) Received: by mail-pl1-x62d.google.com with SMTP id w3so18793526ply.3 for ; Wed, 11 Jan 2023 18:24:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=schmorgal.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JqnrbwiHxmibFqxmAWk3pItN8pUg9Fc0T7KvyJk3MHA=; b=By0dV16AQJ393CmfPzBzI7loLXoHylovtVMfbGrMQlAUGUwGVdw5F95X5MHaY5jjUI t8/qTyednhP3OFtSdURzG1R87On9MiMNVwvJ85qa4/o45ESPksiZIP8JSvjsd0QDoDSm mBwWv3BVvr2J1yP3Q445BU1mPVEt3O9/9wMKI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JqnrbwiHxmibFqxmAWk3pItN8pUg9Fc0T7KvyJk3MHA=; b=pgSUIL2soJqtzWmWCqTNXXdyfzaHhPMB13FB/tXmfSGyF9MnQSbRbogkPziOiXVZuC jCnCBU2O/H6t8+3pWCV+Y8IRY8OSBXl9uHhN1fJr0TXd2EU+mICBzzWnWAhQCgeZDjMs WX+7HKBEyAmMVhN1sz2d/cIERQWpfY8Bo7kRqzNpooBdFBn/q/67wF1kCF8ck7VXPwfC ZOA6yYGcC7bA3BujzgBxeWuVNjX9l2n3k3Wk1tiOYu2S4zJ17SiGZ+auNtXCq8UwEc3d 2y6vbnF+OkRcYt+QKrJpsgm+XZ03KvOkPlvvVLy/Y6cD5b0y3eccgpkkTCdX7hHV6nWF bOzw== X-Gm-Message-State: AFqh2kpClTFZ3AKXKn43jOEyx0bm2u91x7HLrsUzvu0l9n2p8zDGiQFQ p6SZdICo9F+NU5j0C0sLlHkW7A== X-Google-Smtp-Source: AMrXdXtj0r5lVhOcYI3BbSawnnXp2LHCm/rQXj+n1PPJ62/3KeAHRhqCHF//NfoCuKojrrcLUibGKQ== X-Received: by 2002:a05:6a20:4417:b0:b2:310a:9fd2 with SMTP id ce23-20020a056a20441700b000b2310a9fd2mr6562808pzb.43.1673490295006; Wed, 11 Jan 2023 18:24:55 -0800 (PST) Received: from doug-ryzen-5700G.. ([192.183.212.197]) by smtp.gmail.com with ESMTPSA id a1-20020a1709027e4100b00193020e8a90sm10759135pln.294.2023.01.11.18.24.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Jan 2023 18:24:54 -0800 (PST) From: Doug Brown To: Ulf Hansson , Adrian Hunter Cc: Rob Herring , Krzysztof Kozlowski , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, Doug Brown Subject: [PATCH v4 6/8] mmc: sdhci-pxav2: add SDIO card IRQ workaround for PXA168 V1 controller Date: Wed, 11 Jan 2023 18:24:14 -0800 Message-Id: <20230112022416.8474-7-doug@schmorgal.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230112022416.8474-1-doug@schmorgal.com> References: <20230112022416.8474-1-doug@schmorgal.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org The PXA168 has a documented silicon bug that causes SDIO card IRQs to be missed. Implement the first half of the suggested workaround, which involves resetting the data port logic and issuing a dummy CMD0 to restart the clock. Signed-off-by: Doug Brown Acked-by: Adrian Hunter --- drivers/mmc/host/sdhci-pxav2.c | 56 +++++++++++++++++++++++++++++++++- 1 file changed, 55 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-pxav2.c b/drivers/mmc/host/sdhci-pxav2.c index b10f55b478fc..10fa9de14ad4 100644 --- a/drivers/mmc/host/sdhci-pxav2.c +++ b/drivers/mmc/host/sdhci-pxav2.c @@ -20,6 +20,8 @@ #include #include #include +#include +#include #include "sdhci.h" #include "sdhci-pltfm.h" @@ -41,6 +43,10 @@ #define MMC_CARD 0x1000 #define MMC_WIDTH 0x0100 +struct sdhci_pxav2_host { + struct mmc_request *sdio_mrq; +}; + static void pxav2_reset(struct sdhci_host *host, u8 mask) { struct platform_device *pdev = to_platform_device(mmc_dev(host->mmc)); @@ -89,6 +95,52 @@ static u16 pxav1_readw(struct sdhci_host *host, int reg) return readw(host->ioaddr + reg); } +static u32 pxav1_irq(struct sdhci_host *host, u32 intmask) +{ + struct sdhci_pxav2_host *pxav2_host = sdhci_pltfm_priv(sdhci_priv(host)); + struct mmc_request *sdio_mrq; + + if (pxav2_host->sdio_mrq && (intmask & SDHCI_INT_CMD_MASK)) { + /* The dummy CMD0 for the SDIO workaround just completed */ + sdhci_writel(host, intmask & SDHCI_INT_CMD_MASK, SDHCI_INT_STATUS); + intmask &= ~SDHCI_INT_CMD_MASK; + sdio_mrq = pxav2_host->sdio_mrq; + pxav2_host->sdio_mrq = NULL; + mmc_request_done(host->mmc, sdio_mrq); + } + + return intmask; +} + +static void pxav1_request_done(struct sdhci_host *host, struct mmc_request *mrq) +{ + u16 tmp; + struct sdhci_pxav2_host *pxav2_host; + + /* If this is an SDIO command, perform errata workaround for silicon bug */ + if (mrq->cmd && !mrq->cmd->error && + (mrq->cmd->opcode == SD_IO_RW_DIRECT || + mrq->cmd->opcode == SD_IO_RW_EXTENDED)) { + /* Reset data port */ + tmp = readw(host->ioaddr + SDHCI_TIMEOUT_CONTROL); + tmp |= 0x400; + writew(tmp, host->ioaddr + SDHCI_TIMEOUT_CONTROL); + + /* Clock is now stopped, so restart it by sending a dummy CMD0 */ + pxav2_host = sdhci_pltfm_priv(sdhci_priv(host)); + pxav2_host->sdio_mrq = mrq; + sdhci_writel(host, 0, SDHCI_ARGUMENT); + sdhci_writew(host, 0, SDHCI_TRANSFER_MODE); + sdhci_writew(host, SDHCI_MAKE_CMD(MMC_GO_IDLE_STATE, SDHCI_CMD_RESP_NONE), + SDHCI_COMMAND); + + /* Don't finish this request until the dummy CMD0 finishes */ + return; + } + + mmc_request_done(host->mmc, mrq); +} + static void pxav2_mmc_set_bus_width(struct sdhci_host *host, int width) { u8 ctrl; @@ -118,10 +170,12 @@ struct sdhci_pxa_variant { static const struct sdhci_ops pxav1_sdhci_ops = { .read_w = pxav1_readw, .set_clock = sdhci_set_clock, + .irq = pxav1_irq, .get_max_clock = sdhci_pltfm_clk_get_max_clock, .set_bus_width = pxav2_mmc_set_bus_width, .reset = pxav2_reset, .set_uhs_signaling = sdhci_set_uhs_signaling, + .request_done = pxav1_request_done, }; static const struct sdhci_pxa_variant __maybe_unused pxav1_variant = { @@ -193,7 +247,7 @@ static int sdhci_pxav2_probe(struct platform_device *pdev) int ret; struct clk *clk, *clk_core; - host = sdhci_pltfm_init(pdev, NULL, 0); + host = sdhci_pltfm_init(pdev, NULL, sizeof(struct sdhci_pxav2_host)); if (IS_ERR(host)) return PTR_ERR(host); From patchwork Thu Jan 12 02:24:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Brown X-Patchwork-Id: 13097380 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B7279C54EBC for ; Thu, 12 Jan 2023 02:25:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236402AbjALCZB (ORCPT ); Wed, 11 Jan 2023 21:25:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41460 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236491AbjALCY7 (ORCPT ); Wed, 11 Jan 2023 21:24:59 -0500 Received: from mail-pj1-x102b.google.com (mail-pj1-x102b.google.com [IPv6:2607:f8b0:4864:20::102b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E06BB47313 for ; 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Wed, 11 Jan 2023 18:24:58 -0800 (PST) Received: from doug-ryzen-5700G.. ([192.183.212.197]) by smtp.gmail.com with ESMTPSA id a1-20020a1709027e4100b00193020e8a90sm10759135pln.294.2023.01.11.18.24.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Jan 2023 18:24:57 -0800 (PST) From: Doug Brown To: Ulf Hansson , Adrian Hunter Cc: Rob Herring , Krzysztof Kozlowski , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, Doug Brown Subject: [PATCH v4 7/8] mmc: sdhci-pxav2: add optional pinctrl for SDIO IRQ workaround Date: Wed, 11 Jan 2023 18:24:15 -0800 Message-Id: <20230112022416.8474-8-doug@schmorgal.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230112022416.8474-1-doug@schmorgal.com> References: <20230112022416.8474-1-doug@schmorgal.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org The PXA168 errata recommends that the CMD signal should be detached from the SD bus while performing the dummy CMD0 to restart the clock. Implement this using pinctrl states. Signed-off-by: Doug Brown Acked-by: Adrian Hunter --- drivers/mmc/host/sdhci-pxav2.c | 33 ++++++++++++++++++++++++++++++++- 1 file changed, 32 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-pxav2.c b/drivers/mmc/host/sdhci-pxav2.c index 10fa9de14ad4..38edd1fcc992 100644 --- a/drivers/mmc/host/sdhci-pxav2.c +++ b/drivers/mmc/host/sdhci-pxav2.c @@ -22,6 +22,7 @@ #include #include #include +#include #include "sdhci.h" #include "sdhci-pltfm.h" @@ -45,6 +46,9 @@ struct sdhci_pxav2_host { struct mmc_request *sdio_mrq; + struct pinctrl *pinctrl; + struct pinctrl_state *pins_default; + struct pinctrl_state *pins_cmd_gpio; }; static void pxav2_reset(struct sdhci_host *host, u8 mask) @@ -104,6 +108,11 @@ static u32 pxav1_irq(struct sdhci_host *host, u32 intmask) /* The dummy CMD0 for the SDIO workaround just completed */ sdhci_writel(host, intmask & SDHCI_INT_CMD_MASK, SDHCI_INT_STATUS); intmask &= ~SDHCI_INT_CMD_MASK; + + /* Restore MMC function to CMD pin */ + if (pxav2_host->pinctrl && pxav2_host->pins_default) + pinctrl_select_state(pxav2_host->pinctrl, pxav2_host->pins_default); + sdio_mrq = pxav2_host->sdio_mrq; pxav2_host->sdio_mrq = NULL; mmc_request_done(host->mmc, sdio_mrq); @@ -129,6 +138,11 @@ static void pxav1_request_done(struct sdhci_host *host, struct mmc_request *mrq) /* Clock is now stopped, so restart it by sending a dummy CMD0 */ pxav2_host = sdhci_pltfm_priv(sdhci_priv(host)); pxav2_host->sdio_mrq = mrq; + + /* Set CMD as high output rather than MMC function while we do CMD0 */ + if (pxav2_host->pinctrl && pxav2_host->pins_cmd_gpio) + pinctrl_select_state(pxav2_host->pinctrl, pxav2_host->pins_cmd_gpio); + sdhci_writel(host, 0, SDHCI_ARGUMENT); sdhci_writew(host, 0, SDHCI_TRANSFER_MODE); sdhci_writew(host, SDHCI_MAKE_CMD(MMC_GO_IDLE_STATE, SDHCI_CMD_RESP_NONE), @@ -240,6 +254,7 @@ static int sdhci_pxav2_probe(struct platform_device *pdev) { struct sdhci_pltfm_host *pltfm_host; struct sdhci_pxa_platdata *pdata = pdev->dev.platform_data; + struct sdhci_pxav2_host *pxav2_host; struct device *dev = &pdev->dev; struct sdhci_host *host = NULL; const struct sdhci_pxa_variant *variant; @@ -247,11 +262,12 @@ static int sdhci_pxav2_probe(struct platform_device *pdev) int ret; struct clk *clk, *clk_core; - host = sdhci_pltfm_init(pdev, NULL, sizeof(struct sdhci_pxav2_host)); + host = sdhci_pltfm_init(pdev, NULL, sizeof(*pxav2_host)); if (IS_ERR(host)) return PTR_ERR(host); pltfm_host = sdhci_priv(host); + pxav2_host = sdhci_pltfm_priv(pltfm_host); clk = devm_clk_get(dev, "io"); if (IS_ERR(clk) && PTR_ERR(clk) != -EPROBE_DEFER) @@ -306,6 +322,21 @@ static int sdhci_pxav2_probe(struct platform_device *pdev) host->quirks |= variant->extra_quirks; host->ops = variant->ops; + /* Set up optional pinctrl for PXA168 SDIO IRQ fix */ + pxav2_host->pinctrl = devm_pinctrl_get(dev); + if (!IS_ERR(pxav2_host->pinctrl)) { + pxav2_host->pins_cmd_gpio = pinctrl_lookup_state(pxav2_host->pinctrl, + "state_cmd_gpio"); + if (IS_ERR(pxav2_host->pins_cmd_gpio)) + pxav2_host->pins_cmd_gpio = NULL; + pxav2_host->pins_default = pinctrl_lookup_state(pxav2_host->pinctrl, + "default"); + if (IS_ERR(pxav2_host->pins_default)) + pxav2_host->pins_default = NULL; + } else { + pxav2_host->pinctrl = NULL; + } + ret = sdhci_add_host(host); if (ret) goto disable_clk; From patchwork Thu Jan 12 02:24:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Brown X-Patchwork-Id: 13097381 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E8B7EC5479D for ; Thu, 12 Jan 2023 02:25:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231801AbjALCZD (ORCPT ); Wed, 11 Jan 2023 21:25:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41466 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236439AbjALCZB (ORCPT ); Wed, 11 Jan 2023 21:25:01 -0500 Received: from mail-pl1-x62a.google.com (mail-pl1-x62a.google.com [IPv6:2607:f8b0:4864:20::62a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1528844C6B for ; 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Wed, 11 Jan 2023 18:25:00 -0800 (PST) Received: from doug-ryzen-5700G.. ([192.183.212.197]) by smtp.gmail.com with ESMTPSA id a1-20020a1709027e4100b00193020e8a90sm10759135pln.294.2023.01.11.18.24.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Jan 2023 18:25:00 -0800 (PST) From: Doug Brown To: Ulf Hansson , Adrian Hunter Cc: Rob Herring , Krzysztof Kozlowski , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, Doug Brown , Krzysztof Kozlowski Subject: [PATCH v4 8/8] dt-bindings: mmc: sdhci-pxa: add pxav1 Date: Wed, 11 Jan 2023 18:24:16 -0800 Message-Id: <20230112022416.8474-9-doug@schmorgal.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230112022416.8474-1-doug@schmorgal.com> References: <20230112022416.8474-1-doug@schmorgal.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Add a compatible for the pxav1 controller in the PXA168, along with optional pinctrl properties to use for an errata workaround. Signed-off-by: Doug Brown Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/mmc/sdhci-pxa.yaml | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml b/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml index 3d46c2525787..09455f9fa8de 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml +++ b/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mmc/sdhci-pxa.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Marvell PXA SDHCI v2/v3 +title: Marvell PXA SDHCI v1/v2/v3 maintainers: - Ulf Hansson @@ -34,6 +34,7 @@ allOf: properties: compatible: enum: + - mrvl,pxav1-mmc - mrvl,pxav2-mmc - mrvl,pxav3-mmc - marvell,armada-380-sdhci @@ -61,6 +62,22 @@ properties: - const: io - const: core + pinctrl-names: + description: + Optional for supporting PXA168 SDIO IRQ errata to switch CMD pin between + SDIO CMD and GPIO mode. + items: + - const: default + - const: state_cmd_gpio + + pinctrl-0: + description: + Should contain default pinctrl. + + pinctrl-1: + description: + Should switch CMD pin to GPIO mode as a high output. + mrvl,clk-delay-cycles: description: Specify a number of cycles to delay for tuning. $ref: /schemas/types.yaml#/definitions/uint32