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pr=C From: Michal Orzel To: CC: Michal Orzel , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Subject: [PATCH v2 1/3] xen/arm64: Fix incorrect DIRECTMAP_SIZE calculation Date: Tue, 17 Jan 2023 12:43:30 +0100 Message-ID: <20230117114332.25863-2-michal.orzel@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230117114332.25863-1-michal.orzel@amd.com> References: <20230117114332.25863-1-michal.orzel@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF0000E62F:EE_|BL1PR12MB5192:EE_ X-MS-Office365-Filtering-Correlation-Id: 5244ce5b-9571-4ca8-8ef8-08daf8801279 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: m3Iz2NSFNJ3PHEbNIJSOTh56dwH1Obxbun54SWCBrS1/+CC9TL19Ki4mDXfX5SO3jy85IGCDsKQuwWgO9eGxyMJGBxk87MBRE+sm7YgxKAUk34sfmyQFx9Yta+tSMouMLFzI8CLIoBqFfI3+Tuv84yYEwnbNYp7wfpeZTpfAgfs/X334/IQbLtPX/8TWoC0YJozhr/y5zSi4u0JcqXoAV8uUNdRsEczY3ZBHBQOKQRHwBfqvxRHhkItLhJYmGPyBq67rQImC66WtLenSl/GB6jYs9nGsOoZ1DXv9K6DaE8nEGMrgJzOVBc85b7C/coRAstOwk/oFjYESzllo8oQAsdn/g4j9i1MTdhW/ak3LB/NtrBTB4jWvwvHJnzPZSlIH7xOpPwP1Kr0q0em7f37B7tqVdpxwqhTTN5KfdTWbjW4t+WcntDb5M4CtiBLig2dWF90GakF4uoLQiOqWxoSXT4os6yPjhwbrpUOB5tOqp7detGHKU0oCIrYNZBxco1KhQ2cKMQ85p2FLomgwDdsmRb1pcyxboMjwfvq5SDUB04bkm+45F4FTBt1JMSRMXA3H9AGL12dwcHEo2Efk6d13YGPMFt9IZzeBbfwUNgcrM5EY76PSTG4vQG6ygWhYtZAGW3gOKCpDvKeg3D0H11W29iaTyzGmiX+7WwZNe09k9wwNij0u1+95P7dCBtxROalc895fPBgpCcP4VSaDEGqfiUAS+s9Ha8PSrtXtalKNUrc= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(346002)(136003)(376002)(396003)(39860400002)(451199015)(40470700004)(46966006)(36840700001)(82740400003)(83380400001)(81166007)(36860700001)(86362001)(356005)(8936002)(4326008)(2906002)(70586007)(5660300002)(8676002)(44832011)(6916009)(70206006)(41300700001)(82310400005)(40480700001)(2616005)(186003)(26005)(47076005)(336012)(426003)(1076003)(6666004)(316002)(54906003)(478600001)(40460700003)(36756003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jan 2023 11:43:37.5023 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5244ce5b-9571-4ca8-8ef8-08daf8801279 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF0000E62F.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5192 The direct mapped area occupies L0 slots from 256 to 265 included (i.e. 10 slots), resulting in 5TB (512GB * 10) of virtual address space. However, due to incorrect slot subtraction (we take 9 slots into account) we set DIRECTMAP_SIZE to 4.5TB instead. Fix it. Note that we only support up to 2TB of physical memory so this is a latent issue. Fixes: 5263507b1b4a ("xen: arm: Use a direct mapping of RAM on arm64") Signed-off-by: Michal Orzel Reviewed-by: Julien Grall --- Changes in v2: - update commit msg making it clear that this is a latent issue --- xen/arch/arm/include/asm/config.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/arm/include/asm/config.h b/xen/arch/arm/include/asm/config.h index 0fefed1b8aa9..16213c8b677f 100644 --- a/xen/arch/arm/include/asm/config.h +++ b/xen/arch/arm/include/asm/config.h @@ -157,7 +157,7 @@ #define FRAMETABLE_NR (FRAMETABLE_SIZE / sizeof(*frame_table)) #define DIRECTMAP_VIRT_START SLOT0(256) -#define DIRECTMAP_SIZE (SLOT0_ENTRY_SIZE * (265-256)) +#define DIRECTMAP_SIZE (SLOT0_ENTRY_SIZE * (266 - 256)) #define DIRECTMAP_VIRT_END (DIRECTMAP_VIRT_START + DIRECTMAP_SIZE - 1) #define XENHEAP_VIRT_START directmap_virt_start From patchwork Tue Jan 17 11:43:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Orzel X-Patchwork-Id: 13104539 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 63994C3DA78 for ; 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bh=k1fBAnuXoU+4MFAl8nEfyIsVLvgTGQN8PGjh9Nb+57k=; b=NhydvpAILfrSbSNiglqAU7nW/MVK6aSDKxUcek0wHhP/inZpIEkPZPeIVvEOYDvEsSsuLEt6AfFAQo0ZI8YbF0UNPkGJowzXEysYpxIHSfB0qL3usDbNfzrf05pOFVNcjq2noO6IYSZF0dLrQ5DG3Aw3k64e5+JD5DyjdjCE+Mc= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C From: Michal Orzel To: CC: Michal Orzel , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Subject: [PATCH v2 2/3] xen/arm32: Remove unused macro FRAMETABLE_VIRT_END Date: Tue, 17 Jan 2023 12:43:31 +0100 Message-ID: <20230117114332.25863-3-michal.orzel@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230117114332.25863-1-michal.orzel@amd.com> References: <20230117114332.25863-1-michal.orzel@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF0000E62F:EE_|BY5PR12MB4082:EE_ X-MS-Office365-Filtering-Correlation-Id: 4fd8a623-83ad-4af9-fa16-08daf8801367 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jan 2023 11:43:39.0648 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4fd8a623-83ad-4af9-fa16-08daf8801367 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF0000E62F.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4082 This macro is unused and the corresponding one for arm64 has already been removed as part of the commit 6dc9a1fe982f ("xen/arm: Remove most of the *_VIRT_END defines"). Signed-off-by: Michal Orzel Reviewed-by: Julien Grall --- Changes in v2: - move a change to a separate patch --- xen/arch/arm/include/asm/config.h | 1 - 1 file changed, 1 deletion(-) diff --git a/xen/arch/arm/include/asm/config.h b/xen/arch/arm/include/asm/config.h index 16213c8b677f..6661a41583c6 100644 --- a/xen/arch/arm/include/asm/config.h +++ b/xen/arch/arm/include/asm/config.h @@ -127,7 +127,6 @@ #define FRAMETABLE_VIRT_START _AT(vaddr_t,0x02000000) #define FRAMETABLE_SIZE MB(128-32) #define FRAMETABLE_NR (FRAMETABLE_SIZE / sizeof(*frame_table)) -#define FRAMETABLE_VIRT_END (FRAMETABLE_VIRT_START + FRAMETABLE_SIZE - 1) #define VMAP_VIRT_START _AT(vaddr_t,0x10000000) #define VMAP_VIRT_SIZE _AT(vaddr_t, GB(1) - MB(256)) From patchwork Tue Jan 17 11:43:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Orzel X-Patchwork-Id: 13104537 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2F241C63797 for ; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jan 2023 11:43:40.3433 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cab52fef-2382-48fd-479b-08daf8801426 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT056.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7870 The amount of supported physical memory depends on the frametable size and the number of struct page_info entries that can fit into it. Define a macro PAGE_INFO_SIZE to store the current size of the struct page_info (i.e. 56B for arm64 and 32B for arm32) and add a sanity check in setup_frametable_mappings to be notified whenever the size of the structure changes. Also call a panic if the calculated frametable_size exceeds the limit defined by FRAMETABLE_SIZE macro. Update the comments regarding the frametable in asm/config.h. Signed-off-by: Michal Orzel Reviewed-by: Julien Grall --- Changes in v2: - refactor panic message - move removal of FRAMETABLE_VIRT_END to a separate patch --- xen/arch/arm/include/asm/config.h | 4 ++-- xen/arch/arm/include/asm/mm.h | 11 +++++++++++ xen/arch/arm/mm.c | 6 ++++++ 3 files changed, 19 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/include/asm/config.h b/xen/arch/arm/include/asm/config.h index 6661a41583c6..d8f99776986f 100644 --- a/xen/arch/arm/include/asm/config.h +++ b/xen/arch/arm/include/asm/config.h @@ -82,7 +82,7 @@ * ARM32 layout: * 0 - 12M * - * 32M - 128M Frametable: 24 bytes per page for 16GB of RAM + * 32M - 128M Frametable: 32 bytes per page for 12GB of RAM * 256M - 1G VMAP: ioremap and early_ioremap use this virtual address * space * @@ -95,7 +95,7 @@ * * 1G - 2G VMAP: ioremap and early_ioremap * - * 32G - 64G Frametable: 24 bytes per page for 5.3TB of RAM + * 32G - 64G Frametable: 56 bytes per page for 2TB of RAM * * 0x0000008000000000 - 0x00007fffffffffff (127.5TB, L0 slots [1..255]) * Unused diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h index 68adcac9fa8d..23dec574eb31 100644 --- a/xen/arch/arm/include/asm/mm.h +++ b/xen/arch/arm/include/asm/mm.h @@ -26,6 +26,17 @@ */ #define PFN_ORDER(_pfn) ((_pfn)->v.free.order) +/* + * The size of struct page_info impacts the number of entries that can fit + * into the frametable area and thus it affects the amount of physical memory + * we claim to support. Define PAGE_INFO_SIZE to be used for sanity checking. +*/ +#ifdef CONFIG_ARM_64 +#define PAGE_INFO_SIZE 56 +#else +#define PAGE_INFO_SIZE 32 +#endif + struct page_info { /* Each frame can be threaded onto a doubly-linked list. */ diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c index 0fc6f2992dd1..1a94b52cce7e 100644 --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -676,6 +676,12 @@ void __init setup_frametable_mappings(paddr_t ps, paddr_t pe) const unsigned long mapping_size = frametable_size < MB(32) ? MB(2) : MB(32); int rc; + BUILD_BUG_ON(sizeof(struct page_info) != PAGE_INFO_SIZE); + + if ( frametable_size > FRAMETABLE_SIZE ) + panic("The frametable cannot cover the physical region %#"PRIpaddr" - %#"PRIpaddr"\n", + ps, pe); + frametable_base_pdx = mfn_to_pdx(maddr_to_mfn(ps)); /* Round up to 2M or 32M boundary, as appropriate. */ frametable_size = ROUNDUP(frametable_size, mapping_size);