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Tue, 17 Jan 2023 15:36:03 +0000 Received: from SJ1PR12MB6075.namprd12.prod.outlook.com ([fe80::6d66:a4bb:4018:3c70]) by SJ1PR12MB6075.namprd12.prod.outlook.com ([fe80::6d66:a4bb:4018:3c70%8]) with mapi id 15.20.6002.013; Tue, 17 Jan 2023 15:36:03 +0000 From: Aurelien Aptel To: linux-nvme@lists.infradead.org, netdev@vger.kernel.org, sagi@grimberg.me, hch@lst.de, kbusch@kernel.org, axboe@fb.com, chaitanyak@nvidia.com, davem@davemloft.net, kuba@kernel.org Cc: Boris Pismenny , Aurelien Aptel , aurelien.aptel@gmail.com, smalin@nvidia.com, malin1024@gmail.com, ogerlitz@nvidia.com, yorayz@nvidia.com Subject: [PATCH v9 01/25] net: Introduce direct data placement tcp offload Date: Tue, 17 Jan 2023 17:35:11 +0200 Message-Id: <20230117153535.1945554-2-aaptel@nvidia.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20230117153535.1945554-1-aaptel@nvidia.com> References: <20230117153535.1945554-1-aaptel@nvidia.com> X-ClientProxiedBy: LO4P265CA0156.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:2c7::18) To SJ1PR12MB6075.namprd12.prod.outlook.com (2603:10b6:a03:45e::8) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PR12MB6075:EE_|BL3PR12MB6425:EE_ X-MS-Office365-Filtering-Correlation-Id: bdb533aa-3b35-4c78-33de-08daf8a08aae X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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The motivation is saving compute resources/cycles that are spent to copy data from SKBs to the block layer buffers and CRC calculation/verification for received PDUs (Protocol Data Units). The DDP capability is accompanied by new net_device operations that configure hardware contexts. There is a context per socket, and a context per DDP operation. Additionally, a resynchronization routine is used to assist hardware handle TCP OOO, and continue the offload. Furthermore, we let the offloading driver advertise what is the max hw sectors/segments. The interface includes five net-device ddp operations: 1. sk_add - add offload for the queue represented by socket+config pair 2. sk_del - remove the offload for the socket/queue 3. ddp_setup - request copy offload for buffers associated with an IO 4. ddp_teardown - release offload resources for that IO 5. limits - query NIC driver for quirks and limitations (e.g. max number of scatter gather entries per IO) Using this interface, the NIC hardware will scatter TCP payload directly to the BIO pages according to the command_id. To maintain the correctness of the network stack, the driver is expected to construct SKBs that point to the BIO pages. The SKB passed to the network stack from the driver represents data as it is on the wire, while it is pointing directly to data in destination buffers. As a result, data from page frags should not be copied out to the linear part. To avoid needless copies, such as when using skb_condense, we mark the skb->ulp_ddp bit. In addition, the skb->ulp_crc will be used by the upper layers to determine if CRC re-calculation is required. The two separated skb indications are needed to avoid false positives GRO flushing events. Follow-up patches will use this interface for DDP in NVMe-TCP. Capability bits stored in net_device allow drivers to report which ULP DDP capabilities a device supports. Control over these capabilities will be exposed to userspace in later patches. Signed-off-by: Boris Pismenny Signed-off-by: Ben Ben-Ishay Signed-off-by: Or Gerlitz Signed-off-by: Yoray Zack Signed-off-by: Shai Malin Signed-off-by: Aurelien Aptel --- include/linux/netdevice.h | 15 +++ include/linux/skbuff.h | 24 ++++ include/net/inet_connection_sock.h | 4 + include/net/ulp_ddp.h | 173 +++++++++++++++++++++++++++++ include/net/ulp_ddp_caps.h | 41 +++++++ net/Kconfig | 20 ++++ net/core/skbuff.c | 3 +- net/ipv4/tcp_input.c | 8 ++ net/ipv4/tcp_ipv4.c | 3 + net/ipv4/tcp_offload.c | 3 + 10 files changed, 293 insertions(+), 1 deletion(-) create mode 100644 include/net/ulp_ddp.h create mode 100644 include/net/ulp_ddp_caps.h diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index aad12a179e54..289cfdade177 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -52,6 +52,10 @@ #include #include +#ifdef CONFIG_ULP_DDP +#include +#endif + struct netpoll_info; struct device; struct ethtool_ops; @@ -1392,6 +1396,8 @@ struct netdev_net_notifier { * Get hardware timestamp based on normal/adjustable time or free running * cycle counter. This function is required if physical clock supports a * free running cycle counter. + * struct ulp_ddp_dev_ops *ulp_ddp_ops; + * ULP DDP operations (see include/net/ulp_ddp.h) */ struct net_device_ops { int (*ndo_init)(struct net_device *dev); @@ -1616,6 +1622,9 @@ struct net_device_ops { ktime_t (*ndo_get_tstamp)(struct net_device *dev, const struct skb_shared_hwtstamps *hwtstamps, bool cycles); +#if IS_ENABLED(CONFIG_ULP_DDP) + const struct ulp_ddp_dev_ops *ulp_ddp_ops; +#endif }; /** @@ -1783,6 +1792,9 @@ enum netdev_ml_priv_type { * @mpls_features: Mask of features inheritable by MPLS * @gso_partial_features: value(s) from NETIF_F_GSO\* * + * @ulp_ddp_caps: Bitflags keeping track of supported and enabled + * ULP DDP capabilities. + * * @ifindex: interface index * @group: The group the device belongs to * @@ -2071,6 +2083,9 @@ struct net_device { netdev_features_t mpls_features; netdev_features_t gso_partial_features; +#ifdef CONFIG_ULP_DDP + struct ulp_ddp_netdev_caps ulp_ddp_caps; +#endif unsigned int min_mtu; unsigned int max_mtu; unsigned short type; diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h index 4c8492401a10..8708c5935e89 100644 --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h @@ -811,6 +811,8 @@ typedef unsigned char *sk_buff_data_t; * delivery_time in mono clock base (i.e. EDT). Otherwise, the * skb->tstamp has the (rcv) timestamp at ingress and * delivery_time at egress. + * @ulp_ddp: DDP offloaded + * @ulp_crc: CRC offloaded * @napi_id: id of the NAPI struct this skb came from * @sender_cpu: (aka @napi_id) source CPU in XPS * @alloc_cpu: CPU which did the skb allocation. @@ -983,6 +985,10 @@ struct sk_buff { __u8 slow_gro:1; __u8 csum_not_inet:1; __u8 scm_io_uring:1; +#ifdef CONFIG_ULP_DDP + __u8 ulp_ddp:1; + __u8 ulp_crc:1; +#endif #ifdef CONFIG_NET_SCHED __u16 tc_index; /* traffic control index */ @@ -5053,5 +5059,23 @@ static inline void skb_mark_for_recycle(struct sk_buff *skb) } #endif +static inline bool skb_is_ulp_ddp(struct sk_buff *skb) +{ +#ifdef CONFIG_ULP_DDP + return skb->ulp_ddp; +#else + return 0; +#endif +} + +static inline bool skb_is_ulp_crc(struct sk_buff *skb) +{ +#ifdef CONFIG_ULP_DDP + return skb->ulp_crc; +#else + return 0; +#endif +} + #endif /* __KERNEL__ */ #endif /* _LINUX_SKBUFF_H */ diff --git a/include/net/inet_connection_sock.h b/include/net/inet_connection_sock.h index c2b15f7e5516..2ba73167b3bb 100644 --- a/include/net/inet_connection_sock.h +++ b/include/net/inet_connection_sock.h @@ -68,6 +68,8 @@ struct inet_connection_sock_af_ops { * @icsk_ulp_ops Pluggable ULP control hook * @icsk_ulp_data ULP private data * @icsk_clean_acked Clean acked data hook + * @icsk_ulp_ddp_ops Pluggable ULP direct data placement control hook + * @icsk_ulp_ddp_data ULP direct data placement private data * @icsk_ca_state: Congestion control state * @icsk_retransmits: Number of unrecovered [RTO] timeouts * @icsk_pending: Scheduled timer event @@ -98,6 +100,8 @@ struct inet_connection_sock { const struct tcp_ulp_ops *icsk_ulp_ops; void __rcu *icsk_ulp_data; void (*icsk_clean_acked)(struct sock *sk, u32 acked_seq); + const struct ulp_ddp_ulp_ops *icsk_ulp_ddp_ops; + void __rcu *icsk_ulp_ddp_data; unsigned int (*icsk_sync_mss)(struct sock *sk, u32 pmtu); __u8 icsk_ca_state:5, icsk_ca_initialized:1, diff --git a/include/net/ulp_ddp.h b/include/net/ulp_ddp.h new file mode 100644 index 000000000000..845755ebda3e --- /dev/null +++ b/include/net/ulp_ddp.h @@ -0,0 +1,173 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * ulp_ddp.h + * Author: Boris Pismenny + * Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved. + */ +#ifndef _ULP_DDP_H +#define _ULP_DDP_H + +#include +#include +#include + +#include "ulp_ddp_caps.h" + +enum ulp_ddp_type { + ULP_DDP_NVME = 1, +}; + +/** + * struct nvme_tcp_ddp_limits - nvme tcp driver limitations + * + * @full_ccid_range: true if the driver supports the full CID range + */ +struct nvme_tcp_ddp_limits { + bool full_ccid_range; +}; + +/** + * struct ulp_ddp_limits - Generic ulp ddp limits: tcp ddp + * protocol limits. + * Add new instances of ulp_ddp_limits in the union below (nvme-tcp, etc.). + * + * @type: type of this limits struct + * @max_ddp_sgl_len: maximum sgl size supported (zero means no limit) + * @io_threshold: minimum payload size required to offload + * @nvmeotcp: NVMe-TCP specific limits + */ +struct ulp_ddp_limits { + enum ulp_ddp_type type; + int max_ddp_sgl_len; + int io_threshold; + union { + struct nvme_tcp_ddp_limits nvmeotcp; + }; +}; + +/** + * struct nvme_tcp_ddp_config - nvme tcp ddp configuration for an IO queue + * + * @pfv: pdu version (e.g., NVME_TCP_PFV_1_0) + * @cpda: controller pdu data alignment (dwords, 0's based) + * @dgst: digest types enabled (header or data, see enum nvme_tcp_digest_option). + * The netdev will offload crc if it is supported. + * @queue_size: number of nvme-tcp IO queue elements + * @queue_id: queue identifier + * @io_cpu: cpu core running the IO thread for this queue + */ +struct nvme_tcp_ddp_config { + u16 pfv; + u8 cpda; + u8 dgst; + int queue_size; + int queue_id; + int io_cpu; +}; + +/** + * struct ulp_ddp_config - Generic ulp ddp configuration + * Add new instances of ulp_ddp_config in the union below (nvme-tcp, etc.). + * + * @type: type of this config struct + * @nvmeotcp: NVMe-TCP specific config + */ +struct ulp_ddp_config { + enum ulp_ddp_type type; + union { + struct nvme_tcp_ddp_config nvmeotcp; + }; +}; + +/** + * struct ulp_ddp_io - ulp ddp configuration for an IO request. + * + * @command_id: identifier on the wire associated with these buffers + * @nents: number of entries in the sg_table + * @sg_table: describing the buffers for this IO request + * @first_sgl: first SGL in sg_table + */ +struct ulp_ddp_io { + u32 command_id; + int nents; + struct sg_table sg_table; + struct scatterlist first_sgl[SG_CHUNK_SIZE]; +}; + +/** + * struct ulp_ddp_dev_ops - operations used by an upper layer protocol + * to configure ddp offload + * + * @limits: query ulp driver limitations and quirks. + * @sk_add: add offload for the queue represented by socket+config + * pair. this function is used to configure either copy, crc + * or both offloads. + * @sk_del: remove offload from the socket, and release any device + * related resources. + * @setup: request copy offload for buffers associated with a + * command_id in ulp_ddp_io. + * @teardown: release offload resources association between buffers + * and command_id in ulp_ddp_io. + * @resync: respond to the driver's resync_request. Called only if + * resync is successful. + */ +struct ulp_ddp_dev_ops { + int (*limits)(struct net_device *netdev, + struct ulp_ddp_limits *limits); + int (*sk_add)(struct net_device *netdev, + struct sock *sk, + struct ulp_ddp_config *config); + void (*sk_del)(struct net_device *netdev, + struct sock *sk); + int (*setup)(struct net_device *netdev, + struct sock *sk, + struct ulp_ddp_io *io); + void (*teardown)(struct net_device *netdev, + struct sock *sk, + struct ulp_ddp_io *io, + void *ddp_ctx); + void (*resync)(struct net_device *netdev, + struct sock *sk, u32 seq); +}; + +#define ULP_DDP_RESYNC_PENDING BIT(0) + +/** + * struct ulp_ddp_ulp_ops - Interface to register upper layer + * Direct Data Placement (DDP) TCP offload. + * @resync_request: NIC requests ulp to indicate if @seq is the start + * of a message. + * @ddp_teardown_done: NIC driver informs the ulp that teardown is done, + * used for async completions. + */ +struct ulp_ddp_ulp_ops { + bool (*resync_request)(struct sock *sk, u32 seq, u32 flags); + void (*ddp_teardown_done)(void *ddp_ctx); +}; + +/** + * struct ulp_ddp_ctx - Generic ulp ddp context + * + * @type: type of this context struct + * @buf: protocol-specific context struct + */ +struct ulp_ddp_ctx { + enum ulp_ddp_type type; + unsigned char buf[]; +}; + +static inline struct ulp_ddp_ctx *ulp_ddp_get_ctx(const struct sock *sk) +{ + struct inet_connection_sock *icsk = inet_csk(sk); + + return (__force struct ulp_ddp_ctx *)icsk->icsk_ulp_ddp_data; +} + +static inline void ulp_ddp_set_ctx(struct sock *sk, void *ctx) +{ + struct inet_connection_sock *icsk = inet_csk(sk); + + rcu_assign_pointer(icsk->icsk_ulp_ddp_data, ctx); +} + +#endif /* _ULP_DDP_H */ diff --git a/include/net/ulp_ddp_caps.h b/include/net/ulp_ddp_caps.h new file mode 100644 index 000000000000..e16e5a694238 --- /dev/null +++ b/include/net/ulp_ddp_caps.h @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * ulp_ddp.h + * Author: Aurelien Aptel + * Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved. + */ +#ifndef _ULP_DDP_CAPS_H +#define _ULP_DDP_CAPS_H + +#include + +enum { + ULP_DDP_C_NVME_TCP_BIT, + ULP_DDP_C_NVME_TCP_DDGST_RX_BIT, + + /* add capabilities above */ + ULP_DDP_C_COUNT, +}; + +#define __ULP_DDP_C_BIT(bit) ((u64)1 << (bit)) +#define __ULP_DDP_C(name) __ULP_DDP_C_BIT(ULP_DDP_C_##name##_BIT) + +#define ULP_DDP_C_NVME_TCP __ULP_DDP_C(NVME_TCP) +#define ULP_DDP_C_NVME_TCP_DDGST_RX __ULP_DDP_C(NVME_TCP) + +struct ulp_ddp_netdev_caps { + DECLARE_BITMAP(active, ULP_DDP_C_COUNT); + DECLARE_BITMAP(hw, ULP_DDP_C_COUNT); +}; + +static inline bool ulp_ddp_cap_turned_on(unsigned long *old, unsigned long *new, int bit_nr) +{ + return !test_bit(bit_nr, old) && test_bit(bit_nr, new); +} + +static inline bool ulp_ddp_cap_turned_off(unsigned long *old, unsigned long *new, int bit_nr) +{ + return test_bit(bit_nr, old) && !test_bit(bit_nr, new); +} + +#endif diff --git a/net/Kconfig b/net/Kconfig index 48c33c222199..3c59eba4a438 100644 --- a/net/Kconfig +++ b/net/Kconfig @@ -471,4 +471,24 @@ config NETDEV_ADDR_LIST_TEST default KUNIT_ALL_TESTS depends on KUNIT +config ULP_DDP + bool "ULP direct data placement offload" + help + This feature provides a generic infrastructure for Direct + Data Placement (DDP) offload for Upper Layer Protocols (ULP, + such as NVMe-TCP). + + If the ULP and NIC driver supports it, the ULP code can + request the NIC to place ULP response data directly + into application memory, avoiding a costly copy. + + This infrastructure also allows for offloading the ULP data + integrity checks (e.g. data digest) that would otherwise + require another costly pass on the data we managed to avoid + copying. + + For more information, see + . + + endif # if NET diff --git a/net/core/skbuff.c b/net/core/skbuff.c index 4e73ab3482b8..d410dbf862f9 100644 --- a/net/core/skbuff.c +++ b/net/core/skbuff.c @@ -72,6 +72,7 @@ #include #include #include +#include #include #include @@ -6522,7 +6523,7 @@ void skb_condense(struct sk_buff *skb) { if (skb->data_len) { if (skb->data_len > skb->end - skb->tail || - skb_cloned(skb)) + skb_cloned(skb) || skb_is_ulp_ddp(skb)) return; /* Nice, we can free page frag(s) right now */ diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c index cc072d2cfcd8..c711614604a6 100644 --- a/net/ipv4/tcp_input.c +++ b/net/ipv4/tcp_input.c @@ -5234,6 +5234,10 @@ tcp_collapse(struct sock *sk, struct sk_buff_head *list, struct rb_root *root, memcpy(nskb->cb, skb->cb, sizeof(skb->cb)); #ifdef CONFIG_TLS_DEVICE nskb->decrypted = skb->decrypted; +#endif +#ifdef CONFIG_ULP_DDP + nskb->ulp_ddp = skb->ulp_ddp; + nskb->ulp_crc = skb->ulp_crc; #endif TCP_SKB_CB(nskb)->seq = TCP_SKB_CB(nskb)->end_seq = start; if (list) @@ -5267,6 +5271,10 @@ tcp_collapse(struct sock *sk, struct sk_buff_head *list, struct rb_root *root, #ifdef CONFIG_TLS_DEVICE if (skb->decrypted != nskb->decrypted) goto end; +#endif +#ifdef CONFIG_ULP_DDP + if (skb_is_ulp_crc(skb) != skb_is_ulp_crc(nskb)) + goto end; #endif } } diff --git a/net/ipv4/tcp_ipv4.c b/net/ipv4/tcp_ipv4.c index 8320d0ecb13a..8c5e1e2e2809 100644 --- a/net/ipv4/tcp_ipv4.c +++ b/net/ipv4/tcp_ipv4.c @@ -1861,6 +1861,9 @@ bool tcp_add_backlog(struct sock *sk, struct sk_buff *skb, TCP_SKB_CB(skb)->tcp_flags) & (TCPHDR_ECE | TCPHDR_CWR)) || #ifdef CONFIG_TLS_DEVICE tail->decrypted != skb->decrypted || +#endif +#ifdef CONFIG_ULP_DDP + skb_is_ulp_crc(tail) != skb_is_ulp_crc(skb) || #endif thtail->doff != th->doff || memcmp(thtail + 1, th + 1, hdrlen - sizeof(*th))) diff --git a/net/ipv4/tcp_offload.c b/net/ipv4/tcp_offload.c index 45dda7889387..2e62f18e85c0 100644 --- a/net/ipv4/tcp_offload.c +++ b/net/ipv4/tcp_offload.c @@ -268,6 +268,9 @@ struct sk_buff *tcp_gro_receive(struct list_head *head, struct sk_buff *skb) #ifdef CONFIG_TLS_DEVICE flush |= p->decrypted ^ skb->decrypted; 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In order to support future ULP DDP capabilities and statistics without having to change the netlink protocol (and userspace ethtool) we add new string sets to let userspace dynamically fetch what the kernel supports. This also allows drivers to return their own statistics. * ETH_SS_ULP_DDP_CAPS stores names of ULP DDP capabilities * ETH_SS_ULP_DDP_STATS stores names of ULP DDP statistics. These stringsets will be used in later commits when implementing the new ULP DDP GET/SET netlink messages. We keep the convention of strset.c of having the static_assert() right after the array declaration, despite the checkpatch warning. Signed-off-by: Shai Malin Signed-off-by: Aurelien Aptel --- include/linux/ethtool.h | 43 ++++++++++++++++++++++++++++++++++++ include/uapi/linux/ethtool.h | 4 ++++ net/ethtool/common.c | 21 ++++++++++++++++++ net/ethtool/common.h | 2 ++ net/ethtool/strset.c | 11 +++++++++ 5 files changed, 81 insertions(+) diff --git a/include/linux/ethtool.h b/include/linux/ethtool.h index 20d197693d34..1783a4402686 100644 --- a/include/linux/ethtool.h +++ b/include/linux/ethtool.h @@ -477,6 +477,49 @@ struct ethtool_module_power_mode_params { enum ethtool_module_power_mode mode; }; +/** + * struct ethtool_ulp_ddp_stats - ULP DDP offload statistics + * @rx_nvmeotcp_sk_add: number of sockets successfully prepared for offloading. + * @rx_nvmeotcp_sk_add_fail: number of sockets that failed to be prepared for offloading. + * @rx_nvmeotcp_sk_del: number of sockets where offloading has been removed. + * @rx_nvmeotcp_ddp_setup: number of NVMeTCP PDU successfully prepared for Direct Data Placement. + * @rx_nvmeotcp_ddp_setup_fail: number of PDUs that failed DDP preparation. + * @rx_nvmeotcp_ddp_teardown: number of PDUs done with DDP. + * @rx_nvmeotcp_drop: number of PDUs dropped. + * @rx_nvmeotcp_resync: number of resync. + * @rx_nvmeotcp_packets: number of offloaded PDUs. + * @rx_nvmeotcp_bytes: number of offloaded bytes. + */ +struct ethtool_ulp_ddp_stats { + u64 rx_nvmeotcp_sk_add; + u64 rx_nvmeotcp_sk_add_fail; + u64 rx_nvmeotcp_sk_del; + u64 rx_nvmeotcp_ddp_setup; + u64 rx_nvmeotcp_ddp_setup_fail; + u64 rx_nvmeotcp_ddp_teardown; + u64 rx_nvmeotcp_drop; + u64 rx_nvmeotcp_resync; + u64 rx_nvmeotcp_packets; + u64 rx_nvmeotcp_bytes; + + /* Remember to update the enum below when changing this struct */ +}; + +enum { + ETH_ULP_DDP_RX_NVMEOTCP_SK_ADD, + ETH_ULP_DDP_RX_NVMEOTCP_SK_ADD_FAIL, + ETH_ULP_DDP_RX_NVMEOTCP_SK_DEL, + ETH_ULP_DDP_RX_NVMEOTCP_DDP_SETUP, + ETH_ULP_DDP_RX_NVMEOTCP_DDP_SETUP_FAIL, + ETH_ULP_DDP_RX_NVMEOTCP_DDP_TEARDOWN, + ETH_ULP_DDP_RX_NVMEOTCP_DROP, + ETH_ULP_DDP_RX_NVMEOTCP_RESYNC, + ETH_ULP_DDP_RX_NVMEOTCP_PACKETS, + ETH_ULP_DDP_RX_NVMEOTCP_BYTES, + + __ETH_ULP_DDP_STATS_CNT, +}; + /** * struct ethtool_ops - optional netdev operations * @cap_link_lanes_supported: indicates if the driver supports lanes diff --git a/include/uapi/linux/ethtool.h b/include/uapi/linux/ethtool.h index 6389953c32cf..cf26c082b1fc 100644 --- a/include/uapi/linux/ethtool.h +++ b/include/uapi/linux/ethtool.h @@ -681,6 +681,8 @@ enum ethtool_link_ext_substate_module { * @ETH_SS_STATS_ETH_MAC: names of IEEE 802.3 MAC statistics * @ETH_SS_STATS_ETH_CTRL: names of IEEE 802.3 MAC Control statistics * @ETH_SS_STATS_RMON: names of RMON statistics + * @ETH_SS_ULP_DDP_CAPS: names of ULP DDP capabilities + * @ETH_SS_ULP_DDP_STATS: per-device names of ULP DDP statistics * * @ETH_SS_COUNT: number of defined string sets */ @@ -706,6 +708,8 @@ enum ethtool_stringset { ETH_SS_STATS_ETH_MAC, ETH_SS_STATS_ETH_CTRL, ETH_SS_STATS_RMON, + ETH_SS_ULP_DDP_CAPS, + ETH_SS_ULP_DDP_STATS, /* add new constants above here */ ETH_SS_COUNT diff --git a/net/ethtool/common.c b/net/ethtool/common.c index 5fb19050991e..f79e510d671e 100644 --- a/net/ethtool/common.c +++ b/net/ethtool/common.c @@ -5,6 +5,7 @@ #include #include #include +#include #include "common.h" @@ -465,6 +466,26 @@ const char udp_tunnel_type_names[][ETH_GSTRING_LEN] = { static_assert(ARRAY_SIZE(udp_tunnel_type_names) == __ETHTOOL_UDP_TUNNEL_TYPE_CNT); +const char ulp_ddp_caps_names[][ETH_GSTRING_LEN] = { + [ULP_DDP_C_NVME_TCP_BIT] = "nvme-tcp-ddp", + [ULP_DDP_C_NVME_TCP_DDGST_RX_BIT] = "nvme-tcp-ddgst-rx-offload", +}; +static_assert(ARRAY_SIZE(ulp_ddp_caps_names) == ULP_DDP_C_COUNT); + +const char ulp_ddp_stats_names[][ETH_GSTRING_LEN] = { + [ETH_ULP_DDP_RX_NVMEOTCP_SK_ADD] = "rx_nvmeotcp_sk_add", + [ETH_ULP_DDP_RX_NVMEOTCP_SK_ADD_FAIL] = "rx_nvmeotcp_sk_add_fail", + [ETH_ULP_DDP_RX_NVMEOTCP_SK_DEL] = "rx_nvmeotcp_sk_del", + [ETH_ULP_DDP_RX_NVMEOTCP_DDP_SETUP] = "rx_nvmeotcp_ddp_setup", + [ETH_ULP_DDP_RX_NVMEOTCP_DDP_SETUP_FAIL] = "rx_nvmeotcp_ddp_setup_fail", + [ETH_ULP_DDP_RX_NVMEOTCP_DDP_TEARDOWN] = "rx_nvmeotcp_ddp_teardown", + [ETH_ULP_DDP_RX_NVMEOTCP_DROP] = "rx_nvmeotcp_drop", + [ETH_ULP_DDP_RX_NVMEOTCP_RESYNC] = "rx_nvmeotcp_resync", + [ETH_ULP_DDP_RX_NVMEOTCP_PACKETS] = "rx_nvmeotcp_packets", + [ETH_ULP_DDP_RX_NVMEOTCP_BYTES] = "rx_nvmeotcp_bytes", +}; +static_assert(ARRAY_SIZE(ulp_ddp_stats_names) == __ETH_ULP_DDP_STATS_CNT); + /* return false if legacy contained non-0 deprecated fields * maxtxpkt/maxrxpkt. rest of ksettings always updated */ diff --git a/net/ethtool/common.h b/net/ethtool/common.h index b1b9db810eca..6f71ee24c786 100644 --- a/net/ethtool/common.h +++ b/net/ethtool/common.h @@ -36,6 +36,8 @@ extern const char sof_timestamping_names[][ETH_GSTRING_LEN]; extern const char ts_tx_type_names[][ETH_GSTRING_LEN]; extern const char ts_rx_filter_names[][ETH_GSTRING_LEN]; extern const char udp_tunnel_type_names[][ETH_GSTRING_LEN]; +extern const char ulp_ddp_caps_names[][ETH_GSTRING_LEN]; +extern const char ulp_ddp_stats_names[][ETH_GSTRING_LEN]; int __ethtool_get_link(struct net_device *dev); diff --git a/net/ethtool/strset.c b/net/ethtool/strset.c index 3f7de54d85fb..2818e1f0687c 100644 --- a/net/ethtool/strset.c +++ b/net/ethtool/strset.c @@ -2,6 +2,7 @@ #include #include +#include #include "netlink.h" #include "common.h" @@ -105,6 +106,16 @@ static const struct strset_info info_template[] = { .count = __ETHTOOL_A_STATS_RMON_CNT, .strings = stats_rmon_names, }, + [ETH_SS_ULP_DDP_CAPS] = { + .per_dev = false, + .count = ULP_DDP_C_COUNT, + .strings = ulp_ddp_caps_names, + }, + [ETH_SS_ULP_DDP_STATS] = { + .per_dev = false, + .count = __ETH_ULP_DDP_STATS_CNT, + .strings = ulp_ddp_stats_names, + }, }; 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Tue, 17 Jan 2023 15:36:23 +0000 Received: from SJ1PR12MB6075.namprd12.prod.outlook.com ([fe80::6d66:a4bb:4018:3c70]) by SJ1PR12MB6075.namprd12.prod.outlook.com ([fe80::6d66:a4bb:4018:3c70%8]) with mapi id 15.20.6002.013; Tue, 17 Jan 2023 15:36:23 +0000 From: Aurelien Aptel To: linux-nvme@lists.infradead.org, netdev@vger.kernel.org, sagi@grimberg.me, hch@lst.de, kbusch@kernel.org, axboe@fb.com, chaitanyak@nvidia.com, davem@davemloft.net, kuba@kernel.org Cc: Aurelien Aptel , aurelien.aptel@gmail.com, smalin@nvidia.com, malin1024@gmail.com, ogerlitz@nvidia.com, yorayz@nvidia.com, borisp@nvidia.com Subject: [PATCH v9 03/25] net/ethtool: add ULP_DDP_{GET,SET} operations for caps and stats Date: Tue, 17 Jan 2023 17:35:13 +0200 Message-Id: <20230117153535.1945554-4-aaptel@nvidia.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20230117153535.1945554-1-aaptel@nvidia.com> References: <20230117153535.1945554-1-aaptel@nvidia.com> X-ClientProxiedBy: FR0P281CA0098.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:a9::8) To SJ1PR12MB6075.namprd12.prod.outlook.com (2603:10b6:a03:45e::8) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PR12MB6075:EE_|PH8PR12MB6889:EE_ X-MS-Office365-Filtering-Correlation-Id: 8d0f4677-63b9-4722-fe30-08daf8a09689 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: yBa5dq3OiWTRjFp4y6ncAdRUO7ihq0hOYgKw1KLyLlCz1z91GZZHThL0oTTdAlAF2lgSb3HSM+f9cgYCeVDeMQVZLY4VZwMniIgKZCviaUF2FfHlWZqEPwLL56NTZQNHH2xL9Sx2dRvSn7COM07bEk8AFdcaWZw0JJ0W63BbeOMQzrxS1+Cc/YJkMCcJz1QF9Z9ZJMxRsbP8vhrfWGbE3qODkL3Z8v8OYUEbo4zqfn9Kj+XSIi39iQb6zDt6KkZeN26XfUTrxwisuXl7MvBdB2YaetMSAR5xKFz6FOCRX25n8MCKArbzsZaKRCOV++NRAvFlD/43hsFo+/G1H5pdPRBlF99i6Z+1KI7PBeg0prDWoRWn1aei3TmBduyR9vGcTzb6JZAJ+xTe2+sBQKcjFQMuosYkwchs1ytJC39mgEBsguhwwXzJ+EMwUSKPDvdELyD421grw4ZwWes1OVZ5mGal7OVFvLise8xHpVo9ggIBeKhD9t+G/8qg2NvE+aSMJT51+/p99VXUk7ww8BElZC3XEJ45qw5O0mC+vm3dornZXZXGqCuGyRELzT00+q2QCJDF7IduxV1pflf94kv+weCXypGpuJI9JMsWeSqUC4nH2nhinsQbojFFWGvHmKdQgY+vGN6flrApm618T5nur++4aus91g4eL/aRpf9+UlitKRmyiW2yM8A++ZEAXNAaLYpTOKYU+8+SmfbwAUGCMnRqt8MCXMATNVF2gpNHzfsp4R6t3uvSGEXH4/PSCwaf8ra99KX2Y0FZyK669PQjmFkMkTloOS4jRCpwb5h4hQghFEMbKDOlB66ZMt3yoAKAQhJriKV2Cjp8xC5uFYkdG+NflYS0MVH6fRlzxQoCgaJuKUa7Ir2doHeBH5Awe3GOEcKo64jQJRikLm0iohX20JT1ZGnH3hPjTv3O/egnJWcTwyUG4xu/WbIz5+MSggwEkjk/1YSH0+K6rbeiG6djNxqepK+w7tjIhWGiq1ck9s+jvjZkj5lJRnW3mpU2fxcq/3QoKMCtIo7OQom0BE+KdsO+9JIzH99+Mc7Eklq63ubA8ib43BdwSLRXMJsfKquJNhHhcJJYPQEFDFakoIM+eq6b2VUQc6OU5fKkfIq+/Q9Swoen/xZprZbtQxnXTx3zISBYNvbJjjyNcnPmmj7GzSyJvB3Bd822LIEzXZZdq15F9/ZwcNL/cU8n5N7rn7apF/zarzKeq+JWUECl3eg7q6CDDqGwCNRRwymEUSgh7CWQRsefvAVDUSNRSiiZW0LbL5TqbgPn2J3l4HAVhQCyInDk+iu2MhR1jcwT7TKrV4dUInxiXQxt3Hd+VdDfDvKx264/NKrmuV3UX9tUprnK6S7RFXaKe/VhI6JVyH/3wAPUaNptrZpoZ+IUpepXdbf7H9TKNXF/YpQSJtJj1MLHodrbSN1L2NF7PPiAfUu0lxUoDwlYhBwCq5vjdKYhKEpeYxqN43+Uc/0vemcHxCbc+8G8cS6PN+Ao37X+iWP2Qt9jr9GnFU7uOFMnQXtYdQlxCcRHcaANkfsz2qgnA6E58Wr2OODYdopFNX1k3uebL6wG6rIYiZ8gr25ra/nSuXrl X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8d0f4677-63b9-4722-fe30-08daf8a09689 X-MS-Exchange-CrossTenant-AuthSource: SJ1PR12MB6075.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jan 2023 15:36:23.2459 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: w0gyaZna52JnZ99FXlBm+6yteKqrqwOOSjsTKkJ6D5ocw5q3e3swPCyeq6Tea88tpQOA7T48lQGZqYzIbDzL+A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB6889 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org This commit adds: - 2 new netlink messages: * ULP_DDP_GET: returns a bitset of supported and active capabilities * ULP_DDP_SET: tries to activate requested bitset and returns results - 2 new netdev ethtool_ops operations: * ethtool_ops->get_ulp_ddp_stats(): retrieve device statistics * ethtool_ops->set_ulp_ddp_capabilities(): try to apply capability changes ULP DDP capabilities handling is similar to netdev features handling. If a ULP_DDP_GET message has requested statistics via the ETHTOOL_FLAG_STATS header flag, then per-device statistics are returned to userspace. Similar to netdev features, ULP_DDP_GET capabilities and statistics can be returned in a verbose (default) or compact form (if ETHTOOL_FLAG_COMPACT_BITSET is set in header flags). Verbose statistics are nested as follows: STATS (nest) COUNT (u32) MAP (nest) ITEM (nest) NAME (strz) VAL (u64) ... Compact statistics are nested as follows: STATS (nest) COUNT (u32) COMPACT_VALUES (array of u64) Signed-off-by: Shai Malin Signed-off-by: Aurelien Aptel --- include/linux/ethtool.h | 6 + include/uapi/linux/ethtool_netlink.h | 49 ++++ net/ethtool/Makefile | 2 +- net/ethtool/netlink.c | 17 ++ net/ethtool/netlink.h | 4 + net/ethtool/ulp_ddp.c | 399 +++++++++++++++++++++++++++ 6 files changed, 476 insertions(+), 1 deletion(-) create mode 100644 net/ethtool/ulp_ddp.c diff --git a/include/linux/ethtool.h b/include/linux/ethtool.h index 1783a4402686..016a3a1cc3ff 100644 --- a/include/linux/ethtool.h +++ b/include/linux/ethtool.h @@ -692,6 +692,10 @@ enum { * plugged-in. * @set_module_power_mode: Set the power mode policy for the plug-in module * used by the network device. + * @get_ulp_ddp_stats: Query ULP DDP statistics. Return the number of + * counters or -1 or error. + * @set_ulp_ddp_capabilities: Set device ULP DDP capabilities. + * Returns a negative error code or zero. * * All operations are optional (i.e. the function pointer may be set * to %NULL) and callers must take this into account. Callers must @@ -830,6 +834,8 @@ struct ethtool_ops { int (*set_module_power_mode)(struct net_device *dev, const struct ethtool_module_power_mode_params *params, struct netlink_ext_ack *extack); + int (*get_ulp_ddp_stats)(struct net_device *dev, struct ethtool_ulp_ddp_stats *stats); + int (*set_ulp_ddp_capabilities)(struct net_device *dev, unsigned long *bits); }; int ethtool_check_ops(const struct ethtool_ops *ops); diff --git a/include/uapi/linux/ethtool_netlink.h b/include/uapi/linux/ethtool_netlink.h index 83557cae0b87..3218bc1f081e 100644 --- a/include/uapi/linux/ethtool_netlink.h +++ b/include/uapi/linux/ethtool_netlink.h @@ -55,6 +55,8 @@ enum { ETHTOOL_MSG_PLCA_GET_CFG, ETHTOOL_MSG_PLCA_SET_CFG, ETHTOOL_MSG_PLCA_GET_STATUS, + ETHTOOL_MSG_ULP_DDP_GET, + ETHTOOL_MSG_ULP_DDP_SET, /* add new constants above here */ __ETHTOOL_MSG_USER_CNT, @@ -105,6 +107,8 @@ enum { ETHTOOL_MSG_PLCA_GET_CFG_REPLY, ETHTOOL_MSG_PLCA_GET_STATUS_REPLY, ETHTOOL_MSG_PLCA_NTF, + ETHTOOL_MSG_ULP_DDP_GET_REPLY, + ETHTOOL_MSG_ULP_DDP_SET_REPLY, /* add new constants above here */ __ETHTOOL_MSG_KERNEL_CNT, @@ -922,6 +926,51 @@ enum { ETHTOOL_A_PLCA_MAX = (__ETHTOOL_A_PLCA_CNT - 1) }; +/* ULP DDP */ + +enum { + ETHTOOL_A_ULP_DDP_UNSPEC, + ETHTOOL_A_ULP_DDP_HEADER, /* nest - _A_HEADER_* */ + ETHTOOL_A_ULP_DDP_HW, /* bitset */ + ETHTOOL_A_ULP_DDP_ACTIVE, /* bitset */ + ETHTOOL_A_ULP_DDP_WANTED, /* bitset */ + ETHTOOL_A_ULP_DDP_STATS, /* nest - _A_ULP_DDP_STATS_* */ + + /* add new constants above here */ + __ETHTOOL_A_ULP_DDP_CNT, + ETHTOOL_A_ULP_DDP_MAX = __ETHTOOL_A_ULP_DDP_CNT - 1 +}; + +enum { + ETHTOOL_A_ULP_DDP_STATS_UNSPEC, + ETHTOOL_A_ULP_DDP_STATS_COUNT, /* u32 */ + ETHTOOL_A_ULP_DDP_STATS_COMPACT_VALUES, /* array, u64 */ + ETHTOOL_A_ULP_DDP_STATS_MAP, /* nest - _A_ULP_DDP_STATS_MAP_* */ + + /* add new constants above here */ + __ETHTOOL_A_ULP_DDP_STATS_CNT, + ETHTOOL_A_ULP_DDP_STATS_MAX = __ETHTOOL_A_ULP_DDP_STATS_CNT - 1 +}; + +enum { + ETHTOOL_A_ULP_DDP_STATS_MAP_UNSPEC, + ETHTOOL_A_ULP_DDP_STATS_MAP_ITEM, /* next - _A_ULP_DDP_STATS_MAP_ITEM_* */ + + /* add new constants above here */ + __ETHTOOL_A_ULP_DDP_STATS_MAP_CNT, + ETHTOOL_A_ULP_DDP_STATS_MAP_MAX = __ETHTOOL_A_ULP_DDP_STATS_MAP_CNT - 1 +}; + +enum { + ETHTOOL_A_ULP_DDP_STATS_MAP_ITEM_UNSPEC, + ETHTOOL_A_ULP_DDP_STATS_MAP_ITEM_NAME, /* string */ + ETHTOOL_A_ULP_DDP_STATS_MAP_ITEM_VAL, /* u64 */ + + /* add new constants above here */ + __ETHTOOL_A_ULP_DDP_STATS_MAP_ITEM_CNT, + ETHTOOL_A_ULP_DDP_STATS_MAP_ITEM_MAX = __ETHTOOL_A_ULP_DDP_STATS_MAP_ITEM_CNT - 1 +}; + /* generic netlink info */ #define ETHTOOL_GENL_NAME "ethtool" #define ETHTOOL_GENL_VERSION 1 diff --git a/net/ethtool/Makefile b/net/ethtool/Makefile index 563864c1bf5a..68a1114ec838 100644 --- a/net/ethtool/Makefile +++ b/net/ethtool/Makefile @@ -8,4 +8,4 @@ ethtool_nl-y := netlink.o bitset.o strset.o linkinfo.o linkmodes.o rss.o \ linkstate.o debug.o wol.o features.o privflags.o rings.o \ channels.o coalesce.o pause.o eee.o tsinfo.o cabletest.o \ tunnels.o fec.o eeprom.o stats.o phc_vclocks.o module.o \ - pse-pd.o plca.o + pse-pd.o plca.o ulp_ddp.o diff --git a/net/ethtool/netlink.c b/net/ethtool/netlink.c index 9f924875bba9..5cfdc989540c 100644 --- a/net/ethtool/netlink.c +++ b/net/ethtool/netlink.c @@ -290,6 +290,7 @@ ethnl_default_requests[__ETHTOOL_MSG_USER_CNT] = { [ETHTOOL_MSG_RSS_GET] = ðnl_rss_request_ops, [ETHTOOL_MSG_PLCA_GET_CFG] = ðnl_plca_cfg_request_ops, [ETHTOOL_MSG_PLCA_GET_STATUS] = ðnl_plca_status_request_ops, + [ETHTOOL_MSG_ULP_DDP_GET] = ðnl_ulp_ddp_request_ops, }; static struct ethnl_dump_ctx *ethnl_dump_context(struct netlink_callback *cb) @@ -1076,6 +1077,22 @@ static const struct genl_ops ethtool_genl_ops[] = { .policy = ethnl_plca_get_status_policy, .maxattr = ARRAY_SIZE(ethnl_plca_get_status_policy) - 1, }, + { + .cmd = ETHTOOL_MSG_ULP_DDP_GET, + .doit = ethnl_default_doit, + .start = ethnl_default_start, + .dumpit = ethnl_default_dumpit, + .done = ethnl_default_done, + .policy = ethnl_ulp_ddp_get_policy, + .maxattr = ARRAY_SIZE(ethnl_ulp_ddp_get_policy) - 1, + }, + { + .cmd = ETHTOOL_MSG_ULP_DDP_SET, + .flags = GENL_UNS_ADMIN_PERM, + .doit = ethnl_set_ulp_ddp, + .policy = ethnl_ulp_ddp_set_policy, + .maxattr = ARRAY_SIZE(ethnl_ulp_ddp_set_policy) - 1, + }, }; static const struct genl_multicast_group ethtool_nl_mcgrps[] = { diff --git a/net/ethtool/netlink.h b/net/ethtool/netlink.h index f271266f6e28..6e7378c9f27f 100644 --- a/net/ethtool/netlink.h +++ b/net/ethtool/netlink.h @@ -349,6 +349,7 @@ extern const struct ethnl_request_ops ethnl_pse_request_ops; extern const struct ethnl_request_ops ethnl_rss_request_ops; extern const struct ethnl_request_ops ethnl_plca_cfg_request_ops; extern const struct ethnl_request_ops ethnl_plca_status_request_ops; +extern const struct ethnl_request_ops ethnl_ulp_ddp_request_ops; extern const struct nla_policy ethnl_header_policy[ETHTOOL_A_HEADER_FLAGS + 1]; extern const struct nla_policy ethnl_header_policy_stats[ETHTOOL_A_HEADER_FLAGS + 1]; @@ -393,6 +394,8 @@ extern const struct nla_policy ethnl_rss_get_policy[ETHTOOL_A_RSS_CONTEXT + 1]; extern const struct nla_policy ethnl_plca_get_cfg_policy[ETHTOOL_A_PLCA_HEADER + 1]; extern const struct nla_policy ethnl_plca_set_cfg_policy[ETHTOOL_A_PLCA_MAX + 1]; extern const struct nla_policy ethnl_plca_get_status_policy[ETHTOOL_A_PLCA_HEADER + 1]; +extern const struct nla_policy ethnl_ulp_ddp_get_policy[ETHTOOL_A_ULP_DDP_HEADER + 1]; +extern const struct nla_policy ethnl_ulp_ddp_set_policy[ETHTOOL_A_ULP_DDP_WANTED + 1]; int ethnl_set_linkinfo(struct sk_buff *skb, struct genl_info *info); int ethnl_set_linkmodes(struct sk_buff *skb, struct genl_info *info); @@ -414,6 +417,7 @@ int ethnl_set_fec(struct sk_buff *skb, struct genl_info *info); int ethnl_set_module(struct sk_buff *skb, struct genl_info *info); int ethnl_set_pse(struct sk_buff *skb, struct genl_info *info); int ethnl_set_plca_cfg(struct sk_buff *skb, struct genl_info *info); +int ethnl_set_ulp_ddp(struct sk_buff *skb, struct genl_info *info); extern const char stats_std_names[__ETHTOOL_STATS_CNT][ETH_GSTRING_LEN]; extern const char stats_eth_phy_names[__ETHTOOL_A_STATS_ETH_PHY_CNT][ETH_GSTRING_LEN]; diff --git a/net/ethtool/ulp_ddp.c b/net/ethtool/ulp_ddp.c new file mode 100644 index 000000000000..a6ef79ddcb39 --- /dev/null +++ b/net/ethtool/ulp_ddp.c @@ -0,0 +1,399 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * + * ulp_ddp.c + * Author: Aurelien Aptel + * Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved. + */ + +#include "netlink.h" +#include "common.h" +#include "bitset.h" +#include + +static struct ulp_ddp_netdev_caps *netdev_ulp_ddp_caps(struct net_device *dev) +{ +#ifdef CONFIG_ULP_DDP + return &dev->ulp_ddp_caps; +#else + return NULL; +#endif +} + +/* ULP_DDP_GET */ + +struct ulp_ddp_req_info { + struct ethnl_req_info base; +}; + +struct ulp_ddp_reply_data { + struct ethnl_reply_data base; + DECLARE_BITMAP(hw, ULP_DDP_C_COUNT); + DECLARE_BITMAP(active, ULP_DDP_C_COUNT); + struct ethtool_ulp_ddp_stats stats; +}; + +#define ULP_DDP_REPDATA(__reply_base) \ + container_of(__reply_base, struct ulp_ddp_reply_data, base) + +const struct nla_policy ethnl_ulp_ddp_get_policy[] = { + [ETHTOOL_A_ULP_DDP_HEADER] = + NLA_POLICY_NESTED(ethnl_header_policy_stats), +}; + +/* When requested (ETHTOOL_FLAG_STATS) ULP DDP stats are appended to + * the response. + * + * Similar to bitsets, stats can be in a compact or verbose form. + * + * The verbose form is as follow: + * + * STATS (nest) + * COUNT (u32) + * MAP (nest) + * ITEM (nest) + * NAME (strz) + * VAL (u64) + * ... + * + * The compact form is as follow: + * + * STATS (nest) + * COUNT (u32) + * COMPACT_VALUES (array of u64) + * + */ +static int ulp_ddp_stats64_size(const struct ethnl_req_info *req_base, + const struct ethnl_reply_data *reply_base, + ethnl_string_array_t names, + unsigned int count, + bool compact) +{ + unsigned int len = 0; + unsigned int i; + + /* count */ + len += nla_total_size(sizeof(u32)); + + if (compact) { + /* values */ + len += nla_total_size(count * sizeof(u64)); + } else { + unsigned int maplen = 0; + + for (i = 0; i < count; i++) { + unsigned int itemlen = 0; + + /* name */ + itemlen += ethnl_strz_size(names[i]); + /* value */ + itemlen += nla_total_size(sizeof(u64)); + + /* item nest */ + maplen += nla_total_size(itemlen); + } + + /* map nest */ + len += nla_total_size(maplen); + } + /* outermost nest */ + return nla_total_size(len); +} + +static int ulp_ddp_put_stats64(struct sk_buff *skb, int attrtype, const u64 *val, + unsigned int count, ethnl_string_array_t names, bool compact) +{ + struct nlattr *nest; + struct nlattr *attr; + + nest = nla_nest_start(skb, attrtype); + if (!nest) + return -EMSGSIZE; + + if (nla_put_u32(skb, ETHTOOL_A_ULP_DDP_STATS_COUNT, count)) + goto nla_put_failure; + if (compact) { + unsigned int nbytes = count * sizeof(*val); + u64 *dst; + + attr = nla_reserve(skb, ETHTOOL_A_ULP_DDP_STATS_COMPACT_VALUES, nbytes); + if (!attr) + goto nla_put_failure; + dst = nla_data(attr); + memcpy(dst, val, nbytes); + } else { + struct nlattr *map; + unsigned int i; + + map = nla_nest_start(skb, ETHTOOL_A_ULP_DDP_STATS_MAP); + if (!map) + goto nla_put_failure; + for (i = 0; i < count; i++) { + attr = nla_nest_start(skb, ETHTOOL_A_ULP_DDP_STATS_MAP_ITEM); + if (!attr) + goto nla_put_failure; + if (ethnl_put_strz(skb, ETHTOOL_A_ULP_DDP_STATS_MAP_ITEM_NAME, names[i])) + goto nla_put_failure; + if (nla_put_u64_64bit(skb, ETHTOOL_A_ULP_DDP_STATS_MAP_ITEM_VAL, + val[i], -1)) + goto nla_put_failure; + nla_nest_end(skb, attr); + } + nla_nest_end(skb, map); + } + nla_nest_end(skb, nest); + return 0; + +nla_put_failure: + nla_nest_cancel(skb, nest); + return -EMSGSIZE; +} + +static int ulp_ddp_prepare_data(const struct ethnl_req_info *req_base, + struct ethnl_reply_data *reply_base, + struct genl_info *info) +{ + struct ulp_ddp_reply_data *data = ULP_DDP_REPDATA(reply_base); + const struct ethtool_ops *ops = reply_base->dev->ethtool_ops; + struct net_device *dev = reply_base->dev; + struct ulp_ddp_netdev_caps *caps; + + caps = netdev_ulp_ddp_caps(dev); + if (!caps) + return -EOPNOTSUPP; + + bitmap_copy(data->hw, caps->hw, ULP_DDP_C_COUNT); + bitmap_copy(data->active, caps->active, ULP_DDP_C_COUNT); + + if (req_base->flags & ETHTOOL_FLAG_STATS) { + if (!ops->get_ulp_ddp_stats) + return -EOPNOTSUPP; + ops->get_ulp_ddp_stats(dev, &data->stats); + } + return 0; +} + +static int ulp_ddp_reply_size(const struct ethnl_req_info *req_base, + const struct ethnl_reply_data *reply_base) +{ + const struct ulp_ddp_reply_data *data = ULP_DDP_REPDATA(reply_base); + bool compact = req_base->flags & ETHTOOL_FLAG_COMPACT_BITSETS; + unsigned int len = 0; + int ret; + + ret = ethnl_bitset_size(data->hw, NULL, ULP_DDP_C_COUNT, + ulp_ddp_caps_names, compact); + if (ret < 0) + return ret; + len += ret; + ret = ethnl_bitset_size(data->active, NULL, ULP_DDP_C_COUNT, + ulp_ddp_caps_names, compact); + if (ret < 0) + return ret; + len += ret; + + if (req_base->flags & ETHTOOL_FLAG_STATS) { + ret = ulp_ddp_stats64_size(req_base, reply_base, + ulp_ddp_stats_names, __ETH_ULP_DDP_STATS_CNT, + compact); + if (ret < 0) + return ret; + len += ret; + } + return len; +} + +static int ulp_ddp_fill_reply(struct sk_buff *skb, + const struct ethnl_req_info *req_base, + const struct ethnl_reply_data *reply_base) +{ + const struct ulp_ddp_reply_data *data = ULP_DDP_REPDATA(reply_base); + bool compact = req_base->flags & ETHTOOL_FLAG_COMPACT_BITSETS; + int ret; + + ret = ethnl_put_bitset(skb, ETHTOOL_A_ULP_DDP_HW, data->hw, + NULL, ULP_DDP_C_COUNT, + ulp_ddp_caps_names, compact); + if (ret < 0) + return ret; + + ret = ethnl_put_bitset(skb, ETHTOOL_A_ULP_DDP_ACTIVE, data->active, + NULL, ULP_DDP_C_COUNT, + ulp_ddp_caps_names, compact); + if (ret < 0) + return ret; + + if (req_base->flags & ETHTOOL_FLAG_STATS) { + ret = ulp_ddp_put_stats64(skb, ETHTOOL_A_ULP_DDP_STATS, + (u64 *)&data->stats, + __ETH_ULP_DDP_STATS_CNT, + ulp_ddp_stats_names, + compact); + if (ret < 0) + return ret; + } + return ret; +} + +const struct ethnl_request_ops ethnl_ulp_ddp_request_ops = { + .request_cmd = ETHTOOL_MSG_ULP_DDP_GET, + .reply_cmd = ETHTOOL_MSG_ULP_DDP_GET_REPLY, + .hdr_attr = ETHTOOL_A_ULP_DDP_HEADER, + .req_info_size = sizeof(struct ulp_ddp_req_info), + .reply_data_size = sizeof(struct ulp_ddp_reply_data), + + .prepare_data = ulp_ddp_prepare_data, + .reply_size = ulp_ddp_reply_size, + .fill_reply = ulp_ddp_fill_reply, +}; + +/* ULP_DDP_SET */ + +const struct nla_policy ethnl_ulp_ddp_set_policy[] = { + [ETHTOOL_A_ULP_DDP_HEADER] = + NLA_POLICY_NESTED(ethnl_header_policy), + [ETHTOOL_A_ULP_DDP_WANTED] = { .type = NLA_NESTED }, +}; + +static int ulp_ddp_send_reply(struct net_device *dev, struct genl_info *info, + const unsigned long *wanted, + const unsigned long *wanted_mask, + const unsigned long *active, + const unsigned long *active_mask, bool compact) +{ + struct sk_buff *rskb; + void *reply_payload; + int reply_len = 0; + int ret; + + reply_len = ethnl_reply_header_size(); + ret = ethnl_bitset_size(wanted, wanted_mask, ULP_DDP_C_COUNT, + ulp_ddp_caps_names, compact); + if (ret < 0) + goto err; + reply_len += ret; + ret = ethnl_bitset_size(active, active_mask, ULP_DDP_C_COUNT, + ulp_ddp_caps_names, compact); + if (ret < 0) + goto err; + reply_len += ret; + + ret = -ENOMEM; + rskb = ethnl_reply_init(reply_len, dev, ETHTOOL_MSG_ULP_DDP_SET_REPLY, + ETHTOOL_A_ULP_DDP_HEADER, info, + &reply_payload); + if (!rskb) + goto err; + + ret = ethnl_put_bitset(rskb, ETHTOOL_A_ULP_DDP_WANTED, wanted, + wanted_mask, ULP_DDP_C_COUNT, + ulp_ddp_caps_names, compact); + if (ret < 0) + goto nla_put_failure; + ret = ethnl_put_bitset(rskb, ETHTOOL_A_ULP_DDP_ACTIVE, active, + active_mask, ULP_DDP_C_COUNT, + ulp_ddp_caps_names, compact); + if (ret < 0) + goto nla_put_failure; + + genlmsg_end(rskb, reply_payload); + ret = genlmsg_reply(rskb, info); + return ret; + +nla_put_failure: + nlmsg_free(rskb); + WARN_ONCE(1, "calculated message payload length (%d) not sufficient\n", + reply_len); +err: + GENL_SET_ERR_MSG(info, "failed to send reply message"); + return ret; +} + +int ethnl_set_ulp_ddp(struct sk_buff *skb, struct genl_info *info) +{ + DECLARE_BITMAP(old_active, ULP_DDP_C_COUNT); + DECLARE_BITMAP(new_active, ULP_DDP_C_COUNT); + DECLARE_BITMAP(req_wanted, ULP_DDP_C_COUNT); + DECLARE_BITMAP(req_mask, ULP_DDP_C_COUNT); + DECLARE_BITMAP(all_bits, ULP_DDP_C_COUNT); + DECLARE_BITMAP(tmp, ULP_DDP_C_COUNT); + struct ethnl_req_info req_info = {}; + struct nlattr **tb = info->attrs; + struct ulp_ddp_netdev_caps *caps; + struct net_device *dev; + int ret; + + if (!tb[ETHTOOL_A_ULP_DDP_WANTED]) + return -EINVAL; + ret = ethnl_parse_header_dev_get(&req_info, + tb[ETHTOOL_A_ULP_DDP_HEADER], + genl_info_net(info), info->extack, + true); + if (ret < 0) + return ret; + + dev = req_info.dev; + rtnl_lock(); + caps = netdev_ulp_ddp_caps(dev); + if (!caps) { + ret = -EOPNOTSUPP; + goto out_rtnl; + } + + ret = ethnl_parse_bitset(req_wanted, req_mask, ULP_DDP_C_COUNT, + tb[ETHTOOL_A_ULP_DDP_WANTED], + ulp_ddp_caps_names, info->extack); + if (ret < 0) + goto out_rtnl; + + /* if (req_mask & ~all_bits) */ + bitmap_fill(all_bits, ULP_DDP_C_COUNT); + bitmap_andnot(tmp, req_mask, all_bits, ULP_DDP_C_COUNT); + if (!bitmap_empty(tmp, ULP_DDP_C_COUNT)) { + ret = -EINVAL; + goto out_rtnl; + } + + /* new_active = (old_active & ~req_mask) | (wanted & req_mask) + * new_active &= caps_hw + */ + bitmap_copy(old_active, caps->active, ULP_DDP_C_COUNT); + bitmap_and(req_wanted, req_wanted, req_mask, ULP_DDP_C_COUNT); + bitmap_andnot(new_active, old_active, req_mask, ULP_DDP_C_COUNT); + bitmap_or(new_active, new_active, req_wanted, ULP_DDP_C_COUNT); + bitmap_and(new_active, new_active, caps->hw, ULP_DDP_C_COUNT); + if (!bitmap_equal(old_active, new_active, ULP_DDP_C_COUNT)) { + ret = dev->ethtool_ops->set_ulp_ddp_capabilities(dev, new_active); + if (ret) + netdev_err(dev, "set_ulp_ddp_capabilities() returned error %d\n", ret); + bitmap_copy(new_active, caps->active, ULP_DDP_C_COUNT); + } + + ret = 0; + if (!(req_info.flags & ETHTOOL_FLAG_OMIT_REPLY)) { + DECLARE_BITMAP(wanted_diff_mask, ULP_DDP_C_COUNT); + DECLARE_BITMAP(active_diff_mask, ULP_DDP_C_COUNT); + bool compact = req_info.flags & ETHTOOL_FLAG_COMPACT_BITSETS; + + /* wanted_diff_mask = req_wanted ^ new_active + * active_diff_mask = old_active ^ new_active -> mask of bits that have changed + * wanted_diff_mask &= req_mask -> mask of bits that have diff value than wanted + * req_wanted &= wanted_diff_mask -> bits that have diff value than wanted + * new_active &= active_diff_mask -> bits that have changed + */ + bitmap_xor(wanted_diff_mask, req_wanted, new_active, ULP_DDP_C_COUNT); + bitmap_xor(active_diff_mask, old_active, new_active, ULP_DDP_C_COUNT); + bitmap_and(wanted_diff_mask, wanted_diff_mask, req_mask, ULP_DDP_C_COUNT); + bitmap_and(req_wanted, req_wanted, wanted_diff_mask, ULP_DDP_C_COUNT); + bitmap_and(new_active, new_active, active_diff_mask, ULP_DDP_C_COUNT); + ret = ulp_ddp_send_reply(dev, info, + req_wanted, wanted_diff_mask, + new_active, active_diff_mask, + compact); + } + +out_rtnl: + rtnl_unlock(); + ethnl_parse_header_dev_put(&req_info); + return ret; +} From patchwork Tue Jan 17 15:35:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Aptel X-Patchwork-Id: 13104810 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 80950C6379F for ; Tue, 17 Jan 2023 15:37:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233984AbjAQPhc (ORCPT ); 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Both statistics and capabilities names can be retrieved dynamically from the kernel via string sets (no need to hardcode them and keep them in sync in ethtool). Signed-off-by: Shai Malin Signed-off-by: Aurelien Aptel --- Documentation/networking/ethtool-netlink.rst | 106 +++++++++++++++++++ Documentation/networking/statistics.rst | 1 + 2 files changed, 107 insertions(+) diff --git a/Documentation/networking/ethtool-netlink.rst b/Documentation/networking/ethtool-netlink.rst index d345f5df248e..594803fccace 100644 --- a/Documentation/networking/ethtool-netlink.rst +++ b/Documentation/networking/ethtool-netlink.rst @@ -223,6 +223,8 @@ Userspace to kernel: ``ETHTOOL_MSG_PSE_SET`` set PSE parameters ``ETHTOOL_MSG_PSE_GET`` get PSE parameters ``ETHTOOL_MSG_RSS_GET`` get RSS settings + ``ETHTOOL_MSG_ULP_DDP_GET`` get ULP DDP capabilities and stats + ``ETHTOOL_MSG_ULP_DDP_SET`` set ULP DDP capabilities ===================================== ================================= Kernel to userspace: @@ -265,6 +267,8 @@ Kernel to userspace: ``ETHTOOL_MSG_MODULE_GET_REPLY`` transceiver module parameters ``ETHTOOL_MSG_PSE_GET_REPLY`` PSE parameters ``ETHTOOL_MSG_RSS_GET_REPLY`` RSS settings + ``ETHTOOL_MSG_ULP_DDP_GET_REPLY`` ULP DDP capabilities and stats + ``ETHTOOL_MSG_ULP_DDP_SET_REPLY`` optional reply to ULP_DDP_SET ======================================== ================================= ``GET`` requests are sent by userspace applications to retrieve device @@ -1868,6 +1872,108 @@ When set, the ``ETHTOOL_A_PLCA_STATUS`` attribute indicates whether the node is detecting the presence of the BEACON on the network. This flag is corresponding to ``IEEE 802.3cg-2019`` 30.16.1.1.2 aPLCAStatus. +ULP_DDP_GET +=========== + +Get ULP DDP capabilities for the interface and optional driver-defined stats. + +Request contents: + + ==================================== ====== ========================== + ``ETHTOOL_A_ULP_DDP_HEADER`` nested request header + ==================================== ====== ========================== + +Kernel response contents: + + ==================================== ====== ========================== + ``ETHTOOL_A_ULP_DDP_HEADER`` nested reply header + ``ETHTOOL_A_ULP_DDP_HW`` bitset dev->ulp_ddp_caps.hw + ``ETHTOOL_A_ULP_DDP_ACTIVE`` bitset dev->ulp_ddp_caps.active + ``ETHTOOL_A_ULP_DDP_STATS`` nested ULP DDP statistics + ==================================== ====== ========================== + + +* If ``ETHTOOL_FLAG_COMPACT_BITSETS`` was set in + ``ETHTOOL_A_HEADER_FLAG``, the bitsets of the reply are in compact + form. In that form, the names for the individual bits can be retried + via the ``ETH_SS_ULP_DDP_CAPS`` string set. +* ``ETHTOOL_A_ULP_DDP_STATS`` contains statistics which + are only reported if ``ETHTOOL_FLAG_STATS`` was set in + ``ETHTOOL_A_HEADER_FLAGS``. + +Similar to the bitsets, statistics can be reported in a verbose or +compact form. This is controlled by the same header flag +``ETHTOOL_FLAG_STATS``). + +Verbose statistics contents: + + +-----------------------------------------------+--------+---------------------------------+ + | ``ETHTOOL_A_ULP_DDP_STATS_COUNT`` | u32 | number of statistics | + +-----------------------------------------------+--------+---------------------------------+ + | ``ETHTOOL_A_ULP_DDP_STATS_MAP`` | nested | nest containing a list of stats | + +-+---------------------------------------------+--------+---------------------------------+ + | | ``ETHTOOL_A_ULP_DDP_STATS_MAP_ITEM`` | nested | nest containing one statistic | + +-+-+-------------------------------------------+--------+---------------------------------+ + | | | ``ETHTOOL_A_ULP_DDP_STATS_MAP_ITEM_NAME`` | string | statistic name | + +-+-+-------------------------------------------+--------+---------------------------------+ + | | | ``ETHTOOL_A_ULP_DDP_STATS_MAP_ITEM_VAL`` | u64 | statistic value | + +-+-+-------------------------------------------+--------+---------------------------------+ + +Compact statistics content: + + +-----------------------------------------------+--------+-----------------------+ + | ``ETHTOOL_A_ULP_DDP_STATS_COUNT`` | u32 | number of statistics | + +-----------------------------------------------+--------+-----------------------+ + | ``ETHTOOL_A_ULP_DDP_STATS_COMPACT_VALUES`` | u64[] | stats values | + +-----------------------------------------------+--------+-----------------------+ + +In compact form, ``ETHTOOL_A_ULP_DDP_STATS_COMPACT_VALUES`` contains +an array of unsigned 64 bits integer of *count* elements, as a binary +blob. + +The names of each statistics are global. They can be retried via the +``ETH_SS_ULP_DDP_STATS`` string set. + +ULP_DDP_SET +=========== + +Request to set ULP DDP capabilities for the interface. + +Request contents: + + ==================================== ====== ========================== + ``ETHTOOL_A_ULP_DDP_HEADER`` nested request header + ``ETHTOOL_A_ULP_DDP_WANTED`` bitset requested capabilities + ==================================== ====== ========================== + +Kernel response contents: + + ==================================== ====== ========================== + ``ETHTOOL_A_ULP_DDP_HEADER`` nested reply header + ``ETHTOOL_A_ULP_DDP_WANTED`` bitset diff wanted vs. results + ``ETHTOOL_A_ULP_DDP_ACTIVE`` bitset diff old vs. new active + ==================================== ====== ========================== + +Request contains only one bitset which can be either value/mask pair +(request to change specific capabilities and leave the rest) or only a +value (request to set the complete capabilities provided literally). + +Requests are subject to sanity checks by drivers so an optional kernel +reply (can be suppressed by ``ETHTOOL_FLAG_OMIT_REPLY`` flag in +request header) informs client about the actual +results. + +* ``ETHTOOL_A_ULP_DDP_WANTED`` reports the difference between client + request and actual result: mask consists of bits which differ between + requested capability and result (dev->ulp_ddp_caps.active after the + operation), value consists of values of these bits in the request + (i.e. negated values from resulting capabilities). +* ``ETHTOOL_A_ULP_DDP_ACTIVE`` reports the difference between old and + new dev->ulp_ddp_caps.active: mask consists of bits which have + changed, values are their values in new dev->ulp_ddp_caps.active + (after the operation). + + Request translation =================== diff --git a/Documentation/networking/statistics.rst b/Documentation/networking/statistics.rst index c9aeb70dafa2..518bf0cbeffc 100644 --- a/Documentation/networking/statistics.rst +++ b/Documentation/networking/statistics.rst @@ -171,6 +171,7 @@ statistics are supported in the following commands: - `ETHTOOL_MSG_PAUSE_GET` - `ETHTOOL_MSG_FEC_GET` + - `ETHTOOL_MSG_ULP_DDP_GET` debugfs ------- From patchwork Tue Jan 17 15:35:15 2023 Content-Type: text/plain; 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Tue, 17 Jan 2023 15:36:35 +0000 Received: from SJ1PR12MB6075.namprd12.prod.outlook.com ([fe80::6d66:a4bb:4018:3c70]) by SJ1PR12MB6075.namprd12.prod.outlook.com ([fe80::6d66:a4bb:4018:3c70%8]) with mapi id 15.20.6002.013; Tue, 17 Jan 2023 15:36:35 +0000 From: Aurelien Aptel To: linux-nvme@lists.infradead.org, netdev@vger.kernel.org, sagi@grimberg.me, hch@lst.de, kbusch@kernel.org, axboe@fb.com, chaitanyak@nvidia.com, davem@davemloft.net, kuba@kernel.org, Alexander Viro Cc: Ben Ben-Ishay , Aurelien Aptel , aurelien.aptel@gmail.com, smalin@nvidia.com, malin1024@gmail.com, ogerlitz@nvidia.com, yorayz@nvidia.com, borisp@nvidia.com Subject: [PATCH v9 05/25] iov_iter: skip copy if src == dst for direct data placement Date: Tue, 17 Jan 2023 17:35:15 +0200 Message-Id: <20230117153535.1945554-6-aaptel@nvidia.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20230117153535.1945554-1-aaptel@nvidia.com> References: <20230117153535.1945554-1-aaptel@nvidia.com> X-ClientProxiedBy: LO2P265CA0202.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:9e::22) To SJ1PR12MB6075.namprd12.prod.outlook.com (2603:10b6:a03:45e::8) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PR12MB6075:EE_|PH8PR12MB6889:EE_ X-MS-Office365-Filtering-Correlation-Id: e751f152-765c-4265-5c59-08daf8a09dfb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: A1ATf/lbur5IRu1Ld0jCfbVPuCeLo6UKZrPJyvsns3FUj51WjcEtubAMt2zPEIKzDGKyEJ8Gxnr49IRialUi98oP0lpqYxh9r20grbQCVLT7kmQ4Pqq4soKN2AE/kRs7+UdrLi6e3ims/bMYi/SgcbTx7ZpUYoMOE1zDoNwizclZf5nJW19gS/KoCPT9D/FoqeJafT9Di7glrF5SwmarMS+wQflr3bjGjpY2bBRl91+IkQt8KU7U2zv3nYsr6yIKXOkX1fIK3AXrneX8HLdhtGd2gIRj9mbXrmq/Y6tPQITrf7CCgW1w+8tP6XRTNoE1uQeFMuXLPhPD8rMQlrhu/KMBJx2Kr4qh1OXuG52EQvzMzxEypQZ9W+ufGx+lXKK94pxu3xO/y286dbTIUO1fiX8Mt3zhvh7U+BTlUX9GUWAbQ2iB8A5MnCtLGUU7593MXazAfZ6m/sk8YrZSySn9z9ee0/abUqHcNqiA2jiWkw3VfB7J8YKwSrRYnzxo4hWdSCfBwykddudDzpBANr7U9J8KCqD+M/SgkjXZlhgWAickuzdcMIOcirSOYzgY4eCMUx2TV2AzItY8KKPeEopd9PM6qFdA8UJpuymEWhVQnWFMsjUHjsbfv1o437aLFxrbIk9cvssGRZUxd2Tvlm6Z++xCGl0HpdduKaEiNzjodbrngihTn4lFnh6U+5k6pHxkAW2eOtrkivNMOCW8Jxr1JLSsL9+uSQXWVGUM700363chSp8gDuah9jvdXGR34h6VipozWeOurwzO56Vwc/18erYV0EmpyxZqOzARpYxSQx55SLW1nl3ccJNu5HXxIqZ28HDD133GaTOZfLIBQXYj5d0DoDRYJ44K32RLPfcNDtzZtQXnBpOx8vWaB6E4852XtkeVDrghFeLCicvgB8miGrgHARoMM05TXwMWNpHaEDyg3DPLvu+NhIlLkAzfB8u/i2aJKrM3UvSrutA1rmOijavTayHYRmevsBdNAYESmPg5iwHftv3rQY1ln4KmTNK0344fWZO2x8nhZsaBuDWLAjhCWgFbkcPoJgGBj4ndrEOXDxanffGGk6oS4zycQbO+ZKlQX5XP9dthdbpMSgG/8U9tOF+DyCvFlGcysQO0gkknalVZVR6euJ6iwX+Bz8Wpd48OT6lOSvDP93AdbY0GbKaEuj5Aqjsq0lXlNAhKa2N1s42aB1is3Dfffwjb66roB3YByxnACI9MZPb9dn8zEQv4AIg6gKb/I5s/1mwUf0PEuH5A0oODcuZE6SSsz3pthF3HScAh6gHyuO1DAqqxhZl+pba3k+7UeSTrgYhg/RUoR5O38PDfyzt9c1FM+fVQVLxJINYxE2dYM6ydM6gBcylenm8lf7CARgEpR7MCSKzUs0srxEJPOD7ikQy4TqRalC3VKv5dDL3uzjwdN3H3YT5pEBb30hMNefXRypQxvLuHMnysRb/mYfqoLHRDkbLb9tdpkfrANjJNfkXQX4UDhQdoSkegmD0RthjcbDnwekpBXb0QfeVRP75/+51R0Fa7gOUEh/ciprsx86zC6Oj9LmunW2M5yQgHi+4RIYEjiEbxcvJCwe8GwSWRTo2YdIpN X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: e751f152-765c-4265-5c59-08daf8a09dfb X-MS-Exchange-CrossTenant-AuthSource: SJ1PR12MB6075.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jan 2023 15:36:35.6860 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: fSXA/avr9ULv6yYTgTvp8GCV9NL4kBYM7CzBWg6Cg2ueChDo6l2XziwrKkb/NaU7McIUce/Msz0bXUZrcqCTiw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB6889 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Ben Ben-Ishay When using direct data placement (DDP) the NIC could write the payload directly into the destination buffer and constructs SKBs such that they point to this data. To skip copies when SKB data already resides in the destination buffer we check if (src == dst), and skip the copy when it's true. Signed-off-by: Ben Ben-Ishay Signed-off-by: Boris Pismenny Signed-off-by: Or Gerlitz Signed-off-by: Yoray Zack Signed-off-by: Shai Malin Signed-off-by: Aurelien Aptel Reviewed-by: Chaitanya Kulkarni --- lib/iov_iter.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/lib/iov_iter.c b/lib/iov_iter.c index f9a3ff37ecd1..2df634bb6d27 100644 --- a/lib/iov_iter.c +++ b/lib/iov_iter.c @@ -526,9 +526,15 @@ size_t _copy_to_iter(const void *addr, size_t bytes, struct iov_iter *i) return copy_pipe_to_iter(addr, bytes, i); if (user_backed_iter(i)) might_fault(); + /* + * When using direct data placement (DDP) the hardware writes + * data directly to the destination buffer, and constructs + * IOVs such that they point to this data. + * Thus, when the src == dst we skip the memcpy. + */ iterate_and_advance(i, bytes, base, len, off, copyout(base, addr + off, len), - memcpy(base, addr + off, len) + (base != addr + off) && memcpy(base, addr + off, len) ) return bytes; From patchwork Tue Jan 17 15:35:16 2023 Content-Type: text/plain; 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Later patches will use this for nvme-tcp DDP and DDP DDGST offloads. Suggested-by: Christoph Hellwig Signed-off-by: Ben Ben-Ishay Signed-off-by: Shai Malin Signed-off-by: Aurelien Aptel --- include/linux/netdevice.h | 3 +-- net/core/dev.c | 26 +++++++++++++------------- net/tls/tls_device.c | 16 ---------------- 3 files changed, 14 insertions(+), 31 deletions(-) diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index 289cfdade177..19aaf0531fc5 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -3082,8 +3082,7 @@ int init_dummy_netdev(struct net_device *dev); struct net_device *netdev_get_xmit_slave(struct net_device *dev, struct sk_buff *skb, bool all_slaves); -struct net_device *netdev_sk_get_lowest_dev(struct net_device *dev, - struct sock *sk); +struct net_device *get_netdev_for_sock(struct sock *sk); struct net_device *dev_get_by_index(struct net *net, int ifindex); struct net_device *__dev_get_by_index(struct net *net, int ifindex); struct net_device *dev_get_by_index_rcu(struct net *net, int ifindex); diff --git a/net/core/dev.c b/net/core/dev.c index cf78f35bc0b9..bd29e056045c 100644 --- a/net/core/dev.c +++ b/net/core/dev.c @@ -8152,27 +8152,27 @@ static struct net_device *netdev_sk_get_lower_dev(struct net_device *dev, } /** - * netdev_sk_get_lowest_dev - Get the lowest device in chain given device and socket - * @dev: device + * get_netdev_for_sock - Get the lowest device in socket * @sk: the socket * - * %NULL is returned if no lower device is found. + * Assumes that the socket is already connected. + * Returns the lower device or %NULL if no lower device is found. */ - -struct net_device *netdev_sk_get_lowest_dev(struct net_device *dev, - struct sock *sk) +struct net_device *get_netdev_for_sock(struct sock *sk) { - struct net_device *lower; + struct dst_entry *dst = sk_dst_get(sk); + struct net_device *dev, *lower; - lower = netdev_sk_get_lower_dev(dev, sk); - while (lower) { + if (unlikely(!dst)) + return NULL; + dev = dst->dev; + while ((lower = netdev_sk_get_lower_dev(dev, sk))) dev = lower; - lower = netdev_sk_get_lower_dev(dev, sk); - } - + dev_hold(dev); + dst_release(dst); return dev; } -EXPORT_SYMBOL(netdev_sk_get_lowest_dev); +EXPORT_SYMBOL_GPL(get_netdev_for_sock); static void netdev_adjacent_add_links(struct net_device *dev) { diff --git a/net/tls/tls_device.c b/net/tls/tls_device.c index 6c593788dc25..3c298dfb77cb 100644 --- a/net/tls/tls_device.c +++ b/net/tls/tls_device.c @@ -120,22 +120,6 @@ static void tls_device_queue_ctx_destruction(struct tls_context *ctx) tls_device_free_ctx(ctx); } -/* We assume that the socket is already connected */ -static struct net_device *get_netdev_for_sock(struct sock *sk) -{ - struct dst_entry *dst = sk_dst_get(sk); - struct net_device *netdev = NULL; - - if (likely(dst)) { - netdev = netdev_sk_get_lowest_dev(dst->dev, sk); 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There is a context per queue, which is established after the handshake using the sk_add/del NDOs. Additionally, a resynchronization routine is used to assist hardware recovery from TCP OOO, and continue the offload. Resynchronization operates as follows: 1. TCP OOO causes the NIC HW to stop the offload 2. NIC HW identifies a PDU header at some TCP sequence number, and asks NVMe-TCP to confirm it. This request is delivered from the NIC driver to NVMe-TCP by first finding the socket for the packet that triggered the request, and then finding the nvme_tcp_queue that is used by this routine. Finally, the request is recorded in the nvme_tcp_queue. 3. When NVMe-TCP observes the requested TCP sequence, it will compare it with the PDU header TCP sequence, and report the result to the NIC driver (resync), which will update the HW, and resume offload when all is successful. Some HW implementation such as ConnectX-7 assume linear CCID (0...N-1 for queue of size N) where the linux nvme driver uses part of the 16 bit CCID for generation counter. To address that, we use the existing quirk in the nvme layer when the HW driver advertises if the device is not supports the full 16 bit CCID range. Furthermore, we let the offloading driver advertise what is the max hw sectors/segments via ulp_ddp_limits. A follow-up patch introduces the data-path changes required for this offload. Socket operations need a netdev reference. This reference is dropped on NETDEV_GOING_DOWN events to allow the device to go down in a follow-up patch. Signed-off-by: Boris Pismenny Signed-off-by: Ben Ben-Ishay Signed-off-by: Or Gerlitz Signed-off-by: Yoray Zack Signed-off-by: Shai Malin Signed-off-by: Aurelien Aptel Reviewed-by: Chaitanya Kulkarni --- drivers/nvme/host/tcp.c | 263 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 254 insertions(+), 9 deletions(-) diff --git a/drivers/nvme/host/tcp.c b/drivers/nvme/host/tcp.c index 8cedc1ef496c..c22829715cad 100644 --- a/drivers/nvme/host/tcp.c +++ b/drivers/nvme/host/tcp.c @@ -15,6 +15,10 @@ #include #include +#ifdef CONFIG_ULP_DDP +#include +#endif + #include "nvme.h" #include "fabrics.h" @@ -103,6 +107,7 @@ enum nvme_tcp_queue_flags { NVME_TCP_Q_ALLOCATED = 0, NVME_TCP_Q_LIVE = 1, NVME_TCP_Q_POLLING = 2, + NVME_TCP_Q_OFF_DDP = 3, }; enum nvme_tcp_recv_state { @@ -130,6 +135,16 @@ struct nvme_tcp_queue { size_t ddgst_remaining; unsigned int nr_cqe; + /* + * resync_req is a speculative PDU header tcp seq number (with + * an additional flag at 32 lower bits) that the HW send to + * the SW, for the SW to verify. + * - The 32 high bits store the seq number + * - The 32 low bits are used as a flag to know if a request + * is pending (ULP_DDP_RESYNC_PENDING). + */ + atomic64_t resync_req; + /* send state */ struct nvme_tcp_request *request; @@ -169,6 +184,9 @@ struct nvme_tcp_ctrl { struct delayed_work connect_work; struct nvme_tcp_request async_req; u32 io_queues[HCTX_MAX_TYPES]; + + struct net_device *offloading_netdev; + u32 offload_io_threshold; }; static LIST_HEAD(nvme_tcp_ctrl_list); @@ -260,6 +278,198 @@ static inline size_t nvme_tcp_pdu_last_send(struct nvme_tcp_request *req, return nvme_tcp_pdu_data_left(req) <= len; } +#ifdef CONFIG_ULP_DDP + +static inline bool is_netdev_ulp_offload_active(struct net_device *netdev) +{ + return test_bit(ULP_DDP_C_NVME_TCP_BIT, netdev->ulp_ddp_caps.active); +} + +static bool nvme_tcp_ddp_query_limits(struct net_device *netdev, + struct ulp_ddp_limits *limits) +{ + int ret; + + if (!netdev || !is_netdev_ulp_offload_active(netdev) || + !netdev->netdev_ops->ulp_ddp_ops->limits) + return false; + + limits->type = ULP_DDP_NVME; + ret = netdev->netdev_ops->ulp_ddp_ops->limits(netdev, limits); + if (ret == -EOPNOTSUPP) { + return false; + } else if (ret) { + WARN_ONCE(ret, "ddp limits failed (ret=%d)", ret); + return false; + } + + return true; +} + +static bool nvme_tcp_resync_request(struct sock *sk, u32 seq, u32 flags); +static const struct ulp_ddp_ulp_ops nvme_tcp_ddp_ulp_ops = { + .resync_request = nvme_tcp_resync_request, +}; + +static int nvme_tcp_offload_socket(struct nvme_tcp_queue *queue) +{ + struct net_device *netdev = queue->ctrl->offloading_netdev; + struct ulp_ddp_config config = {.type = ULP_DDP_NVME}; + int ret; + + config.nvmeotcp.pfv = NVME_TCP_PFV_1_0; + config.nvmeotcp.cpda = 0; + config.nvmeotcp.dgst = + queue->hdr_digest ? NVME_TCP_HDR_DIGEST_ENABLE : 0; + config.nvmeotcp.dgst |= + queue->data_digest ? NVME_TCP_DATA_DIGEST_ENABLE : 0; + config.nvmeotcp.queue_size = queue->ctrl->ctrl.sqsize + 1; + config.nvmeotcp.queue_id = nvme_tcp_queue_id(queue); + config.nvmeotcp.io_cpu = queue->io_cpu; + + /* Socket ops keep a netdev reference. It is put in + * nvme_tcp_unoffload_socket(). This ref is dropped on + * NETDEV_GOING_DOWN events to allow the device to go down + */ + dev_hold(netdev); + ret = netdev->netdev_ops->ulp_ddp_ops->sk_add(netdev, + queue->sock->sk, + &config); + if (ret) { + dev_put(netdev); + return ret; + } + + inet_csk(queue->sock->sk)->icsk_ulp_ddp_ops = &nvme_tcp_ddp_ulp_ops; + set_bit(NVME_TCP_Q_OFF_DDP, &queue->flags); + return 0; +} + +static void nvme_tcp_unoffload_socket(struct nvme_tcp_queue *queue) +{ + struct net_device *netdev = queue->ctrl->offloading_netdev; + + if (!netdev) { + dev_info_ratelimited(queue->ctrl->ctrl.device, "netdev not found\n"); + return; + } + + clear_bit(NVME_TCP_Q_OFF_DDP, &queue->flags); + + netdev->netdev_ops->ulp_ddp_ops->sk_del(netdev, queue->sock->sk); + + inet_csk(queue->sock->sk)->icsk_ulp_ddp_ops = NULL; + dev_put(netdev); /* held by offload_socket */ +} + +static void nvme_tcp_offload_limits(struct nvme_tcp_queue *queue, + struct net_device *netdev) +{ + struct ulp_ddp_limits limits = {.type = ULP_DDP_NVME }; + + if (!nvme_tcp_ddp_query_limits(netdev, &limits)) { + queue->ctrl->offloading_netdev = NULL; + return; + } + + queue->ctrl->offloading_netdev = netdev; + dev_dbg_ratelimited(queue->ctrl->ctrl.device, + "netdev %s offload limits: max_ddp_sgl_len %d\n", + netdev->name, limits.max_ddp_sgl_len); + queue->ctrl->ctrl.max_segments = limits.max_ddp_sgl_len; + queue->ctrl->ctrl.max_hw_sectors = + limits.max_ddp_sgl_len << (ilog2(SZ_4K) - 9); + queue->ctrl->offload_io_threshold = limits.io_threshold; + + /* offloading HW doesn't support full ccid range, apply the quirk */ + queue->ctrl->ctrl.quirks |= + limits.nvmeotcp.full_ccid_range ? 0 : NVME_QUIRK_SKIP_CID_GEN; +} + +/* In presence of packet drops or network packet reordering, the device may lose + * synchronization between the TCP stream and the L5P framing, and require a + * resync with the kernel's TCP stack. + * + * - NIC HW identifies a PDU header at some TCP sequence number, + * and asks NVMe-TCP to confirm it. + * - When NVMe-TCP observes the requested TCP sequence, it will compare + * it with the PDU header TCP sequence, and report the result to the + * NIC driver + */ +static void nvme_tcp_resync_response(struct nvme_tcp_queue *queue, + struct sk_buff *skb, unsigned int offset) +{ + u64 pdu_seq = TCP_SKB_CB(skb)->seq + offset - queue->pdu_offset; + struct net_device *netdev = queue->ctrl->offloading_netdev; + u64 pdu_val = (pdu_seq << 32) | ULP_DDP_RESYNC_PENDING; + u64 resync_val; + u32 resync_seq; + + resync_val = atomic64_read(&queue->resync_req); + /* Lower 32 bit flags. Check validity of the request */ + if ((resync_val & ULP_DDP_RESYNC_PENDING) == 0) + return; + + /* + * Obtain and check requested sequence number: is this PDU header + * before the request? + */ + resync_seq = resync_val >> 32; + if (before(pdu_seq, resync_seq)) + return; + + /* + * The atomic operation guarantees that we don't miss any NIC driver + * resync requests submitted after the above checks. + */ + if (atomic64_cmpxchg(&queue->resync_req, pdu_val, + pdu_val & ~ULP_DDP_RESYNC_PENDING) != + atomic64_read(&queue->resync_req)) + netdev->netdev_ops->ulp_ddp_ops->resync(netdev, + queue->sock->sk, + pdu_seq); +} + +static bool nvme_tcp_resync_request(struct sock *sk, u32 seq, u32 flags) +{ + struct nvme_tcp_queue *queue = sk->sk_user_data; + + /* + * "seq" (TCP seq number) is what the HW assumes is the + * beginning of a PDU. The nvme-tcp layer needs to store the + * number along with the "flags" (ULP_DDP_RESYNC_PENDING) to + * indicate that a request is pending. + */ + atomic64_set(&queue->resync_req, (((uint64_t)seq << 32) | flags)); + + return true; +} + +#else + +static inline bool is_netdev_ulp_offload_active(struct net_device *netdev) +{ + return false; +} + +static int nvme_tcp_offload_socket(struct nvme_tcp_queue *queue) +{ + return 0; +} + +static void nvme_tcp_unoffload_socket(struct nvme_tcp_queue *queue) +{} + +static void nvme_tcp_offload_limits(struct nvme_tcp_queue *queue, + struct net_device *netdev) +{} + +static void nvme_tcp_resync_response(struct nvme_tcp_queue *queue, + struct sk_buff *skb, unsigned int offset) +{} + +#endif + static void nvme_tcp_init_iter(struct nvme_tcp_request *req, unsigned int dir) { @@ -702,6 +912,9 @@ static int nvme_tcp_recv_pdu(struct nvme_tcp_queue *queue, struct sk_buff *skb, size_t rcv_len = min_t(size_t, *len, queue->pdu_remaining); int ret; + if (test_bit(NVME_TCP_Q_OFF_DDP, &queue->flags)) + nvme_tcp_resync_response(queue, skb, *offset); + ret = skb_copy_bits(skb, *offset, &pdu[queue->pdu_offset], rcv_len); if (unlikely(ret)) @@ -1657,6 +1870,8 @@ static void __nvme_tcp_stop_queue(struct nvme_tcp_queue *queue) kernel_sock_shutdown(queue->sock, SHUT_RDWR); nvme_tcp_restore_sock_calls(queue); cancel_work_sync(&queue->io_work); + if (test_bit(NVME_TCP_Q_OFF_DDP, &queue->flags)) + nvme_tcp_unoffload_socket(queue); } static void nvme_tcp_stop_queue(struct nvme_ctrl *nctrl, int qid) @@ -1676,21 +1891,51 @@ static void nvme_tcp_stop_queue(struct nvme_ctrl *nctrl, int qid) static int nvme_tcp_start_queue(struct nvme_ctrl *nctrl, int idx) { struct nvme_tcp_ctrl *ctrl = to_tcp_ctrl(nctrl); + struct net_device *netdev; int ret; - if (idx) + if (idx) { ret = nvmf_connect_io_queue(nctrl, idx); - else + if (ret) + goto err; + + netdev = ctrl->queues[idx].ctrl->offloading_netdev; + if (netdev && is_netdev_ulp_offload_active(netdev)) { + ret = nvme_tcp_offload_socket(&ctrl->queues[idx]); + if (ret) { + dev_err(nctrl->device, + "failed to setup offload on queue %d ret=%d\n", + idx, ret); + } + } + } else { ret = nvmf_connect_admin_queue(nctrl); + if (ret) + goto err; - if (!ret) { - set_bit(NVME_TCP_Q_LIVE, &ctrl->queues[idx].flags); - } else { - if (test_bit(NVME_TCP_Q_ALLOCATED, &ctrl->queues[idx].flags)) - __nvme_tcp_stop_queue(&ctrl->queues[idx]); - dev_err(nctrl->device, - "failed to connect queue: %d ret=%d\n", idx, ret); + netdev = get_netdev_for_sock(ctrl->queues[idx].sock->sk); + if (!netdev) { + dev_info_ratelimited(ctrl->ctrl.device, "netdev not found\n"); + ctrl->offloading_netdev = NULL; + goto done; + } + if (is_netdev_ulp_offload_active(netdev)) + nvme_tcp_offload_limits(&ctrl->queues[idx], netdev); + /* + * release the device as no offload context is + * established yet. + */ + dev_put(netdev); } + +done: + set_bit(NVME_TCP_Q_LIVE, &ctrl->queues[idx].flags); + return 0; +err: + if (test_bit(NVME_TCP_Q_ALLOCATED, &ctrl->queues[idx].flags)) + __nvme_tcp_stop_queue(&ctrl->queues[idx]); + dev_err(nctrl->device, + "failed to connect queue: %d ret=%d\n", idx, ret); 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Tue, 17 Jan 2023 15:36:54 +0000 Received: from SJ1PR12MB6075.namprd12.prod.outlook.com ([fe80::6d66:a4bb:4018:3c70]) by SJ1PR12MB6075.namprd12.prod.outlook.com ([fe80::6d66:a4bb:4018:3c70%8]) with mapi id 15.20.6002.013; Tue, 17 Jan 2023 15:36:53 +0000 From: Aurelien Aptel To: linux-nvme@lists.infradead.org, netdev@vger.kernel.org, sagi@grimberg.me, hch@lst.de, kbusch@kernel.org, axboe@fb.com, chaitanyak@nvidia.com, davem@davemloft.net, kuba@kernel.org Cc: Boris Pismenny , Aurelien Aptel , aurelien.aptel@gmail.com, smalin@nvidia.com, malin1024@gmail.com, ogerlitz@nvidia.com, yorayz@nvidia.com Subject: [PATCH v9 08/25] nvme-tcp: Add DDP data-path Date: Tue, 17 Jan 2023 17:35:18 +0200 Message-Id: <20230117153535.1945554-9-aaptel@nvidia.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20230117153535.1945554-1-aaptel@nvidia.com> References: <20230117153535.1945554-1-aaptel@nvidia.com> X-ClientProxiedBy: FR3P281CA0193.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:a4::6) To SJ1PR12MB6075.namprd12.prod.outlook.com (2603:10b6:a03:45e::8) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PR12MB6075:EE_|PH7PR12MB8177:EE_ X-MS-Office365-Filtering-Correlation-Id: 17a43f7d-6754-4e74-c6ca-08daf8a0a89d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Using this interface, the NIC hardware will scatter TCP payload directly to the BIO pages according to the command_id in the PDU. To maintain the correctness of the network stack, the driver is expected to construct SKBs that point to the BIO pages. The data-path interface contains two routines: setup/teardown. The setup provides the mapping from command_id to the request buffers, while the teardown removes this mapping. For efficiency, we introduce an asynchronous nvme completion, which is split between NVMe-TCP and the NIC driver as follows: NVMe-TCP performs the specific completion, while NIC driver performs the generic mq_blk completion. Signed-off-by: Boris Pismenny Signed-off-by: Ben Ben-Ishay Signed-off-by: Or Gerlitz Signed-off-by: Yoray Zack Signed-off-by: Shai Malin Signed-off-by: Aurelien Aptel Reviewed-by: Chaitanya Kulkarni --- drivers/nvme/host/tcp.c | 121 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 116 insertions(+), 5 deletions(-) diff --git a/drivers/nvme/host/tcp.c b/drivers/nvme/host/tcp.c index c22829715cad..968b8b6459ef 100644 --- a/drivers/nvme/host/tcp.c +++ b/drivers/nvme/host/tcp.c @@ -101,6 +101,13 @@ struct nvme_tcp_request { size_t offset; size_t data_sent; enum nvme_tcp_send_state state; + +#ifdef CONFIG_ULP_DDP + bool offloaded; + struct ulp_ddp_io ddp; + __le16 ddp_status; + union nvme_result result; +#endif }; enum nvme_tcp_queue_flags { @@ -306,11 +313,75 @@ static bool nvme_tcp_ddp_query_limits(struct net_device *netdev, return true; } +static int nvme_tcp_req_map_sg(struct nvme_tcp_request *req, struct request *rq) +{ + int ret; + + req->ddp.sg_table.sgl = req->ddp.first_sgl; + ret = sg_alloc_table_chained(&req->ddp.sg_table, + blk_rq_nr_phys_segments(rq), + req->ddp.sg_table.sgl, SG_CHUNK_SIZE); + if (ret) + return -ENOMEM; + req->ddp.nents = blk_rq_map_sg(rq->q, rq, req->ddp.sg_table.sgl); + return 0; +} + static bool nvme_tcp_resync_request(struct sock *sk, u32 seq, u32 flags); +static void nvme_tcp_ddp_teardown_done(void *ddp_ctx); static const struct ulp_ddp_ulp_ops nvme_tcp_ddp_ulp_ops = { .resync_request = nvme_tcp_resync_request, + .ddp_teardown_done = nvme_tcp_ddp_teardown_done, }; +static void nvme_tcp_teardown_ddp(struct nvme_tcp_queue *queue, + struct request *rq) +{ + struct net_device *netdev = queue->ctrl->offloading_netdev; + struct nvme_tcp_request *req = blk_mq_rq_to_pdu(rq); + + netdev->netdev_ops->ulp_ddp_ops->teardown(netdev, queue->sock->sk, + &req->ddp, rq); + sg_free_table_chained(&req->ddp.sg_table, SG_CHUNK_SIZE); +} + +static void nvme_tcp_ddp_teardown_done(void *ddp_ctx) +{ + struct request *rq = ddp_ctx; + struct nvme_tcp_request *req = blk_mq_rq_to_pdu(rq); + + if (!nvme_try_complete_req(rq, req->ddp_status, req->result)) + nvme_complete_rq(rq); +} + +static int nvme_tcp_setup_ddp(struct nvme_tcp_queue *queue, u16 command_id, + struct request *rq) +{ + struct net_device *netdev = queue->ctrl->offloading_netdev; + struct nvme_tcp_request *req = blk_mq_rq_to_pdu(rq); + int ret; + + if (!(rq_data_dir(rq) == READ) || + queue->ctrl->offload_io_threshold > blk_rq_payload_bytes(rq)) + return 0; + + req->ddp.command_id = command_id; + ret = nvme_tcp_req_map_sg(req, rq); + if (ret) + return -ENOMEM; + + ret = netdev->netdev_ops->ulp_ddp_ops->setup(netdev, queue->sock->sk, + &req->ddp); + if (ret) { + sg_free_table_chained(&req->ddp.sg_table, SG_CHUNK_SIZE); + return ret; + } + + /* if successful, sg table is freed in nvme_tcp_teardown_ddp() */ + req->offloaded = true; + return 0; +} + static int nvme_tcp_offload_socket(struct nvme_tcp_queue *queue) { struct net_device *netdev = queue->ctrl->offloading_netdev; @@ -452,6 +523,12 @@ static inline bool is_netdev_ulp_offload_active(struct net_device *netdev) return false; } +static int nvme_tcp_setup_ddp(struct nvme_tcp_queue *queue, u16 command_id, + struct request *rq) +{ + return 0; +} + static int nvme_tcp_offload_socket(struct nvme_tcp_queue *queue) { return 0; @@ -739,6 +816,26 @@ static void nvme_tcp_error_recovery(struct nvme_ctrl *ctrl) queue_work(nvme_reset_wq, &to_tcp_ctrl(ctrl)->err_work); } +static void nvme_tcp_complete_request(struct request *rq, + __le16 status, + union nvme_result result, + __u16 command_id) +{ +#ifdef CONFIG_ULP_DDP + struct nvme_tcp_request *req = blk_mq_rq_to_pdu(rq); + + if (req->offloaded) { + req->ddp_status = status; + req->result = result; + nvme_tcp_teardown_ddp(req->queue, rq); + return; + } +#endif + + if (!nvme_try_complete_req(rq, status, result)) + nvme_complete_rq(rq); +} + static int nvme_tcp_process_nvme_cqe(struct nvme_tcp_queue *queue, struct nvme_completion *cqe) { @@ -758,10 +855,9 @@ static int nvme_tcp_process_nvme_cqe(struct nvme_tcp_queue *queue, if (req->status == cpu_to_le16(NVME_SC_SUCCESS)) req->status = cqe->status; - if (!nvme_try_complete_req(rq, req->status, cqe->result)) - nvme_complete_rq(rq); + nvme_tcp_complete_request(rq, req->status, cqe->result, + cqe->command_id); queue->nr_cqe++; - return 0; } @@ -959,10 +1055,13 @@ static int nvme_tcp_recv_pdu(struct nvme_tcp_queue *queue, struct sk_buff *skb, static inline void nvme_tcp_end_request(struct request *rq, u16 status) { + struct nvme_tcp_request *req = blk_mq_rq_to_pdu(rq); + struct nvme_tcp_queue *queue = req->queue; + struct nvme_tcp_data_pdu *pdu = (void *)queue->pdu; union nvme_result res = {}; - if (!nvme_try_complete_req(rq, cpu_to_le16(status << 1), res)) - nvme_complete_rq(rq); + nvme_tcp_complete_request(rq, cpu_to_le16(status << 1), res, + pdu->command_id); } static int nvme_tcp_recv_data(struct nvme_tcp_queue *queue, struct sk_buff *skb, @@ -1260,6 +1359,15 @@ static int nvme_tcp_try_send_cmd_pdu(struct nvme_tcp_request *req) else flags |= MSG_EOR; + if (test_bit(NVME_TCP_Q_OFF_DDP, &queue->flags)) { + ret = nvme_tcp_setup_ddp(queue, pdu->cmd.common.command_id, + blk_mq_rq_from_pdu(req)); + WARN_ONCE(ret, "ddp setup failed (queue 0x%x, cid 0x%x, ret=%d)", + nvme_tcp_queue_id(queue), + pdu->cmd.common.command_id, + ret); + } + if (queue->hdr_digest && !req->offset) nvme_tcp_hdgst(queue->snd_hash, pdu, sizeof(*pdu)); @@ -2591,6 +2699,9 @@ static blk_status_t nvme_tcp_setup_cmd_pdu(struct nvme_ns *ns, if (ret) return ret; +#ifdef CONFIG_ULP_DDP + req->offloaded = false; +#endif req->state = NVME_TCP_SEND_CMD_PDU; req->status = cpu_to_le16(NVME_SC_SUCCESS); req->offset = 0; From patchwork Tue Jan 17 15:35:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Aptel X-Patchwork-Id: 13104815 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7C0D4C6379F for ; Tue, 17 Jan 2023 15:39:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230401AbjAQPjA (ORCPT ); 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: z0wGzduMgZK/p7ZnCyyE8kRYUQuk4cI72F+fwxavdjKii16VjlrcIwbOGREdF8Yn0jDaLWQCTRXHMMQznTRdQgHAlYYkjOQonrCMhOqlWFE3WOHtueY8U6Td83kEPOuAJO/YEjmUpcMxzkhFXUq34drvi/mhU1QPACnEN5AxN7yvAB062UPARelKGwr6JfMpZs19nzNlZ91Wn++uu9RyTXmw0MgqtGEHwaMTGB/cHWBNJOPYjioKgLApkxrW9fr7Etn1//kGGA+D6XBFZwnZhlvddLP3ymPS5SVI5ZrcVAqhG3TTPZjkon+9ZqBU/O1SdJRdaBDfefv39J04xbogg2aXIHCf6WzNWcy26L6Ip4wR2BKOaBEk+J+TGpFh/nG1K2ekVCfDIq8PxkBtruvEHc2JpPeenZLhTH6rKm0dD4m/ezqJSb6PPA7bRy2LTyroPExOuKJCCoCJ3kHpyaITGkwCC8U4ImWeXRWSvl9mHLNBfwBsUCfrMUdPgYH1yRvLmI/wM3IAAMpv4m2E56O/xzPZdeGAcitd+tOrw3bJ/0rVRJ58xWStq5O7Db8iNO1EZCIzue3DxYUmSv9Jn90ceWKHgaoG/y0I2HkV+sUH53zJJHRLiAMH5L3kI7pWFmubapSPhE/TSWmlenKgbKGbQWfUusv3eanmpC8APj0PwjwIb+9DSAN0U+2xG4TM+oOvaVQx+5rtp5WFAo+DYt+fwbZF1ITp32y5gFLRX/1V5QzSCrlFOhKXyVshE/hLWgb1bfZ7GrhmRvB/kHUaKKSmb1gfb9RRbUODnDNz0t6hG4CobRCKAR+G4Hx/veICaInFudXz+4IU7NFkaO6Vs1WRoibhGTZ5/dHnI6WvnM06/rlwfEXVEnDCeM+XrZGt0+dGvctm0xNxW/vJDmv4C4c5TlU16mejMD3iZkOB/+ughYYEDZQyMROZvUkRQTCVVGwuQwtuhOrXXjcxalWlgwvdakxm01BP6zK2MIRjbPTlfXE7YB6bSAt31ua0V4TfXkl8lwKj8b830RJ2B1SYv+65+mATzAtEqSzOokluP8ul3r0GwEM2Dbpvu0DExw+Yk5eGmWLWoEcn1JwIb2ZrbmZlaTCPWvj54ZTLMiqUlbeWf0Ok11PePkXyX4O2m4RAfxlMejPDOQ5P9o3uPnP5PKIlPuJKRb0H05acHHOiCZ3FrStONdjg4F7AmE0lhEf6DrdpNcyTwpJmIxmuN2Oyx6evaZrtGg1naLHgrV2sA1HfQVlpjN2NcJsnZyJ2IRLa09AOLZHCAhj/dkX4X+vsPmYAKihbvK0sz6Ga2fRTUV84RT8Z3fdLzrZ/4F4q0ytCcQ9FG/8Rgb7e2sv9dGXRfPL4hP2o91WhnBTnTpIzf9GTF0TUroiXrVJhvCOZN9O3jH4sX4BkDlYea9lqHzdZvaGv1FTjYDDQO4ffXzFr+T/jftcLs3W3LjRw2g2YK8K0hou/mEtr3nkz+MMwBB4n+vaaTMhCyGyiFxNxwWTz/hx0qATkydovzaOHzHzD5pTHKEvtqnjb5Zrp7MSDYfikEJ+4V/mrM/CoEWQ+rX5TGwZFigCs4TPwNnAjYJROR95z9NaP X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: a695132e-a136-4e60-5b61-08daf8a0ac55 X-MS-Exchange-CrossTenant-AuthSource: SJ1PR12MB6075.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jan 2023 15:36:59.8264 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 1CMDDxp2dMmOdGABSq3EX6oy912PCLcmkfdWAM0kwz+qEGaZ29lfGvpVk8tGME0o1YyH7aFu3II+vZjLkYuabg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB8177 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Yoray Zack Enable rx side of DDGST offload when supported. At the end of the capsule, check if all the skb bits are on, and if not recalculate the DDGST in SW and check it. Signed-off-by: Yoray Zack Signed-off-by: Boris Pismenny Signed-off-by: Ben Ben-Ishay Signed-off-by: Or Gerlitz Signed-off-by: Shai Malin Signed-off-by: Aurelien Aptel Reviewed-by: Chaitanya Kulkarni --- drivers/nvme/host/tcp.c | 142 ++++++++++++++++++++++++++++++++++++---- 1 file changed, 128 insertions(+), 14 deletions(-) diff --git a/drivers/nvme/host/tcp.c b/drivers/nvme/host/tcp.c index 968b8b6459ef..87259574ee1a 100644 --- a/drivers/nvme/host/tcp.c +++ b/drivers/nvme/host/tcp.c @@ -115,6 +115,7 @@ enum nvme_tcp_queue_flags { NVME_TCP_Q_LIVE = 1, NVME_TCP_Q_POLLING = 2, NVME_TCP_Q_OFF_DDP = 3, + NVME_TCP_Q_OFF_DDGST_RX = 4, }; enum nvme_tcp_recv_state { @@ -142,6 +143,9 @@ struct nvme_tcp_queue { size_t ddgst_remaining; unsigned int nr_cqe; +#ifdef CONFIG_ULP_DDP + bool ddp_ddgst_valid; + /* * resync_req is a speculative PDU header tcp seq number (with * an additional flag at 32 lower bits) that the HW send to @@ -151,6 +155,7 @@ struct nvme_tcp_queue { * is pending (ULP_DDP_RESYNC_PENDING). */ atomic64_t resync_req; +#endif /* send state */ struct nvme_tcp_request *request; @@ -287,9 +292,22 @@ static inline size_t nvme_tcp_pdu_last_send(struct nvme_tcp_request *req, #ifdef CONFIG_ULP_DDP -static inline bool is_netdev_ulp_offload_active(struct net_device *netdev) +static inline bool is_netdev_ulp_offload_active(struct net_device *netdev, + struct nvme_tcp_queue *queue) { - return test_bit(ULP_DDP_C_NVME_TCP_BIT, netdev->ulp_ddp_caps.active); + bool ddgst_offload; + + if (test_bit(ULP_DDP_C_NVME_TCP_BIT, netdev->ulp_ddp_caps.active)) + return true; + + ddgst_offload = test_bit(ULP_DDP_C_NVME_TCP_DDGST_RX_BIT, + netdev->ulp_ddp_caps.active); + if (!queue && ddgst_offload) + return true; + if (queue && queue->data_digest && ddgst_offload) + return true; + + return false; } static bool nvme_tcp_ddp_query_limits(struct net_device *netdev, @@ -297,7 +315,7 @@ static bool nvme_tcp_ddp_query_limits(struct net_device *netdev, { int ret; - if (!netdev || !is_netdev_ulp_offload_active(netdev) || + if (!netdev || !is_netdev_ulp_offload_active(netdev, NULL) || !netdev->netdev_ops->ulp_ddp_ops->limits) return false; @@ -313,6 +331,18 @@ static bool nvme_tcp_ddp_query_limits(struct net_device *netdev, return true; } +static inline bool nvme_tcp_ddp_ddgst_ok(struct nvme_tcp_queue *queue) +{ + return queue->ddp_ddgst_valid; +} + +static inline void nvme_tcp_ddp_ddgst_update(struct nvme_tcp_queue *queue, + struct sk_buff *skb) +{ + if (queue->ddp_ddgst_valid) + queue->ddp_ddgst_valid = skb_is_ulp_crc(skb); +} + static int nvme_tcp_req_map_sg(struct nvme_tcp_request *req, struct request *rq) { int ret; @@ -327,6 +357,38 @@ static int nvme_tcp_req_map_sg(struct nvme_tcp_request *req, struct request *rq) return 0; } +static void nvme_tcp_ddp_ddgst_recalc(struct ahash_request *hash, + struct request *rq, + __le32 *ddgst) +{ + struct nvme_tcp_request *req; + + if (!rq) + return; + + req = blk_mq_rq_to_pdu(rq); + + if (!req->offloaded) { + /* if we have DDGST_RX offload without DDP the request + * wasn't mapped, so we need to map it here + */ + if (nvme_tcp_req_map_sg(req, rq)) + return; + } + + req->ddp.sg_table.sgl = req->ddp.first_sgl; + ahash_request_set_crypt(hash, req->ddp.sg_table.sgl, (u8 *)ddgst, + req->data_len); + crypto_ahash_digest(hash); + + if (!req->offloaded) { + /* without DDP, ddp_teardown() won't be called, so + * free the table here + */ + sg_free_table_chained(&req->ddp.sg_table, SG_CHUNK_SIZE); + } +} + static bool nvme_tcp_resync_request(struct sock *sk, u32 seq, u32 flags); static void nvme_tcp_ddp_teardown_done(void *ddp_ctx); static const struct ulp_ddp_ulp_ops nvme_tcp_ddp_ulp_ops = { @@ -386,6 +448,10 @@ static int nvme_tcp_offload_socket(struct nvme_tcp_queue *queue) { struct net_device *netdev = queue->ctrl->offloading_netdev; struct ulp_ddp_config config = {.type = ULP_DDP_NVME}; + bool offload_ddp = test_bit(ULP_DDP_C_NVME_TCP_BIT, + netdev->ulp_ddp_caps.active); + bool offload_ddgst_rx = test_bit(ULP_DDP_C_NVME_TCP_DDGST_RX_BIT, + netdev->ulp_ddp_caps.active); int ret; config.nvmeotcp.pfv = NVME_TCP_PFV_1_0; @@ -412,7 +478,10 @@ static int nvme_tcp_offload_socket(struct nvme_tcp_queue *queue) } inet_csk(queue->sock->sk)->icsk_ulp_ddp_ops = &nvme_tcp_ddp_ulp_ops; - set_bit(NVME_TCP_Q_OFF_DDP, &queue->flags); + if (offload_ddp) + set_bit(NVME_TCP_Q_OFF_DDP, &queue->flags); + if (queue->data_digest && offload_ddgst_rx) + set_bit(NVME_TCP_Q_OFF_DDGST_RX, &queue->flags); return 0; } @@ -426,6 +495,7 @@ static void nvme_tcp_unoffload_socket(struct nvme_tcp_queue *queue) } clear_bit(NVME_TCP_Q_OFF_DDP, &queue->flags); + clear_bit(NVME_TCP_Q_OFF_DDGST_RX, &queue->flags); netdev->netdev_ops->ulp_ddp_ops->sk_del(netdev, queue->sock->sk); @@ -518,11 +588,26 @@ static bool nvme_tcp_resync_request(struct sock *sk, u32 seq, u32 flags) #else -static inline bool is_netdev_ulp_offload_active(struct net_device *netdev) +static inline bool is_netdev_ulp_offload_active(struct net_device *netdev, + struct nvme_tcp_queue *queue) { return false; } +static inline bool nvme_tcp_ddp_ddgst_ok(struct nvme_tcp_queue *queue) +{ + return true; +} + +static inline void nvme_tcp_ddp_ddgst_update(struct nvme_tcp_queue *queue, + struct sk_buff *skb) +{} + +static void nvme_tcp_ddp_ddgst_recalc(struct ahash_request *hash, + struct request *rq, + __le32 *ddgst) +{} + static int nvme_tcp_setup_ddp(struct nvme_tcp_queue *queue, u16 command_id, struct request *rq) { @@ -805,6 +890,9 @@ static void nvme_tcp_init_recv_ctx(struct nvme_tcp_queue *queue) queue->pdu_offset = 0; queue->data_remaining = -1; queue->ddgst_remaining = 0; +#ifdef CONFIG_ULP_DDP + queue->ddp_ddgst_valid = true; +#endif } static void nvme_tcp_error_recovery(struct nvme_ctrl *ctrl) @@ -1008,7 +1096,8 @@ static int nvme_tcp_recv_pdu(struct nvme_tcp_queue *queue, struct sk_buff *skb, size_t rcv_len = min_t(size_t, *len, queue->pdu_remaining); int ret; - if (test_bit(NVME_TCP_Q_OFF_DDP, &queue->flags)) + if (test_bit(NVME_TCP_Q_OFF_DDP, &queue->flags) || + test_bit(NVME_TCP_Q_OFF_DDGST_RX, &queue->flags)) nvme_tcp_resync_response(queue, skb, *offset); ret = skb_copy_bits(skb, *offset, @@ -1072,6 +1161,10 @@ static int nvme_tcp_recv_data(struct nvme_tcp_queue *queue, struct sk_buff *skb, nvme_cid_to_rq(nvme_tcp_tagset(queue), pdu->command_id); struct nvme_tcp_request *req = blk_mq_rq_to_pdu(rq); + if (queue->data_digest && + test_bit(NVME_TCP_Q_OFF_DDGST_RX, &queue->flags)) + nvme_tcp_ddp_ddgst_update(queue, skb); + while (true) { int recv_len, ret; @@ -1100,7 +1193,8 @@ static int nvme_tcp_recv_data(struct nvme_tcp_queue *queue, struct sk_buff *skb, recv_len = min_t(size_t, recv_len, iov_iter_count(&req->iter)); - if (queue->data_digest) + if (queue->data_digest && + !test_bit(NVME_TCP_Q_OFF_DDGST_RX, &queue->flags)) ret = skb_copy_and_hash_datagram_iter(skb, *offset, &req->iter, recv_len, queue->rcv_hash); else @@ -1142,8 +1236,11 @@ static int nvme_tcp_recv_ddgst(struct nvme_tcp_queue *queue, char *ddgst = (char *)&queue->recv_ddgst; size_t recv_len = min_t(size_t, *len, queue->ddgst_remaining); off_t off = NVME_TCP_DIGEST_LENGTH - queue->ddgst_remaining; + struct request *rq; int ret; + if (test_bit(NVME_TCP_Q_OFF_DDGST_RX, &queue->flags)) + nvme_tcp_ddp_ddgst_update(queue, skb); ret = skb_copy_bits(skb, *offset, &ddgst[off], recv_len); if (unlikely(ret)) return ret; @@ -1154,9 +1251,25 @@ static int nvme_tcp_recv_ddgst(struct nvme_tcp_queue *queue, if (queue->ddgst_remaining) return 0; + rq = nvme_cid_to_rq(nvme_tcp_tagset(queue), + pdu->command_id); + + if (test_bit(NVME_TCP_Q_OFF_DDGST_RX, &queue->flags)) { + /* + * If HW successfully offloaded the digest + * verification, we can skip it + */ + if (nvme_tcp_ddp_ddgst_ok(queue)) + goto out; + /* + * Otherwise we have to recalculate and verify the + * digest with the software-fallback + */ + nvme_tcp_ddp_ddgst_recalc(queue->rcv_hash, rq, + &queue->exp_ddgst); + } + if (queue->recv_ddgst != queue->exp_ddgst) { - struct request *rq = nvme_cid_to_rq(nvme_tcp_tagset(queue), - pdu->command_id); struct nvme_tcp_request *req = blk_mq_rq_to_pdu(rq); req->status = cpu_to_le16(NVME_SC_DATA_XFER_ERROR); @@ -1167,9 +1280,8 @@ static int nvme_tcp_recv_ddgst(struct nvme_tcp_queue *queue, le32_to_cpu(queue->exp_ddgst)); } +out: if (pdu->hdr.flags & NVME_TCP_F_DATA_SUCCESS) { - struct request *rq = nvme_cid_to_rq(nvme_tcp_tagset(queue), - pdu->command_id); struct nvme_tcp_request *req = blk_mq_rq_to_pdu(rq); nvme_tcp_end_request(rq, le16_to_cpu(req->status)); @@ -1978,7 +2090,8 @@ static void __nvme_tcp_stop_queue(struct nvme_tcp_queue *queue) kernel_sock_shutdown(queue->sock, SHUT_RDWR); nvme_tcp_restore_sock_calls(queue); cancel_work_sync(&queue->io_work); - if (test_bit(NVME_TCP_Q_OFF_DDP, &queue->flags)) + if (test_bit(NVME_TCP_Q_OFF_DDP, &queue->flags) || + test_bit(NVME_TCP_Q_OFF_DDGST_RX, &queue->flags)) nvme_tcp_unoffload_socket(queue); } @@ -2008,7 +2121,8 @@ static int nvme_tcp_start_queue(struct nvme_ctrl *nctrl, int idx) goto err; netdev = ctrl->queues[idx].ctrl->offloading_netdev; - if (netdev && is_netdev_ulp_offload_active(netdev)) { + if (netdev && + is_netdev_ulp_offload_active(netdev, &ctrl->queues[idx])) { ret = nvme_tcp_offload_socket(&ctrl->queues[idx]); if (ret) { dev_err(nctrl->device, @@ -2027,7 +2141,7 @@ static int nvme_tcp_start_queue(struct nvme_ctrl *nctrl, int idx) ctrl->offloading_netdev = NULL; goto done; } - if (is_netdev_ulp_offload_active(netdev)) + if (is_netdev_ulp_offload_active(netdev, &ctrl->queues[idx])) nvme_tcp_offload_limits(&ctrl->queues[idx], netdev); /* * release the device as no offload context is From patchwork Tue Jan 17 15:35:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Aptel X-Patchwork-Id: 13104816 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EB856C677F1 for ; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Y8ahWTwAkJrZwkUeZoBxrQ+rnpv8UIsucI7ytteYNVcYe8Mm/bwRyqw49bFZqYIapgwFkG1qImorUAVlBwahpjPzo6RpqijihBK/SrpBv+hYwE0xX6olGDQmB4ICEDpot0dWIgbVlolkvS6C/YqwbROxBit6+WGmDsELfs+H9VxFoytjrRKu+c47e3/iY7uA8wX+le1fHG1NtBYc0g+Rweo9MaRm3t8Pvnyua3ry5ZjcA9YzNGk8JIdcrMwX58JHnxN8YLnDJ15MfI0h2cLxVhhmlSs+nowJTHCovaQU6i4ywBaKgo9dVLPDPSWnZdv64w3NaOWgA5hT5VPtBVYFGe8wn/tlMURTcNNegCEuNTsrGA8FzUxT3SH9rJghYnB9P6/r1vvR+15C/6rEUMm+8nBAdFI/tfQiTNlAa4cUGM5BTo2riH4LcOaSLM15Ya891cBWq7QwwP9WthYgJgiYrcyutrt1grMoC8qo/YOBiGm8IZ6qFsEsgbFTmQ2//IAFyYVCo26Eh4Uzmmquqofzelx1d9zIplpQduvQhMramQlXitOLG+bm4g5QNrxuY521OYa/9qWzI+9Bxcb1YaB1JecsiuTKMeS0b6dF/DBiSeH2gQz+JBzqDusxyCzCSL9jqziSmfiBwBamDK4cKaC09Q2S0WkcO06JHw+w0QdxuNT4LhL/Pwfp8hUgQ3LgtFeEEOIzfC/DsRi5uL3ODdIqihXxF3oBNBqEQenLXVARFUFpVYeD0nIYwRqGZWey9r7zoZVZ096DovjBqX6PtXdB+U+20ZHQrpnRActxL3PYHGOmiX4E7rvCgBs+i1erzYBHeeIbEiRUG/RMY8WO+KG8ujMq06rTo1hdPD6gJr02SZIg9r9TeFTbaZbg5b1W12R8Rb2nCQLunv+YVJ0yNVZgjKwc1ae7+iTa1gy0n9NfY0kQCj6NYQoWnWnJY5LbjhC9Y07WnW6t7oz+1xQf/J50sbl+Vv8hYP7zAjMfPLpzIS5ExW0olsQ5uI1C7+jZ0CHh904wF+NjSHW4gUHKlwudLshrNP/sJ7k048ycKN5Y927tjIAzreUGIpUytO9UvvoFb5xUAO+0j+sZ4l4n7wJEEDxxIjJ98yoVZZ8OL2XDr+ldWNFhysW5Lq7TUJNh+1KiUJnMnGMIQT7h4C6EFUUjBIkWaLChXsPARj03W7ZoLftLuzJHA60dOij03HrMnWBhDqJdsuEKocg3H+8yHIbPSwsyofaM/0HbOSwIOPnP7DIxQA3pAsFLiGtUQ4xFWywZkgs8sxPKSIaLUwnmR/Dr7VmujRn1tbUtRfpJeuHTuVvoP7Fugq7xIQZ8Hj1JPYb/7DCpY7kUIzIbMr59Tm3THKGOba8Az3W8AzB+fQjGaSzrmWiuYdvHiJObmRSyUEl4ZiGrP0WbpAalRZzkFSOU2l3mnPsW4H3hsAHz9QzvdPjGNM8vSE+aMIuGzqdKmrqD7PMN/g3nBeZG+AYKYt2cDeYTxO8g+XKiAwimUKOPyp4Oh4OCnQ8VD+5AWyauinpFgGOLaapA1KfF/zm60g+HLjeBGeURwHQ9PxeIXwr40KyhlyEQ5L6X/ON8nTPhkLjA X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: bb14a971-3fb6-4895-f90f-08daf8a0afd5 X-MS-Exchange-CrossTenant-AuthSource: SJ1PR12MB6075.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jan 2023 15:37:05.6556 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: A/5tgE7MDrWED35Xvh6vdTVcpwY/j6KS4t4uih/s9e9xl/t1I4VXvuXGZapJ9Xb02HqPQZv07tMwb6k6Q5Rx0A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB8177 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Or Gerlitz For ddp setup/teardown and resync, the offloading logic uses HW resources at the NIC driver such as SQ and CQ. These resources are destroyed when the netdevice does down and hence we must stop using them before the NIC driver destroys them. Use netdevice notifier for that matter -- offloaded connections are stopped before the stack continues to call the NIC driver close ndo. We use the existing recovery flow which has the advantage of resuming the offload once the connection is re-set. This also buys us proper handling for the UNREGISTER event b/c our offloading starts in the UP state, and down is always there between up to unregister. Signed-off-by: Or Gerlitz Signed-off-by: Boris Pismenny Signed-off-by: Ben Ben-Ishay Signed-off-by: Yoray Zack Signed-off-by: Shai Malin Signed-off-by: Aurelien Aptel Reviewed-by: Chaitanya Kulkarni --- drivers/nvme/host/tcp.c | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/drivers/nvme/host/tcp.c b/drivers/nvme/host/tcp.c index 87259574ee1a..8b1ebbdcda8e 100644 --- a/drivers/nvme/host/tcp.c +++ b/drivers/nvme/host/tcp.c @@ -203,6 +203,7 @@ struct nvme_tcp_ctrl { static LIST_HEAD(nvme_tcp_ctrl_list); static DEFINE_MUTEX(nvme_tcp_ctrl_mutex); +static struct notifier_block nvme_tcp_netdevice_nb; static struct workqueue_struct *nvme_tcp_wq; static const struct blk_mq_ops nvme_tcp_mq_ops; static const struct blk_mq_ops nvme_tcp_admin_mq_ops; @@ -3126,6 +3127,31 @@ static struct nvme_ctrl *nvme_tcp_create_ctrl(struct device *dev, return ERR_PTR(ret); } +static int nvme_tcp_netdev_event(struct notifier_block *this, + unsigned long event, void *ptr) +{ + struct net_device *ndev = netdev_notifier_info_to_dev(ptr); + struct nvme_tcp_ctrl *ctrl; + + switch (event) { + case NETDEV_GOING_DOWN: + mutex_lock(&nvme_tcp_ctrl_mutex); + list_for_each_entry(ctrl, &nvme_tcp_ctrl_list, list) { + if (ndev != ctrl->offloading_netdev) + continue; + nvme_tcp_error_recovery(&ctrl->ctrl); + } + mutex_unlock(&nvme_tcp_ctrl_mutex); + flush_workqueue(nvme_reset_wq); + /* + * The associated controllers teardown has completed, + * ddp contexts were also torn down so we should be + * safe to continue... + */ + } + return NOTIFY_DONE; +} + static struct nvmf_transport_ops nvme_tcp_transport = { .name = "tcp", .module = THIS_MODULE, @@ -3140,13 +3166,26 @@ static struct nvmf_transport_ops nvme_tcp_transport = { static int __init nvme_tcp_init_module(void) { + int ret; + nvme_tcp_wq = alloc_workqueue("nvme_tcp_wq", WQ_MEM_RECLAIM | WQ_HIGHPRI, 0); if (!nvme_tcp_wq) return -ENOMEM; + nvme_tcp_netdevice_nb.notifier_call = nvme_tcp_netdev_event; + ret = register_netdevice_notifier(&nvme_tcp_netdevice_nb); + if (ret) { + pr_err("failed to register netdev notifier\n"); + goto out_free_workqueue; + } + nvmf_register_transport(&nvme_tcp_transport); return 0; + +out_free_workqueue: + destroy_workqueue(nvme_tcp_wq); + return ret; } static void __exit nvme_tcp_cleanup_module(void) @@ -3154,6 +3193,7 @@ static void __exit nvme_tcp_cleanup_module(void) struct nvme_tcp_ctrl *ctrl; nvmf_unregister_transport(&nvme_tcp_transport); + unregister_netdevice_notifier(&nvme_tcp_netdevice_nb); mutex_lock(&nvme_tcp_ctrl_mutex); list_for_each_entry(ctrl, &nvme_tcp_ctrl_list, list) From patchwork Tue Jan 17 15:35:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Aptel X-Patchwork-Id: 13104817 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E80A6C6379F for ; Tue, 17 Jan 2023 15:39:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231603AbjAQPjE (ORCPT ); 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Turn ULP offload off be default, regardless of the NIC driver support. Overall, in order to enable ULP offload: - nvme-tcp ulp_offload modparam must be set to 1 - netdev->ulp_ddp_caps.active must have ULP_DDP_C_NVME_TCP and/or ULP_DDP_C_NVME_TCP_DDGST_RX capabilities flag set. Signed-off-by: Yoray Zack Signed-off-by: Shai Malin Signed-off-by: Aurelien Aptel --- drivers/nvme/host/tcp.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/nvme/host/tcp.c b/drivers/nvme/host/tcp.c index 8b1ebbdcda8e..3d7bf5136b5a 100644 --- a/drivers/nvme/host/tcp.c +++ b/drivers/nvme/host/tcp.c @@ -34,6 +34,16 @@ static int so_priority; module_param(so_priority, int, 0644); MODULE_PARM_DESC(so_priority, "nvme tcp socket optimize priority"); +#ifdef CONFIG_ULP_DDP +/* NVMeTCP direct data placement and data digest offload will not + * happen if this parameter false (default), regardless of what the + * underlying netdev capabilities are. + */ +static bool ulp_offload; +module_param(ulp_offload, bool, 0644); +MODULE_PARM_DESC(ulp_offload, "Enable or disable NVMeTCP ULP support"); +#endif + #ifdef CONFIG_DEBUG_LOCK_ALLOC /* lockdep can detect a circular dependency of the form * sk_lock -> mmap_lock (page fault) -> fs locks -> sk_lock @@ -316,6 +326,9 @@ static bool nvme_tcp_ddp_query_limits(struct net_device *netdev, { int ret; + if (!ulp_offload) + return false; + if (!netdev || !is_netdev_ulp_offload_active(netdev, NULL) || !netdev->netdev_ops->ulp_ddp_ops->limits) return false; @@ -455,6 +468,9 @@ static int nvme_tcp_offload_socket(struct nvme_tcp_queue *queue) netdev->ulp_ddp_caps.active); int ret; + if (!ulp_offload) + return 0; + config.nvmeotcp.pfv = NVME_TCP_PFV_1_0; config.nvmeotcp.cpda = 0; config.nvmeotcp.dgst = @@ -509,6 +525,9 @@ static void nvme_tcp_offload_limits(struct nvme_tcp_queue *queue, { struct ulp_ddp_limits limits = {.type = ULP_DDP_NVME }; + if (!ulp_offload) + return; + if (!nvme_tcp_ddp_query_limits(netdev, &limits)) { queue->ctrl->offloading_netdev = NULL; return; From patchwork Tue Jan 17 15:35:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Aptel X-Patchwork-Id: 13104818 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 544E8C677F1 for ; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 3c8TrTqp0g5xlIFWGkjsU+PgNvg9UE6KL92Opr2VUuYSQMv+o7epLfqFQ9vxXjDsSU6Z9Nv/loBcKF7oOtFa7sNyGuW8va893/BFVpn3UtQ6Hr8yQCjfCu6whTH1G3f8bS+3oXAGKLiyiv5sffQWPbm08qv31K5245RcWRDQEdtk9tep4Cn8lXoQVvpA1kV36UG2bhb9/KK7mXx9FnXqdynMisKIcteOLh0ysB+H6ytD5qWK9+zFsh30iLvtaE1pvJ6oUcv1WwYpe0jXcchI9a06iicCZOV3EQFbOkchPiLtOYZxsYvNc/TvEjCz3uQvI03E8IMZBp7TNnxR2lasWuFCge54YSQ0xKzbqnxF07ttij7Lf+yu5O+16USRzAp5lonBl9+t3qbubW0Ets10AxS/SKOLtSfOMQ9cLbA9X2/ch6KFtv9YkfNySeCrkQAYdr0zrV+v+FxDMSSwWyQZktOjV+ukx06kHDeWgplgfjOGM2uYT8ma8SXJYK1DiAj/oYbFhQT/ZMp5PTSC6qCOpwYn2ghksHc3oG/TWpLdia1e4leE3BuZZi8HOrTQ62zQF48mwyBa5rf9POSvapC2XCatsa8EvdYkxTEbFcUovYpTwp8qCAMwVOkmlZqfJbkT93wCfQTtzVNOB5c0hmJ9+S1ftgVVoxeQ+q/Exwwp9LT06agcf8QZKW3XDqj3JK+smqOPBrEaSik9r+cAjb/CufhmGWcLfosf5gXxvSkhVDQT/HL086jcZzoSaStrE0OhTJ57Wc7Ia2PQMFR4GvEjihPeUYyC+gMUixjIm2RuXoggePC1tU4axdqcl15hxXE4IerN41Kq4jNfwcOeNPVLeXa5zpyM6HD1nT8mO/d9oJhE4KTqD0R+4T4FFIFJg7XVTUr9+Mad5N+evAVmOCnIaRCYDA08MeXSGJXzy0VOirygbWu7ltGDnK6Em1JlPX4ML3EQI6XUe+bKhxBuCQiuQNrzgNEapS3lz/2xfP7RhL5WVXpMkQObzEsUGezfZ4AXjJhyL1sF/GGEv9xHWIrMOa4HvVeq6cDjmVmNu1+ujxEPm0EBXbQ/cjPX4cCT/+LKFOSBZbJgPdjgBQDa9yUblIbT3+SA/8qd2fXAE2JqK2BlntYlPa3Tn3/d6ZMUmCsnFx7L6ZueP+TkRx//ynqXh6Jf84uZ15k8HztWNN0ObC3fJRKhMtaaR8WGDcrdDXA7ZopPnHcTXELHPhWyKWYp73FXa+1oIXXgMIgLzZgVX/LXR7//LZNBMnuo0me7ljnQ7zT60q/xCwIt6sNchfI0RSkPOIjmwwgIJj+XnTj/B0fOi8B7iWsDp88v3++t8sxivcbNtavqdSQv+01NPV88FbIEnP2W2XtgTA8BdjaLnBqKH5WCfoR2kgz8cOrXzKkCtOODGF/yLSvLTeKg7DZO733buaH2JhdSJcziZ9K+Qh5hHq/VCj+DTUfghoFQiqCAJRHykGZgkWCf9mYAhfj0ZAGcwkdgLW2K/IHqBlFQoihZBB3PFCR215b5c+UyB6ygAXn4ZslfmDvUzp1faty59SiBOd7nEFeC75dcjhMms3h44AH40G67FAPW+Qetp6Wb X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 797db2b7-5594-4968-8a2f-08daf8a0b6f6 X-MS-Exchange-CrossTenant-AuthSource: SJ1PR12MB6075.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jan 2023 15:37:17.6131 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 9vgJhQlBEUPudHXEIoMcP/xbNcVLEMBJaXHoKhuMbpYWgPNVezmog1w/MRfQsCSz6OwEMVDZCrWsCHYUCUYV0Q== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB6889 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org From: Yoray Zack Document the new ULP DDP API and add it under "networking". Use NVMe-TCP implementation as an example. Signed-off-by: Boris Pismenny Signed-off-by: Ben Ben-Ishay Signed-off-by: Or Gerlitz Signed-off-by: Yoray Zack Signed-off-by: Shai Malin Signed-off-by: Aurelien Aptel --- Documentation/networking/index.rst | 1 + Documentation/networking/ulp-ddp-offload.rst | 374 +++++++++++++++++++ 2 files changed, 375 insertions(+) create mode 100644 Documentation/networking/ulp-ddp-offload.rst diff --git a/Documentation/networking/index.rst b/Documentation/networking/index.rst index 4f2d1f682a18..10dbbb6694dc 100644 --- a/Documentation/networking/index.rst +++ b/Documentation/networking/index.rst @@ -106,6 +106,7 @@ Contents: tc-actions-env-rules tc-queue-filters tcp-thin + ulp-ddp-offload team timestamping tipc diff --git a/Documentation/networking/ulp-ddp-offload.rst b/Documentation/networking/ulp-ddp-offload.rst new file mode 100644 index 000000000000..01ba4ecb2216 --- /dev/null +++ b/Documentation/networking/ulp-ddp-offload.rst @@ -0,0 +1,374 @@ +.. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) + +================================= +ULP direct data placement offload +================================= + +Overview +======== + +The Linux kernel ULP direct data placement (DDP) offload infrastructure +provides tagged request-response protocols, such as NVMe-TCP, the ability to +place response data directly in pre-registered buffers according to header +tags. DDP is particularly useful for data-intensive pipelined protocols whose +responses may be reordered. + +For example, in NVMe-TCP numerous read requests are sent together and each +request is tagged using the PDU header CID field. Receiving servers process +requests as fast as possible and sometimes responses for smaller requests +bypasses responses to larger requests, e.g., 4KB reads bypass 1GB reads. +Thereafter, clients correlate responses to requests using PDU header CID tags. +The processing of each response requires copying data from SKBs to read +request destination buffers; The offload avoids this copy. The offload is +oblivious to destination buffers which can reside either in userspace +(O_DIRECT) or in kernel pagecache. + +Request TCP byte-stream: + +.. parsed-literal:: + + +---------------+-------+---------------+-------+---------------+-------+ + | PDU hdr CID=1 | Req 1 | PDU hdr CID=2 | Req 2 | PDU hdr CID=3 | Req 3 | + +---------------+-------+---------------+-------+---------------+-------+ + +Response TCP byte-stream: + +.. parsed-literal:: + + +---------------+--------+---------------+--------+---------------+--------+ + | PDU hdr CID=2 | Resp 2 | PDU hdr CID=3 | Resp 3 | PDU hdr CID=1 | Resp 1 | + +---------------+--------+---------------+--------+---------------+--------+ + +The driver builds SKB page fragments that point to destination buffers. +Consequently, SKBs represent the original data on the wire, which enables +*transparent* inter-operation with the network stack. To avoid copies between +SKBs and destination buffers, the layer-5 protocol (L5P) will check +``if (src == dst)`` for SKB page fragments, success indicates that data is +already placed there by NIC hardware and copy should be skipped. + +In addition, L5P might have DDGST which ensures data integrity over +the network. If not offloaded, ULP DDP might not be efficient as L5P +will need to go over the data and calculate it by itself, cancelling +out the benefits of the DDP copy skip. ULP DDP has support for Rx/Tx +DDGST offload. On the received side the NIC will verify DDGST for +received PDUs and update SKB->ulp_ddp and SKB->ulp_crc bits. If all the SKBs +making up a L5P PDU have crc on, L5P will skip on calculating and +verifying the DDGST for the corresponding PDU. On the Tx side, the NIC +will be responsible for calculating and filling the DDGST fields in +the sent PDUs. + +Offloading does require NIC hardware to track L5P protocol framing, similarly +to RX TLS offload (see Documentation/networking/tls-offload.rst). NIC hardware +will parse PDU headers, extract fields such as operation type, length, tag +identifier, etc. and only offload segments that correspond to tags registered +with the NIC, see the :ref:`buf_reg` section. + +Device configuration +==================== + +During driver initialization the driver sets the following +:c:type:`struct net_device ` properties: + +* The ULP DDP capabilities it supports + in :c:type:`struct ulp_ddp_netdev_caps ` +* The ULP DDP operations pointer in :c:type:`struct ulp_ddp_dev_ops`. + +The current list of capabilities is: + +.. code-block:: c + + enum ulp_ddp_offload_capabilities { + ULP_DDP_C_NVME_TCP = 1, + ULP_DDP_C_NVME_TCP_DDGST_RX = 2, + }; + +The enablement of capabilities can be controlled from userspace via +netlink. See Documentation/networking/ethtool-netlink.rst for more +details. + +Later, after the L5P completes its handshake, the L5P queries the +driver for its runtime limitations via the :c:member:`ulp_ddp_limits` operation: + +.. code-block:: c + + int (*ulp_ddp_limits)(struct net_device *netdev, + struct ulp_ddp_limits *limits); + + +All L5P share a common set of limits and parameters (:c:type:`struct ulp_ddp_limits`): + +.. code-block:: c + + /** + * struct ulp_ddp_limits - Generic ulp ddp limits: tcp ddp + * protocol limits. + * Add new instances of ulp_ddp_limits in the union below (nvme-tcp, etc.). + * + * @type: type of this limits struct + * @max_ddp_sgl_len: maximum sgl size supported (zero means no limit) + * @io_threshold: minimum payload size required to offload + * @nvmeotcp: NVMe-TCP specific limits + */ + struct ulp_ddp_limits { + enum ulp_ddp_type type; + int max_ddp_sgl_len; + int io_threshold; + union { + /* ... protocol-specific limits ... */ + struct nvme_tcp_ddp_limits nvmeotcp; + }; + }; + +But each L5P can also add protocol-specific limits e.g.: + +.. code-block:: c + + /** + * struct nvme_tcp_ddp_limits - nvme tcp driver limitations + * + * @full_ccid_range: true if the driver supports the full CID range + */ + struct nvme_tcp_ddp_limits { + bool full_ccid_range; + }; + +Once the L5P has made sure the device is supported the offload +operations are installed on the socket. + +If offload installation fails, then the connection is handled by software as if +offload was not attempted. + +To request offload for a socket `sk`, the L5P calls :c:member:`sk_add`: + +.. code-block:: c + + int (*sk_add)(struct net_device *netdev, + struct sock *sk, + struct ulp_ddp_config *config); + +The function return 0 for success. In case of failure, L5P software should +fallback to normal non-offloaded operations. The `config` parameter indicates +the L5P type and any metadata relevant for that protocol. For example, in +NVMe-TCP the following config is used: + +.. code-block:: c + + /** + * struct nvme_tcp_ddp_config - nvme tcp ddp configuration for an IO queue + * + * @pfv: pdu version (e.g., NVME_TCP_PFV_1_0) + * @cpda: controller pdu data alignment (dwords, 0's based) + * @dgst: digest types enabled. + * The netdev will offload crc if L5P data digest is supported. + * @queue_size: number of nvme-tcp IO queue elements + * @queue_id: queue identifier + * @cpu_io: cpu core running the IO thread for this queue + */ + struct nvme_tcp_ddp_config { + u16 pfv; + u8 cpda; + u8 dgst; + int queue_size; + int queue_id; + int io_cpu; + }; + +When offload is not needed anymore, e.g. when the socket is being released, the L5P +calls :c:member:`sk_del` to release device contexts: + +.. code-block:: c + + void (*sk_del)(struct net_device *netdev, + struct sock *sk); + +Normal operation +================ + +At the very least, the device maintains the following state for each connection: + + * 5-tuple + * expected TCP sequence number + * mapping between tags and corresponding buffers + * current offset within PDU, PDU length, current PDU tag + +NICs should not assume any correlation between PDUs and TCP packets. +If TCP packets arrive in-order, offload will place PDU payloads +directly inside corresponding registered buffers. NIC offload should +not delay packets. If offload is not possible, than the packet is +passed as-is to software. To perform offload on incoming packets +without buffering packets in the NIC, the NIC stores some inter-packet +state, such as partial PDU headers. + +RX data-path +------------ + +After the device validates TCP checksums, it can perform DDP offload. The +packet is steered to the DDP offload context according to the 5-tuple. +Thereafter, the expected TCP sequence number is checked against the packet +TCP sequence number. If there is a match, offload is performed: the PDU payload +is DMA written to the corresponding destination buffer according to the PDU header +tag. The data should be DMAed only once, and the NIC receive ring will only +store the remaining TCP and PDU headers. + +We remark that a single TCP packet may have numerous PDUs embedded inside. NICs +can choose to offload one or more of these PDUs according to various +trade-offs. Possibly, offloading such small PDUs is of little value, and it is +better to leave it to software. + +Upon receiving a DDP offloaded packet, the driver reconstructs the original SKB +using page frags, while pointing to the destination buffers whenever possible. +This method enables seamless integration with the network stack, which can +inspect and modify packet fields transparently to the offload. + +.. _buf_reg: + +Destination buffer registration +------------------------------- + +To register the mapping between tags and destination buffers for a socket +`sk`, the L5P calls :c:member:`setup` of :c:type:`struct ulp_ddp_ops +`: + +.. code-block:: c + + int (*setup)(struct net_device *netdev, + struct sock *sk, + struct ulp_ddp_io *io); + + +The `io` provides the buffer via scatter-gather list (`sg_table`) and +corresponding tag (`command_id`): + +.. code-block:: c + + /** + * struct ulp_ddp_io - tcp ddp configuration for an IO request. + * + * @command_id: identifier on the wire associated with these buffers + * @nents: number of entries in the sg_table + * @sg_table: describing the buffers for this IO request + * @first_sgl: first SGL in sg_table + */ + struct ulp_ddp_io { + u32 command_id; + int nents; + struct sg_table sg_table; + struct scatterlist first_sgl[SG_CHUNK_SIZE]; + }; + +After the buffers have been consumed by the L5P, to release the NIC mapping of +buffers the L5P calls :c:member:`teardown` of :c:type:`struct +ulp_ddp_ops `: + +.. code-block:: c + + void (*teardown)(struct net_device *netdev, + struct sock *sk, + struct ulp_ddp_io *io, + void *ddp_ctx); + +`teardown` receives the same `io` context and an additional opaque +`ddp_ctx` that is used for asynchronous teardown, see the :ref:`async_release` +section. + +.. _async_release: + +Asynchronous teardown +--------------------- + +To teardown the association between tags and buffers and allow tag reuse NIC HW +is called by the NIC driver during `teardown`. This operation may be +performed either synchronously or asynchronously. In asynchronous teardown, +`teardown` returns immediately without unmapping NIC HW buffers. Later, +when the unmapping completes by NIC HW, the NIC driver will call up to L5P +using :c:member:`ddp_teardown_done` of :c:type:`struct ulp_ddp_ulp_ops`: + +.. code-block:: c + + void (*ddp_teardown_done)(void *ddp_ctx); + +The `ddp_ctx` parameter passed in `ddp_teardown_done` is the same on provided +in `teardown` and it is used to carry some context about the buffers +and tags that are released. + +Resync handling +=============== + +RX +-- +In presence of packet drops or network packet reordering, the device may lose +synchronization between the TCP stream and the L5P framing, and require a +resync with the kernel's TCP stack. When the device is out of sync, no offload +takes place, and packets are passed as-is to software. Resync is very similar +to TLS offload (see documentation at Documentation/networking/tls-offload.rst) + +If only packets with L5P data are lost or reordered, then resynchronization may +be avoided by NIC HW that keeps tracking PDU headers. If, however, PDU headers +are reordered, then resynchronization is necessary. + +To resynchronize hardware during traffic, we use a handshake between hardware +and software. The NIC HW searches for a sequence of bytes that identifies L5P +headers (i.e., magic pattern). For example, in NVMe-TCP, the PDU operation +type can be used for this purpose. Using the PDU header length field, the NIC +HW will continue to find and match magic patterns in subsequent PDU headers. If +the pattern is missing in an expected position, then searching for the pattern +starts anew. + +The NIC will not resume offload when the magic pattern is first identified. +Instead, it will request L5P software to confirm that indeed this is a PDU +header. To request confirmation the NIC driver calls up to L5P using +:c:member:`*resync_request` of :c:type:`struct ulp_ddp_ulp_ops`: + +.. code-block:: c + + bool (*resync_request)(struct sock *sk, u32 seq, u32 flags); + +The `seq` parameter contains the TCP sequence of the last byte in the PDU header. +The `flags` parameter contains a flag (`ULP_DDP_RESYNC_PENDING`) indicating whether +a request is pending or not. +L5P software will respond to this request after observing the packet containing +TCP sequence `seq` in-order. If the PDU header is indeed there, then L5P +software calls the NIC driver using the :c:member:`resync` function of +the :c:type:`struct ulp_ddp_ops ` inside the :c:type:`struct +net_device ` while passing the same `seq` to confirm it is a PDU +header. + +.. code-block:: c + + void (*resync)(struct net_device *netdev, + struct sock *sk, u32 seq); + +Statistics +========== + +Per L5P protocol, the NIC driver must report statistics for the above +netdevice operations and packets processed by offload. +These statistics are per-device and can be retrieved from userspace +via netlink (see Documentation/networking/ethtool-netlink.rst). + +For example, NVMe-TCP offload reports: + + * ``rx_nvmeotcp_sk_add`` - number of NVMe-TCP Rx offload contexts created. + * ``rx_nvmeotcp_sk_add_fail`` - number of NVMe-TCP Rx offload context creation + failures. + * ``rx_nvmeotcp_sk_del`` - number of NVMe-TCP Rx offload contexts destroyed. + * ``rx_nvmeotcp_ddp_setup`` - number of DDP buffers mapped. + * ``rx_nvmeotcp_ddp_setup_fail`` - number of DDP buffers mapping that failed. + * ``rx_nvmeotcp_ddp_teardown`` - number of DDP buffers unmapped. + * ``rx_nvmeotcp_drop`` - number of packets dropped in the driver due to fatal + errors. + * ``rx_nvmeotcp_resync`` - number of packets with resync requests. + * ``rx_nvmeotcp_packets`` - number of packets that used offload. + * ``rx_nvmeotcp_bytes`` - number of bytes placed in DDP buffers. + +NIC requirements +================ + +NIC hardware should meet the following requirements to provide this offload: + + * Offload must never buffer TCP packets. + * Offload must never modify TCP packet headers. + * Offload must never reorder TCP packets within a flow. + * Offload must never drop TCP packets. + * Offload must not depend on any TCP fields beyond the + 5-tuple and TCP sequence number. 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Signed-off-by: Or Gerlitz Signed-off-by: Ben Ben-Ishay Signed-off-by: Aurelien Aptel Reviewed-by: Tariq Toukan --- .../mlx5/core/en_accel/common_utils.h | 32 +++++++++++++++++ .../mellanox/mlx5/core/en_accel/ktls.c | 2 +- .../mellanox/mlx5/core/en_accel/ktls_rx.c | 6 ++-- .../mellanox/mlx5/core/en_accel/ktls_tx.c | 8 ++--- .../mellanox/mlx5/core/en_accel/ktls_txrx.c | 36 ++++++++----------- .../mellanox/mlx5/core/en_accel/ktls_utils.h | 17 ++------- include/linux/mlx5/device.h | 8 ++--- include/linux/mlx5/mlx5_ifc.h | 8 +++-- 8 files changed, 67 insertions(+), 50 deletions(-) create mode 100644 drivers/net/ethernet/mellanox/mlx5/core/en_accel/common_utils.h diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/common_utils.h b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/common_utils.h new file mode 100644 index 000000000000..efdf48125848 --- /dev/null +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/common_utils.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ +/* Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. */ +#ifndef __MLX5E_COMMON_UTILS_H__ +#define __MLX5E_COMMON_UTILS_H__ + +#include "en.h" + +struct mlx5e_set_transport_static_params_wqe { + struct mlx5_wqe_ctrl_seg ctrl; + struct mlx5_wqe_umr_ctrl_seg uctrl; + struct mlx5_mkey_seg mkc; + struct mlx5_wqe_transport_static_params_seg params; +}; + +/* macros for transport_static_params handling */ +#define MLX5E_TRANSPORT_SET_STATIC_PARAMS_WQEBBS \ + (DIV_ROUND_UP(sizeof(struct mlx5e_set_transport_static_params_wqe), MLX5_SEND_WQE_BB)) + +#define MLX5E_TRANSPORT_FETCH_SET_STATIC_PARAMS_WQE(sq, pi) \ + ((struct mlx5e_set_transport_static_params_wqe *)\ + mlx5e_fetch_wqe(&(sq)->wq, pi, sizeof(struct mlx5e_set_transport_static_params_wqe))) + +#define MLX5E_TRANSPORT_STATIC_PARAMS_WQE_SZ \ + (sizeof(struct mlx5e_set_transport_static_params_wqe)) + +#define MLX5E_TRANSPORT_STATIC_PARAMS_DS_CNT \ + (DIV_ROUND_UP(MLX5E_TRANSPORT_STATIC_PARAMS_WQE_SZ, MLX5_SEND_WQE_DS)) + +#define MLX5E_TRANSPORT_STATIC_PARAMS_OCTWORD_SIZE \ + (MLX5_ST_SZ_BYTES(transport_static_params) / MLX5_SEND_WQE_DS) + +#endif /* __MLX5E_COMMON_UTILS_H__ */ diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.c index eb5b09f81dec..f64523f0932f 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.c @@ -101,7 +101,7 @@ bool mlx5e_is_ktls_rx(struct mlx5_core_dev *mdev) return false; /* Check the possibility to post the required ICOSQ WQEs. */ - if (WARN_ON_ONCE(max_sq_wqebbs < MLX5E_TLS_SET_STATIC_PARAMS_WQEBBS)) + if (WARN_ON_ONCE(max_sq_wqebbs < MLX5E_TRANSPORT_SET_STATIC_PARAMS_WQEBBS)) return false; if (WARN_ON_ONCE(max_sq_wqebbs < MLX5E_TLS_SET_PROGRESS_PARAMS_WQEBBS)) return false; diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c index 3e54834747ce..8551ddd500b2 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c @@ -136,16 +136,16 @@ static struct mlx5_wqe_ctrl_seg * post_static_params(struct mlx5e_icosq *sq, struct mlx5e_ktls_offload_context_rx *priv_rx) { - struct mlx5e_set_tls_static_params_wqe *wqe; + struct mlx5e_set_transport_static_params_wqe *wqe; struct mlx5e_icosq_wqe_info wi; u16 pi, num_wqebbs; - num_wqebbs = MLX5E_TLS_SET_STATIC_PARAMS_WQEBBS; + num_wqebbs = MLX5E_TRANSPORT_SET_STATIC_PARAMS_WQEBBS; if (unlikely(!mlx5e_icosq_can_post_wqe(sq, num_wqebbs))) return ERR_PTR(-ENOSPC); pi = mlx5e_icosq_get_next_pi(sq, num_wqebbs); - wqe = MLX5E_TLS_FETCH_SET_STATIC_PARAMS_WQE(sq, pi); + wqe = MLX5E_TRANSPORT_FETCH_SET_STATIC_PARAMS_WQE(sq, pi); mlx5e_ktls_build_static_params(wqe, sq->pc, sq->sqn, &priv_rx->crypto_info, mlx5e_tir_get_tirn(&priv_rx->tir), priv_rx->key_id, priv_rx->resync.seq, false, diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c index 6db27062b765..e127f53e19ff 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c @@ -33,7 +33,7 @@ u16 mlx5e_ktls_get_stop_room(struct mlx5_core_dev *mdev, struct mlx5e_params *pa num_dumps = mlx5e_ktls_dumps_num_wqes(params, MAX_SKB_FRAGS, TLS_MAX_PAYLOAD_SIZE); - stop_room += mlx5e_stop_room_for_wqe(mdev, MLX5E_TLS_SET_STATIC_PARAMS_WQEBBS); + stop_room += mlx5e_stop_room_for_wqe(mdev, MLX5E_TRANSPORT_SET_STATIC_PARAMS_WQEBBS); stop_room += mlx5e_stop_room_for_wqe(mdev, MLX5E_TLS_SET_PROGRESS_PARAMS_WQEBBS); stop_room += num_dumps * mlx5e_stop_room_for_wqe(mdev, MLX5E_KTLS_DUMP_WQEBBS); stop_room += 1; /* fence nop */ @@ -544,12 +544,12 @@ post_static_params(struct mlx5e_txqsq *sq, struct mlx5e_ktls_offload_context_tx *priv_tx, bool fence) { - struct mlx5e_set_tls_static_params_wqe *wqe; + struct mlx5e_set_transport_static_params_wqe *wqe; u16 pi, num_wqebbs; - num_wqebbs = MLX5E_TLS_SET_STATIC_PARAMS_WQEBBS; + num_wqebbs = MLX5E_TRANSPORT_SET_STATIC_PARAMS_WQEBBS; pi = mlx5e_txqsq_get_next_pi(sq, num_wqebbs); - wqe = MLX5E_TLS_FETCH_SET_STATIC_PARAMS_WQE(sq, pi); + wqe = MLX5E_TRANSPORT_FETCH_SET_STATIC_PARAMS_WQE(sq, pi); mlx5e_ktls_build_static_params(wqe, sq->pc, sq->sqn, &priv_tx->crypto_info, priv_tx->tisn, priv_tx->key_id, 0, fence, TLS_OFFLOAD_CTX_DIR_TX); diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.c index 570a912dd6fa..8abea6fe6cd9 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.c @@ -8,10 +8,6 @@ enum { MLX5E_STATIC_PARAMS_CONTEXT_TLS_1_2 = 0x2, }; -enum { - MLX5E_ENCRYPTION_STANDARD_TLS = 0x1, -}; - #define EXTRACT_INFO_FIELDS do { \ salt = info->salt; \ rec_seq = info->rec_seq; \ @@ -20,7 +16,7 @@ enum { } while (0) static void -fill_static_params(struct mlx5_wqe_tls_static_params_seg *params, +fill_static_params(struct mlx5_wqe_transport_static_params_seg *params, union mlx5e_crypto_info *crypto_info, u32 key_id, u32 resync_tcp_sn) { @@ -53,25 +49,25 @@ fill_static_params(struct mlx5_wqe_tls_static_params_seg *params, return; } - gcm_iv = MLX5_ADDR_OF(tls_static_params, ctx, gcm_iv); - initial_rn = MLX5_ADDR_OF(tls_static_params, ctx, initial_record_number); + gcm_iv = MLX5_ADDR_OF(transport_static_params, ctx, gcm_iv); + initial_rn = MLX5_ADDR_OF(transport_static_params, ctx, initial_record_number); memcpy(gcm_iv, salt, salt_sz); memcpy(initial_rn, rec_seq, rec_seq_sz); tls_version = MLX5E_STATIC_PARAMS_CONTEXT_TLS_1_2; - MLX5_SET(tls_static_params, ctx, tls_version, tls_version); - MLX5_SET(tls_static_params, ctx, const_1, 1); - MLX5_SET(tls_static_params, ctx, const_2, 2); - MLX5_SET(tls_static_params, ctx, encryption_standard, - MLX5E_ENCRYPTION_STANDARD_TLS); - MLX5_SET(tls_static_params, ctx, resync_tcp_sn, resync_tcp_sn); - MLX5_SET(tls_static_params, ctx, dek_index, key_id); + MLX5_SET(transport_static_params, ctx, tls_version, tls_version); + MLX5_SET(transport_static_params, ctx, const_1, 1); + MLX5_SET(transport_static_params, ctx, const_2, 2); + MLX5_SET(transport_static_params, ctx, acc_type, + MLX5_TRANSPORT_STATIC_PARAMS_ACC_TYPE_TLS); + MLX5_SET(transport_static_params, ctx, resync_tcp_sn, resync_tcp_sn); + MLX5_SET(transport_static_params, ctx, dek_index, key_id); } void -mlx5e_ktls_build_static_params(struct mlx5e_set_tls_static_params_wqe *wqe, +mlx5e_ktls_build_static_params(struct mlx5e_set_transport_static_params_wqe *wqe, u16 pc, u32 sqn, union mlx5e_crypto_info *crypto_info, u32 tis_tir_num, u32 key_id, u32 resync_tcp_sn, @@ -80,19 +76,17 @@ mlx5e_ktls_build_static_params(struct mlx5e_set_tls_static_params_wqe *wqe, struct mlx5_wqe_umr_ctrl_seg *ucseg = &wqe->uctrl; struct mlx5_wqe_ctrl_seg *cseg = &wqe->ctrl; u8 opmod = direction == TLS_OFFLOAD_CTX_DIR_TX ? - MLX5_OPC_MOD_TLS_TIS_STATIC_PARAMS : - MLX5_OPC_MOD_TLS_TIR_STATIC_PARAMS; - -#define STATIC_PARAMS_DS_CNT DIV_ROUND_UP(sizeof(*wqe), MLX5_SEND_WQE_DS) + MLX5_OPC_MOD_TRANSPORT_TIS_STATIC_PARAMS : + MLX5_OPC_MOD_TRANSPORT_TIR_STATIC_PARAMS; cseg->opmod_idx_opcode = cpu_to_be32((pc << 8) | MLX5_OPCODE_UMR | (opmod << 24)); cseg->qpn_ds = cpu_to_be32((sqn << MLX5_WQE_CTRL_QPN_SHIFT) | - STATIC_PARAMS_DS_CNT); + MLX5E_TRANSPORT_STATIC_PARAMS_DS_CNT); cseg->fm_ce_se = fence ? MLX5_FENCE_MODE_INITIATOR_SMALL : 0; cseg->tis_tir_num = cpu_to_be32(tis_tir_num << 8); ucseg->flags = MLX5_UMR_INLINE; - ucseg->bsf_octowords = cpu_to_be16(MLX5_ST_SZ_BYTES(tls_static_params) / 16); + ucseg->bsf_octowords = cpu_to_be16(MLX5E_TRANSPORT_STATIC_PARAMS_OCTWORD_SIZE); fill_static_params(&wqe->params, crypto_info, key_id, resync_tcp_sn); } diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_utils.h b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_utils.h index 3d79cd379890..5e2d186778aa 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_utils.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_utils.h @@ -6,6 +6,7 @@ #include #include "en.h" +#include "en_accel/common_utils.h" enum { MLX5E_TLS_PROGRESS_PARAMS_AUTH_STATE_NO_OFFLOAD = 0, @@ -33,13 +34,6 @@ union mlx5e_crypto_info { struct tls12_crypto_info_aes_gcm_256 crypto_info_256; }; -struct mlx5e_set_tls_static_params_wqe { - struct mlx5_wqe_ctrl_seg ctrl; - struct mlx5_wqe_umr_ctrl_seg uctrl; - struct mlx5_mkey_seg mkc; - struct mlx5_wqe_tls_static_params_seg params; -}; - struct mlx5e_set_tls_progress_params_wqe { struct mlx5_wqe_ctrl_seg ctrl; struct mlx5_wqe_tls_progress_params_seg params; @@ -50,19 +44,12 @@ struct mlx5e_get_tls_progress_params_wqe { struct mlx5_seg_get_psv psv; }; -#define MLX5E_TLS_SET_STATIC_PARAMS_WQEBBS \ - (DIV_ROUND_UP(sizeof(struct mlx5e_set_tls_static_params_wqe), MLX5_SEND_WQE_BB)) - #define MLX5E_TLS_SET_PROGRESS_PARAMS_WQEBBS \ (DIV_ROUND_UP(sizeof(struct mlx5e_set_tls_progress_params_wqe), MLX5_SEND_WQE_BB)) #define MLX5E_KTLS_GET_PROGRESS_WQEBBS \ (DIV_ROUND_UP(sizeof(struct mlx5e_get_tls_progress_params_wqe), MLX5_SEND_WQE_BB)) -#define MLX5E_TLS_FETCH_SET_STATIC_PARAMS_WQE(sq, pi) \ - ((struct mlx5e_set_tls_static_params_wqe *)\ - mlx5e_fetch_wqe(&(sq)->wq, pi, sizeof(struct mlx5e_set_tls_static_params_wqe))) - #define MLX5E_TLS_FETCH_SET_PROGRESS_PARAMS_WQE(sq, pi) \ ((struct mlx5e_set_tls_progress_params_wqe *)\ mlx5e_fetch_wqe(&(sq)->wq, pi, sizeof(struct mlx5e_set_tls_progress_params_wqe))) @@ -76,7 +63,7 @@ struct mlx5e_get_tls_progress_params_wqe { mlx5e_fetch_wqe(&(sq)->wq, pi, sizeof(struct mlx5e_dump_wqe))) void -mlx5e_ktls_build_static_params(struct mlx5e_set_tls_static_params_wqe *wqe, +mlx5e_ktls_build_static_params(struct mlx5e_set_transport_static_params_wqe *wqe, u16 pc, u32 sqn, union mlx5e_crypto_info *crypto_info, u32 tis_tir_num, u32 key_id, u32 resync_tcp_sn, diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h index 29d4b201c7b2..b50b15dbf3c1 100644 --- a/include/linux/mlx5/device.h +++ b/include/linux/mlx5/device.h @@ -444,8 +444,8 @@ enum { }; enum { - MLX5_OPC_MOD_TLS_TIS_STATIC_PARAMS = 0x1, - MLX5_OPC_MOD_TLS_TIR_STATIC_PARAMS = 0x2, + MLX5_OPC_MOD_TRANSPORT_TIS_STATIC_PARAMS = 0x1, + MLX5_OPC_MOD_TRANSPORT_TIR_STATIC_PARAMS = 0x2, }; enum { @@ -453,8 +453,8 @@ enum { MLX5_OPC_MOD_TLS_TIR_PROGRESS_PARAMS = 0x2, }; -struct mlx5_wqe_tls_static_params_seg { - u8 ctx[MLX5_ST_SZ_BYTES(tls_static_params)]; +struct mlx5_wqe_transport_static_params_seg { + u8 ctx[MLX5_ST_SZ_BYTES(transport_static_params)]; }; struct mlx5_wqe_tls_progress_params_seg { diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index a84bdeeed2c6..72f0020fc448 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -11999,12 +11999,16 @@ enum { MLX5_GENERAL_OBJECT_TYPE_ENCRYPTION_KEY_TYPE_MACSEC = 0x4, }; -struct mlx5_ifc_tls_static_params_bits { +enum { + MLX5_TRANSPORT_STATIC_PARAMS_ACC_TYPE_TLS = 0x1, +}; + +struct mlx5_ifc_transport_static_params_bits { u8 const_2[0x2]; u8 tls_version[0x4]; u8 const_1[0x2]; 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The upcoming nvmeotcp offload uses ico sq for umr mapping as part of the offload. As a pre-step for nvmeotcp ico sqs which have their own napi and need to comply with budget, add the budget as parameter to the polling of cqs related to ico sqs. The polling already stops after a limit is reached, so just have the caller to provide this limit as the budget. No functional change here. Signed-off-by: Or Gerlitz Signed-off-by: Aurelien Aptel Reviewed-by: Tariq Toukan --- drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h | 2 +- drivers/net/ethernet/mellanox/mlx5/core/en_rx.c | 4 ++-- drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h b/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h index 853f312cd757..a7799cee9918 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h @@ -62,7 +62,7 @@ void mlx5e_trigger_irq(struct mlx5e_icosq *sq); void mlx5e_completion_event(struct mlx5_core_cq *mcq, struct mlx5_eqe *eqe); void mlx5e_cq_error_event(struct mlx5_core_cq *mcq, enum mlx5_event event); int mlx5e_napi_poll(struct napi_struct *napi, int budget); -int mlx5e_poll_ico_cq(struct mlx5e_cq *cq); +int mlx5e_poll_ico_cq(struct mlx5e_cq *cq, int budget); /* RX */ void mlx5e_page_dma_unmap(struct mlx5e_rq *rq, struct page *page); diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c index 3df455f6b168..51167f000383 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c @@ -916,7 +916,7 @@ static void mlx5e_handle_shampo_hd_umr(struct mlx5e_shampo_umr umr, shampo->ci = (shampo->ci + umr.len) & (shampo->hd_per_wq - 1); } -int mlx5e_poll_ico_cq(struct mlx5e_cq *cq) +int mlx5e_poll_ico_cq(struct mlx5e_cq *cq, int budget) { struct mlx5e_icosq *sq = container_of(cq, struct mlx5e_icosq, cq); struct mlx5_cqe64 *cqe; @@ -991,7 +991,7 @@ int mlx5e_poll_ico_cq(struct mlx5e_cq *cq) wi->wqe_type); } } while (!last_wqe); - } while ((++i < MLX5E_TX_CQ_POLL_BUDGET) && (cqe = mlx5_cqwq_get_cqe(&cq->wq))); + } while ((++i < budget) && (cqe = mlx5_cqwq_get_cqe(&cq->wq))); sq->cc = sqcc; diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c index 9a458a5d9853..9ddacb5e1bf4 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c @@ -176,8 +176,8 @@ int mlx5e_napi_poll(struct napi_struct *napi, int budget) busy |= work_done == budget; } - mlx5e_poll_ico_cq(&c->icosq.cq); - if (mlx5e_poll_ico_cq(&c->async_icosq.cq)) + mlx5e_poll_ico_cq(&c->icosq.cq, MLX5E_TX_CQ_POLL_BUDGET); + if (mlx5e_poll_ico_cq(&c->async_icosq.cq, MLX5E_TX_CQ_POLL_BUDGET)) /* Don't clear the flag if nothing was polled to prevent * queueing more WQEs and overflowing the async ICOSQ. */ From patchwork Tue Jan 17 15:35:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Aptel X-Patchwork-Id: 13104821 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CAA98C6379F for ; Tue, 17 Jan 2023 15:39:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231829AbjAQPjh (ORCPT ); Tue, 17 Jan 2023 10:39:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39406 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231637AbjAQPi2 (ORCPT ); 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No functional change here. Signed-off-by: Or Gerlitz Signed-off-by: Aurelien Aptel Reviewed-by: Tariq Toukan --- drivers/net/ethernet/mellanox/mlx5/core/en.h | 1 + drivers/net/ethernet/mellanox/mlx5/core/en/reporter_rx.c | 4 ++-- drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c | 2 +- drivers/net/ethernet/mellanox/mlx5/core/en_main.c | 5 ++--- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en.h b/drivers/net/ethernet/mellanox/mlx5/core/en.h index 82573ac722d1..17ccad42555c 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en.h @@ -592,6 +592,7 @@ struct mlx5e_icosq { /* control path */ struct mlx5_wq_ctrl wq_ctrl; struct mlx5e_channel *channel; + struct mlx5_core_dev *mdev; struct work_struct recover_work; } ____cacheline_aligned_in_smp; diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/reporter_rx.c b/drivers/net/ethernet/mellanox/mlx5/core/en/reporter_rx.c index 1ae15b8536a8..12bdc4c04e70 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en/reporter_rx.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en/reporter_rx.c @@ -33,7 +33,7 @@ static int mlx5e_query_rq_state(struct mlx5_core_dev *dev, u32 rqn, u8 *state) static int mlx5e_wait_for_icosq_flush(struct mlx5e_icosq *icosq) { - struct mlx5_core_dev *dev = icosq->channel->mdev; + struct mlx5_core_dev *dev = icosq->mdev; unsigned long exp_time; exp_time = jiffies + msecs_to_jiffies(mlx5_tout_ms(dev, FLUSH_ON_ERROR)); @@ -78,7 +78,7 @@ static int mlx5e_rx_reporter_err_icosq_cqe_recover(void *ctx) rq = &icosq->channel->rq; if (test_bit(MLX5E_RQ_STATE_ENABLED, &icosq->channel->xskrq.state)) xskrq = &icosq->channel->xskrq; - mdev = icosq->channel->mdev; + mdev = icosq->mdev; dev = icosq->channel->netdev; err = mlx5_core_query_sq_state(mdev, icosq->sqn, &state); if (err) { diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c index 8551ddd500b2..fe9e04068b0f 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c @@ -266,7 +266,7 @@ resync_post_get_progress_params(struct mlx5e_icosq *sq, goto err_out; } - pdev = mlx5_core_dma_dev(sq->channel->priv->mdev); + pdev = mlx5_core_dma_dev(sq->mdev); buf->dma_addr = dma_map_single(pdev, &buf->progress, PROGRESS_PARAMS_PADDED_SIZE, DMA_FROM_DEVICE); if (unlikely(dma_mapping_error(pdev, buf->dma_addr))) { diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c index 6bb0fdaa5efa..61a6b52d011f 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c @@ -1389,6 +1389,7 @@ static int mlx5e_alloc_icosq(struct mlx5e_channel *c, int err; sq->channel = c; + sq->mdev = mdev; sq->uar_map = mdev->mlx5e_res.hw_objs.bfreg.map; sq->reserved_room = param->stop_room; @@ -1786,11 +1787,9 @@ void mlx5e_deactivate_icosq(struct mlx5e_icosq *icosq) static void mlx5e_close_icosq(struct mlx5e_icosq *sq) { - struct mlx5e_channel *c = sq->channel; - if (sq->ktls_resync) mlx5e_ktls_rx_resync_destroy_resp_list(sq->ktls_resync); - mlx5e_destroy_sq(c->mdev, sq->sqn); + mlx5e_destroy_sq(sq->mdev, sq->sqn); mlx5e_free_icosq_descs(sq); mlx5e_free_icosq(sq); } From patchwork Tue Jan 17 15:35:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Aptel X-Patchwork-Id: 13104822 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E1927C6379F for ; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: LwNtb18p+ap7xk68/tZa77q9hpHEQZnkA6O7tYzvdJ8j670iZU+jRLto0CYD4yG3uDL+rnD04a74HD7UhDpW4TepMR5LiRgWTFKZeF0yOAlvJ7ToSTp9LZ59WLegptYegLn3cjhljXr5NGdnXYv/Q7INKbPFcP/AgDEzk8xnwKbP+Wwp6dXSFgKTSkXLtwiXm90tlZ3LomPWLNlKrdW5Faq7Ufj/U2Aa/i8AGojV/0yJLYb4fRIWbh3po+8TKDn3BcEvLsNpy5NIjNsf6r3Ki0Lxh2Mfdr1CbmlfDRrsmuOBT0zZ5ODQ4D6zfslA4NBj8tAsxJbarQ3NFwFMn93CZ+F9USJuj3Sfyfess+JdPsW5F5IlMPG8Q5n3Learmzy2IMi9YE42F4CI8TZJfdg9tSYExN4YFytwewTjqcvzhMHJDbctqVXq4uH6Tnv65hbJcexMeGrw86+Mq90xB4tDBgVbudKwXF7gBKzVzZmYOUY0HtWVStxh4ufKz46nO+QYUwUGZzrGc5sQlS/Zx70xhnbDblFJLXmQsrPaFHPzpl5y4YIx8v/D4BX9n36iUsAJKRcfM6zzAkc9+cr3RDT0v61N+V47YjtJkhXsXQLAzsS/uDpe6ZCY3/+7EXVg8dbRwA8vOfUjG/0ivH/lVPRTX7mOV2CEOj94SoZHAiurSfs9XCSVB4yksEqvY4dHVmEtY72pBmrHTiH3BwP6bEBfL8IFcZ+R7+TzRUFfvvnzsITAzIsaF3sEUHEpDKc2VYXBa5vSSntiVZDMIOm2aFRDrrjlcYPJ0kLMCPnyTysS3TU2JoQyLlj8EnLw/yU8NxXW/5VgMZBaK895TklEGSNcdkd9vDDGQp3m2IwCJKsY6BlBsltg+hvA2uDOMJe9/P5z3WUeIqnfYi4eqekPSYE+3fi5kJ6YxV6VBgpDUrUx3vhmrnVmz0pl6nAUVffC8CJd5iOS61lT0mN81SDKM6kvaDSwhXzthSanOAhjVbriEpddCGFOgEImVeeJNNNC6kU4DhXNYIjZ0CX4kLk2vTaMaXFJnxUAAXe9zglRuxs2FSL5Ap6g02FyewOR5dXfOagDYopLvOHz4mH3wiL5Amk64h/8ZmEVufXn8QLGOwd/D7a1zeX5XWj6yyV3ZwwVEdZCp2/KEooCZRM1oTv9zh3q1pqC1TofqoKSog9TXpOkaPfzrcBh56F+CoyICiSb9N4nGyYxgohps07Ie6OeSjXpFPLTzWky4TyBZebm4bry5OAS0TMg2pB5TYr6rSxKLyfK7iTrWwUlhbiLuEKJaBu3o5ch8dmHaqzq5RWpR05RQK0+mXcWtCeO8cqrTU2LmTD+on1yttaDpTLbmMtVYiKow1+kcWRXhZFRc8WX197MOjNWA/+q/o8ZPjSJv3Ff1LIsn79IlmLDE9UeXWIDMtYLWfhJtW40wYMRqiuZwLCvbM3RPzSpsKT+Tt/SxYojpnfaB4/Gh477TFicmcadTXumaT5FrFj/M/EEF3rJynApYYks4AgQeM6c3LLrHOenQgJT7X+kGydZx1ipwxHNvdzq12TtOLFImLFkAWZCgVH+sdpluPEDXFSjXS0Kb1Da/7vF X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: f6428fe5-8b00-4b8a-b089-08daf8a0c4cc X-MS-Exchange-CrossTenant-AuthSource: SJ1PR12MB6075.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jan 2023 15:37:40.8113 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: ax+DZpWGdmgZk6O/Af2i7AeXzg2dkmHeG3CG+mZmsP30Q+Y8nX1uUjSQYGdf7YUhbCdm/1R+7uWewBgEBdLvIg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB5930 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org From: Or Gerlitz Currently the doorbell function always asks for completion to be generated. Refactor things such that all existing call sites are untouched and no branching is added. This is done using inner function which can be invoked directly in cases completion is not desired (as done in downstream patch). No functional change here. Signed-off-by: Or Gerlitz Signed-off-by: Aurelien Aptel --- drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h b/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h index a7799cee9918..a690a90a4c9c 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h @@ -238,10 +238,10 @@ static inline u16 mlx5e_icosq_get_next_pi(struct mlx5e_icosq *sq, u16 size) } static inline void -mlx5e_notify_hw(struct mlx5_wq_cyc *wq, u16 pc, void __iomem *uar_map, - struct mlx5_wqe_ctrl_seg *ctrl) +__mlx5e_notify_hw(struct mlx5_wq_cyc *wq, u16 pc, void __iomem *uar_map, + struct mlx5_wqe_ctrl_seg *ctrl, u8 cq_update) { - ctrl->fm_ce_se |= MLX5_WQE_CTRL_CQ_UPDATE; + ctrl->fm_ce_se |= cq_update; /* ensure wqe is visible to device before updating doorbell record */ dma_wmb(); @@ -255,6 +255,13 @@ mlx5e_notify_hw(struct mlx5_wq_cyc *wq, u16 pc, void __iomem *uar_map, mlx5_write64((__be32 *)ctrl, uar_map); } +static inline void +mlx5e_notify_hw(struct mlx5_wq_cyc *wq, u16 pc, void __iomem *uar_map, + struct mlx5_wqe_ctrl_seg *ctrl) +{ + __mlx5e_notify_hw(wq, pc, uar_map, ctrl, MLX5_WQE_CTRL_CQ_UPDATE); +} + static inline void mlx5e_cq_arm(struct mlx5e_cq *cq) { struct mlx5_core_cq *mcq; From patchwork Tue Jan 17 15:35:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Aptel X-Patchwork-Id: 13104823 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08BB0C3DA78 for ; Tue, 17 Jan 2023 15:40:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233471AbjAQPkd (ORCPT ); Tue, 17 Jan 2023 10:40:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39448 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234238AbjAQPij (ORCPT ); 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Received: from SJ1PR12MB6075.namprd12.prod.outlook.com (2603:10b6:a03:45e::8) by PH7PR12MB8177.namprd12.prod.outlook.com (2603:10b6:510:2b4::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6002.13; Tue, 17 Jan 2023 15:37:47 +0000 Received: from SJ1PR12MB6075.namprd12.prod.outlook.com ([fe80::6d66:a4bb:4018:3c70]) by SJ1PR12MB6075.namprd12.prod.outlook.com ([fe80::6d66:a4bb:4018:3c70%8]) with mapi id 15.20.6002.013; Tue, 17 Jan 2023 15:37:46 +0000 From: Aurelien Aptel To: linux-nvme@lists.infradead.org, netdev@vger.kernel.org, sagi@grimberg.me, hch@lst.de, kbusch@kernel.org, axboe@fb.com, chaitanyak@nvidia.com, davem@davemloft.net, kuba@kernel.org Cc: Ben Ben-Ishay , Aurelien Aptel , aurelien.aptel@gmail.com, smalin@nvidia.com, malin1024@gmail.com, ogerlitz@nvidia.com, yorayz@nvidia.com, borisp@nvidia.com Subject: [PATCH v9 17/25] net/mlx5: Add NVMEoTCP caps, HW bits, 128B CQE and enumerations Date: Tue, 17 Jan 2023 17:35:27 +0200 Message-Id: <20230117153535.1945554-18-aaptel@nvidia.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20230117153535.1945554-1-aaptel@nvidia.com> References: <20230117153535.1945554-1-aaptel@nvidia.com> X-ClientProxiedBy: LO4P265CA0168.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:312::11) To SJ1PR12MB6075.namprd12.prod.outlook.com (2603:10b6:a03:45e::8) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PR12MB6075:EE_|PH7PR12MB8177:EE_ X-MS-Office365-Filtering-Correlation-Id: 601f06d5-7a84-4626-5a20-08daf8a0c846 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 3Wv665g4XvPyJolndAC0GJnQPs5Q1K99NG+gkrvfExQB43Lf+jQlqGrA3k6F20GcOhhh8CplVCkccERDGUiMPlRWeicZ1hbIIrHE2sIJqoWR8x5AC3jNILXqsuIh2tdv+Mnzh7xsKKly1U+P+dqAvq7UP8TwtUxh9BDinTcQ7f9L3CA6lt5z9lOMtTjlhoRlKproFWOqluuMJBOBByaLaTbjVMRQvnkAqt6wSt4Gwmb9wO23EQ3DnPTLFWIkBRjEkf9S6u0QaVOgs9QRg55kyzoeAqwam2LinO7d/N2qrGrRqfO1lNev/eQEYUswfrWcoxr7pv7BEjDnX9lF1AYkm0TqdfMmwv1Me1jJf3cVVMbtpn+Bw8tiJxnhf1rUmztEsZlbD92JXVRi0Gr2reS8sQKMEZrnjGzgI1vcvVbJFKQfjn0sZ7cWgs89OxDY4Q5ROTUrxkwZF9S/NB0J+SYROa3BSWIaa2irKsRAveM5SDikVBdmRdm/E8uZNTHTCuzPqzerSZ2iwea6pfiPYUFr/MLoV9NIXc2uiJ8xpF7BLrg5pr9zkW8wZ5SHpy8Aw+SORraGtig+fuEINIpdw39Hx1HL1wpUx3nIC8uodimogrzTY9894NjG2oYzgsa3WOSsX+T2aOT1CdwiKeYOzBcvatAqmIJPPm+Zq28RN1ju3hNVaXWvOrxvzFO7RN6nGhQ86MCOysyJsJw/88ScU9vwqlUwMOpQ4mQlDexvQG/MpeFkJRbPYx0Q84dgokBaJSSizKmexGPA1Y9yprOEE4U/G9JlE2uK74BSvD3xiwcMg4CS6O6I3dvW6mvYFjnCS9KfcsXzbDZ4+Qk4U9L5gYqULALrQ5HZ8PwS8ynkDs4CbQJMBYe2vurza1dOxSHQxKvLWjXwxB7j+aqh4LAzGJdYLob7FfQuoR39oh89uVR9xCnqkIZwj7lQaNNxsSvnkZAZzQWKOMHUp1xJAuuwdz4SzxsYsHf83XnOj9ooWhyZ1C8oFsF+A8qMZzSYO7WcCyl/gjjgf19WoZJ21y8IHmIP/y6/62lfPXPnRnAEUvnJOh2LIN/aDj6H/KXVABqrVJI9J+RFd0ykaBcYK0GiIZFEmXBtCUMlV68AM+x8Fpt0NB1J4IP7wsg5Zj/ldhaUwwUhiYu/SXS0igo5PdMw/kdRhK2SAwBw/4cna+mkYGOxJBQn+6BLGteqUOkrPjEbEaADYJ0i3MDzgGNMpELJLc0fIoKQtTHDPEcKWrIp4qKsNj+5wi3EKsbij1xjEQ0DxbdBQDFUivKrAVidrORQCv9b02LIxfUKYIwyq0+ivYgeoksRoZOQ8Zx4h3a2rUp1mlhUwT+g733/lzbmYxDNEIjMU3eh8/uGjSWbVcgv5+YtGlSZHkGkBaKFgw8H9xGJ1kabcI0bcUmMj6pW1jLhhV+GbnjDrWaxN2yU7XvGVfjbAMe32jp6MVxiBeUxecoPMjUaGsakALCQJQ+v3VmHnMD/VqQCcmIT09SOkCg2ekRkI42FPX68iGjPQdj4Zrv4hu32eBlUMPhPTZ+s08EooBnfG4ivTZxCDTFjkXSobBtGtHO9RF3NbeX6tGPwoHSJ4yMh X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 601f06d5-7a84-4626-5a20-08daf8a0c846 X-MS-Exchange-CrossTenant-AuthSource: SJ1PR12MB6075.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jan 2023 15:37:46.7199 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: tO6GTf2f770U1kyTN59xzroULyfkTD3cpiDI38YHfaj8KFjjf3jtYNyeuEQfHvQfgvis/HFnad7DfwAaeDhN4A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB8177 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org From: Ben Ben-Ishay Add the necessary infrastructure for NVMEoTCP offload: - Create mlx5_cqe128 structure for NVMEoTCP offload. The new structure consist from the regular mlx5_cqe64 + NVMEoTCP data information for offloaded packets. - Add nvmetcp field to mlx5_cqe64, this field define the type of the data that the additional NVMEoTCP part represents. - Add nvmeotcp_zero_copy_en + nvmeotcp_crc_en bit to the TIR, for identify NVMEoTCP offload flow and tag_buffer_id that will be used by the connected nvmeotcp_queues. - Add new capability to HCA_CAP that represents the NVMEoTCP offload ability. Signed-off-by: Ben Ben-Ishay Signed-off-by: Or Gerlitz Signed-off-by: Aurelien Aptel Reviewed-by: Tariq Toukan --- drivers/net/ethernet/mellanox/mlx5/core/fw.c | 6 ++ include/linux/mlx5/device.h | 51 +++++++++++++- include/linux/mlx5/mlx5_ifc.h | 74 ++++++++++++++++++-- include/linux/mlx5/qp.h | 1 + 4 files changed, 127 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fw.c b/drivers/net/ethernet/mellanox/mlx5/core/fw.c index f34e758a2f1f..bfe540a4d588 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/fw.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/fw.c @@ -286,6 +286,12 @@ int mlx5_query_hca_caps(struct mlx5_core_dev *dev) return err; } + if (MLX5_CAP_GEN(dev, nvmeotcp)) { + err = mlx5_core_get_caps(dev, MLX5_CAP_DEV_NVMEOTCP); + if (err) + return err; + } + return 0; } diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h index b50b15dbf3c1..8b13b0326fc1 100644 --- a/include/linux/mlx5/device.h +++ b/include/linux/mlx5/device.h @@ -263,6 +263,7 @@ enum { enum { MLX5_MKEY_MASK_LEN = 1ull << 0, MLX5_MKEY_MASK_PAGE_SIZE = 1ull << 1, + MLX5_MKEY_MASK_XLT_OCT_SIZE = 1ull << 2, MLX5_MKEY_MASK_START_ADDR = 1ull << 6, MLX5_MKEY_MASK_PD = 1ull << 7, MLX5_MKEY_MASK_EN_RINVAL = 1ull << 8, @@ -787,7 +788,11 @@ struct mlx5_err_cqe { struct mlx5_cqe64 { u8 tls_outer_l3_tunneled; - u8 rsvd0; + u8 rsvd16bit:4; + u8 nvmeotcp_zc:1; + u8 nvmeotcp_ddgst:1; + u8 nvmeotcp_resync:1; + u8 rsvd23bit:1; __be16 wqe_id; union { struct { @@ -836,6 +841,19 @@ struct mlx5_cqe64 { u8 op_own; }; +struct mlx5e_cqe128 { + __be16 cclen; + __be16 hlen; + union { + __be32 resync_tcp_sn; + __be32 ccoff; + }; + __be16 ccid; + __be16 rsvd8; + u8 rsvd12[52]; + struct mlx5_cqe64 cqe64; +}; + struct mlx5_mini_cqe8 { union { __be32 rx_hash_result; @@ -871,6 +889,28 @@ enum { #define MLX5_MINI_CQE_ARRAY_SIZE 8 +static inline bool cqe_is_nvmeotcp_resync(struct mlx5_cqe64 *cqe) +{ + return cqe->nvmeotcp_resync; +} + +static inline bool cqe_is_nvmeotcp_crcvalid(struct mlx5_cqe64 *cqe) +{ + return cqe->nvmeotcp_ddgst; +} + +static inline bool cqe_is_nvmeotcp_zc(struct mlx5_cqe64 *cqe) +{ + return cqe->nvmeotcp_zc; +} + +/* check if cqe is zc or crc or resync */ +static inline bool cqe_is_nvmeotcp(struct mlx5_cqe64 *cqe) +{ + return cqe_is_nvmeotcp_zc(cqe) || cqe_is_nvmeotcp_crcvalid(cqe) || + cqe_is_nvmeotcp_resync(cqe); +} + static inline u8 mlx5_get_cqe_format(struct mlx5_cqe64 *cqe) { return (cqe->op_own >> 2) & 0x3; @@ -1204,6 +1244,7 @@ enum mlx5_cap_type { MLX5_CAP_VDPA_EMULATION = 0x13, MLX5_CAP_DEV_EVENT = 0x14, MLX5_CAP_IPSEC, + MLX5_CAP_DEV_NVMEOTCP = 0x19, MLX5_CAP_DEV_SHAMPO = 0x1d, MLX5_CAP_MACSEC = 0x1f, MLX5_CAP_GENERAL_2 = 0x20, @@ -1466,6 +1507,14 @@ enum mlx5_qcam_feature_groups { #define MLX5_CAP_MACSEC(mdev, cap)\ MLX5_GET(macsec_cap, (mdev)->caps.hca[MLX5_CAP_MACSEC]->cur, cap) +#define MLX5_CAP_DEV_NVMEOTCP(mdev, cap)\ + MLX5_GET(nvmeotcp_cap, \ + (mdev)->caps.hca[MLX5_CAP_DEV_NVMEOTCP]->cur, cap) + +#define MLX5_CAP64_DEV_NVMEOTCP(mdev, cap)\ + MLX5_GET64(nvmeotcp_cap, \ + (mdev)->caps.hca[MLX5_CAP_DEV_NVMEOTCP]->cur, cap) + enum { MLX5_CMD_STAT_OK = 0x0, MLX5_CMD_STAT_INT_ERR = 0x1, diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index 72f0020fc448..403496e1485d 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -1449,7 +1449,9 @@ struct mlx5_ifc_cmd_hca_cap_bits { u8 event_cap[0x1]; u8 reserved_at_91[0x2]; u8 isolate_vl_tc_new[0x1]; - u8 reserved_at_94[0x4]; + u8 reserved_at_94[0x2]; + u8 nvmeotcp[0x1]; + u8 reserved_at_97[0x1]; u8 prio_tag_required[0x1]; u8 reserved_at_99[0x2]; u8 log_max_qp[0x5]; @@ -3347,7 +3349,20 @@ struct mlx5_ifc_shampo_cap_bits { u8 reserved_at_20[0x3]; u8 shampo_max_log_headers_entry_size[0x5]; u8 reserved_at_28[0x18]; + u8 reserved_at_40[0x7c0]; +}; + +struct mlx5_ifc_nvmeotcp_cap_bits { + u8 zerocopy[0x1]; + u8 crc_rx[0x1]; + u8 crc_tx[0x1]; + u8 reserved_at_3[0x15]; + u8 version[0x8]; + u8 reserved_at_20[0x13]; + u8 log_max_nvmeotcp_tag_buffer_table[0x5]; + u8 reserved_at_38[0x3]; + u8 log_max_nvmeotcp_tag_buffer_size[0x5]; u8 reserved_at_40[0x7c0]; }; @@ -3371,6 +3386,7 @@ union mlx5_ifc_hca_cap_union_bits { struct mlx5_ifc_virtio_emulation_cap_bits virtio_emulation_cap; struct mlx5_ifc_shampo_cap_bits shampo_cap; struct mlx5_ifc_macsec_cap_bits macsec_cap; + struct mlx5_ifc_nvmeotcp_cap_bits nvmeotcp_cap; u8 reserved_at_0[0x8000]; }; @@ -3617,7 +3633,9 @@ struct mlx5_ifc_tirc_bits { u8 disp_type[0x4]; u8 tls_en[0x1]; - u8 reserved_at_25[0x1b]; + u8 nvmeotcp_zero_copy_en[0x1]; + u8 nvmeotcp_crc_en[0x1]; + u8 reserved_at_27[0x19]; u8 reserved_at_40[0x40]; @@ -3648,7 +3666,8 @@ struct mlx5_ifc_tirc_bits { struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner; - u8 reserved_at_2c0[0x4c0]; + u8 nvmeotcp_tag_buffer_table_id[0x20]; + u8 reserved_at_2e0[0x4a0]; }; enum { @@ -11691,6 +11710,7 @@ enum { MLX5_HCA_CAP_GENERAL_OBJECT_TYPES_ENCRYPTION_KEY = BIT_ULL(0xc), MLX5_HCA_CAP_GENERAL_OBJECT_TYPES_IPSEC = BIT_ULL(0x13), MLX5_HCA_CAP_GENERAL_OBJECT_TYPES_SAMPLER = BIT_ULL(0x20), + MLX5_HCA_CAP_GENERAL_OBJECT_TYPES_NVMEOTCP_TAG_BUFFER_TABLE = BIT_ULL(0x21), MLX5_HCA_CAP_GENERAL_OBJECT_TYPES_FLOW_METER_ASO = BIT_ULL(0x24), }; @@ -11698,6 +11718,7 @@ enum { MLX5_GENERAL_OBJECT_TYPES_ENCRYPTION_KEY = 0xc, MLX5_GENERAL_OBJECT_TYPES_IPSEC = 0x13, MLX5_GENERAL_OBJECT_TYPES_SAMPLER = 0x20, + MLX5_GENERAL_OBJECT_TYPES_NVMEOTCP_TAG_BUFFER_TABLE = 0x21, MLX5_GENERAL_OBJECT_TYPES_FLOW_METER_ASO = 0x24, MLX5_GENERAL_OBJECT_TYPES_MACSEC = 0x27, }; @@ -11988,6 +12009,20 @@ struct mlx5_ifc_query_sampler_obj_out_bits { struct mlx5_ifc_sampler_obj_bits sampler_object; }; +struct mlx5_ifc_nvmeotcp_tag_buf_table_obj_bits { + u8 modify_field_select[0x40]; + + u8 reserved_at_40[0x20]; + + u8 reserved_at_60[0x1b]; + u8 log_tag_buffer_table_size[0x5]; +}; + +struct mlx5_ifc_create_nvmeotcp_tag_buf_table_in_bits { + struct mlx5_ifc_general_obj_in_cmd_hdr_bits general_obj_in_cmd_hdr; + struct mlx5_ifc_nvmeotcp_tag_buf_table_obj_bits nvmeotcp_tag_buf_table_obj; +}; + enum { MLX5_GENERAL_OBJECT_TYPE_ENCRYPTION_KEY_KEY_SIZE_128 = 0x0, MLX5_GENERAL_OBJECT_TYPE_ENCRYPTION_KEY_KEY_SIZE_256 = 0x1, @@ -12001,6 +12036,13 @@ enum { enum { MLX5_TRANSPORT_STATIC_PARAMS_ACC_TYPE_TLS = 0x1, + MLX5_TRANSPORT_STATIC_PARAMS_ACC_TYPE_NVMETCP = 0x2, + MLX5_TRANSPORT_STATIC_PARAMS_ACC_TYPE_NVMETCP_WITH_TLS = 0x3, +}; + +enum { + MLX5_TRANSPORT_STATIC_PARAMS_TI_INITIATOR = 0x0, + MLX5_TRANSPORT_STATIC_PARAMS_TI_TARGET = 0x1, }; struct mlx5_ifc_transport_static_params_bits { @@ -12023,7 +12065,20 @@ struct mlx5_ifc_transport_static_params_bits { u8 reserved_at_100[0x8]; u8 dek_index[0x18]; - u8 reserved_at_120[0xe0]; + u8 reserved_at_120[0x14]; + + u8 cccid_ttag[0x1]; + u8 ti[0x1]; + u8 zero_copy_en[0x1]; + u8 ddgst_offload_en[0x1]; + u8 hdgst_offload_en[0x1]; + u8 ddgst_en[0x1]; + u8 hddgst_en[0x1]; + u8 pda[0x5]; + + u8 nvme_resync_tcp_sn[0x20]; + + u8 reserved_at_160[0xa0]; }; struct mlx5_ifc_tls_progress_params_bits { @@ -12262,4 +12317,15 @@ struct mlx5_ifc_modify_page_track_obj_in_bits { struct mlx5_ifc_page_track_bits obj_context; }; +struct mlx5_ifc_nvmeotcp_progress_params_bits { + u8 next_pdu_tcp_sn[0x20]; + + u8 hw_resync_tcp_sn[0x20]; + + u8 pdu_tracker_state[0x2]; + u8 offloading_state[0x2]; + u8 reserved_at_44[0xc]; + u8 cccid_ttag[0x10]; +}; + #endif /* MLX5_IFC_H */ diff --git a/include/linux/mlx5/qp.h b/include/linux/mlx5/qp.h index 4657d5c54abe..bda53b241d71 100644 --- a/include/linux/mlx5/qp.h +++ b/include/linux/mlx5/qp.h @@ -227,6 +227,7 @@ struct mlx5_wqe_ctrl_seg { #define MLX5_WQE_CTRL_OPCODE_MASK 0xff #define MLX5_WQE_CTRL_WQE_INDEX_MASK 0x00ffff00 #define MLX5_WQE_CTRL_WQE_INDEX_SHIFT 8 +#define MLX5_WQE_CTRL_TIR_TIS_INDEX_SHIFT 8 enum { MLX5_ETH_WQE_L3_INNER_CSUM = 1 << 4, From patchwork Tue Jan 17 15:35:28 2023 Content-Type: text/plain; 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Tue, 17 Jan 2023 15:37:53 +0000 Received: from SJ1PR12MB6075.namprd12.prod.outlook.com ([fe80::6d66:a4bb:4018:3c70]) by SJ1PR12MB6075.namprd12.prod.outlook.com ([fe80::6d66:a4bb:4018:3c70%8]) with mapi id 15.20.6002.013; Tue, 17 Jan 2023 15:37:53 +0000 From: Aurelien Aptel To: linux-nvme@lists.infradead.org, netdev@vger.kernel.org, sagi@grimberg.me, hch@lst.de, kbusch@kernel.org, axboe@fb.com, chaitanyak@nvidia.com, davem@davemloft.net, kuba@kernel.org Cc: Ben Ben-Ishay , Aurelien Aptel , aurelien.aptel@gmail.com, smalin@nvidia.com, malin1024@gmail.com, ogerlitz@nvidia.com, yorayz@nvidia.com, borisp@nvidia.com Subject: [PATCH v9 18/25] net/mlx5e: NVMEoTCP, offload initialization Date: Tue, 17 Jan 2023 17:35:28 +0200 Message-Id: <20230117153535.1945554-19-aaptel@nvidia.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20230117153535.1945554-1-aaptel@nvidia.com> References: <20230117153535.1945554-1-aaptel@nvidia.com> X-ClientProxiedBy: LO2P265CA0445.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:e::25) To SJ1PR12MB6075.namprd12.prod.outlook.com (2603:10b6:a03:45e::8) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PR12MB6075:EE_|BL0PR12MB4914:EE_ X-MS-Office365-Filtering-Correlation-Id: 0a465c72-576e-4ee2-a5c1-08daf8a0cbf6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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The mlx5 nvmeotcp structures are: - queue (mlx5e_nvmeotcp_queue) - pairs 1:1 with nvmeotcp driver queues and deals with the offloading parts. The mlx5e queue is accessed in the ddp ops: initialized on sk_add, used in ddp setup,teardown,resync and in the fast path when dealing with packets, destroyed in the sk_del op. - queue entry (nvmeotcp_queue_entry) - pairs 1:1 with offloaded IO from that queue. Keeps pointers to the SG elements describing the buffers used for the IO and the ddp context of it. - queue handler (mlx5e_nvmeotcp_queue_handler) - we use icosq per NVME-TCP queue for UMR mapping as part of the ddp offload. Those dedicated SQs are unique in the sense that they are driven directly by the NVME-TCP layer to submit and invalidate ddp requests. Since the life-cycle of these icosqs is not tied to the channels, we create dedicated napi contexts for polling them such that channels can be re-created during offloading. The queue handler has pointer to the cq associated with the queue's sq and napi context. - main offload context (mlx5e_nvmeotcp) - has ida and hash table instances. Each offloaded queue gets an ID from the ida instance and the pairs are kept in the hash table. The id is programmed as flow tag to be set by HW on the completion (cqe) of all packets related to this queue (by 5-tuple steering). The fast path which deals with packets uses the flow tag to access the hash table and retrieve the queue for the processing. We query nvmeotcp capabilities to see if the offload can be supported and use 128B CQEs when this happens. By default, the offload is off but can be enabled with `ethtool --ulp-ddp nvme-tcp-ddp on`. Signed-off-by: Ben Ben-Ishay Signed-off-by: Boris Pismenny Signed-off-by: Or Gerlitz Signed-off-by: Yoray Zack Signed-off-by: Shai Malin Signed-off-by: Aurelien Aptel Reviewed-by: Tariq Toukan --- .../net/ethernet/mellanox/mlx5/core/Kconfig | 11 ++ .../net/ethernet/mellanox/mlx5/core/Makefile | 2 + drivers/net/ethernet/mellanox/mlx5/core/en.h | 4 + .../net/ethernet/mellanox/mlx5/core/en/fs.h | 4 +- .../ethernet/mellanox/mlx5/core/en/params.c | 12 +- .../ethernet/mellanox/mlx5/core/en/params.h | 3 + .../mellanox/mlx5/core/en_accel/en_accel.h | 3 + .../mellanox/mlx5/core/en_accel/fs_tcp.h | 2 +- .../mellanox/mlx5/core/en_accel/nvmeotcp.c | 168 ++++++++++++++++++ .../mellanox/mlx5/core/en_accel/nvmeotcp.h | 121 +++++++++++++ .../ethernet/mellanox/mlx5/core/en_ethtool.c | 59 +++++- .../net/ethernet/mellanox/mlx5/core/en_fs.c | 4 +- .../net/ethernet/mellanox/mlx5/core/en_main.c | 18 ++ .../net/ethernet/mellanox/mlx5/core/main.c | 1 + 14 files changed, 402 insertions(+), 10 deletions(-) create mode 100644 drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c create mode 100644 drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.h diff --git a/drivers/net/ethernet/mellanox/mlx5/core/Kconfig b/drivers/net/ethernet/mellanox/mlx5/core/Kconfig index 26685fd0fdaa..0c790952fdf7 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/Kconfig +++ b/drivers/net/ethernet/mellanox/mlx5/core/Kconfig @@ -163,6 +163,17 @@ config MLX5_EN_TLS help Build support for TLS cryptography-offload acceleration in the NIC. +config MLX5_EN_NVMEOTCP + bool "NVMEoTCP acceleration" + depends on ULP_DDP + depends on MLX5_CORE_EN + default y + help + Build support for NVMEoTCP acceleration in the NIC. + This includes Direct Data Placement and CRC offload. + Note: Support for hardware with this capability needs to be selected + for this option to become available. + config MLX5_SW_STEERING bool "Mellanox Technologies software-managed steering" depends on MLX5_CORE_EN && MLX5_ESWITCH diff --git a/drivers/net/ethernet/mellanox/mlx5/core/Makefile b/drivers/net/ethernet/mellanox/mlx5/core/Makefile index cd4a1ab0ea78..9df9999047d1 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/Makefile +++ b/drivers/net/ethernet/mellanox/mlx5/core/Makefile @@ -103,6 +103,8 @@ mlx5_core-$(CONFIG_MLX5_EN_TLS) += en_accel/ktls_stats.o \ en_accel/fs_tcp.o en_accel/ktls.o en_accel/ktls_txrx.o \ en_accel/ktls_tx.o en_accel/ktls_rx.o +mlx5_core-$(CONFIG_MLX5_EN_NVMEOTCP) += en_accel/fs_tcp.o en_accel/nvmeotcp.o + mlx5_core-$(CONFIG_MLX5_SW_STEERING) += steering/dr_domain.o steering/dr_table.o \ steering/dr_matcher.o steering/dr_rule.o \ steering/dr_icm_pool.o steering/dr_buddy.o \ diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en.h b/drivers/net/ethernet/mellanox/mlx5/core/en.h index 17ccad42555c..136eb608ecaf 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en.h @@ -328,6 +328,7 @@ struct mlx5e_params { unsigned int sw_mtu; int hard_mtu; bool ptp_rx; + bool nvmeotcp; }; static inline u8 mlx5e_get_dcb_num_tc(struct mlx5e_params *params) @@ -959,6 +960,9 @@ struct mlx5e_priv { #endif #ifdef CONFIG_MLX5_EN_TLS struct mlx5e_tls *tls; +#endif +#ifdef CONFIG_MLX5_EN_NVMEOTCP + struct mlx5e_nvmeotcp *nvmeotcp; #endif struct devlink_health_reporter *tx_reporter; struct devlink_health_reporter *rx_reporter; diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/fs.h b/drivers/net/ethernet/mellanox/mlx5/core/en/fs.h index 5233d4daca41..c3598c2e05d7 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en/fs.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en/fs.h @@ -77,7 +77,7 @@ enum { MLX5E_INNER_TTC_FT_LEVEL, MLX5E_FS_TT_UDP_FT_LEVEL = MLX5E_INNER_TTC_FT_LEVEL + 1, MLX5E_FS_TT_ANY_FT_LEVEL = MLX5E_INNER_TTC_FT_LEVEL + 1, -#ifdef CONFIG_MLX5_EN_TLS +#if defined(CONFIG_MLX5_EN_TLS) || defined(CONFIG_MLX5_EN_NVMEOTCP) MLX5E_ACCEL_FS_TCP_FT_LEVEL = MLX5E_INNER_TTC_FT_LEVEL + 1, #endif #ifdef CONFIG_MLX5_EN_ARFS @@ -169,7 +169,7 @@ struct mlx5e_fs_any *mlx5e_fs_get_any(struct mlx5e_flow_steering *fs); void mlx5e_fs_set_any(struct mlx5e_flow_steering *fs, struct mlx5e_fs_any *any); struct mlx5e_fs_udp *mlx5e_fs_get_udp(struct mlx5e_flow_steering *fs); void mlx5e_fs_set_udp(struct mlx5e_flow_steering *fs, struct mlx5e_fs_udp *udp); -#ifdef CONFIG_MLX5_EN_TLS +#if defined(CONFIG_MLX5_EN_TLS) || defined(CONFIG_MLX5_EN_NVMEOTCP) struct mlx5e_accel_fs_tcp *mlx5e_fs_get_accel_tcp(struct mlx5e_flow_steering *fs); void mlx5e_fs_set_accel_tcp(struct mlx5e_flow_steering *fs, struct mlx5e_accel_fs_tcp *accel_tcp); #endif diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/params.c b/drivers/net/ethernet/mellanox/mlx5/core/en/params.c index 585bdc8383ee..36f53251a32b 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en/params.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en/params.c @@ -797,7 +797,8 @@ static void mlx5e_build_common_cq_param(struct mlx5_core_dev *mdev, void *cqc = param->cqc; MLX5_SET(cqc, cqc, uar_page, mdev->priv.uar->index); - if (MLX5_CAP_GEN(mdev, cqe_128_always) && cache_line_size() >= 128) + if (MLX5_CAP_GEN(mdev, cqe_128_always) && + (cache_line_size() >= 128 || param->force_cqe128)) MLX5_SET(cqc, cqc, cqe_sz, CQE_STRIDE_128_PAD); } @@ -827,6 +828,9 @@ static void mlx5e_build_rx_cq_param(struct mlx5_core_dev *mdev, void *cqc = param->cqc; u8 log_cq_size; + /* nvme-tcp offload mandates 128 byte cqes */ + param->force_cqe128 |= IS_ENABLED(CONFIG_MLX5_EN_NVMEOTCP) && params->nvmeotcp; + switch (params->rq_wq_type) { case MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ: hw_stridx = MLX5_CAP_GEN(mdev, mini_cqe_resp_stride_index); @@ -1166,9 +1170,9 @@ static u8 mlx5e_build_async_icosq_log_wq_sz(struct mlx5_core_dev *mdev) return MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE; } -static void mlx5e_build_icosq_param(struct mlx5_core_dev *mdev, - u8 log_wq_size, - struct mlx5e_sq_param *param) +void mlx5e_build_icosq_param(struct mlx5_core_dev *mdev, + u8 log_wq_size, + struct mlx5e_sq_param *param) { void *sqc = param->sqc; void *wq = MLX5_ADDR_OF(sqc, sqc, wq); diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/params.h b/drivers/net/ethernet/mellanox/mlx5/core/en/params.h index c9be6eb88012..d5b3455c4875 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en/params.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en/params.h @@ -17,6 +17,7 @@ struct mlx5e_cq_param { struct mlx5_wq_param wq; u16 eq_ix; u8 cq_period_mode; + bool force_cqe128; }; struct mlx5e_rq_param { @@ -146,6 +147,8 @@ void mlx5e_build_xdpsq_param(struct mlx5_core_dev *mdev, struct mlx5e_params *params, struct mlx5e_xsk_param *xsk, struct mlx5e_sq_param *param); +void mlx5e_build_icosq_param(struct mlx5_core_dev *mdev, + u8 log_wq_size, struct mlx5e_sq_param *param); int mlx5e_build_channel_param(struct mlx5_core_dev *mdev, struct mlx5e_params *params, u16 q_counter, diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h index 07187028f0d3..e38656229399 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h @@ -40,6 +40,7 @@ #include "en_accel/ktls.h" #include "en_accel/ktls_txrx.h" #include +#include "en_accel/nvmeotcp.h" #include "en.h" #include "en/txrx.h" @@ -202,11 +203,13 @@ static inline void mlx5e_accel_tx_finish(struct mlx5e_txqsq *sq, static inline int mlx5e_accel_init_rx(struct mlx5e_priv *priv) { + mlx5e_nvmeotcp_init_rx(priv); return mlx5e_ktls_init_rx(priv); } static inline void mlx5e_accel_cleanup_rx(struct mlx5e_priv *priv) { + mlx5e_nvmeotcp_cleanup_rx(priv); mlx5e_ktls_cleanup_rx(priv); } diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/fs_tcp.h b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/fs_tcp.h index a032bff482a6..d907e352ffae 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/fs_tcp.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/fs_tcp.h @@ -6,7 +6,7 @@ #include "en/fs.h" -#ifdef CONFIG_MLX5_EN_TLS +#if defined(CONFIG_MLX5_EN_TLS) || defined(CONFIG_MLX5_EN_NVMEOTCP) int mlx5e_accel_fs_tcp_create(struct mlx5e_flow_steering *fs); void mlx5e_accel_fs_tcp_destroy(struct mlx5e_flow_steering *fs); struct mlx5_flow_handle *mlx5e_accel_fs_add_sk(struct mlx5e_flow_steering *fs, diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c new file mode 100644 index 000000000000..5462df75fff6 --- /dev/null +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c @@ -0,0 +1,168 @@ +// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB +// Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. + +#include +#include +#include "en_accel/nvmeotcp.h" +#include "en_accel/fs_tcp.h" +#include "en/txrx.h" + +#define MAX_NUM_NVMEOTCP_QUEUES (4000) +#define MIN_NUM_NVMEOTCP_QUEUES (1) + +static const struct rhashtable_params rhash_queues = { + .key_len = sizeof(int), + .key_offset = offsetof(struct mlx5e_nvmeotcp_queue, id), + .head_offset = offsetof(struct mlx5e_nvmeotcp_queue, hash), + .automatic_shrinking = true, + .min_size = MIN_NUM_NVMEOTCP_QUEUES, + .max_size = MAX_NUM_NVMEOTCP_QUEUES, +}; + +static int +mlx5e_nvmeotcp_offload_limits(struct net_device *netdev, + struct ulp_ddp_limits *limits) +{ + return 0; +} + +static int +mlx5e_nvmeotcp_queue_init(struct net_device *netdev, + struct sock *sk, + struct ulp_ddp_config *tconfig) +{ + return 0; +} + +static void +mlx5e_nvmeotcp_queue_teardown(struct net_device *netdev, + struct sock *sk) +{ +} + +static int +mlx5e_nvmeotcp_ddp_setup(struct net_device *netdev, + struct sock *sk, + struct ulp_ddp_io *ddp) +{ + return 0; +} + +static void +mlx5e_nvmeotcp_ddp_teardown(struct net_device *netdev, + struct sock *sk, + struct ulp_ddp_io *ddp, + void *ddp_ctx) +{ +} + +static void +mlx5e_nvmeotcp_ddp_resync(struct net_device *netdev, + struct sock *sk, u32 seq) +{ +} + +const struct ulp_ddp_dev_ops mlx5e_nvmeotcp_ops = { + .limits = mlx5e_nvmeotcp_offload_limits, + .sk_add = mlx5e_nvmeotcp_queue_init, + .sk_del = mlx5e_nvmeotcp_queue_teardown, + .setup = mlx5e_nvmeotcp_ddp_setup, + .teardown = mlx5e_nvmeotcp_ddp_teardown, + .resync = mlx5e_nvmeotcp_ddp_resync, +}; + +int set_ulp_ddp_nvme_tcp(struct net_device *netdev, bool enable) +{ + struct mlx5e_priv *priv = netdev_priv(netdev); + struct mlx5e_params new_params; + int err = 0; + + /* There may be offloaded queues when an ethtool callback to disable the feature is made. + * Hence, we can't destroy the tcp flow-table since it may be referenced by the offload + * related flows and we'll keep the 128B CQEs on the channel RQs. Also, since we don't + * deref/destroy the fs tcp table when the feature is disabled, we don't ref it again + * if the feature is enabled multiple times. + */ + if (!enable || priv->nvmeotcp->enabled) + return 0; + + err = mlx5e_accel_fs_tcp_create(priv->fs); + if (err) + return err; + + new_params = priv->channels.params; + new_params.nvmeotcp = enable; + err = mlx5e_safe_switch_params(priv, &new_params, NULL, NULL, true); + if (err) + goto fs_tcp_destroy; + + priv->nvmeotcp->enabled = true; + return 0; + +fs_tcp_destroy: + mlx5e_accel_fs_tcp_destroy(priv->fs); + return err; +} + +void mlx5e_nvmeotcp_build_netdev(struct mlx5e_priv *priv) +{ + struct net_device *netdev = priv->netdev; + struct mlx5_core_dev *mdev = priv->mdev; + + if (!(MLX5_CAP_GEN(mdev, nvmeotcp) && + MLX5_CAP_DEV_NVMEOTCP(mdev, zerocopy) && + MLX5_CAP_DEV_NVMEOTCP(mdev, crc_rx) && MLX5_CAP_GEN(mdev, cqe_128_always))) + return; + + /* report ULP DPP as supported, but don't enable it by default */ + set_bit(ULP_DDP_C_NVME_TCP_BIT, netdev->ulp_ddp_caps.hw); + set_bit(ULP_DDP_C_NVME_TCP_DDGST_RX_BIT, netdev->ulp_ddp_caps.hw); +} + +void mlx5e_nvmeotcp_cleanup_rx(struct mlx5e_priv *priv) +{ + if (priv->nvmeotcp && priv->nvmeotcp->enabled) + mlx5e_accel_fs_tcp_destroy(priv->fs); +} + +int mlx5e_nvmeotcp_init(struct mlx5e_priv *priv) +{ + struct mlx5e_nvmeotcp *nvmeotcp = NULL; + int ret = 0; + + if (!MLX5_CAP_GEN(priv->mdev, nvmeotcp)) + return 0; + + nvmeotcp = kzalloc(sizeof(*nvmeotcp), GFP_KERNEL); + + if (!nvmeotcp) + return -ENOMEM; + + ida_init(&nvmeotcp->queue_ids); + ret = rhashtable_init(&nvmeotcp->queue_hash, &rhash_queues); + if (ret) + goto err_ida; + + nvmeotcp->enabled = false; + + priv->nvmeotcp = nvmeotcp; + return 0; + +err_ida: + ida_destroy(&nvmeotcp->queue_ids); + kfree(nvmeotcp); + return ret; +} + +void mlx5e_nvmeotcp_cleanup(struct mlx5e_priv *priv) +{ + struct mlx5e_nvmeotcp *nvmeotcp = priv->nvmeotcp; + + if (!nvmeotcp) + return; + + rhashtable_destroy(&nvmeotcp->queue_hash); + ida_destroy(&nvmeotcp->queue_ids); + kfree(nvmeotcp); + priv->nvmeotcp = NULL; +} diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.h b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.h new file mode 100644 index 000000000000..a665b7a72bc2 --- /dev/null +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.h @@ -0,0 +1,121 @@ +/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ +/* Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. */ +#ifndef __MLX5E_NVMEOTCP_H__ +#define __MLX5E_NVMEOTCP_H__ + +#ifdef CONFIG_MLX5_EN_NVMEOTCP + +#include +#include "en.h" +#include "en/params.h" + +struct mlx5e_nvmeotcp_queue_entry { + struct mlx5e_nvmeotcp_queue *queue; + u32 sgl_length; + u32 klm_mkey; + struct scatterlist *sgl; + u32 ccid_gen; + u64 size; + + /* for the ddp invalidate done callback */ + void *ddp_ctx; + struct ulp_ddp_io *ddp; +}; + +struct mlx5e_nvmeotcp_queue_handler { + struct napi_struct napi; + struct mlx5e_cq *cq; +}; + +/** + * struct mlx5e_nvmeotcp_queue - mlx5 metadata for NVMEoTCP queue + * @ulp_ddp_ctx: Generic ulp ddp context + * @tir: Destination TIR created for NVMEoTCP offload + * @fh: Flow handle representing the 5-tuple steering for this flow + * @id: Flow tag ID used to identify this queue + * @size: NVMEoTCP queue depth + * @ccid_gen: Generation ID for the CCID, used to avoid conflicts in DDP + * @max_klms_per_wqe: Number of KLMs per DDP operation + * @hash: Hash table of queues mapped by @id + * @pda: Padding alignment + * @tag_buf_table_id: Tag buffer table for CCIDs + * @dgst: Digest supported (header and/or data) + * @sq: Send queue used for posting umrs + * @ref_count: Reference count for this structure + * @after_resync_cqe: Indicate if resync occurred + * @ccid_table: Table holding metadata for each CC (Command Capsule) + * @ccid: ID of the current CC + * @ccsglidx: Index within the scatter-gather list (SGL) of the current CC + * @ccoff: Offset within the current CC + * @ccoff_inner: Current offset within the @ccsglidx element + * @channel_ix: Channel IX for this nvmeotcp_queue + * @sk: The socket used by the NVMe-TCP queue + * @crc_rx: CRC Rx offload indication for this queue + * @priv: mlx5e netdev priv + * @static_params_done: Async completion structure for the initial umr mapping + * synchronization + * @sq_lock: Spin lock for the icosq + * @qh: Completion queue handler for processing umr completions + */ +struct mlx5e_nvmeotcp_queue { + struct ulp_ddp_ctx ulp_ddp_ctx; + struct mlx5e_tir tir; + struct mlx5_flow_handle *fh; + int id; + u32 size; + /* needed when the upper layer immediately reuses CCID + some packet loss happens */ + u32 ccid_gen; + u32 max_klms_per_wqe; + struct rhash_head hash; + int pda; + u32 tag_buf_table_id; + u8 dgst; + struct mlx5e_icosq sq; + + /* data-path section cache aligned */ + refcount_t ref_count; + /* for MASK HW resync cqe */ + bool after_resync_cqe; + struct mlx5e_nvmeotcp_queue_entry *ccid_table; + /* current ccid fields */ + int ccid; + int ccsglidx; + off_t ccoff; + int ccoff_inner; + + u32 channel_ix; + struct sock *sk; + u8 crc_rx:1; + /* for ddp invalidate flow */ + struct mlx5e_priv *priv; + /* end of data-path section */ + + struct completion static_params_done; + /* spin lock for the ico sq, ULP can issue requests from multiple contexts */ + spinlock_t sq_lock; + struct mlx5e_nvmeotcp_queue_handler qh; +}; + +struct mlx5e_nvmeotcp { + struct ida queue_ids; + struct rhashtable queue_hash; + bool enabled; +}; + +void mlx5e_nvmeotcp_build_netdev(struct mlx5e_priv *priv); +int mlx5e_nvmeotcp_init(struct mlx5e_priv *priv); +int set_ulp_ddp_nvme_tcp(struct net_device *netdev, bool enable); +void mlx5e_nvmeotcp_cleanup(struct mlx5e_priv *priv); +static inline void mlx5e_nvmeotcp_init_rx(struct mlx5e_priv *priv) {} +void mlx5e_nvmeotcp_cleanup_rx(struct mlx5e_priv *priv); +extern const struct ulp_ddp_dev_ops mlx5e_nvmeotcp_ops; +#else + +static inline void mlx5e_nvmeotcp_build_netdev(struct mlx5e_priv *priv) {} +static inline int mlx5e_nvmeotcp_init(struct mlx5e_priv *priv) { return 0; } +static inline void mlx5e_nvmeotcp_cleanup(struct mlx5e_priv *priv) {} +static inline int set_ulp_ddp_nvme_tcp(struct net_device *dev, bool en) { return -EOPNOTSUPP; } +static inline void mlx5e_nvmeotcp_init_rx(struct mlx5e_priv *priv) {} +static inline void mlx5e_nvmeotcp_cleanup_rx(struct mlx5e_priv *priv) {} +#endif +#endif /* __MLX5E_NVMEOTCP_H__ */ diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c b/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c index 7708acc9b2ab..7f763152f989 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c @@ -38,6 +38,7 @@ #include "en/ptp.h" #include "lib/clock.h" #include "en/fs_ethtool.h" +#include "en_accel/nvmeotcp.h" void mlx5e_ethtool_get_drvinfo(struct mlx5e_priv *priv, struct ethtool_drvinfo *drvinfo) @@ -1939,6 +1940,11 @@ int mlx5e_modify_rx_cqe_compression_locked(struct mlx5e_priv *priv, bool new_val return -EINVAL; } + if (priv->channels.params.nvmeotcp) { + netdev_warn(priv->netdev, "Can't set CQE compression after ULP DDP NVMe-TCP offload\n"); + return -EINVAL; + } + new_params = priv->channels.params; MLX5E_SET_PFLAG(&new_params, MLX5E_PFLAG_RX_CQE_COMPRESS, new_val); if (rx_filter) @@ -2393,6 +2399,54 @@ static void mlx5e_get_rmon_stats(struct net_device *netdev, mlx5e_stats_rmon_get(priv, rmon_stats, ranges); } +#ifdef CONFIG_MLX5_EN_NVMEOTCP +static int mlx5e_set_ulp_ddp_capabilities(struct net_device *netdev, unsigned long *new_caps) +{ + struct mlx5e_priv *priv = netdev_priv(netdev); + DECLARE_BITMAP(old_caps, ULP_DDP_C_COUNT); + struct mlx5e_params *params; + int ret = 0; + int nvme = -1; + + mutex_lock(&priv->state_lock); + params = &priv->channels.params; + bitmap_copy(old_caps, netdev->ulp_ddp_caps.active, ULP_DDP_C_COUNT); + + /* always handle nvme-tcp-ddp and nvme-tcp-ddgst-rx together (all or nothing) */ + + if (ulp_ddp_cap_turned_on(old_caps, new_caps, ULP_DDP_C_NVME_TCP_BIT) && + ulp_ddp_cap_turned_on(old_caps, new_caps, ULP_DDP_C_NVME_TCP_DDGST_RX_BIT)) { + if (MLX5E_GET_PFLAG(params, MLX5E_PFLAG_RX_CQE_COMPRESS)) { + netdev_warn(netdev, + "NVMe-TCP offload not supported when CQE compress is active. Disable rx_cqe_compress ethtool private flag first\n"); + goto out; + } + + if (netdev->features & (NETIF_F_LRO | NETIF_F_GRO_HW)) { + netdev_warn(netdev, + "NVMe-TCP offload not supported when HW_GRO/LRO is active. Disable rx-gro-hw ethtool feature first\n"); + goto out; + } + nvme = 1; + } else if (ulp_ddp_cap_turned_off(old_caps, new_caps, ULP_DDP_C_NVME_TCP_BIT) && + ulp_ddp_cap_turned_off(old_caps, new_caps, ULP_DDP_C_NVME_TCP_DDGST_RX_BIT)) { + nvme = 0; + } + + if (nvme >= 0) { + ret = set_ulp_ddp_nvme_tcp(netdev, nvme); + if (ret) + goto out; + change_bit(ULP_DDP_C_NVME_TCP_BIT, netdev->ulp_ddp_caps.active); + change_bit(ULP_DDP_C_NVME_TCP_DDGST_RX_BIT, netdev->ulp_ddp_caps.active); + } + +out: + mutex_unlock(&priv->state_lock); + return ret; +} +#endif + const struct ethtool_ops mlx5e_ethtool_ops = { .supported_coalesce_params = ETHTOOL_COALESCE_USECS | ETHTOOL_COALESCE_MAX_FRAMES | @@ -2445,5 +2499,8 @@ const struct ethtool_ops mlx5e_ethtool_ops = { .get_eth_mac_stats = mlx5e_get_eth_mac_stats, .get_eth_ctrl_stats = mlx5e_get_eth_ctrl_stats, .get_rmon_stats = mlx5e_get_rmon_stats, - .get_link_ext_stats = mlx5e_get_link_ext_stats + .get_link_ext_stats = mlx5e_get_link_ext_stats, +#ifdef CONFIG_MLX5_EN_NVMEOTCP + .set_ulp_ddp_capabilities = mlx5e_set_ulp_ddp_capabilities, +#endif }; diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_fs.c b/drivers/net/ethernet/mellanox/mlx5/core/en_fs.c index 7298fe782e9e..63df22d9ad99 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_fs.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_fs.c @@ -62,7 +62,7 @@ struct mlx5e_flow_steering { #ifdef CONFIG_MLX5_EN_ARFS struct mlx5e_arfs_tables *arfs; #endif -#ifdef CONFIG_MLX5_EN_TLS +#if defined(CONFIG_MLX5_EN_TLS) || defined(CONFIG_MLX5_EN_NVMEOTCP) struct mlx5e_accel_fs_tcp *accel_tcp; #endif struct mlx5e_fs_udp *udp; @@ -1560,7 +1560,7 @@ void mlx5e_fs_set_any(struct mlx5e_flow_steering *fs, struct mlx5e_fs_any *any) fs->any = any; } -#ifdef CONFIG_MLX5_EN_TLS +#if defined(CONFIG_MLX5_EN_TLS) || defined(CONFIG_MLX5_EN_NVMEOTCP) struct mlx5e_accel_fs_tcp *mlx5e_fs_get_accel_tcp(struct mlx5e_flow_steering *fs) { return fs->accel_tcp; diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c index 61a6b52d011f..55071a454db4 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c @@ -49,6 +49,7 @@ #include "en_accel/macsec.h" #include "en_accel/en_accel.h" #include "en_accel/ktls.h" +#include "en_accel/nvmeotcp.h" #include "lib/vxlan.h" #include "lib/clock.h" #include "en/port.h" @@ -4146,6 +4147,13 @@ static netdev_features_t mlx5e_fix_features(struct net_device *netdev, } } + if (features & (NETIF_F_LRO | NETIF_F_GRO_HW)) { + if (params->nvmeotcp) { + netdev_warn(netdev, "Disabling HW-GRO/LRO, not supported after ULP DDP NVMe-TCP offload\n"); + features &= ~(NETIF_F_LRO | NETIF_F_GRO_HW); + } + } + if (mlx5e_is_uplink_rep(priv)) features = mlx5e_fix_uplink_rep_features(netdev, features); @@ -4914,6 +4922,9 @@ const struct net_device_ops mlx5e_netdev_ops = { .ndo_has_offload_stats = mlx5e_has_offload_stats, .ndo_get_offload_stats = mlx5e_get_offload_stats, #endif +#ifdef CONFIG_MLX5_EN_NVMEOTCP + .ulp_ddp_ops = &mlx5e_nvmeotcp_ops, +#endif }; static u32 mlx5e_choose_lro_timeout(struct mlx5_core_dev *mdev, u32 wanted_timeout) @@ -5180,6 +5191,7 @@ static void mlx5e_build_nic_netdev(struct net_device *netdev) mlx5e_macsec_build_netdev(priv); mlx5e_ipsec_build_netdev(priv); mlx5e_ktls_build_netdev(priv); + mlx5e_nvmeotcp_build_netdev(priv); } void mlx5e_create_q_counters(struct mlx5e_priv *priv) @@ -5246,13 +5258,19 @@ static int mlx5e_nic_init(struct mlx5_core_dev *mdev, if (err) mlx5_core_err(mdev, "TLS initialization failed, %d\n", err); + err = mlx5e_nvmeotcp_init(priv); + if (err) + mlx5_core_err(mdev, "NVMEoTCP initialization failed, %d\n", err); + mlx5e_health_create_reporters(priv); + return 0; } static void mlx5e_nic_cleanup(struct mlx5e_priv *priv) { mlx5e_health_destroy_reporters(priv); + mlx5e_nvmeotcp_cleanup(priv); mlx5e_ktls_cleanup(priv); mlx5e_fs_cleanup(priv->fs); } diff --git a/drivers/net/ethernet/mellanox/mlx5/core/main.c b/drivers/net/ethernet/mellanox/mlx5/core/main.c index df134f6d32dc..40c597d9a55d 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/main.c @@ -1555,6 +1555,7 @@ static const int types[] = { MLX5_CAP_DEV_SHAMPO, MLX5_CAP_MACSEC, MLX5_CAP_ADV_VIRTUALIZATION, + MLX5_CAP_DEV_NVMEOTCP, }; static void mlx5_hca_caps_free(struct mlx5_core_dev *dev) From patchwork Tue Jan 17 15:35:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Aptel X-Patchwork-Id: 13104825 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 86EBCC6379F for ; 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Add reference counter to share TCP flow steering structure. Signed-off-by: Boris Pismenny Signed-off-by: Ben Ben-Ishay Signed-off-by: Or Gerlitz Signed-off-by: Yoray Zack Signed-off-by: Aurelien Aptel Reviewed-by: Tariq Toukan --- .../ethernet/mellanox/mlx5/core/en_accel/fs_tcp.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/fs_tcp.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/fs_tcp.c index 88a5aed9d678..29152d6e80d2 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/fs_tcp.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/fs_tcp.c @@ -14,6 +14,7 @@ enum accel_fs_tcp_type { struct mlx5e_accel_fs_tcp { struct mlx5e_flow_table tables[ACCEL_FS_TCP_NUM_TYPES]; struct mlx5_flow_handle *default_rules[ACCEL_FS_TCP_NUM_TYPES]; + refcount_t user_count; }; static enum mlx5_traffic_types fs_accel2tt(enum accel_fs_tcp_type i) @@ -360,6 +361,9 @@ void mlx5e_accel_fs_tcp_destroy(struct mlx5e_flow_steering *fs) if (!accel_tcp) return; + if (!refcount_dec_and_test(&accel_tcp->user_count)) + return; + accel_fs_tcp_disable(fs); for (i = 0; i < ACCEL_FS_TCP_NUM_TYPES; i++) @@ -371,12 +375,17 @@ void mlx5e_accel_fs_tcp_destroy(struct mlx5e_flow_steering *fs) int mlx5e_accel_fs_tcp_create(struct mlx5e_flow_steering *fs) { - struct mlx5e_accel_fs_tcp *accel_tcp; + struct mlx5e_accel_fs_tcp *accel_tcp = mlx5e_fs_get_accel_tcp(fs); int i, err; if (!MLX5_CAP_FLOWTABLE_NIC_RX(mlx5e_fs_get_mdev(fs), ft_field_support.outer_ip_version)) return -EOPNOTSUPP; + if (accel_tcp) { + refcount_inc(&accel_tcp->user_count); + return 0; + } + accel_tcp = kzalloc(sizeof(*accel_tcp), GFP_KERNEL); if (!accel_tcp) return -ENOMEM; @@ -392,6 +401,7 @@ int mlx5e_accel_fs_tcp_create(struct mlx5e_flow_steering *fs) if (err) goto err_destroy_tables; + refcount_set(&accel_tcp->user_count, 1); return 0; err_destroy_tables: From patchwork Tue Jan 17 15:35:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Aptel X-Patchwork-Id: 13104826 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C25D8C6379F for ; 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Every request comprises from SG list that might consist from elements with multiple combination sizes, thus the appropriate way to perform buffer registration is with KLM UMRs. UMR stands for user-mode memory registration, it is a mechanism to alter address translation properties of MKEY by posting WorkQueueElement aka WQE on send queue. MKEY stands for memory key, MKEY are used to describe a region in memory that can be later used by HW. KLM stands for {Key, Length, MemVa}, KLM_MKEY is indirect MKEY that enables to map multiple memory spaces with different sizes in unified MKEY. KLM UMR is a UMR that use to update a KLM_MKEY. Signed-off-by: Ben Ben-Ishay Signed-off-by: Boris Pismenny Signed-off-by: Or Gerlitz Signed-off-by: Yoray Zack Signed-off-by: Aurelien Aptel Reviewed-by: Tariq Toukan --- .../net/ethernet/mellanox/mlx5/core/en/txrx.h | 3 + .../mellanox/mlx5/core/en_accel/nvmeotcp.c | 123 ++++++++++++++++++ .../mlx5/core/en_accel/nvmeotcp_utils.h | 25 ++++ .../net/ethernet/mellanox/mlx5/core/en_rx.c | 4 + 4 files changed, 155 insertions(+) create mode 100644 drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp_utils.h diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h b/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h index a690a90a4c9c..2781d9eaf4b5 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h @@ -50,6 +50,9 @@ enum mlx5e_icosq_wqe_type { MLX5E_ICOSQ_WQE_SET_PSV_TLS, MLX5E_ICOSQ_WQE_GET_PSV_TLS, #endif +#ifdef CONFIG_MLX5_EN_NVMEOTCP + MLX5E_ICOSQ_WQE_UMR_NVMEOTCP, +#endif }; /* General */ diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c index 5462df75fff6..1eb782596681 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c @@ -4,6 +4,7 @@ #include #include #include "en_accel/nvmeotcp.h" +#include "en_accel/nvmeotcp_utils.h" #include "en_accel/fs_tcp.h" #include "en/txrx.h" @@ -19,6 +20,120 @@ static const struct rhashtable_params rhash_queues = { .max_size = MAX_NUM_NVMEOTCP_QUEUES, }; +static void +fill_nvmeotcp_klm_wqe(struct mlx5e_nvmeotcp_queue *queue, struct mlx5e_umr_wqe *wqe, u16 ccid, + u32 klm_entries, u16 klm_offset) +{ + struct scatterlist *sgl_mkey; + u32 lkey, i; + + lkey = queue->priv->mdev->mlx5e_res.hw_objs.mkey; + for (i = 0; i < klm_entries; i++) { + sgl_mkey = &queue->ccid_table[ccid].sgl[i + klm_offset]; + wqe->inline_klms[i].bcount = cpu_to_be32(sg_dma_len(sgl_mkey)); + wqe->inline_klms[i].key = cpu_to_be32(lkey); + wqe->inline_klms[i].va = cpu_to_be64(sgl_mkey->dma_address); + } + + for (; i < ALIGN(klm_entries, MLX5_UMR_KLM_NUM_ENTRIES_ALIGNMENT); i++) { + wqe->inline_klms[i].bcount = 0; + wqe->inline_klms[i].key = 0; + wqe->inline_klms[i].va = 0; + } +} + +static void +build_nvmeotcp_klm_umr(struct mlx5e_nvmeotcp_queue *queue, struct mlx5e_umr_wqe *wqe, + u16 ccid, int klm_entries, u32 klm_offset, u32 len, + enum wqe_type klm_type) +{ + u32 id = (klm_type == KLM_UMR) ? queue->ccid_table[ccid].klm_mkey : + (mlx5e_tir_get_tirn(&queue->tir) << MLX5_WQE_CTRL_TIR_TIS_INDEX_SHIFT); + u8 opc_mod = (klm_type == KLM_UMR) ? MLX5_CTRL_SEGMENT_OPC_MOD_UMR_UMR : + MLX5_OPC_MOD_TRANSPORT_TIR_STATIC_PARAMS; + u32 ds_cnt = MLX5E_KLM_UMR_DS_CNT(ALIGN(klm_entries, MLX5_UMR_KLM_NUM_ENTRIES_ALIGNMENT)); + struct mlx5_wqe_umr_ctrl_seg *ucseg = &wqe->uctrl; + struct mlx5_wqe_ctrl_seg *cseg = &wqe->ctrl; + struct mlx5_mkey_seg *mkc = &wqe->mkc; + u32 sqn = queue->sq.sqn; + u16 pc = queue->sq.pc; + + cseg->opmod_idx_opcode = cpu_to_be32((pc << MLX5_WQE_CTRL_WQE_INDEX_SHIFT) | + MLX5_OPCODE_UMR | (opc_mod) << 24); + cseg->qpn_ds = cpu_to_be32((sqn << MLX5_WQE_CTRL_QPN_SHIFT) | ds_cnt); + cseg->general_id = cpu_to_be32(id); + + if (klm_type == KLM_UMR && !klm_offset) { + ucseg->mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_XLT_OCT_SIZE | + MLX5_MKEY_MASK_LEN | MLX5_MKEY_MASK_FREE); + mkc->xlt_oct_size = cpu_to_be32(ALIGN(len, MLX5_UMR_KLM_NUM_ENTRIES_ALIGNMENT)); + mkc->len = cpu_to_be64(queue->ccid_table[ccid].size); + } + + ucseg->flags = MLX5_UMR_INLINE | MLX5_UMR_TRANSLATION_OFFSET_EN; + ucseg->xlt_octowords = cpu_to_be16(ALIGN(klm_entries, MLX5_UMR_KLM_NUM_ENTRIES_ALIGNMENT)); + ucseg->xlt_offset = cpu_to_be16(klm_offset); + fill_nvmeotcp_klm_wqe(queue, wqe, ccid, klm_entries, klm_offset); +} + +static void +mlx5e_nvmeotcp_fill_wi(struct mlx5e_icosq *sq, u32 wqebbs, u16 pi) +{ + struct mlx5e_icosq_wqe_info *wi = &sq->db.wqe_info[pi]; + + memset(wi, 0, sizeof(*wi)); + + wi->num_wqebbs = wqebbs; + wi->wqe_type = MLX5E_ICOSQ_WQE_UMR_NVMEOTCP; +} + +static u32 +post_klm_wqe(struct mlx5e_nvmeotcp_queue *queue, + enum wqe_type wqe_type, + u16 ccid, + u32 klm_length, + u32 klm_offset) +{ + struct mlx5e_icosq *sq = &queue->sq; + u32 wqebbs, cur_klm_entries; + struct mlx5e_umr_wqe *wqe; + u16 pi, wqe_sz; + + cur_klm_entries = min_t(int, queue->max_klms_per_wqe, klm_length - klm_offset); + wqe_sz = MLX5E_KLM_UMR_WQE_SZ(ALIGN(cur_klm_entries, MLX5_UMR_KLM_NUM_ENTRIES_ALIGNMENT)); + wqebbs = DIV_ROUND_UP(wqe_sz, MLX5_SEND_WQE_BB); + pi = mlx5e_icosq_get_next_pi(sq, wqebbs); + wqe = MLX5E_NVMEOTCP_FETCH_KLM_WQE(sq, pi); + mlx5e_nvmeotcp_fill_wi(sq, wqebbs, pi); + build_nvmeotcp_klm_umr(queue, wqe, ccid, cur_klm_entries, klm_offset, + klm_length, wqe_type); + sq->pc += wqebbs; + sq->doorbell_cseg = &wqe->ctrl; + return cur_klm_entries; +} + +static void +mlx5e_nvmeotcp_post_klm_wqe(struct mlx5e_nvmeotcp_queue *queue, enum wqe_type wqe_type, + u16 ccid, u32 klm_length) +{ + struct mlx5e_icosq *sq = &queue->sq; + u32 klm_offset = 0, wqes, i; + + wqes = DIV_ROUND_UP(klm_length, queue->max_klms_per_wqe); + + spin_lock_bh(&queue->sq_lock); + + for (i = 0; i < wqes; i++) + klm_offset += post_klm_wqe(queue, wqe_type, ccid, klm_length, klm_offset); + + if (wqe_type == KLM_UMR) /* not asking for completion on ddp_setup UMRs */ + __mlx5e_notify_hw(&sq->wq, sq->pc, sq->uar_map, sq->doorbell_cseg, 0); + else + mlx5e_notify_hw(&sq->wq, sq->pc, sq->uar_map, sq->doorbell_cseg); + + spin_unlock_bh(&queue->sq_lock); +} + static int mlx5e_nvmeotcp_offload_limits(struct net_device *netdev, struct ulp_ddp_limits *limits) @@ -45,6 +160,14 @@ mlx5e_nvmeotcp_ddp_setup(struct net_device *netdev, struct sock *sk, struct ulp_ddp_io *ddp) { + struct mlx5e_nvmeotcp_queue *queue; + + queue = container_of(ulp_ddp_get_ctx(sk), + struct mlx5e_nvmeotcp_queue, ulp_ddp_ctx); + + /* Placeholder - map_sg and initializing the count */ + + mlx5e_nvmeotcp_post_klm_wqe(queue, KLM_UMR, ddp->command_id, 0); return 0; } diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp_utils.h b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp_utils.h new file mode 100644 index 000000000000..6ef92679c5d0 --- /dev/null +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp_utils.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ +/* Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. */ +#ifndef __MLX5E_NVMEOTCP_UTILS_H__ +#define __MLX5E_NVMEOTCP_UTILS_H__ + +#include "en.h" + +#define MLX5E_NVMEOTCP_FETCH_KLM_WQE(sq, pi) \ + ((struct mlx5e_umr_wqe *)\ + mlx5e_fetch_wqe(&(sq)->wq, pi, sizeof(struct mlx5e_umr_wqe))) + +#define MLX5_CTRL_SEGMENT_OPC_MOD_UMR_NVMEOTCP_TIR_PROGRESS_PARAMS 0x4 + +#define MLX5_CTRL_SEGMENT_OPC_MOD_UMR_TIR_PARAMS 0x2 +#define MLX5_CTRL_SEGMENT_OPC_MOD_UMR_UMR 0x0 + +enum wqe_type { + KLM_UMR, + BSF_KLM_UMR, + SET_PSV_UMR, + BSF_UMR, + KLM_INV_UMR, +}; + +#endif /* __MLX5E_NVMEOTCP_UTILS_H__ */ diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c index 51167f000383..02aa16f5eb57 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c @@ -984,6 +984,10 @@ int mlx5e_poll_ico_cq(struct mlx5e_cq *cq, int budget) case MLX5E_ICOSQ_WQE_GET_PSV_TLS: mlx5e_ktls_handle_get_psv_completion(wi, sq); break; +#endif +#ifdef CONFIG_MLX5_EN_NVMEOTCP + case MLX5E_ICOSQ_WQE_UMR_NVMEOTCP: + break; #endif default: netdev_WARN_ONCE(cq->netdev, From patchwork Tue Jan 17 15:35:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Aptel X-Patchwork-Id: 13104827 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4C609C3DA78 for ; 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When nvme-tcp establishes new queue/connection, the sk_add op is called. We allocate a hardware context to offload operations for this queue: - use a steering rule based on the connection 5-tuple to mark packets of this queue/connection with a flow-tag in their completion (cqe) - use a dedicated TIR to identify the queue and maintain the HW context - use a dedicated ICOSQ to maintain the HW context by UMR postings - use a dedicated tag buffer for buffer registration - maintain static and progress HW contexts by posting the proper WQEs. When nvme-tcp teardowns a queue/connection, the sk_del op is called. We teardown the queue and free the corresponding contexts. The offload limits we advertise deal with the max SG supported. [Re-enabled calling open/close icosq out of en_main.c] Signed-off-by: Ben Ben-Ishay Signed-off-by: Boris Pismenny Signed-off-by: Or Gerlitz Signed-off-by: Yoray Zack Signed-off-by: Aurelien Aptel Reviewed-by: Tariq Toukan --- drivers/net/ethernet/mellanox/mlx5/core/en.h | 4 + .../ethernet/mellanox/mlx5/core/en/rx_res.c | 28 + .../ethernet/mellanox/mlx5/core/en/rx_res.h | 4 + .../net/ethernet/mellanox/mlx5/core/en/tir.c | 15 + .../net/ethernet/mellanox/mlx5/core/en/tir.h | 2 + .../net/ethernet/mellanox/mlx5/core/en/txrx.h | 6 + .../mellanox/mlx5/core/en_accel/nvmeotcp.c | 562 +++++++++++++++++- .../mellanox/mlx5/core/en_accel/nvmeotcp.h | 4 + .../mlx5/core/en_accel/nvmeotcp_utils.h | 41 ++ .../net/ethernet/mellanox/mlx5/core/en_main.c | 8 +- .../net/ethernet/mellanox/mlx5/core/en_rx.c | 15 +- 11 files changed, 679 insertions(+), 10 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en.h b/drivers/net/ethernet/mellanox/mlx5/core/en.h index 136eb608ecaf..61318af2c9e0 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en.h @@ -1054,6 +1054,10 @@ int mlx5e_create_rq(struct mlx5e_rq *rq, struct mlx5e_rq_param *param); void mlx5e_destroy_rq(struct mlx5e_rq *rq); struct mlx5e_sq_param; +int mlx5e_open_icosq(struct mlx5e_channel *c, struct mlx5e_params *params, + struct mlx5e_sq_param *param, struct mlx5e_icosq *sq, + work_func_t recover_work_func); +void mlx5e_close_icosq(struct mlx5e_icosq *sq); int mlx5e_open_xdpsq(struct mlx5e_channel *c, struct mlx5e_params *params, struct mlx5e_sq_param *param, struct xsk_buff_pool *xsk_pool, struct mlx5e_xdpsq *sq, bool is_redirect); diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.c b/drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.c index e1095bc36543..4a88b675a02c 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.c @@ -611,6 +611,34 @@ struct mlx5e_rss_params_hash mlx5e_rx_res_get_current_hash(struct mlx5e_rx_res * return mlx5e_rss_get_hash(res->rss[0]); } +int mlx5e_rx_res_nvmeotcp_tir_create(struct mlx5e_rx_res *res, unsigned int rxq, bool crc_rx, + u32 tag_buf_id, struct mlx5e_tir *tir) +{ + bool inner_ft_support = res->features & MLX5E_RX_RES_FEATURE_INNER_FT; + struct mlx5e_tir_builder *builder; + u32 rqtn; + int err; + + builder = mlx5e_tir_builder_alloc(false); + if (!builder) + return -ENOMEM; + + rqtn = mlx5e_rx_res_get_rqtn_direct(res, rxq); + + mlx5e_tir_builder_build_rqt(builder, res->mdev->mlx5e_res.hw_objs.td.tdn, rqtn, + inner_ft_support); + mlx5e_tir_builder_build_direct(builder); + mlx5e_tir_builder_build_nvmeotcp(builder, crc_rx, tag_buf_id); + down_read(&res->pkt_merge_param_sem); + mlx5e_tir_builder_build_packet_merge(builder, &res->pkt_merge_param); + err = mlx5e_tir_init(tir, builder, res->mdev, false); + up_read(&res->pkt_merge_param_sem); + + mlx5e_tir_builder_free(builder); + + return err; +} + int mlx5e_rx_res_tls_tir_create(struct mlx5e_rx_res *res, unsigned int rxq, struct mlx5e_tir *tir) { diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.h b/drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.h index 5d5f64fab60f..59c22cac9ef4 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.h @@ -66,4 +66,8 @@ struct mlx5e_rss_params_hash mlx5e_rx_res_get_current_hash(struct mlx5e_rx_res * /* Accel TIRs */ int mlx5e_rx_res_tls_tir_create(struct mlx5e_rx_res *res, unsigned int rxq, struct mlx5e_tir *tir); + +int mlx5e_rx_res_nvmeotcp_tir_create(struct mlx5e_rx_res *res, unsigned int rxq, bool crc_rx, + u32 tag_buf_id, struct mlx5e_tir *tir); + #endif /* __MLX5_EN_RX_RES_H__ */ diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/tir.c b/drivers/net/ethernet/mellanox/mlx5/core/en/tir.c index d4239e3b3c88..8bdf74cbd8cd 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en/tir.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en/tir.c @@ -143,6 +143,21 @@ void mlx5e_tir_builder_build_direct(struct mlx5e_tir_builder *builder) MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_RX_HASH_FN_INVERTED_XOR8); } +void mlx5e_tir_builder_build_nvmeotcp(struct mlx5e_tir_builder *builder, bool crc_rx, + u32 tag_buf_id) +{ + void *tirc = mlx5e_tir_builder_get_tirc(builder); + + WARN_ON(builder->modify); + + MLX5_SET(tirc, tirc, nvmeotcp_zero_copy_en, 1); + MLX5_SET(tirc, tirc, nvmeotcp_tag_buffer_table_id, tag_buf_id); + MLX5_SET(tirc, tirc, nvmeotcp_crc_en, !!crc_rx); + MLX5_SET(tirc, tirc, self_lb_block, + MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST | + MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST); +} + void mlx5e_tir_builder_build_tls(struct mlx5e_tir_builder *builder) { void *tirc = mlx5e_tir_builder_get_tirc(builder); diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/tir.h b/drivers/net/ethernet/mellanox/mlx5/core/en/tir.h index 857a84bcd53a..bdec6931444b 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en/tir.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en/tir.h @@ -35,6 +35,8 @@ void mlx5e_tir_builder_build_rss(struct mlx5e_tir_builder *builder, bool inner); void mlx5e_tir_builder_build_direct(struct mlx5e_tir_builder *builder); void mlx5e_tir_builder_build_tls(struct mlx5e_tir_builder *builder); +void mlx5e_tir_builder_build_nvmeotcp(struct mlx5e_tir_builder *builder, bool crc_rx, + u32 tag_buf_id); struct mlx5_core_dev; diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h b/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h index 2781d9eaf4b5..971265280e55 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h @@ -52,6 +52,7 @@ enum mlx5e_icosq_wqe_type { #endif #ifdef CONFIG_MLX5_EN_NVMEOTCP MLX5E_ICOSQ_WQE_UMR_NVMEOTCP, + MLX5E_ICOSQ_WQE_SET_PSV_NVMEOTCP, #endif }; @@ -206,6 +207,11 @@ struct mlx5e_icosq_wqe_info { struct { struct mlx5e_ktls_rx_resync_buf *buf; } tls_get_params; +#endif +#ifdef CONFIG_MLX5_EN_NVMEOTCP + struct { + struct mlx5e_nvmeotcp_queue *queue; + } nvmeotcp_q; #endif }; }; diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c index 1eb782596681..6ab46497e1dc 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c @@ -3,6 +3,7 @@ #include #include +#include #include "en_accel/nvmeotcp.h" #include "en_accel/nvmeotcp_utils.h" #include "en_accel/fs_tcp.h" @@ -11,6 +12,11 @@ #define MAX_NUM_NVMEOTCP_QUEUES (4000) #define MIN_NUM_NVMEOTCP_QUEUES (1) +/* Max PDU data will be 512K */ +#define MLX5E_NVMEOTCP_MAX_SEGMENTS (128) +#define MLX5E_NVMEOTCP_IO_THRESHOLD (32 * 1024) +#define MLX5E_NVMEOTCP_FULL_CCID_RANGE (0) + static const struct rhashtable_params rhash_queues = { .key_len = sizeof(int), .key_offset = offsetof(struct mlx5e_nvmeotcp_queue, id), @@ -20,6 +26,95 @@ static const struct rhashtable_params rhash_queues = { .max_size = MAX_NUM_NVMEOTCP_QUEUES, }; +static u32 mlx5e_get_max_sgl(struct mlx5_core_dev *mdev) +{ + return min_t(u32, + MLX5E_NVMEOTCP_MAX_SEGMENTS, + 1 << MLX5_CAP_GEN(mdev, log_max_klm_list_size)); +} + +static u32 +mlx5e_get_channel_ix_from_io_cpu(struct mlx5e_params *params, u32 io_cpu) +{ + int num_channels = params->num_channels; + u32 channel_ix = io_cpu; + + if (channel_ix >= num_channels) + channel_ix = channel_ix % num_channels; + + return channel_ix; +} + +static +int mlx5e_create_nvmeotcp_tag_buf_table(struct mlx5_core_dev *mdev, + struct mlx5e_nvmeotcp_queue *queue, + u8 log_table_size) +{ + u32 in[MLX5_ST_SZ_DW(create_nvmeotcp_tag_buf_table_in)] = {}; + u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)]; + u64 general_obj_types; + void *obj; + int err; + + obj = MLX5_ADDR_OF(create_nvmeotcp_tag_buf_table_in, in, + nvmeotcp_tag_buf_table_obj); + + general_obj_types = MLX5_CAP_GEN_64(mdev, general_obj_types); + if (!(general_obj_types & + MLX5_HCA_CAP_GENERAL_OBJECT_TYPES_NVMEOTCP_TAG_BUFFER_TABLE)) + return -EINVAL; + + MLX5_SET(general_obj_in_cmd_hdr, in, opcode, + MLX5_CMD_OP_CREATE_GENERAL_OBJECT); + MLX5_SET(general_obj_in_cmd_hdr, in, obj_type, + MLX5_GENERAL_OBJECT_TYPES_NVMEOTCP_TAG_BUFFER_TABLE); + MLX5_SET(nvmeotcp_tag_buf_table_obj, obj, + log_tag_buffer_table_size, log_table_size); + + err = mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out)); + if (!err) + queue->tag_buf_table_id = MLX5_GET(general_obj_out_cmd_hdr, + out, obj_id); + return err; +} + +static +void mlx5_destroy_nvmeotcp_tag_buf_table(struct mlx5_core_dev *mdev, u32 uid) +{ + u32 in[MLX5_ST_SZ_DW(general_obj_in_cmd_hdr)] = {}; + u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)]; + + MLX5_SET(general_obj_in_cmd_hdr, in, opcode, + MLX5_CMD_OP_DESTROY_GENERAL_OBJECT); + MLX5_SET(general_obj_in_cmd_hdr, in, obj_type, + MLX5_GENERAL_OBJECT_TYPES_NVMEOTCP_TAG_BUFFER_TABLE); + MLX5_SET(general_obj_in_cmd_hdr, in, obj_id, uid); + + mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out)); +} + +static void +fill_nvmeotcp_bsf_klm_wqe(struct mlx5e_nvmeotcp_queue *queue, struct mlx5e_umr_wqe *wqe, + u16 ccid, u32 klm_entries, u16 klm_offset) +{ + u32 i; + + /* BSF_KLM_UMR is used to update the tag_buffer. To spare the + * need to update both mkc.length and tag_buffer[i].len in two + * different UMRs we initialize the tag_buffer[*].len to the + * maximum size of an entry so the HW check will pass and the + * validity of the MKEY len will be checked against the + * updated mkey context field. + */ + for (i = 0; i < klm_entries; i++) { + u32 lkey = queue->ccid_table[i + klm_offset].klm_mkey; + + wqe->inline_klms[i].bcount = cpu_to_be32(U32_MAX); + wqe->inline_klms[i].key = cpu_to_be32(lkey); + wqe->inline_klms[i].va = 0; + } +} + static void fill_nvmeotcp_klm_wqe(struct mlx5e_nvmeotcp_queue *queue, struct mlx5e_umr_wqe *wqe, u16 ccid, u32 klm_entries, u16 klm_offset) @@ -73,18 +168,149 @@ build_nvmeotcp_klm_umr(struct mlx5e_nvmeotcp_queue *queue, struct mlx5e_umr_wqe ucseg->flags = MLX5_UMR_INLINE | MLX5_UMR_TRANSLATION_OFFSET_EN; ucseg->xlt_octowords = cpu_to_be16(ALIGN(klm_entries, MLX5_UMR_KLM_NUM_ENTRIES_ALIGNMENT)); ucseg->xlt_offset = cpu_to_be16(klm_offset); - fill_nvmeotcp_klm_wqe(queue, wqe, ccid, klm_entries, klm_offset); + if (klm_type == BSF_KLM_UMR) + fill_nvmeotcp_bsf_klm_wqe(queue, wqe, ccid, klm_entries, klm_offset); + else + fill_nvmeotcp_klm_wqe(queue, wqe, ccid, klm_entries, klm_offset); +} + +static void +fill_nvmeotcp_progress_params(struct mlx5e_nvmeotcp_queue *queue, + struct mlx5_seg_nvmeotcp_progress_params *params, + u32 seq) +{ + void *ctx = params->ctx; + + params->tir_num = cpu_to_be32(mlx5e_tir_get_tirn(&queue->tir)); + + MLX5_SET(nvmeotcp_progress_params, ctx, next_pdu_tcp_sn, seq); + MLX5_SET(nvmeotcp_progress_params, ctx, pdu_tracker_state, + MLX5E_NVMEOTCP_PROGRESS_PARAMS_PDU_TRACKER_STATE_START); +} + +void +build_nvmeotcp_progress_params(struct mlx5e_nvmeotcp_queue *queue, + struct mlx5e_set_nvmeotcp_progress_params_wqe *wqe, + u32 seq) +{ + struct mlx5_wqe_ctrl_seg *cseg = &wqe->ctrl; + u32 sqn = queue->sq.sqn; + u16 pc = queue->sq.pc; + u8 opc_mod; + + memset(wqe, 0, MLX5E_NVMEOTCP_PROGRESS_PARAMS_WQE_SZ); + opc_mod = MLX5_CTRL_SEGMENT_OPC_MOD_UMR_NVMEOTCP_TIR_PROGRESS_PARAMS; + cseg->opmod_idx_opcode = cpu_to_be32((pc << MLX5_WQE_CTRL_WQE_INDEX_SHIFT) | + MLX5_OPCODE_SET_PSV | (opc_mod << 24)); + cseg->qpn_ds = cpu_to_be32((sqn << MLX5_WQE_CTRL_QPN_SHIFT) | + PROGRESS_PARAMS_DS_CNT); + fill_nvmeotcp_progress_params(queue, &wqe->params, seq); +} + +static void +fill_nvmeotcp_static_params(struct mlx5e_nvmeotcp_queue *queue, + struct mlx5_wqe_transport_static_params_seg *params, + u32 resync_seq, bool ddgst_offload_en) +{ + void *ctx = params->ctx; + + MLX5_SET(transport_static_params, ctx, const_1, 1); + MLX5_SET(transport_static_params, ctx, const_2, 2); + MLX5_SET(transport_static_params, ctx, acc_type, + MLX5_TRANSPORT_STATIC_PARAMS_ACC_TYPE_NVMETCP); + MLX5_SET(transport_static_params, ctx, nvme_resync_tcp_sn, resync_seq); + MLX5_SET(transport_static_params, ctx, pda, queue->pda); + MLX5_SET(transport_static_params, ctx, ddgst_en, + !!(queue->dgst & NVME_TCP_DATA_DIGEST_ENABLE)); + MLX5_SET(transport_static_params, ctx, ddgst_offload_en, ddgst_offload_en); + MLX5_SET(transport_static_params, ctx, hddgst_en, + !!(queue->dgst & NVME_TCP_HDR_DIGEST_ENABLE)); + MLX5_SET(transport_static_params, ctx, hdgst_offload_en, 0); + MLX5_SET(transport_static_params, ctx, ti, + MLX5_TRANSPORT_STATIC_PARAMS_TI_INITIATOR); + MLX5_SET(transport_static_params, ctx, cccid_ttag, 1); + MLX5_SET(transport_static_params, ctx, zero_copy_en, 1); +} + +void +build_nvmeotcp_static_params(struct mlx5e_nvmeotcp_queue *queue, + struct mlx5e_set_transport_static_params_wqe *wqe, + u32 resync_seq, bool crc_rx) +{ + u8 opc_mod = MLX5_OPC_MOD_TRANSPORT_TIR_STATIC_PARAMS; + struct mlx5_wqe_umr_ctrl_seg *ucseg = &wqe->uctrl; + struct mlx5_wqe_ctrl_seg *cseg = &wqe->ctrl; + u32 sqn = queue->sq.sqn; + u16 pc = queue->sq.pc; + + memset(wqe, 0, MLX5E_TRANSPORT_STATIC_PARAMS_WQE_SZ); + + cseg->opmod_idx_opcode = cpu_to_be32((pc << MLX5_WQE_CTRL_WQE_INDEX_SHIFT) | + MLX5_OPCODE_UMR | (opc_mod) << 24); + cseg->qpn_ds = cpu_to_be32((sqn << MLX5_WQE_CTRL_QPN_SHIFT) | + MLX5E_TRANSPORT_STATIC_PARAMS_DS_CNT); + cseg->imm = cpu_to_be32(mlx5e_tir_get_tirn(&queue->tir) + << MLX5_WQE_CTRL_TIR_TIS_INDEX_SHIFT); + + ucseg->flags = MLX5_UMR_INLINE; + ucseg->bsf_octowords = cpu_to_be16(MLX5E_TRANSPORT_STATIC_PARAMS_OCTWORD_SIZE); + fill_nvmeotcp_static_params(queue, &wqe->params, resync_seq, crc_rx); } static void -mlx5e_nvmeotcp_fill_wi(struct mlx5e_icosq *sq, u32 wqebbs, u16 pi) +mlx5e_nvmeotcp_fill_wi(struct mlx5e_nvmeotcp_queue *nvmeotcp_queue, + struct mlx5e_icosq *sq, u32 wqebbs, u16 pi, + enum wqe_type type) { struct mlx5e_icosq_wqe_info *wi = &sq->db.wqe_info[pi]; memset(wi, 0, sizeof(*wi)); wi->num_wqebbs = wqebbs; - wi->wqe_type = MLX5E_ICOSQ_WQE_UMR_NVMEOTCP; + switch (type) { + case SET_PSV_UMR: + wi->wqe_type = MLX5E_ICOSQ_WQE_SET_PSV_NVMEOTCP; + wi->nvmeotcp_q.queue = nvmeotcp_queue; + break; + default: + /* cases where no further action is required upon completion, such as ddp setup */ + wi->wqe_type = MLX5E_ICOSQ_WQE_UMR_NVMEOTCP; + break; + } +} + +static void +mlx5e_nvmeotcp_rx_post_static_params_wqe(struct mlx5e_nvmeotcp_queue *queue, u32 resync_seq) +{ + struct mlx5e_set_transport_static_params_wqe *wqe; + struct mlx5e_icosq *sq = &queue->sq; + u16 pi, wqebbs; + + spin_lock_bh(&queue->sq_lock); + wqebbs = MLX5E_TRANSPORT_SET_STATIC_PARAMS_WQEBBS; + pi = mlx5e_icosq_get_next_pi(sq, wqebbs); + wqe = MLX5E_TRANSPORT_FETCH_SET_STATIC_PARAMS_WQE(sq, pi); + mlx5e_nvmeotcp_fill_wi(NULL, sq, wqebbs, pi, BSF_UMR); + build_nvmeotcp_static_params(queue, wqe, resync_seq, queue->crc_rx); + sq->pc += wqebbs; + mlx5e_notify_hw(&sq->wq, sq->pc, sq->uar_map, &wqe->ctrl); + spin_unlock_bh(&queue->sq_lock); +} + +static void +mlx5e_nvmeotcp_rx_post_progress_params_wqe(struct mlx5e_nvmeotcp_queue *queue, u32 seq) +{ + struct mlx5e_set_nvmeotcp_progress_params_wqe *wqe; + struct mlx5e_icosq *sq = &queue->sq; + u16 pi, wqebbs; + + wqebbs = MLX5E_NVMEOTCP_PROGRESS_PARAMS_WQEBBS; + pi = mlx5e_icosq_get_next_pi(sq, wqebbs); + wqe = MLX5E_NVMEOTCP_FETCH_PROGRESS_PARAMS_WQE(sq, pi); + mlx5e_nvmeotcp_fill_wi(queue, sq, wqebbs, pi, SET_PSV_UMR); + build_nvmeotcp_progress_params(queue, wqe, seq); + sq->pc += wqebbs; + mlx5e_notify_hw(&sq->wq, sq->pc, sq->uar_map, &wqe->ctrl); } static u32 @@ -104,7 +330,7 @@ post_klm_wqe(struct mlx5e_nvmeotcp_queue *queue, wqebbs = DIV_ROUND_UP(wqe_sz, MLX5_SEND_WQE_BB); pi = mlx5e_icosq_get_next_pi(sq, wqebbs); wqe = MLX5E_NVMEOTCP_FETCH_KLM_WQE(sq, pi); - mlx5e_nvmeotcp_fill_wi(sq, wqebbs, pi); + mlx5e_nvmeotcp_fill_wi(queue, sq, wqebbs, pi, wqe_type); build_nvmeotcp_klm_umr(queue, wqe, ccid, cur_klm_entries, klm_offset, klm_length, wqe_type); sq->pc += wqebbs; @@ -134,25 +360,326 @@ mlx5e_nvmeotcp_post_klm_wqe(struct mlx5e_nvmeotcp_queue *queue, enum wqe_type wq spin_unlock_bh(&queue->sq_lock); } +static int mlx5e_create_nvmeotcp_mkey(struct mlx5_core_dev *mdev, u8 access_mode, + u32 translation_octword_size, u32 *mkey) +{ + int inlen = MLX5_ST_SZ_BYTES(create_mkey_in); + void *mkc; + u32 *in; + int err; + + in = kvzalloc(inlen, GFP_KERNEL); + if (!in) + return -ENOMEM; + + mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry); + MLX5_SET(mkc, mkc, free, 1); + MLX5_SET(mkc, mkc, translations_octword_size, translation_octword_size); + MLX5_SET(mkc, mkc, umr_en, 1); + MLX5_SET(mkc, mkc, lw, 1); + MLX5_SET(mkc, mkc, lr, 1); + MLX5_SET(mkc, mkc, access_mode_1_0, access_mode); + + MLX5_SET(mkc, mkc, qpn, 0xffffff); + MLX5_SET(mkc, mkc, pd, mdev->mlx5e_res.hw_objs.pdn); + + err = mlx5_core_create_mkey(mdev, mkey, in, inlen); + + kvfree(in); + return err; +} + static int mlx5e_nvmeotcp_offload_limits(struct net_device *netdev, struct ulp_ddp_limits *limits) { + struct mlx5e_priv *priv = netdev_priv(netdev); + struct mlx5_core_dev *mdev = priv->mdev; + + if (limits->type != ULP_DDP_NVME) + return -EOPNOTSUPP; + + limits->max_ddp_sgl_len = mlx5e_get_max_sgl(mdev); + limits->io_threshold = MLX5E_NVMEOTCP_IO_THRESHOLD; + limits->nvmeotcp.full_ccid_range = MLX5E_NVMEOTCP_FULL_CCID_RANGE; return 0; } +static int mlx5e_nvmeotcp_queue_handler_poll(struct napi_struct *napi, int budget) +{ + struct mlx5e_nvmeotcp_queue_handler *qh; + int work_done; + + qh = container_of(napi, struct mlx5e_nvmeotcp_queue_handler, napi); + + work_done = mlx5e_poll_ico_cq(qh->cq, budget); + + if (work_done == budget || !napi_complete_done(napi, work_done)) + goto out; + + mlx5e_cq_arm(qh->cq); + +out: + return work_done; +} + +static void +mlx5e_nvmeotcp_destroy_icosq(struct mlx5e_icosq *sq) +{ + mlx5e_close_icosq(sq); + mlx5e_close_cq(&sq->cq); +} + +static void mlx5e_nvmeotcp_icosq_err_cqe_work(struct work_struct *recover_work) +{ + struct mlx5e_icosq *sq = container_of(recover_work, struct mlx5e_icosq, recover_work); + + /* Not implemented yet. */ + + netdev_warn(sq->channel->netdev, "nvmeotcp icosq recovery is not implemented\n"); +} + +static int +mlx5e_nvmeotcp_build_icosq(struct mlx5e_nvmeotcp_queue *queue, struct mlx5e_priv *priv, int io_cpu) +{ + u16 max_sgl, max_klm_per_wqe, max_umr_per_ccid, sgl_rest, wqebbs_rest; + struct mlx5e_channel *c = priv->channels.c[queue->channel_ix]; + struct mlx5e_sq_param icosq_param = {}; + struct mlx5e_create_cq_param ccp = {}; + struct dim_cq_moder icocq_moder = {}; + struct mlx5e_icosq *icosq; + int err = -ENOMEM; + u16 log_icosq_sz; + u32 max_wqebbs; + + icosq = &queue->sq; + max_sgl = mlx5e_get_max_sgl(priv->mdev); + max_klm_per_wqe = queue->max_klms_per_wqe; + max_umr_per_ccid = max_sgl / max_klm_per_wqe; + sgl_rest = max_sgl % max_klm_per_wqe; + wqebbs_rest = sgl_rest ? MLX5E_KLM_UMR_WQEBBS(sgl_rest) : 0; + max_wqebbs = (MLX5E_KLM_UMR_WQEBBS(max_klm_per_wqe) * + max_umr_per_ccid + wqebbs_rest) * queue->size; + log_icosq_sz = order_base_2(max_wqebbs); + + mlx5e_build_icosq_param(priv->mdev, log_icosq_sz, &icosq_param); + ccp.napi = &queue->qh.napi; + ccp.ch_stats = &priv->channel_stats[queue->channel_ix]->ch; + ccp.node = cpu_to_node(io_cpu); + ccp.ix = queue->channel_ix; + + err = mlx5e_open_cq(priv, icocq_moder, &icosq_param.cqp, &ccp, &icosq->cq); + if (err) + goto err_nvmeotcp_sq; + err = mlx5e_open_icosq(c, &priv->channels.params, &icosq_param, icosq, + mlx5e_nvmeotcp_icosq_err_cqe_work); + if (err) + goto close_cq; + + spin_lock_init(&queue->sq_lock); + return 0; + +close_cq: + mlx5e_close_cq(&icosq->cq); +err_nvmeotcp_sq: + return err; +} + +static void +mlx5e_nvmeotcp_destroy_rx(struct mlx5e_priv *priv, struct mlx5e_nvmeotcp_queue *queue, + struct mlx5_core_dev *mdev) +{ + int i; + + mlx5e_accel_fs_del_sk(queue->fh); + + for (i = 0; i < queue->size; i++) + mlx5_core_destroy_mkey(mdev, queue->ccid_table[i].klm_mkey); + + mlx5e_tir_destroy(&queue->tir); + mlx5_destroy_nvmeotcp_tag_buf_table(mdev, queue->tag_buf_table_id); + + mlx5e_deactivate_icosq(&queue->sq); + napi_disable(&queue->qh.napi); + mlx5e_nvmeotcp_destroy_icosq(&queue->sq); + netif_napi_del(&queue->qh.napi); +} + +static int +mlx5e_nvmeotcp_queue_rx_init(struct mlx5e_nvmeotcp_queue *queue, + struct nvme_tcp_ddp_config *config, + struct net_device *netdev) +{ + u8 log_queue_size = order_base_2(config->queue_size); + struct mlx5e_priv *priv = netdev_priv(netdev); + struct mlx5_core_dev *mdev = priv->mdev; + struct sock *sk = queue->sk; + int err, max_sgls, i; + + if (config->queue_size > + BIT(MLX5_CAP_DEV_NVMEOTCP(mdev, log_max_nvmeotcp_tag_buffer_size))) + return -EINVAL; + + err = mlx5e_create_nvmeotcp_tag_buf_table(mdev, queue, log_queue_size); + if (err) + return err; + + queue->qh.cq = &queue->sq.cq; + netif_napi_add(priv->netdev, &queue->qh.napi, mlx5e_nvmeotcp_queue_handler_poll); + + mutex_lock(&priv->state_lock); + err = mlx5e_nvmeotcp_build_icosq(queue, priv, config->io_cpu); + mutex_unlock(&priv->state_lock); + if (err) + goto del_napi; + + napi_enable(&queue->qh.napi); + mlx5e_activate_icosq(&queue->sq); + + /* initializes queue->tir */ + err = mlx5e_rx_res_nvmeotcp_tir_create(priv->rx_res, queue->channel_ix, queue->crc_rx, + queue->tag_buf_table_id, &queue->tir); + if (err) + goto destroy_icosq; + + mlx5e_nvmeotcp_rx_post_static_params_wqe(queue, 0); + mlx5e_nvmeotcp_rx_post_progress_params_wqe(queue, tcp_sk(sk)->copied_seq); + + queue->ccid_table = kcalloc(queue->size, sizeof(struct mlx5e_nvmeotcp_queue_entry), + GFP_KERNEL); + if (!queue->ccid_table) { + err = -ENOMEM; + goto destroy_tir; + } + + max_sgls = mlx5e_get_max_sgl(mdev); + for (i = 0; i < queue->size; i++) { + err = mlx5e_create_nvmeotcp_mkey(mdev, MLX5_MKC_ACCESS_MODE_KLMS, max_sgls, + &queue->ccid_table[i].klm_mkey); + if (err) + goto free_ccid_table; + } + + mlx5e_nvmeotcp_post_klm_wqe(queue, BSF_KLM_UMR, 0, queue->size); + + if (!(WARN_ON(!wait_for_completion_timeout(&queue->static_params_done, + msecs_to_jiffies(3000))))) + queue->fh = mlx5e_accel_fs_add_sk(priv->fs, sk, mlx5e_tir_get_tirn(&queue->tir), + queue->id); + + if (IS_ERR_OR_NULL(queue->fh)) { + err = -EINVAL; + goto destroy_mkeys; + } + + return 0; + +destroy_mkeys: + while ((i--)) + mlx5_core_destroy_mkey(mdev, queue->ccid_table[i].klm_mkey); +free_ccid_table: + kfree(queue->ccid_table); +destroy_tir: + mlx5e_tir_destroy(&queue->tir); +destroy_icosq: + mlx5e_deactivate_icosq(&queue->sq); + napi_disable(&queue->qh.napi); + mlx5e_nvmeotcp_destroy_icosq(&queue->sq); +del_napi: + netif_napi_del(&queue->qh.napi); + mlx5_destroy_nvmeotcp_tag_buf_table(mdev, queue->tag_buf_table_id); + + return err; +} + static int mlx5e_nvmeotcp_queue_init(struct net_device *netdev, struct sock *sk, struct ulp_ddp_config *tconfig) { + struct nvme_tcp_ddp_config *config = &tconfig->nvmeotcp; + struct mlx5e_priv *priv = netdev_priv(netdev); + struct mlx5_core_dev *mdev = priv->mdev; + struct mlx5e_nvmeotcp_queue *queue; + int queue_id, err; + + if (tconfig->type != ULP_DDP_NVME) { + err = -EOPNOTSUPP; + goto out; + } + + queue = kzalloc(sizeof(*queue), GFP_KERNEL); + if (!queue) { + err = -ENOMEM; + goto out; + } + + queue_id = ida_simple_get(&priv->nvmeotcp->queue_ids, + MIN_NUM_NVMEOTCP_QUEUES, MAX_NUM_NVMEOTCP_QUEUES, + GFP_KERNEL); + if (queue_id < 0) { + err = -ENOSPC; + goto free_queue; + } + + queue->crc_rx = !!(config->dgst & NVME_TCP_DATA_DIGEST_ENABLE); + queue->ulp_ddp_ctx.type = ULP_DDP_NVME; + queue->sk = sk; + queue->id = queue_id; + queue->dgst = config->dgst; + queue->pda = config->cpda; + queue->channel_ix = mlx5e_get_channel_ix_from_io_cpu(&priv->channels.params, + config->io_cpu); + queue->size = config->queue_size; + queue->max_klms_per_wqe = MLX5E_MAX_KLM_PER_WQE(mdev); + queue->priv = priv; + init_completion(&queue->static_params_done); + + err = mlx5e_nvmeotcp_queue_rx_init(queue, config, netdev); + if (err) + goto remove_queue_id; + + err = rhashtable_insert_fast(&priv->nvmeotcp->queue_hash, &queue->hash, + rhash_queues); + if (err) + goto destroy_rx; + + write_lock_bh(&sk->sk_callback_lock); + ulp_ddp_set_ctx(sk, queue); + write_unlock_bh(&sk->sk_callback_lock); + refcount_set(&queue->ref_count, 1); return 0; + +destroy_rx: + mlx5e_nvmeotcp_destroy_rx(priv, queue, mdev); +remove_queue_id: + ida_simple_remove(&priv->nvmeotcp->queue_ids, queue_id); +free_queue: + kfree(queue); +out: + return err; } static void mlx5e_nvmeotcp_queue_teardown(struct net_device *netdev, struct sock *sk) { + struct mlx5e_priv *priv = netdev_priv(netdev); + struct mlx5_core_dev *mdev = priv->mdev; + struct mlx5e_nvmeotcp_queue *queue; + + queue = container_of(ulp_ddp_get_ctx(sk), struct mlx5e_nvmeotcp_queue, ulp_ddp_ctx); + + WARN_ON(refcount_read(&queue->ref_count) != 1); + mlx5e_nvmeotcp_destroy_rx(priv, queue, mdev); + + rhashtable_remove_fast(&priv->nvmeotcp->queue_hash, &queue->hash, + rhash_queues); + ida_simple_remove(&priv->nvmeotcp->queue_ids, queue->id); + write_lock_bh(&sk->sk_callback_lock); + ulp_ddp_set_ctx(sk, NULL); + write_unlock_bh(&sk->sk_callback_lock); + mlx5e_nvmeotcp_put_queue(queue); } static int @@ -171,6 +698,13 @@ mlx5e_nvmeotcp_ddp_setup(struct net_device *netdev, return 0; } +void mlx5e_nvmeotcp_ctx_complete(struct mlx5e_icosq_wqe_info *wi) +{ + struct mlx5e_nvmeotcp_queue *queue = wi->nvmeotcp_q.queue; + + complete(&queue->static_params_done); +} + static void mlx5e_nvmeotcp_ddp_teardown(struct net_device *netdev, struct sock *sk, @@ -194,6 +728,26 @@ const struct ulp_ddp_dev_ops mlx5e_nvmeotcp_ops = { .resync = mlx5e_nvmeotcp_ddp_resync, }; +struct mlx5e_nvmeotcp_queue * +mlx5e_nvmeotcp_get_queue(struct mlx5e_nvmeotcp *nvmeotcp, int id) +{ + struct mlx5e_nvmeotcp_queue *queue; + + queue = rhashtable_lookup_fast(&nvmeotcp->queue_hash, + &id, rhash_queues); + if (!IS_ERR_OR_NULL(queue)) + refcount_inc(&queue->ref_count); + return queue; +} + +void mlx5e_nvmeotcp_put_queue(struct mlx5e_nvmeotcp_queue *queue) +{ + if (refcount_dec_and_test(&queue->ref_count)) { + kfree(queue->ccid_table); + kfree(queue); + } +} + int set_ulp_ddp_nvme_tcp(struct net_device *netdev, bool enable) { struct mlx5e_priv *priv = netdev_priv(netdev); diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.h b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.h index a665b7a72bc2..555f3ed7e2e2 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.h @@ -106,6 +106,10 @@ void mlx5e_nvmeotcp_build_netdev(struct mlx5e_priv *priv); int mlx5e_nvmeotcp_init(struct mlx5e_priv *priv); int set_ulp_ddp_nvme_tcp(struct net_device *netdev, bool enable); void mlx5e_nvmeotcp_cleanup(struct mlx5e_priv *priv); +struct mlx5e_nvmeotcp_queue * +mlx5e_nvmeotcp_get_queue(struct mlx5e_nvmeotcp *nvmeotcp, int id); +void mlx5e_nvmeotcp_put_queue(struct mlx5e_nvmeotcp_queue *queue); +void mlx5e_nvmeotcp_ctx_complete(struct mlx5e_icosq_wqe_info *wi); static inline void mlx5e_nvmeotcp_init_rx(struct mlx5e_priv *priv) {} void mlx5e_nvmeotcp_cleanup_rx(struct mlx5e_priv *priv); extern const struct ulp_ddp_dev_ops mlx5e_nvmeotcp_ops; diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp_utils.h b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp_utils.h index 6ef92679c5d0..fdb194c30e3b 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp_utils.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp_utils.h @@ -4,6 +4,35 @@ #define __MLX5E_NVMEOTCP_UTILS_H__ #include "en.h" +#include "en_accel/nvmeotcp.h" +#include "en_accel/common_utils.h" + +enum { + MLX5E_NVMEOTCP_PROGRESS_PARAMS_PDU_TRACKER_STATE_START = 0, + MLX5E_NVMEOTCP_PROGRESS_PARAMS_PDU_TRACKER_STATE_TRACKING = 1, + MLX5E_NVMEOTCP_PROGRESS_PARAMS_PDU_TRACKER_STATE_SEARCHING = 2, +}; + +struct mlx5_seg_nvmeotcp_progress_params { + __be32 tir_num; + u8 ctx[MLX5_ST_SZ_BYTES(nvmeotcp_progress_params)]; +}; + +struct mlx5e_set_nvmeotcp_progress_params_wqe { + struct mlx5_wqe_ctrl_seg ctrl; + struct mlx5_seg_nvmeotcp_progress_params params; +}; + +/* macros for wqe handling */ +#define MLX5E_NVMEOTCP_PROGRESS_PARAMS_WQE_SZ \ + (sizeof(struct mlx5e_set_nvmeotcp_progress_params_wqe)) + +#define MLX5E_NVMEOTCP_PROGRESS_PARAMS_WQEBBS \ + (DIV_ROUND_UP(MLX5E_NVMEOTCP_PROGRESS_PARAMS_WQE_SZ, MLX5_SEND_WQE_BB)) + +#define MLX5E_NVMEOTCP_FETCH_PROGRESS_PARAMS_WQE(sq, pi) \ + ((struct mlx5e_set_nvmeotcp_progress_params_wqe *)\ + mlx5e_fetch_wqe(&(sq)->wq, pi, sizeof(struct mlx5e_set_nvmeotcp_progress_params_wqe))) #define MLX5E_NVMEOTCP_FETCH_KLM_WQE(sq, pi) \ ((struct mlx5e_umr_wqe *)\ @@ -14,6 +43,9 @@ #define MLX5_CTRL_SEGMENT_OPC_MOD_UMR_TIR_PARAMS 0x2 #define MLX5_CTRL_SEGMENT_OPC_MOD_UMR_UMR 0x0 +#define PROGRESS_PARAMS_DS_CNT \ + DIV_ROUND_UP(MLX5E_NVMEOTCP_PROGRESS_PARAMS_WQE_SZ, MLX5_SEND_WQE_DS) + enum wqe_type { KLM_UMR, BSF_KLM_UMR, @@ -22,4 +54,13 @@ enum wqe_type { KLM_INV_UMR, }; +void +build_nvmeotcp_progress_params(struct mlx5e_nvmeotcp_queue *queue, + struct mlx5e_set_nvmeotcp_progress_params_wqe *wqe, u32 seq); + +void +build_nvmeotcp_static_params(struct mlx5e_nvmeotcp_queue *queue, + struct mlx5e_set_transport_static_params_wqe *wqe, + u32 resync_seq, bool crc_rx); + #endif /* __MLX5E_NVMEOTCP_UTILS_H__ */ diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c index 55071a454db4..1a681885ec47 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c @@ -1740,9 +1740,9 @@ void mlx5e_tx_err_cqe_work(struct work_struct *recover_work) mlx5e_reporter_tx_err_cqe(sq); } -static int mlx5e_open_icosq(struct mlx5e_channel *c, struct mlx5e_params *params, - struct mlx5e_sq_param *param, struct mlx5e_icosq *sq, - work_func_t recover_work_func) +int mlx5e_open_icosq(struct mlx5e_channel *c, struct mlx5e_params *params, + struct mlx5e_sq_param *param, struct mlx5e_icosq *sq, + work_func_t recover_work_func) { struct mlx5e_create_sq_param csp = {}; int err; @@ -1786,7 +1786,7 @@ void mlx5e_deactivate_icosq(struct mlx5e_icosq *icosq) synchronize_net(); /* Sync with NAPI. */ } -static void mlx5e_close_icosq(struct mlx5e_icosq *sq) +void mlx5e_close_icosq(struct mlx5e_icosq *sq) { if (sq->ktls_resync) mlx5e_ktls_rx_resync_destroy_resp_list(sq->ktls_resync); diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c index 02aa16f5eb57..3ae2b35155a8 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c @@ -53,6 +53,7 @@ #include "en_accel/macsec.h" #include "en_accel/ipsec_rxtx.h" #include "en_accel/ktls_txrx.h" +#include "en_accel/nvmeotcp.h" #include "en/xdp.h" #include "en/xsk/rx.h" #include "en/health.h" @@ -880,16 +881,23 @@ void mlx5e_free_icosq_descs(struct mlx5e_icosq *sq) ci = mlx5_wq_cyc_ctr2ix(&sq->wq, sqcc); wi = &sq->db.wqe_info[ci]; sqcc += wi->num_wqebbs; -#ifdef CONFIG_MLX5_EN_TLS switch (wi->wqe_type) { +#ifdef CONFIG_MLX5_EN_TLS case MLX5E_ICOSQ_WQE_SET_PSV_TLS: mlx5e_ktls_handle_ctx_completion(wi); break; case MLX5E_ICOSQ_WQE_GET_PSV_TLS: mlx5e_ktls_handle_get_psv_completion(wi, sq); break; - } #endif +#ifdef CONFIG_MLX5_EN_NVMEOTCP + case MLX5E_ICOSQ_WQE_SET_PSV_NVMEOTCP: + mlx5e_nvmeotcp_ctx_complete(wi); + break; +#endif + default: + break; + } } sq->cc = sqcc; } @@ -988,6 +996,9 @@ int mlx5e_poll_ico_cq(struct mlx5e_cq *cq, int budget) #ifdef CONFIG_MLX5_EN_NVMEOTCP case MLX5E_ICOSQ_WQE_UMR_NVMEOTCP: break; + case MLX5E_ICOSQ_WQE_SET_PSV_NVMEOTCP: + mlx5e_nvmeotcp_ctx_complete(wi); + break; #endif default: netdev_WARN_ONCE(cq->netdev, From patchwork Tue Jan 17 15:35:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Aptel X-Patchwork-Id: 13104828 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2CD2DC6379F for ; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: t/jy7QjCwmTTgUzCU6jkv6qWhAJIFgS4wwNQL1ZSf1bpetT1ZeDTk1YlzQqS55QdUmQkVcC8B5tJPcKN3oSR20MQIR6ih29HV41W/1utrEkgwyEr/tGE6bfjbF0H37jfVcfEqM2eQP6J41RaHDM84THxF3lmwWfBZR+HezP6z4tRkoq3sbyT7NOFXHRQ59DEPyYKFjqtkXtdK1Dv+va6MKTjfbKJ8EZ/iVC0VxqaA/61+GtQekrxX4CP7/UX4FhAasTRssizjz46GWO3VlgO2bj3Pb2RR5a4zk/IOSfvmEL8lySJKqTnW45TRyaklkWyinDmukN38uIxeZi/ExMPOZQjB0CWsT8v6l6LNCXRmW4Hat64GgfBgPBO2N3KoI3pE4Dv9iawkGoSdujbuYmfjdO2qvHVlzlE57IwFSUn6Ls0736sGRloJW+ISN6Q+1lC7ezONDrgQ7I2JMw2ejN5zwFsGGOAM2gh44evponMeqqQY/VPA7fNH/O7FxWUMKrYyiezjap2bpoS6nlVfrJNvryTSbu3P10XqnHT3zBs7sqVvJHKs7QJbP2WlpVxPEeSykJEIhotrgCg6sluzaRiItcvoWk9VFt9yya2Qb+ol+W5LllIC2JB667EStSj+pnb4WILe9C4h6cP6pNNaS/DOL8D51TdIwESqhsRouQZmssLGHdCEIE+3GzKS9U9hDF4TWHbuCShlpfe+4voRiLOsEHvZlWGoYNTxKhEMU9bnkkOR5w+vXTrY53A/R8CIGYMnNHdfPdnkna+/F3A9sV45Aicwys1SLbja0XADev2O4CGLAe/wc/qH+wBixDvUYqt/3X0oR6lWwfYN0GfDMf2ZV+CUNsL3VQldTcF/di5R6wKDlPM6iNc/8vvvqfdagGxUcHV8d6M+R9B0jy5zg/Rk+2VRUG0vOk6LyivSvcsYyWR6Y057Azhfniyq1BO8cgbPmqQsyzxvnnzCOcx5t/jPQL780T9xgBF3QYDQ4JVliv70Q/DZIDssRWQdJSXbo7lAnCJoiN2cNi9pljlFUw84DLEU6Gd3bJ0W0wkQp7MOQW884omXLF9dW18dFxpytu8n3nY2kd5ybrMOQu1HnMWc4GkKbIhLblmL+JDmOIdzwt/3hOJEftmKBg3at3eBUXRsZHi842MEbABzSNbY8+owLSWPHhn68JIfIehZ09/h1GJ/bRLhGBSwAYZwgaYBMzpTsgAJzQK0QYc+6bdHNG4AUK66uI8jWzYDPD4VxGrmM2It1zBN8EYg/T0ypSsinffUf+FFcDFc+3+/z4IMkKI2Gu9mFjIEKm2kHt2CvqQZdOpazGf0HsJlTt+tEBvqkRdZS8C2Rvih9Haxk1CyZFAvKg6uYa4ovOOCH+EtYVyn0VrdxBEhADvqJ8jZVgjO12ywKSu8q+EcrKHPWH3aHVfUKQeFlFzlDpBNLVFf7X30KI8lSLHwplTiWzjo5Ujfg+EkUlW9T0WGbakYF/UqN+p86vaSDgue6ct/tKIeXYd9ezxLiT05sBPSK5b2RP0NWUriYj07pnD3r8H/12H4lDi7/s082NZtNdjbWTglcAxvG6Qv1KBe7kWeqxXVLsrYQcu X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: c147b010-1b85-4673-e52d-08daf8a0dab8 X-MS-Exchange-CrossTenant-AuthSource: SJ1PR12MB6075.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jan 2023 15:38:17.6071 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: CRYs2IPJzCcjAdq385o/qxIy19TJQGPiGgRDtFZ8NgWFKPnd8eRjJhf1YnJDdr0Puveiok+bJWvOl6Gbp1h0BQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL0PR12MB4914 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org From: Ben Ben-Ishay NVMEoTCP offload uses buffer registration for every NVME request to perform direct data placement. This is achieved by creating a NIC HW mapping between the CCID (command capsule ID) to the set of buffers that compose the request. The registration is implemented via MKEY for which we do fast/async mapping using KLM UMR WQE. The buffer registration takes place when the ULP calls the ddp_setup op which is done before they send their corresponding request to the other side (e.g nvmf target). We don't wait for the completion of the registration before returning back to the ulp. The reason being that the HW mapping should be in place fast enough vs the RTT it would take for the request to be responded. If this doesn't happen, some IO may not be ddp-offloaded, but that doesn't stop the overall offloading session. When the offloading HW gets out of sync with the protocol session, a hardware/software handshake takes place to resync. The ddp_resync op is the part of the handshake where the SW confirms to the HW that a indeed they identified correctly a PDU header at a certain TCP sequence number. This allows the HW to resume the offload. The 1st part of the handshake is when the HW identifies such sequence number in an arriving packet. A special mark is made on the completion (cqe) and then the mlx5 driver invokes the ddp resync_request callback advertised by the ULP in the ddp context - this is in downstream patch. Signed-off-by: Ben Ben-Ishay Signed-off-by: Boris Pismenny Signed-off-by: Or Gerlitz Signed-off-by: Yoray Zack Signed-off-by: Aurelien Aptel Reviewed-by: Tariq Toukan --- .../mellanox/mlx5/core/en_accel/nvmeotcp.c | 146 +++++++++++++++++- 1 file changed, 144 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c index 6ab46497e1dc..7c7be7cb9701 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c @@ -682,19 +682,156 @@ mlx5e_nvmeotcp_queue_teardown(struct net_device *netdev, mlx5e_nvmeotcp_put_queue(queue); } +static bool +mlx5e_nvmeotcp_validate_small_sgl_suffix(struct scatterlist *sg, int sg_len, int mtu) +{ + int i, hole_size, hole_len, chunk_size = 0; + + for (i = 1; i < sg_len; i++) + chunk_size += sg_dma_len(&sg[i]); + + if (chunk_size >= mtu) + return true; + + hole_size = mtu - chunk_size - 1; + hole_len = DIV_ROUND_UP(hole_size, PAGE_SIZE); + + if (sg_len + hole_len > MAX_SKB_FRAGS) + return false; + + return true; +} + +static bool +mlx5e_nvmeotcp_validate_big_sgl_suffix(struct scatterlist *sg, int sg_len, int mtu) +{ + int i, j, last_elem, window_idx, window_size = MAX_SKB_FRAGS - 1; + int chunk_size = 0; + + last_elem = sg_len - window_size; + window_idx = window_size; + + for (j = 1; j < window_size; j++) + chunk_size += sg_dma_len(&sg[j]); + + for (i = 1; i <= last_elem; i++, window_idx++) { + chunk_size += sg_dma_len(&sg[window_idx]); + if (chunk_size < mtu - 1) + return false; + + chunk_size -= sg_dma_len(&sg[i]); + } + + return true; +} + +/* This function makes sure that the middle/suffix of a PDU SGL meets the + * restriction of MAX_SKB_FRAGS. There are two cases here: + * 1. sg_len < MAX_SKB_FRAGS - the extreme case here is a packet that consists + * of one byte from the first SG element + the rest of the SGL and the remaining + * space of the packet will be scattered to the WQE and will be pointed by + * SKB frags. + * 2. sg_len => MAX_SKB_FRAGS - the extreme case here is a packet that consists + * of one byte from middle SG element + 15 continuous SG elements + one byte + * from a sequential SG element or the rest of the packet. + */ +static bool +mlx5e_nvmeotcp_validate_sgl_suffix(struct scatterlist *sg, int sg_len, int mtu) +{ + int ret; + + if (sg_len < MAX_SKB_FRAGS) + ret = mlx5e_nvmeotcp_validate_small_sgl_suffix(sg, sg_len, mtu); + else + ret = mlx5e_nvmeotcp_validate_big_sgl_suffix(sg, sg_len, mtu); + + return ret; +} + +static bool +mlx5e_nvmeotcp_validate_sgl_prefix(struct scatterlist *sg, int sg_len, int mtu) +{ + int i, hole_size, hole_len, tmp_len, chunk_size = 0; + + tmp_len = min_t(int, sg_len, MAX_SKB_FRAGS); + + for (i = 0; i < tmp_len; i++) + chunk_size += sg_dma_len(&sg[i]); + + if (chunk_size >= mtu) + return true; + + hole_size = mtu - chunk_size; + hole_len = DIV_ROUND_UP(hole_size, PAGE_SIZE); + + if (tmp_len + hole_len > MAX_SKB_FRAGS) + return false; + + return true; +} + +/* This function is responsible to ensure that a PDU could be offloaded. + * PDU is offloaded by building a non-linear SKB such that each SGL element is + * placed in frag, thus this function should ensure that all packets that + * represent part of the PDU won't exaggerate from MAX_SKB_FRAGS SGL. + * In addition NVMEoTCP offload has one PDU offload for packet restriction. + * Packet could start with a new PDU and then we should check that the prefix + * of the PDU meets the requirement or a packet can start in the middle of SG + * element and then we should check that the suffix of PDU meets the requirement. + */ +static bool +mlx5e_nvmeotcp_validate_sgl(struct scatterlist *sg, int sg_len, int mtu) +{ + int max_hole_frags; + + max_hole_frags = DIV_ROUND_UP(mtu, PAGE_SIZE); + if (sg_len + max_hole_frags <= MAX_SKB_FRAGS) + return true; + + if (!mlx5e_nvmeotcp_validate_sgl_prefix(sg, sg_len, mtu) || + !mlx5e_nvmeotcp_validate_sgl_suffix(sg, sg_len, mtu)) + return false; + + return true; +} + static int mlx5e_nvmeotcp_ddp_setup(struct net_device *netdev, struct sock *sk, struct ulp_ddp_io *ddp) { + struct scatterlist *sg = ddp->sg_table.sgl; + struct mlx5e_nvmeotcp_queue_entry *nvqt; struct mlx5e_nvmeotcp_queue *queue; + struct mlx5_core_dev *mdev; + int i, size = 0, count = 0; queue = container_of(ulp_ddp_get_ctx(sk), struct mlx5e_nvmeotcp_queue, ulp_ddp_ctx); + mdev = queue->priv->mdev; + count = dma_map_sg(mdev->device, ddp->sg_table.sgl, ddp->nents, + DMA_FROM_DEVICE); + + if (count <= 0) + return -EINVAL; - /* Placeholder - map_sg and initializing the count */ + if (WARN_ON(count > mlx5e_get_max_sgl(mdev))) + return -ENOSPC; + + if (!mlx5e_nvmeotcp_validate_sgl(sg, count, READ_ONCE(netdev->mtu))) + return -EOPNOTSUPP; + + for (i = 0; i < count; i++) + size += sg_dma_len(&sg[i]); + + nvqt = &queue->ccid_table[ddp->command_id]; + nvqt->size = size; + nvqt->ddp = ddp; + nvqt->sgl = sg; + nvqt->ccid_gen++; + nvqt->sgl_length = count; + mlx5e_nvmeotcp_post_klm_wqe(queue, KLM_UMR, ddp->command_id, count); - mlx5e_nvmeotcp_post_klm_wqe(queue, KLM_UMR, ddp->command_id, 0); return 0; } @@ -717,6 +854,11 @@ static void mlx5e_nvmeotcp_ddp_resync(struct net_device *netdev, struct sock *sk, u32 seq) { + struct mlx5e_nvmeotcp_queue *queue = + container_of(ulp_ddp_get_ctx(sk), struct mlx5e_nvmeotcp_queue, ulp_ddp_ctx); + + queue->after_resync_cqe = 1; + mlx5e_nvmeotcp_rx_post_static_params_wqe(queue, seq); } const struct ulp_ddp_dev_ops mlx5e_nvmeotcp_ops = { From patchwork Tue Jan 17 15:35:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Aptel X-Patchwork-Id: 13104829 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F1B05C3DA78 for ; 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We do a fast/async un-mapping via UMR WQE. In this case, the ULP does holds off with completing the request towards the upper/application layers until the HW unmapping is done. When the corresponding CQE is received, a notification is done via the the teardown_done ddp callback advertised by the ULP in the ddp context. Signed-off-by: Ben Ben-Ishay Signed-off-by: Boris Pismenny Signed-off-by: Or Gerlitz Signed-off-by: Yoray Zack Signed-off-by: Aurelien Aptel Reviewed-by: Tariq Toukan --- .../net/ethernet/mellanox/mlx5/core/en/txrx.h | 4 ++ .../mellanox/mlx5/core/en_accel/nvmeotcp.c | 66 ++++++++++++++++--- .../mellanox/mlx5/core/en_accel/nvmeotcp.h | 1 + .../net/ethernet/mellanox/mlx5/core/en_rx.c | 6 ++ 4 files changed, 67 insertions(+), 10 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h b/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h index 971265280e55..c6952ff4c7ca 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h @@ -52,6 +52,7 @@ enum mlx5e_icosq_wqe_type { #endif #ifdef CONFIG_MLX5_EN_NVMEOTCP MLX5E_ICOSQ_WQE_UMR_NVMEOTCP, + MLX5E_ICOSQ_WQE_UMR_NVMEOTCP_INVALIDATE, MLX5E_ICOSQ_WQE_SET_PSV_NVMEOTCP, #endif }; @@ -212,6 +213,9 @@ struct mlx5e_icosq_wqe_info { struct { struct mlx5e_nvmeotcp_queue *queue; } nvmeotcp_q; + struct { + struct mlx5e_nvmeotcp_queue_entry *entry; + } nvmeotcp_qe; #endif }; }; diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c index 7c7be7cb9701..47f3b53ed78e 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c @@ -142,10 +142,11 @@ build_nvmeotcp_klm_umr(struct mlx5e_nvmeotcp_queue *queue, struct mlx5e_umr_wqe u16 ccid, int klm_entries, u32 klm_offset, u32 len, enum wqe_type klm_type) { - u32 id = (klm_type == KLM_UMR) ? queue->ccid_table[ccid].klm_mkey : - (mlx5e_tir_get_tirn(&queue->tir) << MLX5_WQE_CTRL_TIR_TIS_INDEX_SHIFT); - u8 opc_mod = (klm_type == KLM_UMR) ? MLX5_CTRL_SEGMENT_OPC_MOD_UMR_UMR : - MLX5_OPC_MOD_TRANSPORT_TIR_STATIC_PARAMS; + u32 id = (klm_type == BSF_KLM_UMR) ? + (mlx5e_tir_get_tirn(&queue->tir) << MLX5_WQE_CTRL_TIR_TIS_INDEX_SHIFT) : + queue->ccid_table[ccid].klm_mkey; + u8 opc_mod = (klm_type == BSF_KLM_UMR) ? MLX5_OPC_MOD_TRANSPORT_TIR_STATIC_PARAMS : + MLX5_CTRL_SEGMENT_OPC_MOD_UMR_UMR; u32 ds_cnt = MLX5E_KLM_UMR_DS_CNT(ALIGN(klm_entries, MLX5_UMR_KLM_NUM_ENTRIES_ALIGNMENT)); struct mlx5_wqe_umr_ctrl_seg *ucseg = &wqe->uctrl; struct mlx5_wqe_ctrl_seg *cseg = &wqe->ctrl; @@ -158,6 +159,13 @@ build_nvmeotcp_klm_umr(struct mlx5e_nvmeotcp_queue *queue, struct mlx5e_umr_wqe cseg->qpn_ds = cpu_to_be32((sqn << MLX5_WQE_CTRL_QPN_SHIFT) | ds_cnt); cseg->general_id = cpu_to_be32(id); + if (!klm_entries) { /* this is invalidate */ + ucseg->mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_FREE); + ucseg->flags = MLX5_UMR_INLINE; + mkc->status = MLX5_MKEY_STATUS_FREE; + return; + } + if (klm_type == KLM_UMR && !klm_offset) { ucseg->mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_XLT_OCT_SIZE | MLX5_MKEY_MASK_LEN | MLX5_MKEY_MASK_FREE); @@ -259,8 +267,8 @@ build_nvmeotcp_static_params(struct mlx5e_nvmeotcp_queue *queue, static void mlx5e_nvmeotcp_fill_wi(struct mlx5e_nvmeotcp_queue *nvmeotcp_queue, - struct mlx5e_icosq *sq, u32 wqebbs, u16 pi, - enum wqe_type type) + struct mlx5e_icosq *sq, u32 wqebbs, + u16 pi, u16 ccid, enum wqe_type type) { struct mlx5e_icosq_wqe_info *wi = &sq->db.wqe_info[pi]; @@ -272,6 +280,10 @@ mlx5e_nvmeotcp_fill_wi(struct mlx5e_nvmeotcp_queue *nvmeotcp_queue, wi->wqe_type = MLX5E_ICOSQ_WQE_SET_PSV_NVMEOTCP; wi->nvmeotcp_q.queue = nvmeotcp_queue; break; + case KLM_INV_UMR: + wi->wqe_type = MLX5E_ICOSQ_WQE_UMR_NVMEOTCP_INVALIDATE; + wi->nvmeotcp_qe.entry = &nvmeotcp_queue->ccid_table[ccid]; + break; default: /* cases where no further action is required upon completion, such as ddp setup */ wi->wqe_type = MLX5E_ICOSQ_WQE_UMR_NVMEOTCP; @@ -290,7 +302,7 @@ mlx5e_nvmeotcp_rx_post_static_params_wqe(struct mlx5e_nvmeotcp_queue *queue, u32 wqebbs = MLX5E_TRANSPORT_SET_STATIC_PARAMS_WQEBBS; pi = mlx5e_icosq_get_next_pi(sq, wqebbs); wqe = MLX5E_TRANSPORT_FETCH_SET_STATIC_PARAMS_WQE(sq, pi); - mlx5e_nvmeotcp_fill_wi(NULL, sq, wqebbs, pi, BSF_UMR); + mlx5e_nvmeotcp_fill_wi(NULL, sq, wqebbs, pi, 0, BSF_UMR); build_nvmeotcp_static_params(queue, wqe, resync_seq, queue->crc_rx); sq->pc += wqebbs; mlx5e_notify_hw(&sq->wq, sq->pc, sq->uar_map, &wqe->ctrl); @@ -307,7 +319,7 @@ mlx5e_nvmeotcp_rx_post_progress_params_wqe(struct mlx5e_nvmeotcp_queue *queue, u wqebbs = MLX5E_NVMEOTCP_PROGRESS_PARAMS_WQEBBS; pi = mlx5e_icosq_get_next_pi(sq, wqebbs); wqe = MLX5E_NVMEOTCP_FETCH_PROGRESS_PARAMS_WQE(sq, pi); - mlx5e_nvmeotcp_fill_wi(queue, sq, wqebbs, pi, SET_PSV_UMR); + mlx5e_nvmeotcp_fill_wi(queue, sq, wqebbs, pi, 0, SET_PSV_UMR); build_nvmeotcp_progress_params(queue, wqe, seq); sq->pc += wqebbs; mlx5e_notify_hw(&sq->wq, sq->pc, sq->uar_map, &wqe->ctrl); @@ -330,7 +342,7 @@ post_klm_wqe(struct mlx5e_nvmeotcp_queue *queue, wqebbs = DIV_ROUND_UP(wqe_sz, MLX5_SEND_WQE_BB); pi = mlx5e_icosq_get_next_pi(sq, wqebbs); wqe = MLX5E_NVMEOTCP_FETCH_KLM_WQE(sq, pi); - mlx5e_nvmeotcp_fill_wi(queue, sq, wqebbs, pi, wqe_type); + mlx5e_nvmeotcp_fill_wi(queue, sq, wqebbs, pi, ccid, wqe_type); build_nvmeotcp_klm_umr(queue, wqe, ccid, cur_klm_entries, klm_offset, klm_length, wqe_type); sq->pc += wqebbs; @@ -345,7 +357,10 @@ mlx5e_nvmeotcp_post_klm_wqe(struct mlx5e_nvmeotcp_queue *queue, enum wqe_type wq struct mlx5e_icosq *sq = &queue->sq; u32 klm_offset = 0, wqes, i; - wqes = DIV_ROUND_UP(klm_length, queue->max_klms_per_wqe); + if (wqe_type == KLM_INV_UMR) + wqes = 1; + else + wqes = DIV_ROUND_UP(klm_length, queue->max_klms_per_wqe); spin_lock_bh(&queue->sq_lock); @@ -842,12 +857,43 @@ void mlx5e_nvmeotcp_ctx_complete(struct mlx5e_icosq_wqe_info *wi) complete(&queue->static_params_done); } +void mlx5e_nvmeotcp_ddp_inv_done(struct mlx5e_icosq_wqe_info *wi) +{ + struct mlx5e_nvmeotcp_queue_entry *q_entry = wi->nvmeotcp_qe.entry; + struct mlx5e_nvmeotcp_queue *queue = q_entry->queue; + struct mlx5_core_dev *mdev = queue->priv->mdev; + struct ulp_ddp_io *ddp = q_entry->ddp; + const struct ulp_ddp_ulp_ops *ulp_ops; + + dma_unmap_sg(mdev->device, ddp->sg_table.sgl, + q_entry->sgl_length, DMA_FROM_DEVICE); + + q_entry->sgl_length = 0; + + ulp_ops = inet_csk(queue->sk)->icsk_ulp_ddp_ops; + if (ulp_ops && ulp_ops->ddp_teardown_done) + ulp_ops->ddp_teardown_done(q_entry->ddp_ctx); +} + static void mlx5e_nvmeotcp_ddp_teardown(struct net_device *netdev, struct sock *sk, struct ulp_ddp_io *ddp, void *ddp_ctx) { + struct mlx5e_nvmeotcp_queue_entry *q_entry; + struct mlx5e_nvmeotcp_queue *queue; + + queue = container_of(ulp_ddp_get_ctx(sk), struct mlx5e_nvmeotcp_queue, ulp_ddp_ctx); + q_entry = &queue->ccid_table[ddp->command_id]; + WARN_ONCE(q_entry->sgl_length == 0, + "Invalidation of empty sgl (CID 0x%x, queue 0x%x)\n", + ddp->command_id, queue->id); + + q_entry->ddp_ctx = ddp_ctx; + q_entry->queue = queue; + + mlx5e_nvmeotcp_post_klm_wqe(queue, KLM_INV_UMR, ddp->command_id, 0); } static void diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.h b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.h index 555f3ed7e2e2..a5cfd9e31be7 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.h @@ -109,6 +109,7 @@ void mlx5e_nvmeotcp_cleanup(struct mlx5e_priv *priv); struct mlx5e_nvmeotcp_queue * mlx5e_nvmeotcp_get_queue(struct mlx5e_nvmeotcp *nvmeotcp, int id); void mlx5e_nvmeotcp_put_queue(struct mlx5e_nvmeotcp_queue *queue); +void mlx5e_nvmeotcp_ddp_inv_done(struct mlx5e_icosq_wqe_info *wi); void mlx5e_nvmeotcp_ctx_complete(struct mlx5e_icosq_wqe_info *wi); static inline void mlx5e_nvmeotcp_init_rx(struct mlx5e_priv *priv) {} void mlx5e_nvmeotcp_cleanup_rx(struct mlx5e_priv *priv); diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c index 3ae2b35155a8..9b9c3603a00b 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c @@ -891,6 +891,9 @@ void mlx5e_free_icosq_descs(struct mlx5e_icosq *sq) break; #endif #ifdef CONFIG_MLX5_EN_NVMEOTCP + case MLX5E_ICOSQ_WQE_UMR_NVMEOTCP_INVALIDATE: + mlx5e_nvmeotcp_ddp_inv_done(wi); + break; case MLX5E_ICOSQ_WQE_SET_PSV_NVMEOTCP: mlx5e_nvmeotcp_ctx_complete(wi); break; @@ -996,6 +999,9 @@ int mlx5e_poll_ico_cq(struct mlx5e_cq *cq, int budget) #ifdef CONFIG_MLX5_EN_NVMEOTCP case MLX5E_ICOSQ_WQE_UMR_NVMEOTCP: break; + case MLX5E_ICOSQ_WQE_UMR_NVMEOTCP_INVALIDATE: + mlx5e_nvmeotcp_ddp_inv_done(wi); + break; case MLX5E_ICOSQ_WQE_SET_PSV_NVMEOTCP: mlx5e_nvmeotcp_ctx_complete(wi); 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Tue, 17 Jan 2023 15:38:30 +0000 Received: from SJ1PR12MB6075.namprd12.prod.outlook.com ([fe80::6d66:a4bb:4018:3c70]) by SJ1PR12MB6075.namprd12.prod.outlook.com ([fe80::6d66:a4bb:4018:3c70%8]) with mapi id 15.20.6002.013; Tue, 17 Jan 2023 15:38:30 +0000 From: Aurelien Aptel To: linux-nvme@lists.infradead.org, netdev@vger.kernel.org, sagi@grimberg.me, hch@lst.de, kbusch@kernel.org, axboe@fb.com, chaitanyak@nvidia.com, davem@davemloft.net, kuba@kernel.org Cc: Ben Ben-Ishay , Aurelien Aptel , aurelien.aptel@gmail.com, smalin@nvidia.com, malin1024@gmail.com, ogerlitz@nvidia.com, yorayz@nvidia.com, borisp@nvidia.com Subject: [PATCH v9 24/25] net/mlx5e: NVMEoTCP, data-path for DDP+DDGST offload Date: Tue, 17 Jan 2023 17:35:34 +0200 Message-Id: <20230117153535.1945554-25-aaptel@nvidia.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20230117153535.1945554-1-aaptel@nvidia.com> References: <20230117153535.1945554-1-aaptel@nvidia.com> X-ClientProxiedBy: LO4P123CA0055.GBRP123.PROD.OUTLOOK.COM (2603:10a6:600:153::6) To SJ1PR12MB6075.namprd12.prod.outlook.com (2603:10b6:a03:45e::8) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PR12MB6075:EE_|MN0PR12MB5930:EE_ X-MS-Office365-Filtering-Correlation-Id: 7911d320-1967-412f-0d24-08daf8a0e1f6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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NVMEoTCP DDP constructs an SKB from each CQE, while pointing at NVME destination buffers. In turn, this enables the offload, as the NVMe-TCP layer will skip the copy when src == dst. Additionally, this patch adds support for DDGST (CRC32) offload. HW will report DDGST offload only if it has not encountered an error in the received packet. We pass this indication in skb->ulp_crc up the stack to NVMe-TCP to skip computing the DDGST if all corresponding SKBs were verified by HW. This patch also handles context resynchronization requests made by NIC HW. The resync request is passed to the NVMe-TCP layer to be handled at a later point in time. Finally, we also use the skb->ulp_ddp bit to avoid skb_condense. This is critical as every SKB that uses DDP has a hole that fits perfectly with skb_condense's policy, but filling this hole is counter-productive as the data there already resides in its destination buffer. This work has been done on pre-silicon functional simulator, and hence data-path performance numbers are not provided. Signed-off-by: Ben Ben-Ishay Signed-off-by: Boris Pismenny Signed-off-by: Or Gerlitz Signed-off-by: Yoray Zack Signed-off-by: Aurelien Aptel Reviewed-by: Tariq Toukan --- .../net/ethernet/mellanox/mlx5/core/Makefile | 2 +- drivers/net/ethernet/mellanox/mlx5/core/en.h | 1 + .../ethernet/mellanox/mlx5/core/en/xsk/rx.c | 1 + .../ethernet/mellanox/mlx5/core/en/xsk/rx.h | 1 + .../mlx5/core/en_accel/nvmeotcp_rxtx.c | 316 ++++++++++++++++++ .../mlx5/core/en_accel/nvmeotcp_rxtx.h | 37 ++ .../net/ethernet/mellanox/mlx5/core/en_rx.c | 51 ++- 7 files changed, 395 insertions(+), 14 deletions(-) create mode 100644 drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp_rxtx.c create mode 100644 drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp_rxtx.h diff --git a/drivers/net/ethernet/mellanox/mlx5/core/Makefile b/drivers/net/ethernet/mellanox/mlx5/core/Makefile index 9df9999047d1..9804bd086bf4 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/Makefile +++ b/drivers/net/ethernet/mellanox/mlx5/core/Makefile @@ -103,7 +103,7 @@ mlx5_core-$(CONFIG_MLX5_EN_TLS) += en_accel/ktls_stats.o \ en_accel/fs_tcp.o en_accel/ktls.o en_accel/ktls_txrx.o \ en_accel/ktls_tx.o en_accel/ktls_rx.o -mlx5_core-$(CONFIG_MLX5_EN_NVMEOTCP) += en_accel/fs_tcp.o en_accel/nvmeotcp.o +mlx5_core-$(CONFIG_MLX5_EN_NVMEOTCP) += en_accel/fs_tcp.o en_accel/nvmeotcp.o en_accel/nvmeotcp_rxtx.o mlx5_core-$(CONFIG_MLX5_SW_STEERING) += steering/dr_domain.o steering/dr_table.o \ steering/dr_matcher.o steering/dr_rule.o \ diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en.h b/drivers/net/ethernet/mellanox/mlx5/core/en.h index 61318af2c9e0..8f411b67cf1a 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en.h @@ -628,6 +628,7 @@ struct mlx5e_rq; typedef void (*mlx5e_fp_handle_rx_cqe)(struct mlx5e_rq*, struct mlx5_cqe64*); typedef struct sk_buff * (*mlx5e_fp_skb_from_cqe_mpwrq)(struct mlx5e_rq *rq, struct mlx5e_mpw_info *wi, + struct mlx5_cqe64 *cqe, u16 cqe_bcnt, u32 head_offset, u32 page_idx); typedef struct sk_buff * (*mlx5e_fp_skb_from_cqe)(struct mlx5e_rq *rq, struct mlx5e_wqe_frag_info *wi, diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/rx.c b/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/rx.c index c91b54d9ff27..03b416989bba 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/rx.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/rx.c @@ -229,6 +229,7 @@ static struct sk_buff *mlx5e_xsk_construct_skb(struct mlx5e_rq *rq, struct xdp_b struct sk_buff *mlx5e_xsk_skb_from_cqe_mpwrq_linear(struct mlx5e_rq *rq, struct mlx5e_mpw_info *wi, + struct mlx5_cqe64 *cqe, u16 cqe_bcnt, u32 head_offset, u32 page_idx) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/rx.h b/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/rx.h index 087c943bd8e9..22e972398d92 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/rx.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/rx.h @@ -13,6 +13,7 @@ int mlx5e_xsk_alloc_rx_wqes_batched(struct mlx5e_rq *rq, u16 ix, int wqe_bulk); int mlx5e_xsk_alloc_rx_wqes(struct mlx5e_rq *rq, u16 ix, int wqe_bulk); struct sk_buff *mlx5e_xsk_skb_from_cqe_mpwrq_linear(struct mlx5e_rq *rq, struct mlx5e_mpw_info *wi, + struct mlx5_cqe64 *cqe, u16 cqe_bcnt, u32 head_offset, u32 page_idx); diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp_rxtx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp_rxtx.c new file mode 100644 index 000000000000..4c7dab28ef56 --- /dev/null +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp_rxtx.c @@ -0,0 +1,316 @@ +// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB +// Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. + +#include "en_accel/nvmeotcp_rxtx.h" +#include + +#define MLX5E_TC_FLOW_ID_MASK 0x00ffffff +static void nvmeotcp_update_resync(struct mlx5e_nvmeotcp_queue *queue, + struct mlx5e_cqe128 *cqe128) +{ + const struct ulp_ddp_ulp_ops *ulp_ops; + u32 seq; + + seq = be32_to_cpu(cqe128->resync_tcp_sn); + ulp_ops = inet_csk(queue->sk)->icsk_ulp_ddp_ops; + if (ulp_ops && ulp_ops->resync_request) + ulp_ops->resync_request(queue->sk, seq, ULP_DDP_RESYNC_PENDING); +} + +static void mlx5e_nvmeotcp_advance_sgl_iter(struct mlx5e_nvmeotcp_queue *queue) +{ + struct mlx5e_nvmeotcp_queue_entry *nqe = &queue->ccid_table[queue->ccid]; + + queue->ccoff += nqe->sgl[queue->ccsglidx].length; + queue->ccoff_inner = 0; + queue->ccsglidx++; +} + +static inline void +mlx5e_nvmeotcp_add_skb_frag(struct net_device *netdev, struct sk_buff *skb, + struct mlx5e_nvmeotcp_queue *queue, + struct mlx5e_nvmeotcp_queue_entry *nqe, u32 fragsz) +{ + dma_sync_single_for_cpu(&netdev->dev, + nqe->sgl[queue->ccsglidx].offset + queue->ccoff_inner, + fragsz, DMA_FROM_DEVICE); + page_ref_inc(compound_head(sg_page(&nqe->sgl[queue->ccsglidx]))); + skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, + sg_page(&nqe->sgl[queue->ccsglidx]), + nqe->sgl[queue->ccsglidx].offset + queue->ccoff_inner, + fragsz, + fragsz); +} + +static inline void +mlx5_nvmeotcp_add_tail_nonlinear(struct mlx5e_nvmeotcp_queue *queue, + struct sk_buff *skb, skb_frag_t *org_frags, + int org_nr_frags, int frag_index) +{ + while (org_nr_frags != frag_index) { + skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, + skb_frag_page(&org_frags[frag_index]), + skb_frag_off(&org_frags[frag_index]), + skb_frag_size(&org_frags[frag_index]), + skb_frag_size(&org_frags[frag_index])); + page_ref_inc(skb_frag_page(&org_frags[frag_index])); + frag_index++; + } +} + +static void +mlx5_nvmeotcp_add_tail(struct mlx5e_nvmeotcp_queue *queue, struct sk_buff *skb, + int offset, int len) +{ + skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, virt_to_page(skb->data), offset, len, + len); + page_ref_inc(virt_to_page(skb->data)); +} + +static void mlx5_nvmeotcp_trim_nonlinear(struct sk_buff *skb, skb_frag_t *org_frags, + int *frag_index, int remaining) +{ + unsigned int frag_size; + int nr_frags; + + /* skip @remaining bytes in frags */ + *frag_index = 0; + while (remaining) { + frag_size = skb_frag_size(&skb_shinfo(skb)->frags[*frag_index]); + if (frag_size > remaining) { + skb_frag_off_add(&skb_shinfo(skb)->frags[*frag_index], + remaining); + skb_frag_size_sub(&skb_shinfo(skb)->frags[*frag_index], + remaining); + remaining = 0; + } else { + remaining -= frag_size; + skb_frag_unref(skb, *frag_index); + *frag_index += 1; + } + } + + /* save original frags for the tail and unref */ + nr_frags = skb_shinfo(skb)->nr_frags; + memcpy(&org_frags[*frag_index], &skb_shinfo(skb)->frags[*frag_index], + (nr_frags - *frag_index) * sizeof(skb_frag_t)); + while (--nr_frags >= *frag_index) + skb_frag_unref(skb, nr_frags); + + /* remove frags from skb */ + skb_shinfo(skb)->nr_frags = 0; + skb->len -= skb->data_len; + skb->truesize -= skb->data_len; + skb->data_len = 0; +} + +static bool +mlx5e_nvmeotcp_rebuild_rx_skb_nonlinear(struct mlx5e_rq *rq, struct sk_buff *skb, + struct mlx5_cqe64 *cqe, u32 cqe_bcnt) +{ + int ccoff, cclen, hlen, ccid, remaining, fragsz, to_copy = 0; + struct net_device *netdev = rq->netdev; + struct mlx5e_priv *priv = netdev_priv(netdev); + struct mlx5e_nvmeotcp_queue_entry *nqe; + skb_frag_t org_frags[MAX_SKB_FRAGS]; + struct mlx5e_nvmeotcp_queue *queue; + int org_nr_frags, frag_index; + struct mlx5e_cqe128 *cqe128; + u32 queue_id; + + queue_id = (be32_to_cpu(cqe->sop_drop_qpn) & MLX5E_TC_FLOW_ID_MASK); + queue = mlx5e_nvmeotcp_get_queue(priv->nvmeotcp, queue_id); + if (unlikely(!queue)) { + dev_kfree_skb_any(skb); + return false; + } + + cqe128 = container_of(cqe, struct mlx5e_cqe128, cqe64); + if (cqe_is_nvmeotcp_resync(cqe)) { + nvmeotcp_update_resync(queue, cqe128); + mlx5e_nvmeotcp_put_queue(queue); + return true; + } + + /* If a resync occurred in the previous cqe, + * the current cqe.crcvalid bit may not be valid, + * so we will treat it as 0 + */ + if (unlikely(queue->after_resync_cqe) && cqe_is_nvmeotcp_crcvalid(cqe)) { + skb->ulp_crc = 0; + queue->after_resync_cqe = 0; + } else { + if (queue->crc_rx) + skb->ulp_crc = cqe_is_nvmeotcp_crcvalid(cqe); + } + + skb->ulp_ddp = cqe_is_nvmeotcp_zc(cqe); + if (!cqe_is_nvmeotcp_zc(cqe)) { + mlx5e_nvmeotcp_put_queue(queue); + return true; + } + + /* cc ddp from cqe */ + ccid = be16_to_cpu(cqe128->ccid); + ccoff = be32_to_cpu(cqe128->ccoff); + cclen = be16_to_cpu(cqe128->cclen); + hlen = be16_to_cpu(cqe128->hlen); + + /* carve a hole in the skb for DDP data */ + org_nr_frags = skb_shinfo(skb)->nr_frags; + mlx5_nvmeotcp_trim_nonlinear(skb, org_frags, &frag_index, cclen); + nqe = &queue->ccid_table[ccid]; + + /* packet starts new ccid? */ + if (queue->ccid != ccid || queue->ccid_gen != nqe->ccid_gen) { + queue->ccid = ccid; + queue->ccoff = 0; + queue->ccoff_inner = 0; + queue->ccsglidx = 0; + queue->ccid_gen = nqe->ccid_gen; + } + + /* skip inside cc until the ccoff in the cqe */ + while (queue->ccoff + queue->ccoff_inner < ccoff) { + remaining = nqe->sgl[queue->ccsglidx].length - queue->ccoff_inner; + fragsz = min_t(off_t, remaining, + ccoff - (queue->ccoff + queue->ccoff_inner)); + + if (fragsz == remaining) + mlx5e_nvmeotcp_advance_sgl_iter(queue); + else + queue->ccoff_inner += fragsz; + } + + /* adjust the skb according to the cqe cc */ + while (to_copy < cclen) { + remaining = nqe->sgl[queue->ccsglidx].length - queue->ccoff_inner; + fragsz = min_t(int, remaining, cclen - to_copy); + + mlx5e_nvmeotcp_add_skb_frag(netdev, skb, queue, nqe, fragsz); + to_copy += fragsz; + if (fragsz == remaining) + mlx5e_nvmeotcp_advance_sgl_iter(queue); + else + queue->ccoff_inner += fragsz; + } + + if (cqe_bcnt > hlen + cclen) { + remaining = cqe_bcnt - hlen - cclen; + mlx5_nvmeotcp_add_tail_nonlinear(queue, skb, org_frags, + org_nr_frags, + frag_index); + } + + mlx5e_nvmeotcp_put_queue(queue); + return true; +} + +static bool +mlx5e_nvmeotcp_rebuild_rx_skb_linear(struct mlx5e_rq *rq, struct sk_buff *skb, + struct mlx5_cqe64 *cqe, u32 cqe_bcnt) +{ + int ccoff, cclen, hlen, ccid, remaining, fragsz, to_copy = 0; + struct net_device *netdev = rq->netdev; + struct mlx5e_priv *priv = netdev_priv(netdev); + struct mlx5e_nvmeotcp_queue_entry *nqe; + struct mlx5e_nvmeotcp_queue *queue; + struct mlx5e_cqe128 *cqe128; + u32 queue_id; + + queue_id = (be32_to_cpu(cqe->sop_drop_qpn) & MLX5E_TC_FLOW_ID_MASK); + queue = mlx5e_nvmeotcp_get_queue(priv->nvmeotcp, queue_id); + if (unlikely(!queue)) { + dev_kfree_skb_any(skb); + return false; + } + + cqe128 = container_of(cqe, struct mlx5e_cqe128, cqe64); + if (cqe_is_nvmeotcp_resync(cqe)) { + nvmeotcp_update_resync(queue, cqe128); + mlx5e_nvmeotcp_put_queue(queue); + return true; + } + + /* If a resync occurred in the previous cqe, + * the current cqe.crcvalid bit may not be valid, + * so we will treat it as 0 + */ + if (unlikely(queue->after_resync_cqe) && cqe_is_nvmeotcp_crcvalid(cqe)) { + skb->ulp_crc = 0; + queue->after_resync_cqe = 0; + } else { + if (queue->crc_rx) + skb->ulp_crc = cqe_is_nvmeotcp_crcvalid(cqe); + } + + skb->ulp_ddp = cqe_is_nvmeotcp_zc(cqe); + if (!cqe_is_nvmeotcp_zc(cqe)) { + mlx5e_nvmeotcp_put_queue(queue); + return true; + } + + /* cc ddp from cqe */ + ccid = be16_to_cpu(cqe128->ccid); + ccoff = be32_to_cpu(cqe128->ccoff); + cclen = be16_to_cpu(cqe128->cclen); + hlen = be16_to_cpu(cqe128->hlen); + + /* carve a hole in the skb for DDP data */ + skb_trim(skb, hlen); + nqe = &queue->ccid_table[ccid]; + + /* packet starts new ccid? */ + if (queue->ccid != ccid || queue->ccid_gen != nqe->ccid_gen) { + queue->ccid = ccid; + queue->ccoff = 0; + queue->ccoff_inner = 0; + queue->ccsglidx = 0; + queue->ccid_gen = nqe->ccid_gen; + } + + /* skip inside cc until the ccoff in the cqe */ + while (queue->ccoff + queue->ccoff_inner < ccoff) { + remaining = nqe->sgl[queue->ccsglidx].length - queue->ccoff_inner; + fragsz = min_t(off_t, remaining, + ccoff - (queue->ccoff + queue->ccoff_inner)); + + if (fragsz == remaining) + mlx5e_nvmeotcp_advance_sgl_iter(queue); + else + queue->ccoff_inner += fragsz; + } + + /* adjust the skb according to the cqe cc */ + while (to_copy < cclen) { + remaining = nqe->sgl[queue->ccsglidx].length - queue->ccoff_inner; + fragsz = min_t(int, remaining, cclen - to_copy); + + mlx5e_nvmeotcp_add_skb_frag(netdev, skb, queue, nqe, fragsz); + to_copy += fragsz; + if (fragsz == remaining) + mlx5e_nvmeotcp_advance_sgl_iter(queue); + else + queue->ccoff_inner += fragsz; + } + + if (cqe_bcnt > hlen + cclen) { + remaining = cqe_bcnt - hlen - cclen; + mlx5_nvmeotcp_add_tail(queue, skb, + offset_in_page(skb->data) + + hlen + cclen, remaining); + } + + mlx5e_nvmeotcp_put_queue(queue); + return true; +} + +bool +mlx5e_nvmeotcp_rebuild_rx_skb(struct mlx5e_rq *rq, struct sk_buff *skb, + struct mlx5_cqe64 *cqe, u32 cqe_bcnt) +{ + if (skb->data_len) + return mlx5e_nvmeotcp_rebuild_rx_skb_nonlinear(rq, skb, cqe, cqe_bcnt); + else + return mlx5e_nvmeotcp_rebuild_rx_skb_linear(rq, skb, cqe, cqe_bcnt); +} diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp_rxtx.h b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp_rxtx.h new file mode 100644 index 000000000000..a8ca8a53bac6 --- /dev/null +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp_rxtx.h @@ -0,0 +1,37 @@ +/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ +/* Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. */ +#ifndef __MLX5E_NVMEOTCP_RXTX_H__ +#define __MLX5E_NVMEOTCP_RXTX_H__ + +#ifdef CONFIG_MLX5_EN_NVMEOTCP + +#include +#include "en_accel/nvmeotcp.h" + +bool +mlx5e_nvmeotcp_rebuild_rx_skb(struct mlx5e_rq *rq, struct sk_buff *skb, + struct mlx5_cqe64 *cqe, u32 cqe_bcnt); + +static inline int mlx5_nvmeotcp_get_headlen(struct mlx5_cqe64 *cqe, u32 cqe_bcnt) +{ + struct mlx5e_cqe128 *cqe128; + + if (!cqe_is_nvmeotcp_zc(cqe)) + return cqe_bcnt; + + cqe128 = container_of(cqe, struct mlx5e_cqe128, cqe64); + return be16_to_cpu(cqe128->hlen); +} + +#else + +static inline bool +mlx5e_nvmeotcp_rebuild_rx_skb(struct mlx5e_rq *rq, struct sk_buff *skb, + struct mlx5_cqe64 *cqe, u32 cqe_bcnt) +{ return true; } + +static inline int mlx5_nvmeotcp_get_headlen(struct mlx5_cqe64 *cqe, u32 cqe_bcnt) +{ return cqe_bcnt; } + +#endif /* CONFIG_MLX5_EN_NVMEOTCP */ +#endif /* __MLX5E_NVMEOTCP_RXTX_H__ */ diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c index 9b9c3603a00b..ea4c73cafb0a 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c @@ -53,7 +53,7 @@ #include "en_accel/macsec.h" #include "en_accel/ipsec_rxtx.h" #include "en_accel/ktls_txrx.h" -#include "en_accel/nvmeotcp.h" +#include "en_accel/nvmeotcp_rxtx.h" #include "en/xdp.h" #include "en/xsk/rx.h" #include "en/health.h" @@ -63,9 +63,11 @@ static struct sk_buff * mlx5e_skb_from_cqe_mpwrq_linear(struct mlx5e_rq *rq, struct mlx5e_mpw_info *wi, + struct mlx5_cqe64 *cqe, u16 cqe_bcnt, u32 head_offset, u32 page_idx); static struct sk_buff * mlx5e_skb_from_cqe_mpwrq_nonlinear(struct mlx5e_rq *rq, struct mlx5e_mpw_info *wi, + struct mlx5_cqe64 *cqe, u16 cqe_bcnt, u32 head_offset, u32 page_idx); static void mlx5e_handle_rx_cqe(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe); static void mlx5e_handle_rx_cqe_mpwrq(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe); @@ -1484,7 +1486,7 @@ static inline void mlx5e_handle_csum(struct net_device *netdev, #define MLX5E_CE_BIT_MASK 0x80 -static inline void mlx5e_build_rx_skb(struct mlx5_cqe64 *cqe, +static inline bool mlx5e_build_rx_skb(struct mlx5_cqe64 *cqe, u32 cqe_bcnt, struct mlx5e_rq *rq, struct sk_buff *skb) @@ -1495,6 +1497,13 @@ static inline void mlx5e_build_rx_skb(struct mlx5_cqe64 *cqe, skb->mac_len = ETH_HLEN; + if (IS_ENABLED(CONFIG_MLX5_EN_NVMEOTCP) && cqe_is_nvmeotcp(cqe)) { + bool ret = mlx5e_nvmeotcp_rebuild_rx_skb(rq, skb, cqe, cqe_bcnt); + + if (unlikely(!ret)) + return ret; + } + if (unlikely(get_cqe_tls_offload(cqe))) mlx5e_ktls_handle_rx_skb(rq, skb, cqe, &cqe_bcnt); @@ -1540,6 +1549,8 @@ static inline void mlx5e_build_rx_skb(struct mlx5_cqe64 *cqe, if (unlikely(mlx5e_skb_is_multicast(skb))) stats->mcast_packets++; + + return true; } static void mlx5e_shampo_complete_rx_cqe(struct mlx5e_rq *rq, @@ -1563,7 +1574,7 @@ static void mlx5e_shampo_complete_rx_cqe(struct mlx5e_rq *rq, } } -static inline void mlx5e_complete_rx_cqe(struct mlx5e_rq *rq, +static inline bool mlx5e_complete_rx_cqe(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe, u32 cqe_bcnt, struct sk_buff *skb) @@ -1572,7 +1583,7 @@ static inline void mlx5e_complete_rx_cqe(struct mlx5e_rq *rq, stats->packets++; stats->bytes += cqe_bcnt; - mlx5e_build_rx_skb(cqe, cqe_bcnt, rq, skb); + return mlx5e_build_rx_skb(cqe, cqe_bcnt, rq, skb); } static inline @@ -1810,7 +1821,8 @@ static void mlx5e_handle_rx_cqe(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe) goto free_wqe; } - mlx5e_complete_rx_cqe(rq, cqe, cqe_bcnt, skb); + if (unlikely(!mlx5e_complete_rx_cqe(rq, cqe, cqe_bcnt, skb))) + goto free_wqe; if (mlx5e_cqe_regb_chain(cqe)) if (!mlx5e_tc_update_skb(cqe, skb)) { @@ -1863,7 +1875,8 @@ static void mlx5e_handle_rx_cqe_rep(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe) goto free_wqe; } - mlx5e_complete_rx_cqe(rq, cqe, cqe_bcnt, skb); + if (unlikely(!mlx5e_complete_rx_cqe(rq, cqe, cqe_bcnt, skb))) + goto free_wqe; if (rep->vlan && skb_vlan_tag_present(skb)) skb_vlan_pop(skb); @@ -1910,11 +1923,12 @@ static void mlx5e_handle_rx_cqe_mpwrq_rep(struct mlx5e_rq *rq, struct mlx5_cqe64 skb = INDIRECT_CALL_2(rq->mpwqe.skb_from_cqe_mpwrq, mlx5e_skb_from_cqe_mpwrq_linear, mlx5e_skb_from_cqe_mpwrq_nonlinear, - rq, wi, cqe_bcnt, head_offset, page_idx); + rq, wi, cqe, cqe_bcnt, head_offset, page_idx); if (!skb) goto mpwrq_cqe_out; - mlx5e_complete_rx_cqe(rq, cqe, cqe_bcnt, skb); + if (unlikely(!mlx5e_complete_rx_cqe(rq, cqe, cqe_bcnt, skb))) + goto mpwrq_cqe_out; mlx5e_rep_tc_receive(cqe, rq, skb); @@ -1959,12 +1973,18 @@ mlx5e_fill_skb_data(struct sk_buff *skb, struct mlx5e_rq *rq, } } +static inline u16 mlx5e_get_headlen_hint(struct mlx5_cqe64 *cqe, u32 cqe_bcnt) +{ + return min_t(u32, MLX5E_RX_MAX_HEAD, mlx5_nvmeotcp_get_headlen(cqe, cqe_bcnt)); +} + static struct sk_buff * mlx5e_skb_from_cqe_mpwrq_nonlinear(struct mlx5e_rq *rq, struct mlx5e_mpw_info *wi, + struct mlx5_cqe64 *cqe, u16 cqe_bcnt, u32 head_offset, u32 page_idx) { union mlx5e_alloc_unit *au = &wi->alloc_units[page_idx]; - u16 headlen = min_t(u16, MLX5E_RX_MAX_HEAD, cqe_bcnt); + u16 headlen = mlx5e_get_headlen_hint(cqe, cqe_bcnt); u32 frag_offset = head_offset + headlen; u32 byte_cnt = cqe_bcnt - headlen; union mlx5e_alloc_unit *head_au = au; @@ -2000,6 +2020,7 @@ mlx5e_skb_from_cqe_mpwrq_nonlinear(struct mlx5e_rq *rq, struct mlx5e_mpw_info *w static struct sk_buff * mlx5e_skb_from_cqe_mpwrq_linear(struct mlx5e_rq *rq, struct mlx5e_mpw_info *wi, + struct mlx5_cqe64 *cqe, u16 cqe_bcnt, u32 head_offset, u32 page_idx) { union mlx5e_alloc_unit *au = &wi->alloc_units[page_idx]; @@ -2195,7 +2216,8 @@ static void mlx5e_handle_rx_cqe_mpwrq_shampo(struct mlx5e_rq *rq, struct mlx5_cq if (likely(head_size)) *skb = mlx5e_skb_from_cqe_shampo(rq, wi, cqe, header_index); else - *skb = mlx5e_skb_from_cqe_mpwrq_nonlinear(rq, wi, cqe_bcnt, data_offset, + *skb = mlx5e_skb_from_cqe_mpwrq_nonlinear(rq, wi, cqe, + cqe_bcnt, data_offset, page_idx); if (unlikely(!*skb)) goto free_hd_entry; @@ -2270,11 +2292,12 @@ static void mlx5e_handle_rx_cqe_mpwrq(struct mlx5e_rq *rq, struct mlx5_cqe64 *cq mlx5e_skb_from_cqe_mpwrq_linear, mlx5e_skb_from_cqe_mpwrq_nonlinear, mlx5e_xsk_skb_from_cqe_mpwrq_linear, - rq, wi, cqe_bcnt, head_offset, page_idx); + rq, wi, cqe, cqe_bcnt, head_offset, page_idx); if (!skb) goto mpwrq_cqe_out; - mlx5e_complete_rx_cqe(rq, cqe, cqe_bcnt, skb); + if (unlikely(!mlx5e_complete_rx_cqe(rq, cqe, cqe_bcnt, skb))) + goto mpwrq_cqe_out; if (mlx5e_cqe_regb_chain(cqe)) if (!mlx5e_tc_update_skb(cqe, skb)) { @@ -2611,7 +2634,9 @@ static void mlx5e_trap_handle_rx_cqe(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe if (!skb) goto free_wqe; - mlx5e_complete_rx_cqe(rq, cqe, cqe_bcnt, skb); + if (unlikely(!mlx5e_complete_rx_cqe(rq, cqe, cqe_bcnt, skb))) + goto free_wqe; + skb_push(skb, ETH_HLEN); dl_port = mlx5e_devlink_get_dl_port(priv); From patchwork Tue Jan 17 15:35:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Aptel X-Patchwork-Id: 13104831 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E681C6379F for ; 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Expose the statistics using the new ethtool_ops->get_ulp_ddp_stats() instead of the regular statistics flow. Signed-off-by: Ben Ben-Ishay Signed-off-by: Boris Pismenny Signed-off-by: Or Gerlitz Signed-off-by: Yoray Zack Signed-off-by: Shai Malin Signed-off-by: Aurelien Aptel Reviewed-by: Tariq Toukan --- .../net/ethernet/mellanox/mlx5/core/Makefile | 3 +- .../mellanox/mlx5/core/en_accel/nvmeotcp.c | 43 +++++++++--- .../mellanox/mlx5/core/en_accel/nvmeotcp.h | 16 +++++ .../mlx5/core/en_accel/nvmeotcp_rxtx.c | 11 +++- .../mlx5/core/en_accel/nvmeotcp_stats.c | 66 +++++++++++++++++++ .../ethernet/mellanox/mlx5/core/en_ethtool.c | 11 ++++ .../ethernet/mellanox/mlx5/core/en_stats.c | 7 ++ .../ethernet/mellanox/mlx5/core/en_stats.h | 7 ++ 8 files changed, 153 insertions(+), 11 deletions(-) create mode 100644 drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp_stats.c diff --git a/drivers/net/ethernet/mellanox/mlx5/core/Makefile b/drivers/net/ethernet/mellanox/mlx5/core/Makefile index 9804bd086bf4..d48bde4ca8de 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/Makefile +++ b/drivers/net/ethernet/mellanox/mlx5/core/Makefile @@ -103,7 +103,8 @@ mlx5_core-$(CONFIG_MLX5_EN_TLS) += en_accel/ktls_stats.o \ en_accel/fs_tcp.o en_accel/ktls.o en_accel/ktls_txrx.o \ en_accel/ktls_tx.o en_accel/ktls_rx.o -mlx5_core-$(CONFIG_MLX5_EN_NVMEOTCP) += en_accel/fs_tcp.o en_accel/nvmeotcp.o en_accel/nvmeotcp_rxtx.o +mlx5_core-$(CONFIG_MLX5_EN_NVMEOTCP) += en_accel/fs_tcp.o en_accel/nvmeotcp.o \ + en_accel/nvmeotcp_rxtx.o en_accel/nvmeotcp_stats.o mlx5_core-$(CONFIG_MLX5_SW_STEERING) += steering/dr_domain.o steering/dr_table.o \ steering/dr_matcher.o steering/dr_rule.o \ diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c index 47f3b53ed78e..4fc84b81ce99 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c @@ -614,9 +614,15 @@ mlx5e_nvmeotcp_queue_init(struct net_device *netdev, { struct nvme_tcp_ddp_config *config = &tconfig->nvmeotcp; struct mlx5e_priv *priv = netdev_priv(netdev); + struct mlx5e_nvmeotcp_sw_stats *sw_stats; struct mlx5_core_dev *mdev = priv->mdev; struct mlx5e_nvmeotcp_queue *queue; int queue_id, err; + u32 channel_ix; + + channel_ix = mlx5e_get_channel_ix_from_io_cpu(&priv->channels.params, + config->io_cpu); + sw_stats = &priv->nvmeotcp->sw_stats; if (tconfig->type != ULP_DDP_NVME) { err = -EOPNOTSUPP; @@ -643,11 +649,11 @@ mlx5e_nvmeotcp_queue_init(struct net_device *netdev, queue->id = queue_id; queue->dgst = config->dgst; queue->pda = config->cpda; - queue->channel_ix = mlx5e_get_channel_ix_from_io_cpu(&priv->channels.params, - config->io_cpu); + queue->channel_ix = channel_ix; queue->size = config->queue_size; queue->max_klms_per_wqe = MLX5E_MAX_KLM_PER_WQE(mdev); queue->priv = priv; + queue->sw_stats = sw_stats; init_completion(&queue->static_params_done); err = mlx5e_nvmeotcp_queue_rx_init(queue, config, netdev); @@ -659,6 +665,7 @@ mlx5e_nvmeotcp_queue_init(struct net_device *netdev, if (err) goto destroy_rx; + atomic64_inc(&sw_stats->rx_nvmeotcp_sk_add); write_lock_bh(&sk->sk_callback_lock); ulp_ddp_set_ctx(sk, queue); write_unlock_bh(&sk->sk_callback_lock); @@ -672,6 +679,7 @@ mlx5e_nvmeotcp_queue_init(struct net_device *netdev, free_queue: kfree(queue); out: + atomic64_inc(&sw_stats->rx_nvmeotcp_sk_add_fail); return err; } @@ -685,6 +693,8 @@ mlx5e_nvmeotcp_queue_teardown(struct net_device *netdev, queue = container_of(ulp_ddp_get_ctx(sk), struct mlx5e_nvmeotcp_queue, ulp_ddp_ctx); + atomic64_inc(&queue->sw_stats->rx_nvmeotcp_sk_del); + WARN_ON(refcount_read(&queue->ref_count) != 1); mlx5e_nvmeotcp_destroy_rx(priv, queue, mdev); @@ -816,25 +826,34 @@ mlx5e_nvmeotcp_ddp_setup(struct net_device *netdev, struct ulp_ddp_io *ddp) { struct scatterlist *sg = ddp->sg_table.sgl; + struct mlx5e_nvmeotcp_sw_stats *sw_stats; struct mlx5e_nvmeotcp_queue_entry *nvqt; struct mlx5e_nvmeotcp_queue *queue; struct mlx5_core_dev *mdev; int i, size = 0, count = 0; + int ret = 0; queue = container_of(ulp_ddp_get_ctx(sk), struct mlx5e_nvmeotcp_queue, ulp_ddp_ctx); + sw_stats = queue->sw_stats; mdev = queue->priv->mdev; count = dma_map_sg(mdev->device, ddp->sg_table.sgl, ddp->nents, DMA_FROM_DEVICE); - if (count <= 0) - return -EINVAL; + if (count <= 0) { + ret = -EINVAL; + goto ddp_setup_fail; + } - if (WARN_ON(count > mlx5e_get_max_sgl(mdev))) - return -ENOSPC; + if (WARN_ON(count > mlx5e_get_max_sgl(mdev))) { + ret = -ENOSPC; + goto ddp_setup_fail; + } - if (!mlx5e_nvmeotcp_validate_sgl(sg, count, READ_ONCE(netdev->mtu))) - return -EOPNOTSUPP; + if (!mlx5e_nvmeotcp_validate_sgl(sg, count, READ_ONCE(netdev->mtu))) { + ret = -EOPNOTSUPP; + goto ddp_setup_fail; + } for (i = 0; i < count; i++) size += sg_dma_len(&sg[i]); @@ -846,8 +865,13 @@ mlx5e_nvmeotcp_ddp_setup(struct net_device *netdev, nvqt->ccid_gen++; nvqt->sgl_length = count; mlx5e_nvmeotcp_post_klm_wqe(queue, KLM_UMR, ddp->command_id, count); - + atomic64_inc(&sw_stats->rx_nvmeotcp_ddp_setup); return 0; + +ddp_setup_fail: + dma_unmap_sg(mdev->device, ddp->sg_table.sgl, count, DMA_FROM_DEVICE); + atomic64_inc(&sw_stats->rx_nvmeotcp_ddp_setup_fail); + return ret; } void mlx5e_nvmeotcp_ctx_complete(struct mlx5e_icosq_wqe_info *wi) @@ -894,6 +918,7 @@ mlx5e_nvmeotcp_ddp_teardown(struct net_device *netdev, q_entry->queue = queue; mlx5e_nvmeotcp_post_klm_wqe(queue, KLM_INV_UMR, ddp->command_id, 0); + atomic64_inc(&queue->sw_stats->rx_nvmeotcp_ddp_teardown); } static void diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.h b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.h index a5cfd9e31be7..f2a7f3cc945d 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.h @@ -9,6 +9,15 @@ #include "en.h" #include "en/params.h" +struct mlx5e_nvmeotcp_sw_stats { + atomic64_t rx_nvmeotcp_sk_add; + atomic64_t rx_nvmeotcp_sk_add_fail; + atomic64_t rx_nvmeotcp_sk_del; + atomic64_t rx_nvmeotcp_ddp_setup; + atomic64_t rx_nvmeotcp_ddp_setup_fail; + atomic64_t rx_nvmeotcp_ddp_teardown; +}; + struct mlx5e_nvmeotcp_queue_entry { struct mlx5e_nvmeotcp_queue *queue; u32 sgl_length; @@ -52,6 +61,7 @@ struct mlx5e_nvmeotcp_queue_handler { * @sk: The socket used by the NVMe-TCP queue * @crc_rx: CRC Rx offload indication for this queue * @priv: mlx5e netdev priv + * @sw_stats: Global software statistics for nvmeotcp offload * @static_params_done: Async completion structure for the initial umr mapping * synchronization * @sq_lock: Spin lock for the icosq @@ -88,6 +98,7 @@ struct mlx5e_nvmeotcp_queue { u8 crc_rx:1; /* for ddp invalidate flow */ struct mlx5e_priv *priv; + struct mlx5e_nvmeotcp_sw_stats *sw_stats; /* end of data-path section */ struct completion static_params_done; @@ -97,6 +108,7 @@ struct mlx5e_nvmeotcp_queue { }; struct mlx5e_nvmeotcp { + struct mlx5e_nvmeotcp_sw_stats sw_stats; struct ida queue_ids; struct rhashtable queue_hash; bool enabled; @@ -113,6 +125,7 @@ void mlx5e_nvmeotcp_ddp_inv_done(struct mlx5e_icosq_wqe_info *wi); void mlx5e_nvmeotcp_ctx_complete(struct mlx5e_icosq_wqe_info *wi); static inline void mlx5e_nvmeotcp_init_rx(struct mlx5e_priv *priv) {} void mlx5e_nvmeotcp_cleanup_rx(struct mlx5e_priv *priv); +int mlx5e_nvmeotcp_get_stats(struct mlx5e_priv *priv, struct ethtool_ulp_ddp_stats *stats); extern const struct ulp_ddp_dev_ops mlx5e_nvmeotcp_ops; #else @@ -122,5 +135,8 @@ static inline void mlx5e_nvmeotcp_cleanup(struct mlx5e_priv *priv) {} static inline int set_ulp_ddp_nvme_tcp(struct net_device *dev, bool en) { return -EOPNOTSUPP; } static inline void mlx5e_nvmeotcp_init_rx(struct mlx5e_priv *priv) {} static inline void mlx5e_nvmeotcp_cleanup_rx(struct mlx5e_priv *priv) {} +static inline int mlx5e_nvmeotcp_get_stats(struct mlx5e_priv *priv, + struct ethtool_ulp_ddp_stats *stats) +{ return 0; } #endif #endif /* __MLX5E_NVMEOTCP_H__ */ diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp_rxtx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp_rxtx.c index 4c7dab28ef56..d703ca3f0155 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp_rxtx.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp_rxtx.c @@ -111,6 +111,7 @@ mlx5e_nvmeotcp_rebuild_rx_skb_nonlinear(struct mlx5e_rq *rq, struct sk_buff *skb int ccoff, cclen, hlen, ccid, remaining, fragsz, to_copy = 0; struct net_device *netdev = rq->netdev; struct mlx5e_priv *priv = netdev_priv(netdev); + struct mlx5e_rq_stats *stats = rq->stats; struct mlx5e_nvmeotcp_queue_entry *nqe; skb_frag_t org_frags[MAX_SKB_FRAGS]; struct mlx5e_nvmeotcp_queue *queue; @@ -122,12 +123,14 @@ mlx5e_nvmeotcp_rebuild_rx_skb_nonlinear(struct mlx5e_rq *rq, struct sk_buff *skb queue = mlx5e_nvmeotcp_get_queue(priv->nvmeotcp, queue_id); if (unlikely(!queue)) { dev_kfree_skb_any(skb); + stats->nvmeotcp_drop++; return false; } cqe128 = container_of(cqe, struct mlx5e_cqe128, cqe64); if (cqe_is_nvmeotcp_resync(cqe)) { nvmeotcp_update_resync(queue, cqe128); + stats->nvmeotcp_resync++; mlx5e_nvmeotcp_put_queue(queue); return true; } @@ -201,7 +204,8 @@ mlx5e_nvmeotcp_rebuild_rx_skb_nonlinear(struct mlx5e_rq *rq, struct sk_buff *skb org_nr_frags, frag_index); } - + stats->nvmeotcp_packets++; + stats->nvmeotcp_bytes += cclen; mlx5e_nvmeotcp_put_queue(queue); return true; } @@ -213,6 +217,7 @@ mlx5e_nvmeotcp_rebuild_rx_skb_linear(struct mlx5e_rq *rq, struct sk_buff *skb, int ccoff, cclen, hlen, ccid, remaining, fragsz, to_copy = 0; struct net_device *netdev = rq->netdev; struct mlx5e_priv *priv = netdev_priv(netdev); + struct mlx5e_rq_stats *stats = rq->stats; struct mlx5e_nvmeotcp_queue_entry *nqe; struct mlx5e_nvmeotcp_queue *queue; struct mlx5e_cqe128 *cqe128; @@ -222,12 +227,14 @@ mlx5e_nvmeotcp_rebuild_rx_skb_linear(struct mlx5e_rq *rq, struct sk_buff *skb, queue = mlx5e_nvmeotcp_get_queue(priv->nvmeotcp, queue_id); if (unlikely(!queue)) { dev_kfree_skb_any(skb); + stats->nvmeotcp_drop++; return false; } cqe128 = container_of(cqe, struct mlx5e_cqe128, cqe64); if (cqe_is_nvmeotcp_resync(cqe)) { nvmeotcp_update_resync(queue, cqe128); + stats->nvmeotcp_resync++; mlx5e_nvmeotcp_put_queue(queue); return true; } @@ -301,6 +308,8 @@ mlx5e_nvmeotcp_rebuild_rx_skb_linear(struct mlx5e_rq *rq, struct sk_buff *skb, hlen + cclen, remaining); } + stats->nvmeotcp_packets++; + stats->nvmeotcp_bytes += cclen; mlx5e_nvmeotcp_put_queue(queue); return true; } diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp_stats.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp_stats.c new file mode 100644 index 000000000000..21b0ac17f1b2 --- /dev/null +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp_stats.c @@ -0,0 +1,66 @@ +// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB +// Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. + +#include "en_accel/nvmeotcp.h" + +struct ethtool_counter_map { + size_t eth_offset; + size_t mlx_offset; +}; + +#define DECLARE_ULP_SW_STAT(fld) \ + { offsetof(struct ethtool_ulp_ddp_stats, fld), \ + offsetof(struct mlx5e_nvmeotcp_sw_stats, fld) } + +#define DECLARE_ULP_RQ_STAT(fld) \ + { offsetof(struct ethtool_ulp_ddp_stats, rx_ ## fld), \ + offsetof(struct mlx5e_rq_stats, fld) } + +#define READ_CTR_ATOMIC64(ptr, dsc, i) \ + atomic64_read((atomic64_t *)((char *)(ptr) + (dsc)[i].mlx_offset)) + +#define READ_CTR(ptr, desc, i) \ + (*((u64 *)((char *)(ptr) + (desc)[i].mlx_offset))) + +#define SET_ULP_STAT(ptr, desc, i, val) \ + (*(u64 *)((char *)(ptr) + (desc)[i].eth_offset) = (val)) + +/* Global counters */ +static const struct ethtool_counter_map sw_stats_desc[] = { + DECLARE_ULP_SW_STAT(rx_nvmeotcp_sk_add), + DECLARE_ULP_SW_STAT(rx_nvmeotcp_sk_del), + DECLARE_ULP_SW_STAT(rx_nvmeotcp_ddp_setup), + DECLARE_ULP_SW_STAT(rx_nvmeotcp_ddp_setup_fail), + DECLARE_ULP_SW_STAT(rx_nvmeotcp_ddp_teardown), +}; + +/* Per-rx-queue counters */ +static const struct ethtool_counter_map rq_stats_desc[] = { + DECLARE_ULP_RQ_STAT(nvmeotcp_drop), + DECLARE_ULP_RQ_STAT(nvmeotcp_resync), + DECLARE_ULP_RQ_STAT(nvmeotcp_packets), + DECLARE_ULP_RQ_STAT(nvmeotcp_bytes), +}; + +int mlx5e_nvmeotcp_get_stats(struct mlx5e_priv *priv, struct ethtool_ulp_ddp_stats *stats) +{ + unsigned int i, ch, n = 0; + + if (!priv->nvmeotcp) + return 0; + + for (i = 0; i < ARRAY_SIZE(sw_stats_desc); i++, n++) + SET_ULP_STAT(stats, sw_stats_desc, i, + READ_CTR_ATOMIC64(&priv->nvmeotcp->sw_stats, sw_stats_desc, i)); + + for (i = 0; i < ARRAY_SIZE(rq_stats_desc); i++, n++) { + u64 sum = 0; + + for (ch = 0; ch < priv->stats_nch; ch++) + sum += READ_CTR(&priv->channel_stats[ch]->rq, rq_stats_desc, i); + + SET_ULP_STAT(stats, rq_stats_desc, i, sum); + } + + return n; +} diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c b/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c index 7f763152f989..ce29951ad027 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c @@ -2400,6 +2400,16 @@ static void mlx5e_get_rmon_stats(struct net_device *netdev, } #ifdef CONFIG_MLX5_EN_NVMEOTCP +static int mlx5e_get_ulp_ddp_stats(struct net_device *netdev, + struct ethtool_ulp_ddp_stats *stats) +{ + struct mlx5e_priv *priv = netdev_priv(netdev); + + mlx5e_stats_ulp_ddp_get(priv, stats); + + return 0; +} + static int mlx5e_set_ulp_ddp_capabilities(struct net_device *netdev, unsigned long *new_caps) { struct mlx5e_priv *priv = netdev_priv(netdev); @@ -2501,6 +2511,7 @@ const struct ethtool_ops mlx5e_ethtool_ops = { .get_rmon_stats = mlx5e_get_rmon_stats, .get_link_ext_stats = mlx5e_get_link_ext_stats, #ifdef CONFIG_MLX5_EN_NVMEOTCP + .get_ulp_ddp_stats = mlx5e_get_ulp_ddp_stats, .set_ulp_ddp_capabilities = mlx5e_set_ulp_ddp_capabilities, #endif }; diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c index 6687b8136e44..60f60a4c6bc3 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c @@ -2497,3 +2497,10 @@ unsigned int mlx5e_nic_stats_grps_num(struct mlx5e_priv *priv) { return ARRAY_SIZE(mlx5e_nic_stats_grps); } + +/* ULP DDP stats */ + +void mlx5e_stats_ulp_ddp_get(struct mlx5e_priv *priv, struct ethtool_ulp_ddp_stats *stats) +{ + mlx5e_nvmeotcp_get_stats(priv, stats); +} diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.h b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.h index 375752d6546d..8b3d43518d05 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.h @@ -128,6 +128,7 @@ void mlx5e_stats_rmon_get(struct mlx5e_priv *priv, const struct ethtool_rmon_hist_range **ranges); void mlx5e_get_link_ext_stats(struct net_device *dev, struct ethtool_link_ext_stats *stats); +void mlx5e_stats_ulp_ddp_get(struct mlx5e_priv *priv, struct ethtool_ulp_ddp_stats *stats); /* Concrete NIC Stats */ @@ -395,6 +396,12 @@ struct mlx5e_rq_stats { u64 tls_resync_res_skip; u64 tls_err; #endif +#ifdef CONFIG_MLX5_EN_NVMEOTCP + u64 nvmeotcp_drop; + u64 nvmeotcp_resync; + u64 nvmeotcp_packets; + u64 nvmeotcp_bytes; +#endif }; struct mlx5e_sq_stats {