From patchwork Fri Jan 20 13:13:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 13109840 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4EFEDC5320B for ; Fri, 20 Jan 2023 13:18:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231176AbjATNSj (ORCPT ); Fri, 20 Jan 2023 08:18:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36128 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230509AbjATNSf (ORCPT ); Fri, 20 Jan 2023 08:18:35 -0500 Received: from mail-ej1-x62b.google.com (mail-ej1-x62b.google.com [IPv6:2a00:1450:4864:20::62b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B041DC41E2 for ; Fri, 20 Jan 2023 05:14:53 -0800 (PST) Received: by mail-ej1-x62b.google.com with SMTP id v6so13871337ejg.6 for ; Fri, 20 Jan 2023 05:14:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fairphone.com; s=fair; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=031w1g9Y5G2a1Xr/z7EdzNKTzhiIoWJq1q3UhyHxNMk=; b=hjhSK/azGy6/8bHlJ36i3bsWkmf7nBMd/TaTMlbpWpkf5BHUzAS+W4FnI2FVT5gmlR aPG5xxtLBO4AuU1ncz6zDn4FIjN1a3/OQs+iCGGtsRBDIWNolX+58WEGA3N944/pgCS1 0ptgjvIhYL1ijkt3qnYfFr3wEJq2piFDJZpFNLcxxUdxOMu4POh6fJ4V1Fasskv84Mj8 JJP/pJPsym0dd3nCdtDPzdRlm2UHgYW7tCTGzx3nFb3XvWcPSJK+rnaKuGOAcGQe9N/m YGfiofAv7F5KgTa1nGT0tc+Q3HKmsFp40tBU9RqElL9+24QUIa5QR68e/A6nt9gxWO8a AyZQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=031w1g9Y5G2a1Xr/z7EdzNKTzhiIoWJq1q3UhyHxNMk=; b=2uZUikEfcEci1cwhkukC0APJ6SQ6fIi9VGFH1rw/9e6xb2oQwsfDA9LhtD+L7LWDRT JFaCjngirdYj9ir82vBZRaQ1RMb8shlaLKpk7pB8fdtFAw1FiIopLMjklKb7OljAyJiq s7QjLadf6mRNUgKmwAet1TRDVEnOgyDIr6irOS6blXtY4ECezkefJjvZhJuOXMu8jjJj IeTvW+6xDm3fYq9odmEbS328ili6sTDLDerio9BQWAKMtIJvL4MLIXXn8hSEvqU9aPf2 5pgc+eFX2cCZ7k1W0/W3S/y53Xq0nVnAN1K0bYpMj9YIKV9+jviesohar1dO18Itwfir 8odQ== X-Gm-Message-State: AFqh2kr5F9hwlSWnbqFfZj4HQCDO3At/hi6LhuOGGRSeutJso2DZOIPX IhD+17V6H0lfK5Ndx6ktV7K7fw== X-Google-Smtp-Source: AMrXdXuIXbFX/5M5zW9GdKZmjUZ3xfV0D1QO3DSGLjENqCzrRFFaRRvPqHuh98H+c2o9c9R6ZkDS9A== X-Received: by 2002:a17:906:358f:b0:829:6064:bc52 with SMTP id o15-20020a170906358f00b008296064bc52mr14368169ejb.74.1674220491895; Fri, 20 Jan 2023 05:14:51 -0800 (PST) Received: from [172.16.220.87] (144-178-202-138.static.ef-service.nl. [144.178.202.138]) by smtp.gmail.com with ESMTPSA id t1-20020a1709061be100b0086f40238403sm8063276ejg.223.2023.01.20.05.14.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Jan 2023 05:14:51 -0800 (PST) From: Luca Weiss Date: Fri, 20 Jan 2023 14:13:44 +0100 Subject: [PATCH v2 1/4] dt-bindings: i2c: qcom-cci: Document SM6350 compatible MIME-Version: 1.0 Message-Id: <20221213-sm6350-cci-v2-1-15c2c14c34bb@fairphone.com> References: <20221213-sm6350-cci-v2-0-15c2c14c34bb@fairphone.com> In-Reply-To: <20221213-sm6350-cci-v2-0-15c2c14c34bb@fairphone.com> To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Loic Poulain , Robert Foss , Rob Herring , Krzysztof Kozlowski Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Luca Weiss , Krzysztof Kozlowski X-Mailer: b4 0.12-dev-78462 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Document the compatible for the CCI block found on SM6350 SoC. Acked-by: Krzysztof Kozlowski Signed-off-by: Luca Weiss --- Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml index 87e414f0c39c..ec79b7270437 100644 --- a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml @@ -26,6 +26,7 @@ properties: - items: - enum: - qcom,sdm845-cci + - qcom,sm6350-cci - qcom,sm8250-cci - qcom,sm8450-cci - const: qcom,msm8996-cci # CCI v2 @@ -139,6 +140,7 @@ allOf: contains: enum: - qcom,sdm845-cci + - qcom,sm6350-cci then: properties: clocks: From patchwork Fri Jan 20 13:13:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 13109841 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EAD9CC27C7C for ; Fri, 20 Jan 2023 13:18:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231177AbjATNSk (ORCPT ); Fri, 20 Jan 2023 08:18:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36130 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230513AbjATNSf (ORCPT ); Fri, 20 Jan 2023 08:18:35 -0500 Received: from mail-ej1-x636.google.com (mail-ej1-x636.google.com [IPv6:2a00:1450:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5CB25C41E5 for ; Fri, 20 Jan 2023 05:14:54 -0800 (PST) Received: by mail-ej1-x636.google.com with SMTP id mp20so13827358ejc.7 for ; Fri, 20 Jan 2023 05:14:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fairphone.com; s=fair; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ySBpf/g54h4mieeOX1iTHn4nbDJmcd4e2yinCvFCp5c=; b=LQoXIY51ocKZoiJFhh/AKSvIacV/F1db3r+IWRBBO5CRnSUd4/y6t+JPN0hZcOZC4j 5g67O4XNBTR/+4FcVFML8g5LzcxfzWKtB9YbLXV3o/Db+9DuJBVvgDmf6VRweZz9QhDU bV1mIusIhlsezQ+F7aqLrpXr/4I4jyYEmNI8gosKdTeftWaoFn1xi/3E81QKglReGzWm TGMHSuUcV+YZiR5D5WDxbZsbn3viFZ1oQNXG1fdq0+VPKfTaNemr1mbtrXs9xNrEEgw4 7JVC9CibLH/pdTT/Po5D4c3F3Oiyy4xXwS3aNWAxEZNeXLTRFj386RA7xlUos4xg0BOx gGBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ySBpf/g54h4mieeOX1iTHn4nbDJmcd4e2yinCvFCp5c=; b=aDIu1hChFQM7y3difhJvMnvXhUbtXkXkHboQ5uxroFgmWhGHcgIPrsAWlo80hDiibb bvgGVBNN+o66MoNVwrwvk/uPpkM3ex/VbFBSJ849xivSHzHex1VCZ0C1JEBh34yeZ5mJ 0tP6FB0SKSYI2XbMeKdF+fTZUufRLjt4FfEL0Nu4RHaggzgfjqRlnbvShy9Lgj75Z9se 9OEznoq63qSVj4sn6KMWu428ru0A7Yz+WAkaes7i/+xGKtBuxUX+ZQeW32YQmTcWdBAH vLS7epgTp2XGLkKFdhtUnlf/4hm35o7/UN65aiGT3jijxJpU1Xs2iwU2mypcgaf62qSn I3+Q== X-Gm-Message-State: AFqh2kriToxjDnz3lRkw0fq6+F3yX6INeRDQSSZxroAOs1cBFcejnLA2 cK0mxLTwvcAJVx2sVXpWazf36w== X-Google-Smtp-Source: AMrXdXvwTGSr0VTfDAVxv+4egpg34iuffH5U0RjzGKJRCWUe2ybZYxw/9OuLWcE4dBOerhoopk/deA== X-Received: by 2002:a17:906:c7cc:b0:7ae:bfec:74c7 with SMTP id dc12-20020a170906c7cc00b007aebfec74c7mr14237590ejb.72.1674220492599; Fri, 20 Jan 2023 05:14:52 -0800 (PST) Received: from [172.16.220.87] (144-178-202-138.static.ef-service.nl. [144.178.202.138]) by smtp.gmail.com with ESMTPSA id t1-20020a1709061be100b0086f40238403sm8063276ejg.223.2023.01.20.05.14.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Jan 2023 05:14:52 -0800 (PST) From: Luca Weiss Date: Fri, 20 Jan 2023 14:13:45 +0100 Subject: [PATCH v2 2/4] arm64: dts: qcom: sm6350: Add camera clock controller MIME-Version: 1.0 Message-Id: <20221213-sm6350-cci-v2-2-15c2c14c34bb@fairphone.com> References: <20221213-sm6350-cci-v2-0-15c2c14c34bb@fairphone.com> In-Reply-To: <20221213-sm6350-cci-v2-0-15c2c14c34bb@fairphone.com> To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Loic Poulain , Robert Foss , Rob Herring , Krzysztof Kozlowski Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Luca Weiss X-Mailer: b4 0.12-dev-78462 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add a node for the camcc found on SM6350 SoC. Reviewed-by: Konrad Dybcio Signed-off-by: Luca Weiss --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 8224adb99948..300ced5cda57 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -1435,6 +1435,15 @@ usb_1_dwc3: usb@a600000 { }; }; + camcc: clock-controller@ad00000 { + compatible = "qcom,sm6350-camcc"; + reg = <0 0x0ad00000 0 0x16000>; + clocks = <&rpmhcc RPMH_CXO_CLK>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + pdc: interrupt-controller@b220000 { compatible = "qcom,sm6350-pdc", "qcom,pdc"; reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x64>; From patchwork Fri Jan 20 13:13:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 13109842 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 719B8C54737 for ; Fri, 20 Jan 2023 13:18:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231140AbjATNSn (ORCPT ); Fri, 20 Jan 2023 08:18:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36140 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230489AbjATNSg (ORCPT ); Fri, 20 Jan 2023 08:18:36 -0500 Received: from mail-ej1-x62f.google.com (mail-ej1-x62f.google.com [IPv6:2a00:1450:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 852D6C41F6 for ; Fri, 20 Jan 2023 05:15:05 -0800 (PST) Received: by mail-ej1-x62f.google.com with SMTP id az20so13904379ejc.1 for ; Fri, 20 Jan 2023 05:15:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fairphone.com; s=fair; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=BwOqzf9R7uT7rGnQwy0vwJjfAeAuPeUDIWBIETds350=; b=OjovKzTl0s7/JFX7HiitnHEZbspdX38IUG1ceXIElPZKDkRS+eA34Vabe3tRlINfKY K5sxHSkmWsIVY5e0OUjACmtZi1xLfUrc+4mE4D4XNc+PEkhb3m8FoX4F1djXtXSp7xz7 NIBu2PLX7zirMHAbm180RpXt+N/zM1CzQ+bj1tBMOaYJsCVYNJCmujv1D8wTpkK1+LyK fIKLvF3sBdwuSzikosEuHDtmnIcAFvmH1jaXKggHzmpjDORUf3DQ/XgXUYn4ljO/Rvfz FBaHmsxeET5pNU4/NI7ECdceoeeh1muHBhbc+5tUz1mSaHBbp28ZtBjV+MA3kr7oFtS0 WjQA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BwOqzf9R7uT7rGnQwy0vwJjfAeAuPeUDIWBIETds350=; b=4lfxBd6mDjb//TcP66Z9btPRjZo1+TyXjdwf/q+RSEnGMMWfOx315HgEMhUG67vi5J ywGQFa1wlYE8Gt6WM/ieJHL7NZxnmP//YJQwYAU5QWevvqqypu4xPIwbsvNuGE6KOg0h 8/qDLmyEcq1z4BzAI7tW4vFPkRiazHGyjIR/OKq74qEDUgu4ZPjDjh0oCzU8b75zG14R Y+WWOK3dAINGXLbmvaw+V10H54lWiAeoFq6RUZcqUo2iUsvkE3kuoK1VCz1ZCfLhfbn3 tXnTvn3W8kZE8Wgvi/R7bq6w/bOxerpG87nd93IA7U5xgZHkZgfOW8iY1Aw8sv90v5Zt GFjw== X-Gm-Message-State: AFqh2krr3sCne1HKvXpk40SRHohFj9SjuJ5wj3DwlZYjAmmocu+BuvYw lfztuToc9k0aczyWfRZmS9ColOYpkm9g1Aym2w0YRw== X-Google-Smtp-Source: AMrXdXvL7IOr4H2KuxOoBPBNi6gt8ip/qp3X831ZZU8m1YHLRc4xw18f1Jf0RLbF06drPMGSU3EO0A== X-Received: by 2002:a17:906:60d0:b0:877:612e:516e with SMTP id f16-20020a17090660d000b00877612e516emr29754553ejk.61.1674220493307; Fri, 20 Jan 2023 05:14:53 -0800 (PST) Received: from [172.16.220.87] (144-178-202-138.static.ef-service.nl. [144.178.202.138]) by smtp.gmail.com with ESMTPSA id t1-20020a1709061be100b0086f40238403sm8063276ejg.223.2023.01.20.05.14.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Jan 2023 05:14:53 -0800 (PST) From: Luca Weiss Date: Fri, 20 Jan 2023 14:13:46 +0100 Subject: [PATCH v2 3/4] arm64: dts: qcom: sm6350: Add CCI nodes MIME-Version: 1.0 Message-Id: <20221213-sm6350-cci-v2-3-15c2c14c34bb@fairphone.com> References: <20221213-sm6350-cci-v2-0-15c2c14c34bb@fairphone.com> In-Reply-To: <20221213-sm6350-cci-v2-0-15c2c14c34bb@fairphone.com> To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Loic Poulain , Robert Foss , Rob Herring , Krzysztof Kozlowski Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Luca Weiss X-Mailer: b4 0.12-dev-78462 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add nodes for the two CCI blocks found on SM6350. The first contains two i2c busses and while the second one might also contains two busses, the downstream kernel only has one configured, and some boards use the GPIOs for the potential cci1_i2c1 one other purposes, so leave that one unconfigured. Signed-off-by: Luca Weiss Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 132 +++++++++++++++++++++++++++++++++++ 1 file changed, 132 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 300ced5cda57..802d7f494162 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -6,6 +6,7 @@ #include #include +#include #include #include #include @@ -1435,6 +1436,95 @@ usb_1_dwc3: usb@a600000 { }; }; + cci0: cci@ac4a000 { + compatible = "qcom,sm6350-cci", "qcom,msm8996-cci"; + reg = <0 0x0ac4a000 0 0x1000>; + interrupts = ; + power-domains = <&camcc TITAN_TOP_GDSC>; + + clocks = <&camcc CAMCC_CAMNOC_AXI_CLK>, + <&camcc CAMCC_SOC_AHB_CLK>, + <&camcc CAMCC_SLOW_AHB_CLK_SRC>, + <&camcc CAMCC_CPAS_AHB_CLK>, + <&camcc CAMCC_CCI_0_CLK>, + <&camcc CAMCC_CCI_0_CLK_SRC>; + clock-names = "camnoc_axi", + "soc_ahb", + "slow_ahb_src", + "cpas_ahb", + "cci", + "cci_src"; + + assigned-clocks = <&camcc CAMCC_CAMNOC_AXI_CLK>, + <&camcc CAMCC_CCI_0_CLK>; + assigned-clock-rates = <80000000>, <37500000>; + + pinctrl-0 = <&cci0_default &cci1_default>; + pinctrl-1 = <&cci0_sleep &cci1_sleep>; + pinctrl-names = "default", "sleep"; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + + cci0_i2c0: i2c-bus@0 { + reg = <0>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + cci0_i2c1: i2c-bus@1 { + reg = <1>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + cci1: cci@ac4b000 { + compatible = "qcom,sm6350-cci", "qcom,msm8996-cci"; + reg = <0 0x0ac4b000 0 0x1000>; + interrupts = ; + power-domains = <&camcc TITAN_TOP_GDSC>; + + clocks = <&camcc CAMCC_CAMNOC_AXI_CLK>, + <&camcc CAMCC_SOC_AHB_CLK>, + <&camcc CAMCC_SLOW_AHB_CLK_SRC>, + <&camcc CAMCC_CPAS_AHB_CLK>, + <&camcc CAMCC_CCI_1_CLK>, + <&camcc CAMCC_CCI_1_CLK_SRC>; + clock-names = "camnoc_axi", + "soc_ahb", + "slow_ahb_src", + "cpas_ahb", + "cci", + "cci_src"; + + assigned-clocks = <&camcc CAMCC_CAMNOC_AXI_CLK>, + <&camcc CAMCC_CCI_1_CLK>; + assigned-clock-rates = <80000000>, <37500000>; + + pinctrl-0 = <&cci2_default>; + pinctrl-1 = <&cci2_sleep>; + pinctrl-names = "default", "sleep"; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + + cci1_i2c0: i2c-bus@0 { + reg = <0>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + /* SM6350 seems to have cci1_i2c1 on gpio2 & gpio3 but unused downstream */ + }; + camcc: clock-controller@ad00000 { compatible = "qcom,sm6350-camcc"; reg = <0 0x0ad00000 0 0x16000>; @@ -1522,6 +1612,48 @@ tlmm: pinctrl@f100000 { #interrupt-cells = <2>; gpio-ranges = <&tlmm 0 0 157>; + cci0_default: cci0-default-state { + pins = "gpio39", "gpio40"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-up; + }; + + cci0_sleep: cci0-sleep-state { + pins = "gpio39", "gpio40"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-down; + }; + + cci1_default: cci1-default-state { + pins = "gpio41", "gpio42"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-up; + }; + + cci1_sleep: cci1-sleep-state { + pins = "gpio41", "gpio42"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-down; + }; + + cci2_default: cci2-default-state { + pins = "gpio43", "gpio44"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-up; + }; + + cci2_sleep: cci2-sleep-state { + pins = "gpio43", "gpio44"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-down; + }; + sdc2_off_state: sdc2-off-state { clk-pins { pins = "sdc2_clk"; From patchwork Fri Jan 20 13:13:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 13109843 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A8088C27C7C for ; Fri, 20 Jan 2023 13:18:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229678AbjATNSq (ORCPT ); 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[144.178.202.138]) by smtp.gmail.com with ESMTPSA id t1-20020a1709061be100b0086f40238403sm8063276ejg.223.2023.01.20.05.14.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Jan 2023 05:14:53 -0800 (PST) From: Luca Weiss Date: Fri, 20 Jan 2023 14:13:47 +0100 Subject: [PATCH v2 4/4] arm64: dts: qcom: sm7225-fairphone-fp4: Enable CCI busses MIME-Version: 1.0 Message-Id: <20221213-sm6350-cci-v2-4-15c2c14c34bb@fairphone.com> References: <20221213-sm6350-cci-v2-0-15c2c14c34bb@fairphone.com> In-Reply-To: <20221213-sm6350-cci-v2-0-15c2c14c34bb@fairphone.com> To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Loic Poulain , Robert Foss , Rob Herring , Krzysztof Kozlowski Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Luca Weiss X-Mailer: b4 0.12-dev-78462 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Enable the CCI busses that have cameras connected to them. Reviewed-by: Konrad Dybcio Signed-off-by: Luca Weiss --- arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts index f0e7ae630e0c..ed0cb70849d3 100644 --- a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts +++ b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts @@ -363,6 +363,26 @@ vreg_bob: bob { }; }; +&cci0 { + status = "okay"; +}; + +&cci0_i2c0 { + /* IMX582 @ 0x1a */ +}; + +&cci0_i2c1 { + /* IMX582 @ 0x1a */ +}; + +&cci1 { + status = "okay"; +}; + +&cci1_i2c0 { + /* IMX576 @ 0x10 */ +}; + &cdsp { status = "okay"; firmware-name = "qcom/sm7225/fairphone4/cdsp.mdt";