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[177.131.126.82]) by smtp.gmail.com with ESMTPSA id q2-20020a9d6542000000b0067088ff2b45sm21281403otl.37.2023.01.20.09.02.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Jan 2023 09:02:08 -0800 (PST) From: Luiz Angelo Daros de Luca To: netdev@vger.kernel.org Cc: linus.walleij@linaro.org, alsi@bang-olufsen.dk, andrew@lunn.ch, vivien.didelot@gmail.com, f.fainelli@gmail.com, olteanv@gmail.com, davem@davemloft.net, kuba@kernel.org, pabeni@redhat.com, robh+dt@kernel.org, krzk+dt@kernel.org, arinc.unal@arinc9.com, Luiz Angelo Daros de Luca Subject: [PATCH net-next] net: dsa: realtek: rtl8365mb: add change_mtu Date: Fri, 20 Jan 2023 14:00:26 -0300 Message-Id: <20230120170025.20178-1-luizluca@gmail.com> X-Mailer: git-send-email 2.39.0 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org rtl8365mb was using a fixed MTU size of 1536, probably inspired by rtl8366rb initial packet size. Different from that family, rtl8365mb family can specify the max packet size in bytes and not in fixed steps. Now it defaults to VLAN_ETH_HLEN+ETH_DATA_LEN+ETH_FCS_LEN (1522 bytes). DSA calls change_mtu for the CPU port once the max mtu value among the ports changes. As the max packet size is defined globally, the switch is configured only when the call affects the CPU port. The available specs do not directly define the max supported packet size, but it mentions a 16k limit. However, the switch sets the max packet size to 16368 bytes (0x3FF0) after it resets. That value was assumed as the maximum supported packet size. MTU was tested up to 2018 (with 802.1Q) as that is as far as mt7620 (where rtl8367s is stacked) can go. There is a jumbo register, enabled by default at 6k packet size. However, the jumbo settings does not seem to limit nor expand the maximum tested MTU (2018), even when jumbo is disabled. More tests are needed with a device that can handle larger frames. Signed-off-by: Luiz Angelo Daros de Luca --- drivers/net/dsa/realtek/rtl8365mb.c | 63 +++++++++++++++++++++++++++-- 1 file changed, 59 insertions(+), 4 deletions(-) diff --git a/drivers/net/dsa/realtek/rtl8365mb.c b/drivers/net/dsa/realtek/rtl8365mb.c index da31d8b839ac..da9e5f16c8cc 100644 --- a/drivers/net/dsa/realtek/rtl8365mb.c +++ b/drivers/net/dsa/realtek/rtl8365mb.c @@ -98,6 +98,7 @@ #include #include #include +#include #include "realtek.h" @@ -267,6 +268,12 @@ /* Maximum packet length register */ #define RTL8365MB_CFG0_MAX_LEN_REG 0x088C #define RTL8365MB_CFG0_MAX_LEN_MASK 0x3FFF +/* Not sure but it is the default value after reset */ +#define RTL8365MB_CFG0_MAX_LEN_MAX 0x3FF0 + +#define RTL8365MB_FLOWCTRL_JUMBO_SIZE_REG 0x123B +#define RTL8365MB_FLOWCTRL_JUMBO_SIZE_MASK GENMASK(1,0) +#define RTL8365MB_FLOWCTRL_JUMBO_ENABLE_MASK GENMASK(2,2) /* Port learning limit registers */ #define RTL8365MB_LUT_PORT_LEARN_LIMIT_BASE 0x0A20 @@ -309,6 +316,14 @@ */ #define RTL8365MB_STATS_INTERVAL_JIFFIES (3 * HZ) +/* FIXME: is k in {3,4,6,9}k 1000 or 1024 */ +enum rtl8365mb_jumbo_size { + RTL8365MB_JUMBO_SIZE_3K = 0, + RTL8365MB_JUMBO_SIZE_4K, + RTL8365MB_JUMBO_SIZE_6K, + RTL8365MB_JUMBO_SIZE_9K +}; + enum rtl8365mb_mib_counter_index { RTL8365MB_MIB_ifInOctets, RTL8365MB_MIB_dot3StatsFCSErrors, @@ -1135,6 +1150,44 @@ static void rtl8365mb_phylink_mac_link_up(struct dsa_switch *ds, int port, } } +static int rtl8365mb_change_mtu(struct dsa_switch *ds, int port, int new_mtu) +{ + struct realtek_priv *priv = ds->priv; + + /* When a new MTU is set, DSA always set the CPU port's MTU to the + * largest MTU of the slave ports. Because the switch only has a global + * RX length register, only allowing CPU port here is enough. + */ + if (!dsa_is_cpu_port(ds, port)) + return 0; + + new_mtu += VLAN_ETH_HLEN + ETH_FCS_LEN; + + /* FIXME: We might need to adjust the jumbo size as well. However, the + * device seems to forward at least up to mtu=2018 (test device limit) + * even with jumbo frames disabled. + */ + /* This is the switch state after reset */ + /*enum rtl8365mb_jumbo_size jumbo_size = RTL8365MB_JUMBO_SIZE_6K; + + regmap_update_bits(priv->map, RTL8365MB_FLOWCTRL_JUMBO_SIZE_REG, + RTL8365MB_FLOWCTRL_JUMBO_ENABLE_MASK | + RTL8365MB_FLOWCTRL_JUMBO_SIZE_MASK, + FIELD_PREP(RTL8365MB_FLOWCTRL_JUMBO_ENABLE_MASK,1) | + FIELD_PREP(RTL8365MB_FLOWCTRL_JUMBO_SIZE_MASK, + jumbo_size)); + */ + + return regmap_update_bits(priv->map, RTL8365MB_CFG0_MAX_LEN_REG, + RTL8365MB_CFG0_MAX_LEN_MASK, + FIELD_PREP(RTL8365MB_CFG0_MAX_LEN_MASK, new_mtu)); +} + +static int rtl8365mb_max_mtu(struct dsa_switch *ds, int port) +{ + return RTL8365MB_CFG0_MAX_LEN_MAX - VLAN_ETH_HLEN - ETH_FCS_LEN; +} + static void rtl8365mb_port_stp_state_set(struct dsa_switch *ds, int port, u8 state) { @@ -1980,10 +2033,8 @@ static int rtl8365mb_setup(struct dsa_switch *ds) p->index = i; } - /* Set maximum packet length to 1536 bytes */ - ret = regmap_update_bits(priv->map, RTL8365MB_CFG0_MAX_LEN_REG, - RTL8365MB_CFG0_MAX_LEN_MASK, - FIELD_PREP(RTL8365MB_CFG0_MAX_LEN_MASK, 1536)); + /* Set packet length from 16368 to 1500+14+4+4=1522 */ + ret = rtl8365mb_change_mtu(ds, cpu->trap_port, ETH_DATA_LEN); if (ret) goto out_teardown_irq; @@ -2103,6 +2154,8 @@ static const struct dsa_switch_ops rtl8365mb_switch_ops_smi = { .get_eth_mac_stats = rtl8365mb_get_mac_stats, .get_eth_ctrl_stats = rtl8365mb_get_ctrl_stats, .get_stats64 = rtl8365mb_get_stats64, + .port_change_mtu = rtl8365mb_change_mtu, + .port_max_mtu = rtl8365mb_max_mtu, }; static const struct dsa_switch_ops rtl8365mb_switch_ops_mdio = { @@ -2124,6 +2177,8 @@ static const struct dsa_switch_ops rtl8365mb_switch_ops_mdio = { .get_eth_mac_stats = rtl8365mb_get_mac_stats, .get_eth_ctrl_stats = rtl8365mb_get_ctrl_stats, .get_stats64 = rtl8365mb_get_stats64, + .port_change_mtu = rtl8365mb_change_mtu, + .port_max_mtu = rtl8365mb_max_mtu, }; static const struct realtek_ops rtl8365mb_ops = {