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Wysocki" , Daniel Lezcano , Rob Herring , "Krzysztof Kozlowski" , Thierry Reding CC: , , , Yi-Wei Wang , Jon Hunter Subject: [PATCH 1/2] dt-bindings: thermal: Add Tegra234 BPMP thermal zones Date: Tue, 24 Jan 2023 11:51:18 +0000 Message-ID: <20230124115119.21451-1-jonathanh@nvidia.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-NVConfidentiality: public X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF0000B076:EE_|MW4PR12MB5601:EE_ X-MS-Office365-Filtering-Correlation-Id: 428a8c3e-ea51-47df-3cfb-08dafe0154f4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: okaDB6eUBVpFBVpqjHncHyx+TNL7t36ro1M4Iz9nMHtvQGZ5ZzjG3wyZWDDejvUf2kcoYL5ucIyM4Nr/dZxMrwgkzKsVambK+sz1dpbVF/cmfbN5cTS4RS/3xQgh8KlY+xNsVMOTc0ETDEIYmxU8i9kbhADG9A68DVTkKh6JRARMB6g1jbt5iNWN7GXIz8yk1KiNxN7B56FLFCAK7oqh7CZYotWBvRCnwszdk6c9ZToo9f/UehNvyR5RANbT96SKsEm41+yt18mzpyCXFfUbiu2COuqBPW4nA6vnNl+ih2fbue94oTEoHImMQ/7fTFnbrJI4dTIcY71azSZDWTtmpMFXNp6Tlk3/sqYR2rmMzrEqb3NpE34aHqzLLwHYsLl2dg0u9sYjPI5HuFHVyYoXwJ7WIZ6lFupH6Kcb+Sow5pLHuOxWMLub134kiHKfgeLGCe7+/qrzb8lfXPRGnJ7ySgV32qN273rNhJtc98VmdSLJg+483wdiuOmYbxcsf16ycS9mzEanzbKVnlk5XaOdPQjlil69Ln5BXZyuK/4zeWM1Hpuro+H7fU31FezjQkd/mJnCcvCZCw6Sby8ZNL7aZl+vd6SspmV7r1m7xJi2P1doHRET64Vhi43xpQHEa760AykZJ2dwsStUk1N721JJu4NSUWTCNwGzqPUV+GlXqKEJm2n5nB81sSLmDShBH3JElXRCcdsyMJPq63xzj1a76w== X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230022)(4636009)(39860400002)(346002)(396003)(136003)(376002)(451199015)(40470700004)(36840700001)(46966006)(2616005)(336012)(1076003)(7636003)(2906002)(82740400003)(41300700001)(426003)(82310400005)(5660300002)(47076005)(40460700003)(8936002)(316002)(4326008)(36756003)(110136005)(70206006)(54906003)(186003)(26005)(8676002)(36860700001)(86362001)(70586007)(7696005)(356005)(478600001)(107886003)(40480700001)(6666004);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Jan 2023 11:51:29.8498 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 428a8c3e-ea51-47df-3cfb-08dafe0154f4 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF0000B076.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB5601 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Yi-Wei Wang Add BPMP thermal zone definitions for Tegra234. Signed-off-by: Yi-Wei Wang Signed-off-by: Jon Hunter --- .../thermal/tegra234-bpmp-thermal.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 include/dt-bindings/thermal/tegra234-bpmp-thermal.h diff --git a/include/dt-bindings/thermal/tegra234-bpmp-thermal.h b/include/dt-bindings/thermal/tegra234-bpmp-thermal.h new file mode 100644 index 000000000000..41a5efebcc7a --- /dev/null +++ b/include/dt-bindings/thermal/tegra234-bpmp-thermal.h @@ -0,0 +1,19 @@ +/* + * This header provides constants for binding nvidia,tegra234-bpmp-thermal. + */ + +#ifndef _DT_BINDINGS_THERMAL_TEGRA234_BPMP_THERMAL_H +#define _DT_BINDINGS_THERMAL_TEGRA234_BPMP_THERMAL_H + +#define TEGRA234_THERMAL_ZONE_CPU 0 +#define TEGRA234_THERMAL_ZONE_GPU 1 +#define TEGRA234_THERMAL_ZONE_CV0 2 +#define TEGRA234_THERMAL_ZONE_CV1 3 +#define TEGRA234_THERMAL_ZONE_CV2 4 +#define TEGRA234_THERMAL_ZONE_SOC0 5 +#define TEGRA234_THERMAL_ZONE_SOC1 6 +#define TEGRA234_THERMAL_ZONE_SOC2 7 +#define TEGRA234_THERMAL_ZONE_TJ_MAX 8 +#define TEGRA234_THERMAL_ZONE_COUNT 9 + +#endif From patchwork Tue Jan 24 11:51:19 2023 Content-Type: text/plain; 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Wysocki" , Daniel Lezcano , Rob Herring , "Krzysztof Kozlowski" , Thierry Reding CC: , , , Yi-Wei Wang , Jon Hunter Subject: [PATCH 2/2] arm64: tegra: Add thermal support for Tegra234 Date: Tue, 24 Jan 2023 11:51:19 +0000 Message-ID: <20230124115119.21451-2-jonathanh@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230124115119.21451-1-jonathanh@nvidia.com> References: <20230124115119.21451-1-jonathanh@nvidia.com> MIME-Version: 1.0 X-NVConfidentiality: public X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF0000B076:EE_|DM4PR12MB6009:EE_ X-MS-Office365-Filtering-Correlation-Id: 81fff281-60f9-4760-87b7-08dafe01586d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: V7aA0PzvQ0MHV1+NkrIuqf2uNvGBpMoqFXaJjFG1pjs9I/KvRIEVKwAn4sHk6cupCwKl0bMNp8n3f7mcbrOGCeG0Ho7NB/aaiYmiz5RKflcCml/av1EgXebOw49gAxBWYUHwd6rSpj3HMCal5hjBUlGl+2AEi9ASXW27qmR5a4vYIT8LFgN7wB15VReWnWGETm/PNa6H0OSSYR2QSLPs/Y4hnA5IOHb0nvQH0YUVfBjz+E6ZmPPCNiPbT6FUSDgf/EdK4Vec+iCLWJk0o865js67rI1TSiotDKL6LSaizwBtUIKUhl8RWP0unuXhHK+8pn/og/lHm57+QtU02ySEEHIDdhZmvKiankXAUX+2q64+zZY3jemEIPqhZ0wTECpdN6JFtYpg3ZlKZKOPb71ukjyFz+Wn5iAluvERpSoghs/nFV2ZjXri0H7olTtnW8RJQJQovfcXW0XJltR21QKkWbNDD8bJ+gg8xQP2JGNht5ApimAIrb4T4tdU2LmP/WBn+AtDauWDsqtgtCCy4/ooRrdiHuEh5wXgKPCE7EYM+/EL7XM9hATar79BGHGe87XqEjHXtNviXAhyXznovpMAZbWHxa/9QUHnXEi/R6K/EOk95XQK1J0x/GVXGY2KYyvWILtRmU+He6qPlxZolK+MZ1AJMDQ4VUP0PLVM6reybyHH7T8F72bzywwZ69v2XVulHnIQCthKiphudPUnis9d+g== X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230022)(4636009)(376002)(346002)(39860400002)(396003)(136003)(451199015)(40470700004)(46966006)(36840700001)(36756003)(7636003)(356005)(2906002)(82740400003)(8936002)(4326008)(30864003)(82310400005)(5660300002)(41300700001)(83380400001)(36860700001)(86362001)(26005)(478600001)(110136005)(7696005)(54906003)(186003)(40480700001)(40460700003)(70206006)(8676002)(2616005)(316002)(70586007)(426003)(107886003)(1076003)(47076005)(336012)(6666004);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Jan 2023 11:51:35.6779 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 81fff281-60f9-4760-87b7-08dafe01586d X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF0000B076.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6009 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Yi-Wei Wang Add the BPMP thermal device node and thermal-zones for Tegra234 and enable thermal support for the Tegra234 Jetson AGX Orin board. Signed-off-by: Yi-Wei Wang Signed-off-by: Jon Hunter --- .../boot/dts/nvidia/tegra234-p3701-0000.dtsi | 276 ++++++++++++++++++ .../nvidia/tegra234-p3737-0000+p3701-0000.dts | 32 ++ arch/arm64/boot/dts/nvidia/tegra234.dtsi | 59 ++++ 3 files changed, 367 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi index 2378da324273..7f798742df43 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi @@ -80,6 +80,22 @@ pmc@c360000 { }; }; + bpmp { + i2c { + tegra_tmp451: thermal-sensor@4c { + compatible = "ti,tmp451"; + reg = <0x4c>; + vcc-supply = <&vdd_1v8_ao>; + #thermal-sensor-cells = <1>; + status = "okay"; + }; + }; + + thermal { + status = "okay"; + }; + }; + vdd_5v0_sys: regulator-vdd-5v0-sys { compatible = "regulator-fixed"; regulator-name = "VIN_SYS_5V0"; @@ -139,4 +155,264 @@ vdd_12v_pcie: regulator-vdd-12v-pcie { gpio = <&gpio TEGRA234_MAIN_GPIO(A, 1) GPIO_ACTIVE_LOW>; regulator-boot-on; }; + + thermal-zones { + cpu-thermal { + polling-delay = <1000>; + polling-delay-passive = <1000>; + thermal-sensors = <&{/bpmp/thermal} TEGRA234_THERMAL_ZONE_CPU>; + status = "okay"; + + trips { + cpu_sw_shutdown: cpu-sw-shutdown { + temperature = <104500>; + hysteresis = <0>; + type = "critical"; + }; + + cpu_sw_throttle: cpu-sw-throttle { + temperature = <99000>; + hysteresis = <0>; + type = "passive"; + }; + }; + + cooling-maps { + map0 { + trip = <&cpu_sw_throttle>; + cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + gpu-thermal { + polling-delay = <1000>; + polling-delay-passive = <1000>; + thermal-sensors = <&{/bpmp/thermal} TEGRA234_THERMAL_ZONE_GPU>; + status = "okay"; + status = "disabled"; + + trips { + gpu_sw_shutdown: gpu-sw-shutdown { + temperature = <104500>; + hysteresis = <0>; + type = "critical"; + }; + + gpu_sw_throttle: gpu-sw-throttle { + temperature = <99000>; + hysteresis = <0>; + type = "passive"; + }; + }; + + cooling-maps { + map0 { + trip = <&gpu_sw_throttle>; + cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + cv0-thermal { + polling-delay = <1000>; + polling-delay-passive = <1000>; + thermal-sensors = <&{/bpmp/thermal} TEGRA234_THERMAL_ZONE_CV0>; + status = "okay"; + + trips { + cv0_sw_shutdown: cv0-sw-shutdown { + temperature = <104500>; + hysteresis = <0>; + type = "critical"; + }; + + cv0_sw_throttle: cv0-sw-throttle { + temperature = <99000>; + hysteresis = <0>; + type = "passive"; + }; + }; + + cooling-maps { + map0 { + trip = <&cv0_sw_throttle>; + cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + + cv1-thermal { + polling-delay = <1000>; + polling-delay-passive = <1000>; + thermal-sensors = <&{/bpmp/thermal} TEGRA234_THERMAL_ZONE_CV1>; + status = "okay"; + status = "disabled"; + + trips { + cv1_sw_shutdown: cv1-sw-shutdown { + temperature = <104500>; + hysteresis = <0>; + type = "critical"; + }; + + cv1_sw_throttle: cv1-sw-throttle { + temperature = <99000>; + hysteresis = <0>; + type = "passive"; + }; + }; + + cooling-maps { + map0 { + trip = <&cv1_sw_throttle>; + cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + cv2-thermal { + polling-delay = <1000>; + polling-delay-passive = <1000>; + thermal-sensors = <&{/bpmp/thermal} TEGRA234_THERMAL_ZONE_CV2>; + status = "okay"; + + trips { + cv2_sw_shutdown: cv2-sw-shutdown { + temperature = <104500>; + hysteresis = <0>; + type = "critical"; + }; + + cv2_sw_throttle: cv2-sw-throttle { + temperature = <99000>; + hysteresis = <0>; + type = "passive"; + }; + }; + + cooling-maps { + map0 { + trip = <&cv2_sw_throttle>; + cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + soc0-thermal { + polling-delay = <1000>; + polling-delay-passive = <1000>; + thermal-sensors = <&{/bpmp/thermal} TEGRA234_THERMAL_ZONE_SOC0>; + status = "okay"; + + trips { + soc0_sw_shutdown: soc0-sw-shutdown { + temperature = <104500>; + hysteresis = <0>; + type = "critical"; + }; + + soc0_sw_throttle: soc0-sw-throttle { + temperature = <99000>; + hysteresis = <0>; + type = "passive"; + }; + }; + + cooling-maps { + map0 { + trip = <&soc0_sw_throttle>; + cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + soc1-thermal { + polling-delay = <1000>; + polling-delay-passive = <1000>; + thermal-sensors = <&{/bpmp/thermal} TEGRA234_THERMAL_ZONE_SOC1>; + status = "okay"; + + trips { + soc1_sw_shutdown: soc1-sw-shutdown { + temperature = <104500>; + hysteresis = <0>; + type = "critical"; + }; + + soc1_sw_throttle: soc1-sw-throttle { + temperature = <99000>; + hysteresis = <0>; + type = "passive"; + }; + }; + + cooling-maps { + map0 { + trip = <&soc1_sw_throttle>; + cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + soc2-thermal { + polling-delay = <1000>; + polling-delay-passive = <1000>; + thermal-sensors = <&{/bpmp/thermal} TEGRA234_THERMAL_ZONE_SOC2>; + status = "okay"; + + trips { + soc2_sw_shutdown: soc2-sw-shutdown { + temperature = <104500>; + hysteresis = <0>; + type = "critical"; + }; + + soc2_sw_throttle: soc2-sw-throttle { + temperature = <99000>; + hysteresis = <0>; + type = "passive"; + }; + }; + + cooling-maps { + map0 { + trip = <&soc2_sw_throttle>; + cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + tj-thermal { + polling-delay = <1000>; + polling-delay-passive = <1000>; + thermal-sensors = <&{/bpmp/thermal} TEGRA234_THERMAL_ZONE_TJ_MAX>; + status = "okay"; + + trips { + tj_sw_shutdown: tj-sw-shutdown { + temperature = <104500>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + }; }; diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts index bfd935a86d19..b9c03a87fa5c 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts +++ b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts @@ -2377,4 +2377,36 @@ sound { label = "NVIDIA Jetson AGX Orin APE"; }; + + thermal-zones { + tboard-thermal { + polling-delay = <1000>; + polling-delay-passive = <1000>; + thermal-sensors = <&tegra_tmp451 0>; + status = "okay"; + + trips { + tboard_sw_shutdown: tboard-sw-shutdown { + temperature = <107000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + + tdiode-thermal { + polling-delay = <1000>; + polling-delay-passive = <1000>; + thermal-sensors = <&tegra_tmp451 1>; + status = "okay"; + + trips { + tdiode_sw_shutdown: tdiode-sw-shutdown { + temperature = <107000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + }; }; diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi index 7b7a57c90e3d..b92427e397af 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi @@ -8,6 +8,8 @@ #include #include #include +#include +#include / { compatible = "nvidia,tegra234"; @@ -3135,6 +3137,12 @@ bpmp_i2c: i2c { #address-cells = <1>; #size-cells = <0>; }; + + thermal { + compatible = "nvidia,tegra186-bpmp-thermal"; + #thermal-sensor-cells = <1>; + status = "disabled"; + }; }; cpus { @@ -3155,6 +3163,7 @@ cpu0_0: cpu@0 { d-cache-line-size = <64>; d-cache-sets = <256>; next-level-cache = <&l2c0_0>; + #cooling-cells = <2>; }; cpu0_1: cpu@100 { @@ -3219,6 +3228,7 @@ cpu1_0: cpu@10000 { d-cache-line-size = <64>; d-cache-sets = <256>; next-level-cache = <&l2c1_0>; + #cooling-cells = <2>; }; cpu1_1: cpu@10100 { @@ -3283,6 +3293,7 @@ cpu2_0: cpu@20000 { d-cache-line-size = <64>; d-cache-sets = <256>; next-level-cache = <&l2c2_0>; + #cooling-cells = <2>; }; cpu2_1: cpu@20100 { @@ -3580,4 +3591,52 @@ timer { interrupt-parent = <&gic>; always-on; }; + + thermal-zones { + cpu-thermal { + thermal-sensors = <&{/bpmp/thermal} TEGRA234_THERMAL_ZONE_CPU>; + status = "disabled"; + }; + + gpu-thermal { + thermal-sensors = <&{/bpmp/thermal} TEGRA234_THERMAL_ZONE_GPU>; + status = "disabled"; + }; + + cv0-thermal { + thermal-sensors = <&{/bpmp/thermal} TEGRA234_THERMAL_ZONE_CV0>; + status = "disabled"; + }; + + + cv1-thermal { + thermal-sensors = <&{/bpmp/thermal} TEGRA234_THERMAL_ZONE_CV1>; + status = "disabled"; + }; + + cv2-thermal { + thermal-sensors = <&{/bpmp/thermal} TEGRA234_THERMAL_ZONE_CV2>; + status = "disabled"; + }; + + soc0-thermal { + thermal-sensors = <&{/bpmp/thermal} TEGRA234_THERMAL_ZONE_SOC0>; + status = "disabled"; + }; + + soc1-thermal { + thermal-sensors = <&{/bpmp/thermal} TEGRA234_THERMAL_ZONE_SOC1>; + status = "disabled"; + }; + + soc2-thermal { + thermal-sensors = <&{/bpmp/thermal} TEGRA234_THERMAL_ZONE_SOC2>; + status = "disabled"; + }; + + tj-thermal { + thermal-sensors = <&{/bpmp/thermal} TEGRA234_THERMAL_ZONE_TJ_MAX>; + status = "disabled"; + }; + }; };