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pr=C From: Ayan Kumar Halder To: CC: , , , , , , , , , , Ayan Kumar Halder Subject: [XEN v4 1/3] xen/arm: Use the correct format specifier Date: Tue, 24 Jan 2023 12:23:34 +0000 Message-ID: <20230124122336.40993-2-ayan.kumar.halder@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230124122336.40993-1-ayan.kumar.halder@amd.com> References: <20230124122336.40993-1-ayan.kumar.halder@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000C96C:EE_|PH7PR12MB6538:EE_ X-MS-Office365-Filtering-Correlation-Id: 0564bf77-ed2e-4463-de66-08dafe05eb3a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: D8M8eEf3G61sjvtgaWcF8iBsvvH+pUI5Mi5wXBUFTaUqZa2s0ybz9NaNgWyoqEyJfFMjYYG3s3AUPBL//9Dd36x24F/TycjW1WWYq61RleIC6LpvRdEsn3TQUsLQ+dwFq5OqL82JkS7FeczUXg47jYQkvlK3ncrWfkEjUhcmETKgMY8uUkIgwv3uLauW1iSZ4H8/mU7xcRUXmqmSAEsNatitX1VfnOdcIfdflSoFlBqWbJaF/R9oJWKZ37ioROhd0GQj2tmTXTFbOkgnsR6QfmKlCJbuMcrKknNqVOYvLphN7MEcFPZZgBYhyHv/4F5BzzaLJtEh4XXdI0BPnhmO1sT976J23EI+awIGkYslwW4CvbNSLQ48WdtPeYXPPsKA1lCpyY1Wdi3RXZWlsb7BqzFtgTMUjR62nksw3eR/VuTOZ+M166Mq9Ga/cpv119pprz/5DlwzGZDnoVGi58V2JsUAH71LF8lIazXTXxfOGPAyOOe1JKr4F7mpDcSPeemJ5MmzFx2tQ2kFexSbjZtTIep/MSQDuh+k1rTMpE38sCb2JLoiHpOJRZSJLIZt9IZS2u1iuZrS7VxhQS95+e0R7CRHoPv3M6lnLw8R12xigs3HQcq+rzqVDwzgKc1Rnq/NWwE4u82oCXCePk3rNlK2B/WLUMDDnK8zADZfaAJbXJG/F6C/uoQSzIUvZsitPfruQWX4Y+t9/ajYm0NrHGg8QtTmyMRoWMYLoBArlBTpFXyEgw7KczUmVb9f7ChLd0ePHNGnLRKbQN3aOfQ5uL3DXg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(39860400002)(396003)(346002)(136003)(376002)(451199015)(46966006)(36840700001)(40470700004)(36860700001)(83380400001)(103116003)(81166007)(82740400003)(7416002)(41300700001)(86362001)(356005)(2906002)(82310400005)(8936002)(5660300002)(4326008)(40460700003)(316002)(40480700001)(26005)(6916009)(8676002)(186003)(6666004)(47076005)(336012)(426003)(70586007)(70206006)(54906003)(2616005)(1076003)(478600001)(966005)(36756003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Jan 2023 12:24:20.0047 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0564bf77-ed2e-4463-de66-08dafe05eb3a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000C96C.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6538 1. One should use 'PRIpaddr' to display 'paddr_t' variables. However, while creating nodes in fdt, the address (if present in the node name) should be represented using 'PRIx64'. This is to be in conformance with the following rule present in https://elinux.org/Device_Tree_Linux . node names "unit-address does not have leading zeros" As 'PRIpaddr' introduces leading zeros, we cannot use it. So, we have introduced a wrapper ie domain_fdt_begin_node() which will represent physical address using 'PRIx64'. 2. One should use 'PRIx64' to display 'u64' in hex format. The current use of 'PRIpaddr' for printing PTE is buggy as this is not a physical address. Signed-off-by: Ayan Kumar Halder --- Changes from - v1 - 1. Moved the patch earlier. 2. Moved a part of change from "[XEN v1 8/9] xen/arm: Other adaptations required to support 32bit paddr" into this patch. v2 - 1. Use PRIx64 for appending addresses to fdt node names. This fixes the CI failure. v3 - 1. Added a comment on top of domain_fdt_begin_node(). 2. Check for the return of snprintf() in domain_fdt_begin_node(). xen/arch/arm/domain_build.c | 64 +++++++++++++++++++++++-------------- xen/arch/arm/gic-v2.c | 6 ++-- xen/arch/arm/mm.c | 2 +- 3 files changed, 44 insertions(+), 28 deletions(-) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index f35f4d2456..81a213cf9a 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -1288,6 +1288,39 @@ static int __init fdt_property_interrupts(const struct kernel_info *kinfo, return res; } +/* + * Wrapper to convert physical address from paddr_t to uint64_t and + * invoke fdt_begin_node(). This is required as the physical address + * provided as a part of node name should not contain any leading + * zeroes. Thus, one should use PRIx64 (instead of PRIpaddr) to append + * unit (which contains the physical address) with name to generate a + * node name. + */ +static int __init domain_fdt_begin_node(void *fdt, const char *name, + uint64_t unit) +{ + /* + * The size of the buffer to hold the longest possible string ie + * interrupt-controller@ + a 64-bit number + \0 + */ + char buf[38]; + int ret; + + /* ePAPR 3.4 */ + ret = snprintf(buf, sizeof(buf), "%s@%"PRIx64, name, unit); + + if ( ret >= sizeof(buf) ) + { + printk(XENLOG_ERR + "Insufficient buffer. Minimum size required is %d\n", + ( ret + 1 )); + + return -FDT_ERR_TRUNCATED; + } + + return fdt_begin_node(fdt, buf); +} + static int __init make_memory_node(const struct domain *d, void *fdt, int addrcells, int sizecells, @@ -1296,8 +1329,6 @@ static int __init make_memory_node(const struct domain *d, unsigned int i; int res, reg_size = addrcells + sizecells; int nr_cells = 0; - /* Placeholder for memory@ + a 64-bit number + \0 */ - char buf[24]; __be32 reg[NR_MEM_BANKS * 4 /* Worst case addrcells + sizecells */]; __be32 *cells; @@ -1314,9 +1345,7 @@ static int __init make_memory_node(const struct domain *d, dt_dprintk("Create memory node\n"); - /* ePAPR 3.4 */ - snprintf(buf, sizeof(buf), "memory@%"PRIx64, mem->bank[i].start); - res = fdt_begin_node(fdt, buf); + res = domain_fdt_begin_node(fdt, "memory", mem->bank[i].start); if ( res ) return res; @@ -1375,16 +1404,13 @@ static int __init make_shm_memory_node(const struct domain *d, { uint64_t start = mem->bank[i].start; uint64_t size = mem->bank[i].size; - /* Placeholder for xen-shmem@ + a 64-bit number + \0 */ - char buf[27]; const char compat[] = "xen,shared-memory-v1"; /* Worst case addrcells + sizecells */ __be32 reg[GUEST_ROOT_ADDRESS_CELLS + GUEST_ROOT_SIZE_CELLS]; __be32 *cells; unsigned int len = (addrcells + sizecells) * sizeof(__be32); - snprintf(buf, sizeof(buf), "xen-shmem@%"PRIx64, mem->bank[i].start); - res = fdt_begin_node(fdt, buf); + res = domain_fdt_begin_node(fdt, "xen-shmem", mem->bank[i].start); if ( res ) return res; @@ -2716,12 +2742,9 @@ static int __init make_gicv2_domU_node(struct kernel_info *kinfo) __be32 reg[(GUEST_ROOT_ADDRESS_CELLS + GUEST_ROOT_SIZE_CELLS) * 2]; __be32 *cells; const struct domain *d = kinfo->d; - /* Placeholder for interrupt-controller@ + a 64-bit number + \0 */ - char buf[38]; - snprintf(buf, sizeof(buf), "interrupt-controller@%"PRIx64, - vgic_dist_base(&d->arch.vgic)); - res = fdt_begin_node(fdt, buf); + res = domain_fdt_begin_node(fdt, "interrupt-controller", + vgic_dist_base(&d->arch.vgic)); if ( res ) return res; @@ -2771,14 +2794,10 @@ static int __init make_gicv3_domU_node(struct kernel_info *kinfo) int res = 0; __be32 *reg, *cells; const struct domain *d = kinfo->d; - /* Placeholder for interrupt-controller@ + a 64-bit number + \0 */ - char buf[38]; unsigned int i, len = 0; - snprintf(buf, sizeof(buf), "interrupt-controller@%"PRIx64, - vgic_dist_base(&d->arch.vgic)); - - res = fdt_begin_node(fdt, buf); + res = domain_fdt_begin_node(fdt, "interrupt-controller", + vgic_dist_base(&d->arch.vgic)); if ( res ) return res; @@ -2858,11 +2877,8 @@ static int __init make_vpl011_uart_node(struct kernel_info *kinfo) __be32 reg[GUEST_ROOT_ADDRESS_CELLS + GUEST_ROOT_SIZE_CELLS]; __be32 *cells; struct domain *d = kinfo->d; - /* Placeholder for sbsa-uart@ + a 64-bit number + \0 */ - char buf[27]; - snprintf(buf, sizeof(buf), "sbsa-uart@%"PRIx64, d->arch.vpl011.base_addr); - res = fdt_begin_node(fdt, buf); + res = domain_fdt_begin_node(fdt, "sbsa-uart", d->arch.vpl011.base_addr); if ( res ) return res; diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c index 61802839cb..5d4d298b86 100644 --- a/xen/arch/arm/gic-v2.c +++ b/xen/arch/arm/gic-v2.c @@ -1049,7 +1049,7 @@ static void __init gicv2_dt_init(void) if ( csize < SZ_8K ) { printk(XENLOG_WARNING "GICv2: WARNING: " - "The GICC size is too small: %#"PRIx64" expected %#x\n", + "The GICC size is too small: %#"PRIpaddr" expected %#x\n", csize, SZ_8K); if ( platform_has_quirk(PLATFORM_QUIRK_GIC_64K_STRIDE) ) { @@ -1280,11 +1280,11 @@ static int __init gicv2_init(void) gicv2.map_cbase += aliased_offset; printk(XENLOG_WARNING - "GICv2: Adjusting CPU interface base to %#"PRIx64"\n", + "GICv2: Adjusting CPU interface base to %#"PRIpaddr"\n", cbase + aliased_offset); } else if ( csize == SZ_128K ) printk(XENLOG_WARNING - "GICv2: GICC size=%#"PRIx64" but not aliased\n", + "GICv2: GICC size=%#"PRIpaddr" but not aliased\n", csize); gicv2.map_hbase = ioremap_nocache(hbase, PAGE_SIZE); diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c index 0fc6f2992d..fab54618ab 100644 --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -249,7 +249,7 @@ void dump_pt_walk(paddr_t ttbr, paddr_t addr, pte = mapping[offsets[level]]; - printk("%s[0x%03x] = 0x%"PRIpaddr"\n", + printk("%s[0x%03x] = 0x%"PRIx64"\n", level_strs[level], offsets[level], pte.bits); if ( level == 3 || !pte.walk.valid || !pte.walk.table ) From patchwork Tue Jan 24 12:23:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ayan Kumar Halder X-Patchwork-Id: 13113994 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8AD06C25B50 for ; Tue, 24 Jan 2023 12:25:07 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.483528.749729 (Exim 4.92) (envelope-from ) id 1pKILv-0004qZ-Iv; Tue, 24 Jan 2023 12:24:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 483528.749729; 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bh=TwJ1LfxOnpXeWIA1K07X5XJHKcSKQkZLrmyDBfROR78=; b=Un8EkCK6ClH8ZOO+otxiTkA1imf8Q2BOCnaGKysCDs19F+wd47asG5lhQMT0RjpF28iH0IYU/vMaHWp4AhEnzWXM+5P+PrOBlEIXiNXretH3D90zwMTZCIJKOd3Gx8KUidBmTpmbdoIocGKdmQG3OypT5AgmqdvxKIz6cUKOeF4= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C From: Ayan Kumar Halder To: CC: , , , , , , , , , , Ayan Kumar Halder Subject: [XEN v4 2/3] xen/drivers: ns16550: Fix the use of simple_strtoul() for extracting u64 Date: Tue, 24 Jan 2023 12:23:35 +0000 Message-ID: <20230124122336.40993-3-ayan.kumar.halder@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230124122336.40993-1-ayan.kumar.halder@amd.com> References: <20230124122336.40993-1-ayan.kumar.halder@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000C96E:EE_|LV2PR12MB5966:EE_ X-MS-Office365-Filtering-Correlation-Id: 5a2be0ed-8941-410a-74a0-08dafe05f363 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Jan 2023 12:24:33.7081 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5a2be0ed-8941-410a-74a0-08dafe05f363 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000C96E.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV2PR12MB5966 One should be using simple_strtoull() ( instead of simple_strtoul() ) to assign value to 'u64' variable. The reason being u64 can be represented by 'unsigned long long' on all the platforms (ie Arm32, Arm64 and x86). Suggested-by: Jan Beulich Signed-off-by: Ayan Kumar Halder Reviewed-by: Jan Beulich --- Changes from - v1, v2 - NA (New patch introduced in v3). v3 - Added Suggested-by and Reviewed-by tags. xen/drivers/char/ns16550.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c index 58d0ccd889..43e1f971ab 100644 --- a/xen/drivers/char/ns16550.c +++ b/xen/drivers/char/ns16550.c @@ -1532,7 +1532,7 @@ static bool __init parse_positional(struct ns16550 *uart, char **str) else #endif { - uart->io_base = simple_strtoul(conf, &conf, 0); + uart->io_base = simple_strtoull(conf, &conf, 0); } } @@ -1603,7 +1603,7 @@ static bool __init parse_namevalue_pairs(char *str, struct ns16550 *uart) "Can't use io_base with dev=pci or dev=amt options\n"); break; } - uart->io_base = simple_strtoul(param_value, NULL, 0); + uart->io_base = simple_strtoull(param_value, NULL, 0); break; case irq: From patchwork Tue Jan 24 12:23:36 2023 Content-Type: text/plain; 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pr=C From: Ayan Kumar Halder To: CC: , , , , , , , , , , Ayan Kumar Halder Subject: [XEN v4 3/3] xen/drivers: ns16550: Fix an incorrect assignment to uart->io_size Date: Tue, 24 Jan 2023 12:23:36 +0000 Message-ID: <20230124122336.40993-4-ayan.kumar.halder@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230124122336.40993-1-ayan.kumar.halder@amd.com> References: <20230124122336.40993-1-ayan.kumar.halder@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000C973:EE_|MN0PR12MB5882:EE_ X-MS-Office365-Filtering-Correlation-Id: 6139d27d-a81e-49cd-c9e0-08dafe05f557 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: kG+zs+z5V4QE6umXtsi1ccsDnE99BjO/4xR8nbjQ39LFWlBsUdu5ZW7oTaVmtZxW6fnrM+lv+jtLmYaxWk3pnicOBW+RuR6GsOI8b5vsC9OSrigtVRZxMnvMJBXOijDIO0E5XVs5PZkbCcemrwat/eNWXCOBOpa/7I4aaoDdQiO5raSWfdBEo+kPjg9BhsC9pSS9AMBZZ1uueiifygdfTI7MuU0WfPvujdJ1cjLtwctTYJyH1PTRXQiPCbpBl8EpsOC2CqBL8oRa8vYRltDqaQvzfbUtSXnXx7rx36DFg6KSfOIORR5fyYfOmk3gN8XnY0S/uSrDRV1IhLlLkeiFCW6EZLyDzkESdgSQFcHOgbrLqT9Xi0lQU2W0in9U9Ak+gVB7nuhe8VKj4faCf/5NTAF1MH9QXluUPuxgxAHys4YiAPsQYz0UhfELtqBRSmsy8ZelU/U1AdN81of1vYKez31UdshdGvQYInafr7orjjUGoJeihBQJ2hJcP1E3DnpZ5gdTRhBrDP7K2vOzcjZ1jHuu2CsiN92g/1YEv/BkiT/ZSc5Hdvz1WfN9z+sn6STkM2kZdme5SF5r/og6nIaKip6A/yr1VM6s9IjVrn/4GAjrUJ5sjfHsSFYzBRpYo/seBPfE6egyrjxRQb0v88aw9omI5ZScjoL6YxmBSqgPyZGJBgt8azqjO6dCPQf73frEtyxkGuWDbYEtWfcl7N/qlKAJq1Z11MaKDeK0R1fVNGY= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(39860400002)(396003)(346002)(376002)(136003)(451199015)(40470700004)(36840700001)(46966006)(36860700001)(36756003)(316002)(8676002)(86362001)(70586007)(4326008)(70206006)(6916009)(54906003)(186003)(26005)(40480700001)(83380400001)(356005)(478600001)(336012)(81166007)(2616005)(103116003)(1076003)(7416002)(5660300002)(47076005)(8936002)(40460700003)(41300700001)(426003)(2906002)(82740400003)(82310400005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Jan 2023 12:24:36.9715 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6139d27d-a81e-49cd-c9e0-08dafe05f557 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000C973.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB5882 uart->io_size represents the size in bytes. Thus, when serial_port.bit_width is assigned to it, it should be converted to size in bytes. Fixes: 17b516196c ("ns16550: add ACPI support for ARM only") Reported-by: Jan Beulich Signed-off-by: Ayan Kumar Halder Reviewed-by: Stefano Stabellini --- Changes from - v1, v2 - NA (New patch introduced in v3). v3 - Added Reviewed-by and Reported-by tags. xen/drivers/char/ns16550.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c index 43e1f971ab..092f6b9c4b 100644 --- a/xen/drivers/char/ns16550.c +++ b/xen/drivers/char/ns16550.c @@ -1870,7 +1870,7 @@ static int __init ns16550_acpi_uart_init(const void *data) uart->parity = spcr->parity; uart->stop_bits = spcr->stop_bits; uart->io_base = spcr->serial_port.address; - uart->io_size = spcr->serial_port.bit_width; + uart->io_size = DIV_ROUND_UP(spcr->serial_port.bit_width, BITS_PER_BYTE); uart->reg_shift = spcr->serial_port.bit_offset; uart->reg_width = spcr->serial_port.access_width;