From patchwork Wed Jan 25 11:48:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Imre Deak X-Patchwork-Id: 13115591 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 945EDC27C76 for ; Wed, 25 Jan 2023 11:49:02 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1104510E7A2; Wed, 25 Jan 2023 11:49:02 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id BFECA10E7A5 for ; Wed, 25 Jan 2023 11:48:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1674647337; x=1706183337; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=nq6BbtyAebV+C99wVuxR4fYny/kDOIuov9qj18HVtRk=; b=b7bx4iFDErVXwuCXDpfgKk2tIwemeIyuALxMAWy+igx/Qx7ymmyaV5lP 91LC6oDkg8OxD3/ubf/KVs8qP7tSW5cO+I8na9QJzJN+LZWWpoK9MTpCC YMF1W5mVK1dUtbruuQI4E91h37AzORz1VaUqUWRTgHkahSDc9v22bPsJ2 o1JQmtVo+cmf1TKDgpFPI8fPDP5cRUH2zvaTEQXOzOTMunABBHZpVQgGE BcfZWHtBQ8EtNvym9cOqZyvjrYp3qQiCSrcipaX8ux4mSxnJxkgMoQ4Vh YcoAsIYRss+dwQjgtOrXGhW8aWS5iduPapAUKX7O8vNOzUtwiWTLmEXge A==; X-IronPort-AV: E=McAfee;i="6500,9779,10600"; a="412769876" X-IronPort-AV: E=Sophos;i="5.97,245,1669104000"; d="scan'208";a="412769876" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jan 2023 03:48:57 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10600"; a="786399672" X-IronPort-AV: E=Sophos;i="5.97,245,1669104000"; d="scan'208";a="786399672" Received: from ideak-desk.fi.intel.com ([10.237.72.58]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jan 2023 03:48:56 -0800 From: Imre Deak To: intel-gfx@lists.freedesktop.org Date: Wed, 25 Jan 2023 13:48:44 +0200 Message-Id: <20230125114852.748337-2-imre.deak@intel.com> X-Mailer: git-send-email 2.31.1.189.g2e36527f23 In-Reply-To: <20230125114852.748337-1-imre.deak@intel.com> References: <20230125114852.748337-1-imre.deak@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 1/9] drm/i915/dp_mst: Add the MST topology state for modesetted CRTCs X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stable@vger.kernel.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add the MST topology for a CRTC to the atomic state if the driver needs to force a modeset on the CRTC after the encoder compute config functions are called. Later the MST encoder's disable hook also adds the state, but that isn't guaranteed to work (since in that hook getting the state may fail, which can't be handled there). This should fix that, while a later patch fixes the use of the MST state in the disable hook. Cc: Lyude Paul Cc: stable@vger.kernel.org # 6.1 Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_display.c | 4 +++ drivers/gpu/drm/i915/display/intel_dp_mst.c | 37 ++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_dp_mst.h | 2 ++ 3 files changed, 43 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 717ca3d7890d3..d3994e2a7d636 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -5934,6 +5934,10 @@ int intel_modeset_all_pipes(struct intel_atomic_state *state, if (ret) return ret; + ret = intel_dp_mst_add_topology_state_for_crtc(state, crtc); + if (ret) + return ret; + ret = intel_atomic_add_affected_planes(state, crtc); if (ret) return ret; diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 8b0e4defa3f10..ba29c294b7c1b 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -1223,3 +1223,40 @@ bool intel_dp_mst_is_slave_trans(const struct intel_crtc_state *crtc_state) return crtc_state->mst_master_transcoder != INVALID_TRANSCODER && crtc_state->mst_master_transcoder != crtc_state->cpu_transcoder; } + +/** + * intel_dp_mst_add_topology_state_for_crtc - add MST topology state for a CRTC + * @state: atomic state + * @crtc: CRTC + * + * Add the MST topology state for @crtc to @state. + * + * Returns 0 on success, negative error code on failure. + */ +int intel_dp_mst_add_topology_state_for_crtc(struct intel_atomic_state *state, + struct intel_crtc *crtc) +{ + struct drm_connector *_connector; + struct drm_connector_state *conn_state; + int i; + + for_each_new_connector_in_state(&state->base, _connector, conn_state, i) { + struct drm_dp_mst_topology_state *mst_state; + struct intel_connector *connector = to_intel_connector(_connector); + + if (conn_state->crtc != &crtc->base) + continue; + + if (!connector->mst_port) + continue; + + mst_state = drm_atomic_get_mst_topology_state(&state->base, + &connector->mst_port->mst_mgr); + if (IS_ERR(mst_state)) + return PTR_ERR(mst_state); + + mst_state->pending_crtc_mask |= drm_crtc_mask(&crtc->base); + } + + return 0; +} diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.h b/drivers/gpu/drm/i915/display/intel_dp_mst.h index f7301de6cdfb3..0cd05a9a78a25 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.h +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.h @@ -18,5 +18,7 @@ int intel_dp_mst_encoder_active_links(struct intel_digital_port *dig_port); bool intel_dp_mst_is_master_trans(const struct intel_crtc_state *crtc_state); bool intel_dp_mst_is_slave_trans(const struct intel_crtc_state *crtc_state); bool intel_dp_mst_source_support(struct intel_dp *intel_dp); +int intel_dp_mst_add_topology_state_for_crtc(struct intel_atomic_state *state, + struct intel_crtc *crtc); #endif /* __INTEL_DP_MST_H__ */ From patchwork Wed Jan 25 11:48:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Imre Deak X-Patchwork-Id: 13115594 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1B107C54EAA for ; Wed, 25 Jan 2023 11:49:13 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1E8A710E7AC; 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25 Jan 2023 03:49:00 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10600"; a="786399681" X-IronPort-AV: E=Sophos;i="5.97,245,1669104000"; d="scan'208";a="786399681" Received: from ideak-desk.fi.intel.com ([10.237.72.58]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jan 2023 03:48:57 -0800 From: Imre Deak To: intel-gfx@lists.freedesktop.org Date: Wed, 25 Jan 2023 13:48:45 +0200 Message-Id: <20230125114852.748337-3-imre.deak@intel.com> X-Mailer: git-send-email 2.31.1.189.g2e36527f23 In-Reply-To: <20230125114852.748337-1-imre.deak@intel.com> References: <20230125114852.748337-1-imre.deak@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 2/9] drm/display/dp_mst: Handle old/new payload states in drm_dp_remove_payload() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Karol Herbst , dri-devel@lists.freedesktop.org, stable@vger.kernel.org, Ben Skeggs , Wayne Lin , Alex Deucher , Harry Wentland Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Atm, drm_dp_remove_payload() uses the same payload state to both get the vc_start_slot required for the payload removal DPCD message and to deduct time_slots from vc_start_slot of all payloads after the one being removed. The above isn't always correct, as vc_start_slot must be the up-to-date version contained in the new payload state, but time_slots must be the one used when the payload was previously added, contained in the old payload state. The new payload's time_slots can change vs. the old one if the current atomic commit changes the corresponding mode. This patch let's drivers pass the old and new payload states to drm_dp_remove_payload(), but keeps these the same for now in all drivers not to change the behavior. A follow-up i915 patch will pass in that driver the correct old and new states to the function. Cc: Lyude Paul Cc: Ben Skeggs Cc: Karol Herbst Cc: Harry Wentland Cc: Alex Deucher Cc: Wayne Lin Cc: stable@vger.kernel.org # 6.1 Cc: dri-devel@lists.freedesktop.org Signed-off-by: Imre Deak Reviewed-by: Ville Syrjälä --- .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 2 +- drivers/gpu/drm/display/drm_dp_mst_topology.c | 22 ++++++++++--------- drivers/gpu/drm/i915/display/intel_dp_mst.c | 4 +++- drivers/gpu/drm/nouveau/dispnv50/disp.c | 2 +- include/drm/display/drm_dp_mst_helper.h | 3 ++- 5 files changed, 19 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c index 6994c9a1ed858..fed4ce6821161 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c @@ -179,7 +179,7 @@ bool dm_helpers_dp_mst_write_payload_allocation_table( if (enable) drm_dp_add_payload_part1(mst_mgr, mst_state, payload); else - drm_dp_remove_payload(mst_mgr, mst_state, payload); + drm_dp_remove_payload(mst_mgr, mst_state, payload, payload); /* mst_mgr->->payloads are VC payload notify MST branch using DPCD or * AUX message. The sequence is slot 1-63 allocated sequence for each diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display/drm_dp_mst_topology.c index 5861b0a6247bc..ebf6e31e156e0 100644 --- a/drivers/gpu/drm/display/drm_dp_mst_topology.c +++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c @@ -3342,7 +3342,8 @@ EXPORT_SYMBOL(drm_dp_add_payload_part1); * drm_dp_remove_payload() - Remove an MST payload * @mgr: Manager to use. * @mst_state: The MST atomic state - * @payload: The payload to write + * @old_payload: The payload with its old state + * @new_payload: The payload to write * * Removes a payload from an MST topology if it was successfully assigned a start slot. Also updates * the starting time slots of all other payloads which would have been shifted towards the start of @@ -3350,33 +3351,34 @@ EXPORT_SYMBOL(drm_dp_add_payload_part1); */ void drm_dp_remove_payload(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, - struct drm_dp_mst_atomic_payload *payload) + const struct drm_dp_mst_atomic_payload *old_payload, + struct drm_dp_mst_atomic_payload *new_payload) { struct drm_dp_mst_atomic_payload *pos; bool send_remove = false; /* We failed to make the payload, so nothing to do */ - if (payload->vc_start_slot == -1) + if (new_payload->vc_start_slot == -1) return; mutex_lock(&mgr->lock); - send_remove = drm_dp_mst_port_downstream_of_branch(payload->port, mgr->mst_primary); + send_remove = drm_dp_mst_port_downstream_of_branch(new_payload->port, mgr->mst_primary); mutex_unlock(&mgr->lock); if (send_remove) - drm_dp_destroy_payload_step1(mgr, mst_state, payload); + drm_dp_destroy_payload_step1(mgr, mst_state, new_payload); else drm_dbg_kms(mgr->dev, "Payload for VCPI %d not in topology, not sending remove\n", - payload->vcpi); + new_payload->vcpi); list_for_each_entry(pos, &mst_state->payloads, next) { - if (pos != payload && pos->vc_start_slot > payload->vc_start_slot) - pos->vc_start_slot -= payload->time_slots; + if (pos != new_payload && pos->vc_start_slot > new_payload->vc_start_slot) + pos->vc_start_slot -= old_payload->time_slots; } - payload->vc_start_slot = -1; + new_payload->vc_start_slot = -1; mgr->payload_count--; - mgr->next_start_slot -= payload->time_slots; + mgr->next_start_slot -= old_payload->time_slots; } EXPORT_SYMBOL(drm_dp_remove_payload); diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index ba29c294b7c1b..5f7bcb5c14847 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -526,6 +526,8 @@ static void intel_mst_disable_dp(struct intel_atomic_state *state, to_intel_connector(old_conn_state->connector); struct drm_dp_mst_topology_state *mst_state = drm_atomic_get_mst_topology_state(&state->base, &intel_dp->mst_mgr); + struct drm_dp_mst_atomic_payload *payload = + drm_atomic_get_mst_payload_state(mst_state, connector->port); struct drm_i915_private *i915 = to_i915(connector->base.dev); drm_dbg_kms(&i915->drm, "active links %d\n", @@ -534,7 +536,7 @@ static void intel_mst_disable_dp(struct intel_atomic_state *state, intel_hdcp_disable(intel_mst->connector); drm_dp_remove_payload(&intel_dp->mst_mgr, mst_state, - drm_atomic_get_mst_payload_state(mst_state, connector->port)); + payload, payload); intel_audio_codec_disable(encoder, old_crtc_state, old_conn_state); } diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c index edcb2529b4025..ed9d374147b8d 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/disp.c +++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c @@ -885,7 +885,7 @@ nv50_msto_prepare(struct drm_atomic_state *state, // TODO: Figure out if we want to do a better job of handling VCPI allocation failures here? if (msto->disabled) { - drm_dp_remove_payload(mgr, mst_state, payload); + drm_dp_remove_payload(mgr, mst_state, payload, payload); nvif_outp_dp_mst_vcpi(&mstm->outp->outp, msto->head->base.index, 0, 0, 0, 0); } else { diff --git a/include/drm/display/drm_dp_mst_helper.h b/include/drm/display/drm_dp_mst_helper.h index 41fd8352ab656..f5eb9aa152b14 100644 --- a/include/drm/display/drm_dp_mst_helper.h +++ b/include/drm/display/drm_dp_mst_helper.h @@ -841,7 +841,8 @@ int drm_dp_add_payload_part2(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_atomic_payload *payload); void drm_dp_remove_payload(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, - struct drm_dp_mst_atomic_payload *payload); + const struct drm_dp_mst_atomic_payload *old_payload, + struct drm_dp_mst_atomic_payload *new_payload); int drm_dp_check_act_status(struct drm_dp_mst_topology_mgr *mgr); From patchwork Wed Jan 25 11:48:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Imre Deak X-Patchwork-Id: 13115592 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BC720C27C76 for ; Wed, 25 Jan 2023 11:49:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 45D1510E7A7; Wed, 25 Jan 2023 11:49:06 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8799110E7A7; Wed, 25 Jan 2023 11:49:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1674647342; x=1706183342; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=FcDIXn+b1xfGwF5/0dgANgrSJc2u2QBQi/C9Qo6OVUg=; b=Diy3GM45CKEIeWQaSaAM48eFFrxADaDlEortZYt3ehzzTe+my0wRwwjW pGIn3xbhQ2jy9xKce2wpcDFNLjuucN+rhsAsABOVnCWflqQEfzrHnrX8j 8mr30T8MHkbb3X7crGTS35IHJ1uSfi+3WvMpKZSPQxxWzEYB0WFRtRWqv ykY9tdQDk05fcNZZzirhBCzv9UaIQBE1k1m8ZJMu9ZoImUbxOjQvvDUn/ d3kWxKn4760FvMxgujb6RDhA+CTyXImpIKBWP0c82Z8n9XlIJ3A3Bh9T1 +08Z1MQabmyTJZE6/aJO2WQKEDkbJ/9+/M7Q94enp3FvlouhlnZDs3bZd w==; X-IronPort-AV: E=McAfee;i="6500,9779,10600"; a="412769909" X-IronPort-AV: E=Sophos;i="5.97,245,1669104000"; d="scan'208";a="412769909" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jan 2023 03:49:02 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10600"; a="786399699" X-IronPort-AV: E=Sophos;i="5.97,245,1669104000"; d="scan'208";a="786399699" Received: from ideak-desk.fi.intel.com ([10.237.72.58]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jan 2023 03:49:00 -0800 From: Imre Deak To: intel-gfx@lists.freedesktop.org Date: Wed, 25 Jan 2023 13:48:46 +0200 Message-Id: <20230125114852.748337-4-imre.deak@intel.com> X-Mailer: git-send-email 2.31.1.189.g2e36527f23 In-Reply-To: <20230125114852.748337-1-imre.deak@intel.com> References: <20230125114852.748337-1-imre.deak@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 3/9] drm/display/dp_mst: Add drm_atomic_get_old_mst_topology_state() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dri-devel@lists.freedesktop.org, stable@vger.kernel.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add a function to get the old MST topology state, required by a follow-up i915 patch. While at it clarify the code comment of drm_atomic_get_new_mst_topology_state(). Cc: Lyude Paul Cc: stable@vger.kernel.org # 6.1 Cc: dri-devel@lists.freedesktop.org Signed-off-by: Imre Deak Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/display/drm_dp_mst_topology.c | 29 +++++++++++++++++-- include/drm/display/drm_dp_mst_helper.h | 3 ++ 2 files changed, 30 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display/drm_dp_mst_topology.c index ebf6e31e156e0..81cc0c3b1e000 100644 --- a/drivers/gpu/drm/display/drm_dp_mst_topology.c +++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c @@ -5362,18 +5362,43 @@ struct drm_dp_mst_topology_state *drm_atomic_get_mst_topology_state(struct drm_a } EXPORT_SYMBOL(drm_atomic_get_mst_topology_state); +/** + * drm_atomic_get_old_mst_topology_state: get old MST topology state in atomic state, if any + * @state: global atomic state + * @mgr: MST topology manager, also the private object in this case + * + * This function wraps drm_atomic_get_old_private_obj_state() passing in the MST atomic + * state vtable so that the private object state returned is that of a MST + * topology object. + * + * Returns: + * + * The old MST topology state, or NULL if there's no topology state for this MST mgr + * in the global atomic state + */ +struct drm_dp_mst_topology_state * +drm_atomic_get_old_mst_topology_state(struct drm_atomic_state *state, + struct drm_dp_mst_topology_mgr *mgr) +{ + struct drm_private_state *priv_state = + drm_atomic_get_old_private_obj_state(state, &mgr->base); + + return priv_state ? to_dp_mst_topology_state(priv_state) : NULL; +} +EXPORT_SYMBOL(drm_atomic_get_old_mst_topology_state); + /** * drm_atomic_get_new_mst_topology_state: get new MST topology state in atomic state, if any * @state: global atomic state * @mgr: MST topology manager, also the private object in this case * - * This function wraps drm_atomic_get_priv_obj_state() passing in the MST atomic + * This function wraps drm_atomic_get_new_private_obj_state() passing in the MST atomic * state vtable so that the private object state returned is that of a MST * topology object. * * Returns: * - * The MST topology state, or NULL if there's no topology state for this MST mgr + * The new MST topology state, or NULL if there's no topology state for this MST mgr * in the global atomic state */ struct drm_dp_mst_topology_state * diff --git a/include/drm/display/drm_dp_mst_helper.h b/include/drm/display/drm_dp_mst_helper.h index f5eb9aa152b14..32c764fb9cb56 100644 --- a/include/drm/display/drm_dp_mst_helper.h +++ b/include/drm/display/drm_dp_mst_helper.h @@ -868,6 +868,9 @@ struct drm_dp_mst_topology_state * drm_atomic_get_mst_topology_state(struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr *mgr); struct drm_dp_mst_topology_state * +drm_atomic_get_old_mst_topology_state(struct drm_atomic_state *state, + struct drm_dp_mst_topology_mgr *mgr); +struct drm_dp_mst_topology_state * drm_atomic_get_new_mst_topology_state(struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr *mgr); struct drm_dp_mst_atomic_payload * From patchwork Wed Jan 25 11:48:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Imre Deak X-Patchwork-Id: 13115593 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9831BC54E94 for ; Wed, 25 Jan 2023 11:49:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C7E2510E7AA; Wed, 25 Jan 2023 11:49:06 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1383F10E7A7 for ; Wed, 25 Jan 2023 11:49:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1674647344; x=1706183344; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=LjKht4btWvybU4Oox3ZEiD3HFls0QM8PcgwKUx7mlvM=; b=ju46xrHQqMHhkrswYaiwr13ll4kDE/fkE0aJFnK0/xeISa/ZuTIMry7e 0SB1nxVLyhgWqAQNe3yXB4JRDolgybdTxCeqX7tJBawN8sf+J4a7tNy1g HGUPHFljzSGpq0MT3qUcNckrQGP2z6QR6/oQf9j2DJr5tqvaKPLTVhaMt 4G7rdeYO/Po8Jy2Q9UKdGLhge0RF5LtKUYDeSFZbmES02ZGqCrroSRZkB gPo6XFw0D+s2VtcKoJeGVVi9wdZRxm/R66Y5xGsULg+e6o2vqV5WRijxc LDg8aPLXHGw4Bc0oj7ZeIR4PNzjksL8sUJVCp1yCSLiTT+Zq0p8ghPH4/ w==; X-IronPort-AV: E=McAfee;i="6500,9779,10600"; a="412769918" X-IronPort-AV: E=Sophos;i="5.97,245,1669104000"; d="scan'208";a="412769918" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jan 2023 03:49:03 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10600"; a="786399707" X-IronPort-AV: E=Sophos;i="5.97,245,1669104000"; d="scan'208";a="786399707" Received: from ideak-desk.fi.intel.com ([10.237.72.58]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jan 2023 03:49:02 -0800 From: Imre Deak To: intel-gfx@lists.freedesktop.org Date: Wed, 25 Jan 2023 13:48:47 +0200 Message-Id: <20230125114852.748337-5-imre.deak@intel.com> X-Mailer: git-send-email 2.31.1.189.g2e36527f23 In-Reply-To: <20230125114852.748337-1-imre.deak@intel.com> References: <20230125114852.748337-1-imre.deak@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 4/9] drm/i915/dp_mst: Fix payload removal during output disabling X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stable@vger.kernel.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Use the correct old/new topology and payload states in intel_mst_disable_dp(). So far drm_atomic_get_mst_topology_state() it used returned either the old state, in case the state was added already earlier during the atomic check phase or otherwise the new state (but the latter could fail, which can't be handled in the enable/disable hooks). After the first patch in the patchset, the state should always get added already during the check phase, so here we can get the old/new states without a failure. drm_dp_remove_payload() should use time_slots from the old payload state and vc_start_slot in the new one. It should update the new payload states to reflect the sink's current payload table after the payload is removed. Pass the new topology state and the old and new payload states accordingly. This also fixes a problem where the payload allocations for multiple MST streams on the same link got inconsistent after a few commits, as during payload removal the old instead of the new payload state got updated, so the subsequent enabling sequence and commits used a stale payload state. Cc: Lyude Paul Cc: stable@vger.kernel.org # 6.1 Signed-off-by: Imre Deak Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_dp_mst.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 5f7bcb5c14847..800fa12a61d93 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -524,10 +524,14 @@ static void intel_mst_disable_dp(struct intel_atomic_state *state, struct intel_dp *intel_dp = &dig_port->dp; struct intel_connector *connector = to_intel_connector(old_conn_state->connector); - struct drm_dp_mst_topology_state *mst_state = - drm_atomic_get_mst_topology_state(&state->base, &intel_dp->mst_mgr); - struct drm_dp_mst_atomic_payload *payload = - drm_atomic_get_mst_payload_state(mst_state, connector->port); + struct drm_dp_mst_topology_state *old_mst_state = + drm_atomic_get_old_mst_topology_state(&state->base, &intel_dp->mst_mgr); + struct drm_dp_mst_topology_state *new_mst_state = + drm_atomic_get_new_mst_topology_state(&state->base, &intel_dp->mst_mgr); + struct drm_dp_mst_atomic_payload *old_payload = + drm_atomic_get_mst_payload_state(old_mst_state, connector->port); + struct drm_dp_mst_atomic_payload *new_payload = + drm_atomic_get_mst_payload_state(new_mst_state, connector->port); struct drm_i915_private *i915 = to_i915(connector->base.dev); drm_dbg_kms(&i915->drm, "active links %d\n", @@ -535,8 +539,8 @@ static void intel_mst_disable_dp(struct intel_atomic_state *state, intel_hdcp_disable(intel_mst->connector); - drm_dp_remove_payload(&intel_dp->mst_mgr, mst_state, - payload, payload); + drm_dp_remove_payload(&intel_dp->mst_mgr, new_mst_state, + old_payload, new_payload); intel_audio_codec_disable(encoder, old_crtc_state, old_conn_state); } From patchwork Wed Jan 25 11:48:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Imre Deak X-Patchwork-Id: 13115595 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 91938C54E94 for ; Wed, 25 Jan 2023 11:49:14 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3F57410E7AE; Wed, 25 Jan 2023 11:49:08 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8D77610E7A7; Wed, 25 Jan 2023 11:49:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1674647345; x=1706183345; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fKoVRQNfxRte/j7ajZx9ISAihrKVDD3YxQnBEpRy6+U=; b=kEAg34YQSMIiAo6/BrtBaWkFSpMlgIIGpU9ayRDaaT0iFfZYEAk5paju AEPZ/0lq9hMXvZnvNKgZx+54WgjOkGQgITCm6AZL26Ip6s3wI6gc2EA3D WIc2oxYLCFuEhXD0mOxQD3GPnJWItpjcISfb+0av65eHw4a5QDlYSr8KV CFxkJbSGJ4cHN4BcR+KB4m8ncwfG2ii3Fh53NDI9N35H1VDJPwR2bI1if g8warHdptLlM1x0PsJVuVEeOt2h2EUgp0SamEFgaNlPUSaKAacHnXMpVT 5VjxMkSzWcgCC21Z51GDy6WQ+qmO39d3+NKMqqPild8+rkdnQR9t3x/ST w==; X-IronPort-AV: E=McAfee;i="6500,9779,10600"; a="412769930" X-IronPort-AV: E=Sophos;i="5.97,245,1669104000"; d="scan'208";a="412769930" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jan 2023 03:49:05 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10600"; a="786399712" X-IronPort-AV: E=Sophos;i="5.97,245,1669104000"; d="scan'208";a="786399712" Received: from ideak-desk.fi.intel.com ([10.237.72.58]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jan 2023 03:49:03 -0800 From: Imre Deak To: intel-gfx@lists.freedesktop.org Date: Wed, 25 Jan 2023 13:48:48 +0200 Message-Id: <20230125114852.748337-6-imre.deak@intel.com> X-Mailer: git-send-email 2.31.1.189.g2e36527f23 In-Reply-To: <20230125114852.748337-1-imre.deak@intel.com> References: <20230125114852.748337-1-imre.deak@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 5/9] drm/display/dp_mst: Fix the payload VCPI check in drm_dp_mst_dump_topology() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dri-devel@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Fix an off-by-one error in the VCPI check in drm_dp_mst_dump_topology(). Cc: Lyude Paul Cc: dri-devel@lists.freedesktop.org Signed-off-by: Imre Deak --- drivers/gpu/drm/display/drm_dp_mst_topology.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display/drm_dp_mst_topology.c index 81cc0c3b1e000..619f616d69e20 100644 --- a/drivers/gpu/drm/display/drm_dp_mst_topology.c +++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c @@ -4770,7 +4770,7 @@ void drm_dp_mst_dump_topology(struct seq_file *m, list_for_each_entry(payload, &state->payloads, next) { char name[14]; - if (payload->vcpi != i || payload->delete) + if (payload->vcpi != i + 1 || payload->delete) continue; fetch_monitor_name(mgr, payload->port, name, sizeof(name)); From patchwork Wed Jan 25 11:48:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Imre Deak X-Patchwork-Id: 13115596 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 17190C54EAA for ; Wed, 25 Jan 2023 11:49:16 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0DB8110E7AB; Wed, 25 Jan 2023 11:49:10 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id DA85510E7AB for ; Wed, 25 Jan 2023 11:49:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1674647346; x=1706183346; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=YPKk67RnYMuW9fTAOTLdlQgkp8kyvL7tAEJ8xBZQ4i0=; b=ZQugx09rL/uQQFA0dhkoXwuyaDe6C0fKtFLWVs9ovmoV4t+WMPeohhuK pTZGlA2QLr9HNktgDwUgi2Vhz9sKOouK2yurVae08l93Im8d/B2h8T6/o WPScy2uFUahDEjaEjYEskcJWeFtvYipkvRjwsLQCJNwuGx0EoaOFHg9hO S6nvdWPKPoh1VTzLIJalQy015/FqMMWIQy5MSQB44TP9tcNSAyNPCs9Um 0JdO7ZMeZ2CkM8amvU5LLUGlYBDYVRY/lw3cnPdVNXpoG5kWE4wi07r/O +DXQlrGY0FdUtBgPeZ9YvWuj5tO2xAZ1Q3DOGAwIJpI0QTKvZyfNy8F+A w==; X-IronPort-AV: E=McAfee;i="6500,9779,10600"; a="412769936" X-IronPort-AV: E=Sophos;i="5.97,245,1669104000"; d="scan'208";a="412769936" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jan 2023 03:49:06 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10600"; a="786399720" X-IronPort-AV: E=Sophos;i="5.97,245,1669104000"; d="scan'208";a="786399720" Received: from ideak-desk.fi.intel.com ([10.237.72.58]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jan 2023 03:49:05 -0800 From: Imre Deak To: intel-gfx@lists.freedesktop.org Date: Wed, 25 Jan 2023 13:48:49 +0200 Message-Id: <20230125114852.748337-7-imre.deak@intel.com> X-Mailer: git-send-email 2.31.1.189.g2e36527f23 In-Reply-To: <20230125114852.748337-1-imre.deak@intel.com> References: <20230125114852.748337-1-imre.deak@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 6/9] drm/i915: Factor out helpers for modesetting CRTCs and connectors X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Factor out and add the functions to intel_atomic.c to modeset pipes or connectors. These can be used in a few places, also making it a bit clearer where modeset forcing is needed. After this patch the MST topology state for modesetted CRTCs is added already in the connector's atomic check function, but that shouldn't matter since the state would be added later anyway in the encoders' compute config function. Also the crtc_state->update_pipe flag will be reset for CRTCs modesetted from a connector check function, but this should be ok, since the flag can get set only later in intel_crtc_check_fastset(). Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_atomic.c | 126 +++++++++++++++++++ drivers/gpu/drm/i915/display/intel_atomic.h | 7 ++ drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +- drivers/gpu/drm/i915/display/intel_display.c | 57 +-------- drivers/gpu/drm/i915/display/intel_display.h | 2 - drivers/gpu/drm/i915/display/intel_dp.c | 38 ++---- drivers/gpu/drm/i915/display/intel_dp_mst.c | 25 +--- drivers/gpu/drm/i915/display/skl_watermark.c | 2 +- 8 files changed, 145 insertions(+), 114 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c b/drivers/gpu/drm/i915/display/intel_atomic.c index a9a3f3715279d..38f77f83e7329 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic.c +++ b/drivers/gpu/drm/i915/display/intel_atomic.c @@ -38,6 +38,7 @@ #include "intel_atomic.h" #include "intel_cdclk.h" #include "intel_display_types.h" +#include "intel_dp_mst.h" #include "intel_global_state.h" #include "intel_hdcp.h" #include "intel_psr.h" @@ -613,3 +614,128 @@ intel_atomic_get_crtc_state(struct drm_atomic_state *state, return to_intel_crtc_state(crtc_state); } + +static int modeset_pipe(struct intel_atomic_state *state, + struct intel_crtc *crtc, const char *reason) +{ + struct drm_i915_private *i915 = to_i915(state->base.dev); + struct intel_crtc_state *crtc_state; + int ret; + + drm_dbg_kms(&i915->drm, "[CRTC:%d:%s] Full modeset due to %s\n", + crtc->base.base.id, crtc->base.name, reason); + + crtc_state = intel_atomic_get_crtc_state(&state->base, crtc); + if (IS_ERR(crtc_state)) + return PTR_ERR(crtc_state); + + crtc_state->uapi.mode_changed = true; + crtc_state->update_pipe = false; + + ret = intel_dp_mst_add_topology_state_for_crtc(state, crtc); + if (ret) + return ret; + + return intel_atomic_add_affected_planes(state, crtc); +} + +/** + * intel_atomic_modeset_connector - add a connector to the atomic state, force modeset on its CRTC if any + * @state: atomic state + * @connector: connector to add the state for + * @reason: the reason why the connector needs to be added + * + * Add the @connector to the atomic state with its CRTC state and force a modeset + * on the CRTC if any. + * + * This function can be called only before computing the new plane states. + * + * Returns 0 in case of success, a negative error code on failure. + */ +int intel_atomic_modeset_connector(struct intel_atomic_state *state, + struct intel_connector *connector, const char *reason) +{ + struct drm_i915_private *i915 = to_i915(state->base.dev); + struct drm_connector_state *conn_state; + + drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] Full modeset due to %s\n", + connector->base.base.id, connector->base.name, reason); + + conn_state = drm_atomic_get_connector_state(&state->base, &connector->base); + if (IS_ERR(conn_state)) + return PTR_ERR(conn_state); + + if (!conn_state->crtc) + return 0; + + return modeset_pipe(state, to_intel_crtc(conn_state->crtc), reason); +} + +/** + * intel_atomic_modeset_pipe - add a CRTC to the atomic state, force modeset on it + * @state: atomic state + * @crtc: CRTC to add the state for + * @reason: the reason why the CRTC needs to be added + * + * Add @crtc to the atomic state with all its connector and plane dependencies and + * force modeset on it. + * + * This function can be called only before computing the new plane states. + * + * Returns 0 in case of success, a negative error code on failure. + */ +int intel_atomic_modeset_pipe(struct intel_atomic_state *state, + struct intel_crtc *crtc, const char *reason) +{ + int ret; + + ret = drm_atomic_add_affected_connectors(&state->base, &crtc->base); + if (ret) + return ret; + + return modeset_pipe(state, crtc, reason); +} + +/** + * intel_atomic_modeset_all_pipes - add all active CRTCs to the atomic state, force modeset on them + * @state: atomic state + * @reason: the reason why the CRTCs need to be added + * + * Add all the CRTCs to the atomic state and if active also add their connector and plane + * dependencies and force a modeset on the CRTC. + * + * This function can be called only after computing the new plane states. + * + * Returns 0 in case of success, a negative error code on failure. + */ +int intel_atomic_modeset_all_pipes(struct intel_atomic_state *state, + const char *reason) +{ + struct drm_i915_private *dev_priv = to_i915(state->base.dev); + struct intel_crtc *crtc; + + /* + * Add all pipes to the state, and force + * a modeset on all the active ones. + */ + for_each_intel_crtc(&dev_priv->drm, crtc) { + struct intel_crtc_state *crtc_state; + int ret; + + crtc_state = intel_atomic_get_crtc_state(&state->base, crtc); + if (IS_ERR(crtc_state)) + return PTR_ERR(crtc_state); + + if (!crtc_state->hw.active || + intel_crtc_needs_modeset(crtc_state)) + continue; + + ret = intel_atomic_modeset_pipe(state, crtc, reason); + if (ret) + return ret; + + crtc_state->update_planes |= crtc_state->active_planes; + } + + return 0; +} diff --git a/drivers/gpu/drm/i915/display/intel_atomic.h b/drivers/gpu/drm/i915/display/intel_atomic.h index 1dc439983dd94..84295d388e3cb 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic.h +++ b/drivers/gpu/drm/i915/display/intel_atomic.h @@ -56,4 +56,11 @@ int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv, struct intel_crtc *intel_crtc, struct intel_crtc_state *crtc_state); +int intel_atomic_modeset_pipe(struct intel_atomic_state *state, + struct intel_crtc *crtc, const char *reason); +int intel_atomic_modeset_connector(struct intel_atomic_state *state, + struct intel_connector *connector, const char *reason); +int intel_atomic_modeset_all_pipes(struct intel_atomic_state *state, + const char *reason); + #endif /* __INTEL_ATOMIC_H__ */ diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c index 0c107a38f9d00..e4d64f82b975a 100644 --- a/drivers/gpu/drm/i915/display/intel_cdclk.c +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c @@ -2919,7 +2919,7 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state *state) } else if (intel_cdclk_needs_modeset(&old_cdclk_state->actual, &new_cdclk_state->actual)) { /* All pipes must be switched off while we change the cdclk. */ - ret = intel_modeset_all_pipes(state, "CDCLK change"); + ret = intel_atomic_modeset_all_pipes(state, "CDCLK change"); if (ret) return ret; diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index d3994e2a7d636..b1e895b01c111 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -5901,53 +5901,6 @@ intel_verify_planes(struct intel_atomic_state *state) plane_state->uapi.visible); } -int intel_modeset_all_pipes(struct intel_atomic_state *state, - const char *reason) -{ - struct drm_i915_private *dev_priv = to_i915(state->base.dev); - struct intel_crtc *crtc; - - /* - * Add all pipes to the state, and force - * a modeset on all the active ones. - */ - for_each_intel_crtc(&dev_priv->drm, crtc) { - struct intel_crtc_state *crtc_state; - int ret; - - crtc_state = intel_atomic_get_crtc_state(&state->base, crtc); - if (IS_ERR(crtc_state)) - return PTR_ERR(crtc_state); - - if (!crtc_state->hw.active || - intel_crtc_needs_modeset(crtc_state)) - continue; - - drm_dbg_kms(&dev_priv->drm, "[CRTC:%d:%s] Full modeset due to %s\n", - crtc->base.base.id, crtc->base.name, reason); - - crtc_state->uapi.mode_changed = true; - crtc_state->update_pipe = false; - - ret = drm_atomic_add_affected_connectors(&state->base, - &crtc->base); - if (ret) - return ret; - - ret = intel_dp_mst_add_topology_state_for_crtc(state, crtc); - if (ret) - return ret; - - ret = intel_atomic_add_affected_planes(state, crtc); - if (ret) - return ret; - - crtc_state->update_planes |= crtc_state->active_planes; - } - - return 0; -} - void intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state) { struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); @@ -6667,15 +6620,7 @@ static int intel_bigjoiner_add_affected_crtcs(struct intel_atomic_state *state) for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, modeset_pipes) { int ret; - crtc_state = intel_atomic_get_new_crtc_state(state, crtc); - - crtc_state->uapi.mode_changed = true; - - ret = drm_atomic_add_affected_connectors(&state->base, &crtc->base); - if (ret) - return ret; - - ret = intel_atomic_add_affected_planes(state, crtc); + ret = intel_atomic_modeset_pipe(state, crtc, "big joiner"); if (ret) return ret; } diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index ef73730f32b09..1e64f94045cdc 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -650,8 +650,6 @@ void intel_modeset_driver_remove(struct drm_i915_private *i915); void intel_modeset_driver_remove_noirq(struct drm_i915_private *i915); void intel_modeset_driver_remove_nogem(struct drm_i915_private *i915); void intel_display_resume(struct drm_device *dev); -int intel_modeset_all_pipes(struct intel_atomic_state *state, - const char *reason); void intel_modeset_get_crtc_power_domains(struct intel_crtc_state *crtc_state, struct intel_power_domain_mask *old_domains); void intel_modeset_put_crtc_power_domains(struct intel_crtc *crtc, diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 478653e11f4da..441fbbfa2d008 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -4906,35 +4906,17 @@ static int intel_modeset_tile_group(struct intel_atomic_state *state, { struct drm_i915_private *dev_priv = to_i915(state->base.dev); struct drm_connector_list_iter conn_iter; - struct drm_connector *connector; + struct intel_connector *connector; int ret = 0; drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); - drm_for_each_connector_iter(connector, &conn_iter) { - struct drm_connector_state *conn_state; - struct intel_crtc_state *crtc_state; - struct intel_crtc *crtc; - - if (!connector->has_tile || - connector->tile_group->id != tile_group_id) - continue; - - conn_state = drm_atomic_get_connector_state(&state->base, - connector); - if (IS_ERR(conn_state)) { - ret = PTR_ERR(conn_state); - break; - } - - crtc = to_intel_crtc(conn_state->crtc); - - if (!crtc) + for_each_intel_connector_iter(connector, &conn_iter) { + if (!connector->base.has_tile || + connector->base.tile_group->id != tile_group_id) continue; - crtc_state = intel_atomic_get_new_crtc_state(state, crtc); - crtc_state->uapi.mode_changed = true; - - ret = drm_atomic_add_affected_planes(&state->base, &crtc->base); + ret = intel_atomic_modeset_connector(state, connector, + "connector tile group"); if (ret) break; } @@ -4965,13 +4947,7 @@ static int intel_modeset_affected_transcoders(struct intel_atomic_state *state, if (!(transcoders & BIT(crtc_state->cpu_transcoder))) continue; - crtc_state->uapi.mode_changed = true; - - ret = drm_atomic_add_affected_connectors(&state->base, &crtc->base); - if (ret) - return ret; - - ret = drm_atomic_add_affected_planes(&state->base, &crtc->base); + ret = intel_atomic_modeset_pipe(state, crtc, "port syncing"); if (ret) return ret; diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 800fa12a61d93..5790fabc39e7e 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -434,35 +434,14 @@ intel_dp_mst_atomic_master_trans_check(struct intel_connector *connector, drm_connector_list_iter_begin(&dev_priv->drm, &connector_list_iter); for_each_intel_connector_iter(connector_iter, &connector_list_iter) { - struct intel_digital_connector_state *conn_iter_state; - struct intel_crtc_state *crtc_state; - struct intel_crtc *crtc; - if (connector_iter->mst_port != connector->mst_port || connector_iter == connector) continue; - conn_iter_state = intel_atomic_get_digital_connector_state(state, - connector_iter); - if (IS_ERR(conn_iter_state)) { - ret = PTR_ERR(conn_iter_state); - break; - } - - if (!conn_iter_state->base.crtc) - continue; - - crtc = to_intel_crtc(conn_iter_state->base.crtc); - crtc_state = intel_atomic_get_crtc_state(&state->base, crtc); - if (IS_ERR(crtc_state)) { - ret = PTR_ERR(crtc_state); - break; - } - - ret = drm_atomic_add_affected_planes(&state->base, &crtc->base); + ret = intel_atomic_modeset_connector(state, connector_iter, + "MST master transcoder"); if (ret) break; - crtc_state->uapi.mode_changed = true; } drm_connector_list_iter_end(&connector_list_iter); diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index ae4e9e680c2e3..1a029fb01a039 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -2481,7 +2481,7 @@ skl_compute_ddb(struct intel_atomic_state *state) if (old_dbuf_state->joined_mbus != new_dbuf_state->joined_mbus) { /* TODO: Implement vblank synchronized MBUS joining changes */ - ret = intel_modeset_all_pipes(state, "MBUS joining change"); + ret = intel_atomic_modeset_all_pipes(state, "MBUS joining change"); if (ret) return ret; } From patchwork Wed Jan 25 11:48:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Imre Deak X-Patchwork-Id: 13115597 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5C0D9C61D9D for ; Wed, 25 Jan 2023 11:49:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A54AE10E7B0; Wed, 25 Jan 2023 11:49:10 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id DF68710E7AB for ; Wed, 25 Jan 2023 11:49:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1674647347; x=1706183347; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=ecwOdAfmY1AciHA0z/YEYBYLzvkHL/e2hsy9rwozORI=; b=HhImjow5FNx23teibf/nIYgIIJvb+yF7kABF91XzNyDEHaamGgtTTrsy YxmdLut9iHySaXsKc6asHuOfvZO8Pce5VDaC+8NMlEhtLxfZptkuUKoX9 hD0B8+4M/tLHmbFkOLzhE39FseWRMG25knxyVhxjAXKwcRulAvGPgiW74 R1BGOZMziWUm0ZsxB7x15/xiwem5EQxALbJIJZhI7bjOawfH5mThLvi3g 44F96LDE2FQBTSCThtbJG7lAVB2dAubvvRZVf2X2yYE1K5Fx5cAm/EYcv KJRlK3tUiC+w2glY7o26R4jM6piesX4/u5Thx1rNMoriZAv0z3aS7Xz1t Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10600"; a="412769940" X-IronPort-AV: E=Sophos;i="5.97,245,1669104000"; d="scan'208";a="412769940" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jan 2023 03:49:07 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10600"; a="786399727" X-IronPort-AV: E=Sophos;i="5.97,245,1669104000"; d="scan'208";a="786399727" Received: from ideak-desk.fi.intel.com ([10.237.72.58]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jan 2023 03:49:06 -0800 From: Imre Deak To: intel-gfx@lists.freedesktop.org Date: Wed, 25 Jan 2023 13:48:50 +0200 Message-Id: <20230125114852.748337-8-imre.deak@intel.com> X-Mailer: git-send-email 2.31.1.189.g2e36527f23 In-Reply-To: <20230125114852.748337-1-imre.deak@intel.com> References: <20230125114852.748337-1-imre.deak@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 7/9] drm/i915/dp_mst: Move getting the MST topology state earlier to connector check X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Atm, the MST topology state for modesetted CRTCs may get added only in the encoder's compute config function. To make this more consistent with other encoders add these states already earlier in the connector atomic check function and just get the new MST state in the encoder's compute config function which shouldn't fail. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp_mst.c | 23 ++++++++++++++------- 1 file changed, 15 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 5790fabc39e7e..6726fd36723d7 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -66,9 +66,9 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder, int bpp, slots = -EINVAL; int ret = 0; - mst_state = drm_atomic_get_mst_topology_state(state, &intel_dp->mst_mgr); - if (IS_ERR(mst_state)) - return PTR_ERR(mst_state); + mst_state = drm_atomic_get_new_mst_topology_state(state, &intel_dp->mst_mgr); + if (drm_WARN_ON(&i915->drm, !mst_state)) + return -EINVAL; crtc_state->lane_count = limits->max_lane_count; crtc_state->port_clock = limits->max_rate; @@ -254,11 +254,9 @@ static int intel_dp_mst_update_slots(struct intel_encoder *encoder, u8 link_coding_cap = intel_dp_is_uhbr(crtc_state) ? DP_CAP_ANSI_128B132B : DP_CAP_ANSI_8B10B; - topology_state = drm_atomic_get_mst_topology_state(conn_state->state, mgr); - if (IS_ERR(topology_state)) { - drm_dbg_kms(&i915->drm, "slot update failed\n"); - return PTR_ERR(topology_state); - } + topology_state = drm_atomic_get_new_mst_topology_state(conn_state->state, mgr); + if (drm_WARN_ON(&i915->drm, !topology_state)) + return -EINVAL; drm_dp_mst_update_slots(topology_state, link_coding_cap); @@ -465,6 +463,15 @@ intel_dp_mst_atomic_check(struct drm_connector *connector, if (ret) return ret; + if (intel_connector_needs_modeset(state, &intel_connector->base)) { + struct drm_dp_mst_topology_state *mst_state; + + mst_state = drm_atomic_get_mst_topology_state(&state->base, + &intel_connector->mst_port->mst_mgr); + if (IS_ERR(mst_state)) + return PTR_ERR(mst_state); + } + return drm_dp_atomic_release_time_slots(&state->base, &intel_connector->mst_port->mst_mgr, intel_connector->port); From patchwork Wed Jan 25 11:48:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Imre Deak X-Patchwork-Id: 13115598 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1D202C54E94 for ; Wed, 25 Jan 2023 11:49:30 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A6BE910E7B4; Wed, 25 Jan 2023 11:49:29 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7CCCC10E7AB; Wed, 25 Jan 2023 11:49:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1674647349; x=1706183349; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=YlTdXMcBwi1pWu+UeyfEWMh7EaevaL7ebvCBbeGg7R8=; b=a2lzXI+y1qbpsBoP7uDAsEBMmL3M5677QI0e1Rpyq09g+VeLWXKhOXrR DwQHI6OPMGkXgQZHHeiOcyoG0B3r4y2CsT+wlgM4qs94NHI1775fU/Dpe 4ydZdinAfCSygpGaS0sKq/Vgtv+tB/TtWJYEvYDTP9+oJ8OzBPDBTgnyw JACl5NwdOHH7xj1rZ48ur5ck25WJhcipOMxFY0Le9XejJLhXt+EoVVDW1 CXP7zJ8ptLKJ5H3gcHEyiO4xbxwvn3zdw3MVfi/vQsIn74yzlxRdZdhVz AaIBw9oxoh7b2W+ez0HFsVpaHKmsObbuCcRRlaTVLRB4tKm9GJQHznYda Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10600"; a="412769945" X-IronPort-AV: E=Sophos;i="5.97,245,1669104000"; d="scan'208";a="412769945" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jan 2023 03:49:09 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10600"; a="786399730" X-IronPort-AV: E=Sophos;i="5.97,245,1669104000"; d="scan'208";a="786399730" Received: from ideak-desk.fi.intel.com ([10.237.72.58]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jan 2023 03:49:07 -0800 From: Imre Deak To: intel-gfx@lists.freedesktop.org Date: Wed, 25 Jan 2023 13:48:51 +0200 Message-Id: <20230125114852.748337-9-imre.deak@intel.com> X-Mailer: git-send-email 2.31.1.189.g2e36527f23 In-Reply-To: <20230125114852.748337-1-imre.deak@intel.com> References: <20230125114852.748337-1-imre.deak@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 8/9] drm/display/dp_mst: Add a helper to verify the MST payload state X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dri-devel@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add a function drivers can use to verify the MST payload state tracking and compare this to the sink's payload table. Cc: Lyude Paul Cc: dri-devel@lists.freedesktop.org Signed-off-by: Imre Deak --- drivers/gpu/drm/display/drm_dp_mst_topology.c | 169 ++++++++++++++++++ include/drm/display/drm_dp.h | 3 + include/drm/display/drm_dp_mst_helper.h | 3 + 3 files changed, 175 insertions(+) diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display/drm_dp_mst_topology.c index 619f616d69e20..7597d27db4fa6 100644 --- a/drivers/gpu/drm/display/drm_dp_mst_topology.c +++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c @@ -4834,6 +4834,175 @@ void drm_dp_mst_dump_topology(struct seq_file *m, } EXPORT_SYMBOL(drm_dp_mst_dump_topology); +static bool verify_mst_payload_state(struct drm_dp_mst_topology_state *mst_state) +{ + struct drm_dp_mst_topology_mgr *mgr = mst_state->mgr; + struct drm_dp_mst_atomic_payload *payload; + int payload_count = 0; + u64 time_slot_mask = 0; + u32 vcpi_mask = 0; + int last_set; + + if (BITS_PER_TYPE(time_slot_mask) < mst_state->total_avail_slots) + return false; + + list_for_each_entry(payload, &mst_state->payloads, next) { + u64 mask; + + if (payload->vc_start_slot == -1) + continue; + + if (!payload->time_slots) + return false; + + if (payload->vc_start_slot < mst_state->start_slot) + return false; + + if (payload->vc_start_slot + payload->time_slots - mst_state->start_slot > + mst_state->total_avail_slots) + return false; + + mask = GENMASK_ULL(payload->vc_start_slot + payload->time_slots - 1, + payload->vc_start_slot); + + if (time_slot_mask & mask) + return false; + + time_slot_mask |= mask; + + if (payload->vcpi < 1 || + payload->vcpi & ~DP_PAYLOAD_ID_MASK || + payload->vcpi > BITS_PER_TYPE(vcpi_mask)) + return false; + if (BIT(payload->vcpi - 1) & vcpi_mask) + return false; + vcpi_mask |= BIT(payload->vcpi - 1); + + payload_count++; + } + + if (payload_count != mgr->payload_count) + return false; + + last_set = fls64(time_slot_mask); + + if (last_set && + GENMASK_ULL(last_set - 1, mst_state->start_slot) != time_slot_mask) + return false; + + if (max(mst_state->start_slot, mgr->next_start_slot) != + max_t(int, mst_state->start_slot, last_set)) + return false; + + return true; +} + +static int get_payload_table_vcpi(const u8 *table, int slot) +{ + if (slot == 0) + return FIELD_GET(DP_PAYLOAD_ID_SLOT0_5_0_MASK, table[0]) | + (FIELD_GET(DP_PAYLOAD_ID_SLOT0_6, table[1]) << 6); + else + return FIELD_GET(DP_PAYLOAD_ID_MASK, table[slot]); +} + +static bool verify_mst_payload_table(struct drm_dp_mst_topology_state *mst_state, + const u8 *payload_table) +{ + struct drm_dp_mst_topology_mgr *mgr = mst_state->mgr; + struct drm_dp_mst_atomic_payload *payload; + int i; + + list_for_each_entry(payload, &mst_state->payloads, next) { + if (payload->vc_start_slot == -1) + continue; + + if (payload->vc_start_slot + payload->time_slots > DP_PAYLOAD_TABLE_SIZE) + return false; + + for (i = 0; i < payload->time_slots; i++) + if (get_payload_table_vcpi(payload_table, + payload->vc_start_slot + i) != payload->vcpi) + return false; + } + + for (i = max(mgr->next_start_slot, mst_state->start_slot); + i < DP_PAYLOAD_TABLE_SIZE; + i++) { + if (get_payload_table_vcpi(payload_table, i) != 0) + return false; + } + + return true; +} + +static void print_mst_payload_state(struct drm_dp_mst_topology_mgr *mgr, + struct drm_dp_mst_topology_state *mst_state, + const u8 *payload_table) +{ + struct drm_dp_mst_atomic_payload *payload; + int i = 0; + + drm_dbg(mgr->dev, + "Payload state: start_slot %d total_avail_slots %d next_start_slot %d payload_count %d\n", + mst_state->start_slot, mst_state->total_avail_slots, + mgr->next_start_slot, mgr->payload_count); + + list_for_each_entry(payload, &mst_state->payloads, next) { + drm_dbg(mgr->dev, + " Payload#%d: port %p VCPI %d delete %d vc_start_slot %d time_slots %d\n", + i, payload->port, payload->vcpi, + payload->delete, payload->vc_start_slot, payload->time_slots); + i++; + } + + if (!payload_table) + return; + + drm_dbg(mgr->dev, "Payload table:\n"); + print_hex_dump(KERN_DEBUG, " Ptbl ", + DUMP_PREFIX_OFFSET, 16, 1, + payload_table, DP_PAYLOAD_TABLE_SIZE, false); +} + +/** + * drm_dp_mst_verify_payload_state - Verify the atomic state for payloads and the related sink payload table + * @state: atomic state + * @mgr: manager to verify the state for + * @verify_sink: %true if the sink payload table needs to be verified as well + * + * Verify @mgr's atomic state tracking all its payloads and optionally the + * related sink payload table. + */ +void drm_dp_mst_verify_payload_state(struct drm_atomic_state *state, + struct drm_dp_mst_topology_mgr *mgr, + bool verify_sink) +{ + struct drm_dp_mst_topology_state *mst_state; + u8 payload_table[DP_PAYLOAD_TABLE_SIZE]; + + mst_state = drm_atomic_get_new_mst_topology_state(state, mgr); + if (drm_WARN_ON(mgr->dev, !mst_state)) + return; + + if (drm_WARN_ON(mgr->dev, !verify_mst_payload_state(mst_state))) { + print_mst_payload_state(mgr, mst_state, NULL); + return; + } + + if (!verify_sink) + return; + + if (!dump_dp_payload_table(mgr, payload_table)) + return; + + if (!verify_mst_payload_table(mst_state, payload_table)) { + drm_err(mgr->dev, "MST payload state mismatches payload table\n"); + print_mst_payload_state(mgr, mst_state, payload_table); + } +} +EXPORT_SYMBOL(drm_dp_mst_verify_payload_state); + static void drm_dp_tx_work(struct work_struct *work) { struct drm_dp_mst_topology_mgr *mgr = container_of(work, struct drm_dp_mst_topology_mgr, tx_work); diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h index 632376c291db6..bcc5183188a68 100644 --- a/include/drm/display/drm_dp.h +++ b/include/drm/display/drm_dp.h @@ -925,9 +925,12 @@ #define DP_PAYLOAD_TABLE_UPDATE_STATUS 0x2c0 /* 1.2 MST */ # define DP_PAYLOAD_TABLE_UPDATED (1 << 0) # define DP_PAYLOAD_ACT_HANDLED (1 << 1) +# define DP_PAYLOAD_ID_SLOT0_5_0_MASK (0x3f << 2) #define DP_VC_PAYLOAD_ID_SLOT_1 0x2c1 /* 1.2 MST */ /* up to ID_SLOT_63 at 0x2ff */ +# define DP_PAYLOAD_ID_SLOT0_6 (1 << 7) +# define DP_PAYLOAD_ID_MASK 0x7f /* Source Device-specific */ #define DP_SOURCE_OUI 0x300 diff --git a/include/drm/display/drm_dp_mst_helper.h b/include/drm/display/drm_dp_mst_helper.h index 32c764fb9cb56..44c6710ebf315 100644 --- a/include/drm/display/drm_dp_mst_helper.h +++ b/include/drm/display/drm_dp_mst_helper.h @@ -848,6 +848,9 @@ int drm_dp_check_act_status(struct drm_dp_mst_topology_mgr *mgr); void drm_dp_mst_dump_topology(struct seq_file *m, struct drm_dp_mst_topology_mgr *mgr); +void drm_dp_mst_verify_payload_state(struct drm_atomic_state *state, + struct drm_dp_mst_topology_mgr *mgr, + bool verify_sink); void drm_dp_mst_topology_mgr_suspend(struct drm_dp_mst_topology_mgr *mgr); int __must_check From patchwork Wed Jan 25 11:48:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Imre Deak X-Patchwork-Id: 13115599 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 23CF8C27C76 for ; Wed, 25 Jan 2023 11:49:31 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 86D6110E7AD; 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25 Jan 2023 03:49:10 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10600"; a="786399735" X-IronPort-AV: E=Sophos;i="5.97,245,1669104000"; d="scan'208";a="786399735" Received: from ideak-desk.fi.intel.com ([10.237.72.58]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jan 2023 03:49:09 -0800 From: Imre Deak To: intel-gfx@lists.freedesktop.org Date: Wed, 25 Jan 2023 13:48:52 +0200 Message-Id: <20230125114852.748337-10-imre.deak@intel.com> X-Mailer: git-send-email 2.31.1.189.g2e36527f23 In-Reply-To: <20230125114852.748337-1-imre.deak@intel.com> References: <20230125114852.748337-1-imre.deak@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 9/9] drm/i915/dp_mst: Verify the MST state of modesetted outputs X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Verify the MST state after disabling/enabling outputs during an atomic commit. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_display.c | 4 ++- drivers/gpu/drm/i915/display/intel_dp.c | 2 +- drivers/gpu/drm/i915/display/intel_dp.h | 1 + drivers/gpu/drm/i915/display/intel_dp_mst.c | 33 +++++++++++++++++++ drivers/gpu/drm/i915/display/intel_dp_mst.h | 1 + .../drm/i915/display/intel_modeset_verify.c | 2 ++ 6 files changed, 41 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index b1e895b01c111..8efa3a29faafc 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7537,8 +7537,10 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) intel_check_cpu_fifo_underruns(dev_priv); intel_check_pch_fifo_underruns(dev_priv); - if (state->modeset) + if (state->modeset) { intel_verify_planes(state); + intel_dp_mst_verify_state(state); + } intel_sagv_post_plane_update(state); diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 441fbbfa2d008..a87e3d04e5cb8 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -4086,7 +4086,7 @@ static int intel_dp_prep_link_retrain(struct intel_dp *intel_dp, return ret; } -static bool intel_dp_is_connected(struct intel_dp *intel_dp) +bool intel_dp_is_connected(struct intel_dp *intel_dp) { struct intel_connector *connector = intel_dp->attached_connector; diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index ef39e4f7a329e..1294384840190 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -102,6 +102,7 @@ void intel_read_dp_sdp(struct intel_encoder *encoder, struct intel_crtc_state *crtc_state, unsigned int type); bool intel_digital_port_connected(struct intel_encoder *encoder); +bool intel_dp_is_connected(struct intel_dp *intel_dp); int intel_dp_dsc_compute_bpp(struct intel_dp *intel_dp, u8 dsc_max_bpc); u16 intel_dp_dsc_get_output_bpp(struct drm_i915_private *i915, u32 link_clock, u32 lane_count, diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 6726fd36723d7..821d149151ef3 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -1252,3 +1252,36 @@ int intel_dp_mst_add_topology_state_for_crtc(struct intel_atomic_state *state, return 0; } + +/** + * intel_dp_mst_verify_state - Verify the MST state for all connectors in the atomic state + * @state: atomic state + * + * Verify the MST SW and sink state for all modesetted MST connector in @state. + */ +void intel_dp_mst_verify_state(struct intel_atomic_state *state) +{ + struct drm_connector *_connector; + struct drm_connector_state *conn_state; + u32 encoder_mask = 0; + int i; + + for_each_new_connector_in_state(&state->base, _connector, conn_state, i) { + struct intel_connector *connector = to_intel_connector(_connector); + struct intel_encoder *encoder; + + if (!connector->mst_port || + !intel_connector_needs_modeset(state, &connector->base)) + continue; + + encoder = &dp_to_dig_port(connector->mst_port)->base; + if (encoder_mask & drm_encoder_index(&encoder->base)) + continue; + + encoder_mask |= drm_encoder_index(&encoder->base); + + drm_dp_mst_verify_payload_state(&state->base, + &connector->mst_port->mst_mgr, + intel_dp_is_connected(connector->mst_port)); + } +} diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.h b/drivers/gpu/drm/i915/display/intel_dp_mst.h index 0cd05a9a78a25..7f77e471ddfc3 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.h +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.h @@ -20,5 +20,6 @@ bool intel_dp_mst_is_slave_trans(const struct intel_crtc_state *crtc_state); bool intel_dp_mst_source_support(struct intel_dp *intel_dp); int intel_dp_mst_add_topology_state_for_crtc(struct intel_atomic_state *state, struct intel_crtc *crtc); +void intel_dp_mst_verify_state(struct intel_atomic_state *state); #endif /* __INTEL_DP_MST_H__ */ diff --git a/drivers/gpu/drm/i915/display/intel_modeset_verify.c b/drivers/gpu/drm/i915/display/intel_modeset_verify.c index 842d70f0dfd2a..45f0d9789ef8e 100644 --- a/drivers/gpu/drm/i915/display/intel_modeset_verify.c +++ b/drivers/gpu/drm/i915/display/intel_modeset_verify.c @@ -13,6 +13,7 @@ #include "intel_crtc_state_dump.h" #include "intel_display.h" #include "intel_display_types.h" +#include "intel_dp_mst.h" #include "intel_fdi.h" #include "intel_modeset_verify.h" #include "intel_snps_phy.h" @@ -244,4 +245,5 @@ void intel_modeset_verify_disabled(struct drm_i915_private *dev_priv, verify_encoder_state(dev_priv, state); verify_connector_state(state, NULL); intel_shared_dpll_verify_disabled(dev_priv); + intel_dp_mst_verify_state(state); }