From patchwork Fri Jan 27 09:21:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 13118275 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6EC11C54EAA for ; Fri, 27 Jan 2023 09:22:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=y3agd7EOg54SOkRnlzZrfBacjNgZ/BAu5BQPwXxspZg=; b=YarLuS71l56gp6 IdNaqX4AbOgG1DDIrw5S3qMThfg0VThPepM17NEanfu7DJRYgbFVGWIwxRfeuarhrWIR1YZSB2m5O eWMUqj/NN5wyJbrGd0o6y2TmUC/dp4zvjusf6Bk6FywtsXShPwuJS87gIS+WJhTZ60G3tfV10InTa I9RVcS5Xhe3GgvUHzjf4MjGnYGJquCY6fNC3v4Tw2hceoKJ/zlNhJbHssdBSlymYSJYf3ZrR4saqe aAMVs+d9R1w9askDh09lVzgcoTl1MH23TgX5oCwJYcxipMmhYAiX8ixXI3ljzPn1zqb3Z5ps5jbfg IFLQxt4DcYBU4nIE6abg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pLKwE-00DcbX-6q; Fri, 27 Jan 2023 09:22:26 +0000 Received: from madras.collabora.co.uk ([46.235.227.172]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pLKvR-00DcHQ-I3; Fri, 27 Jan 2023 09:21:40 +0000 Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:4623:efe7:8a8:33c2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id 53DF06602E8E; Fri, 27 Jan 2023 09:21:33 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1674811293; bh=ZDhonQijDlK2AYULDGmykqxwQvpOLeaj4GP06FPs1lQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=a1RoIR12Gi3H1o41BoP15l9NhOeSf+TZ0jBqVf5ofWGtobHhFHPifCFG6kgnBY2Yz 4x5DqEdpqKe8E/yCahYscreMPLG9sxcbCzTYZjq+I9AsbBQNmrryq1/8FDlp/v05l4 H+4NvkAi1l4YrjXl0qTCZgqKB0f2b47IgLdN7BLcwu2Md4QNRXg2M9liRMzzUkGcH9 sVGQsMblbIU7ebxZeue63AyUxD7L1fbAxitYfcdg1mY4knfJdYe/Jf2zJJ6mnm0ajR hLiGT5C8Vb5HdJMHGeBvbgmN8Mzo81zoXwZ5HDQZ56KSZfvAiYZFbA2qlBwMkyKASy ezkM6hJvoQzuw== From: Benjamin Gaignard To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, mchehab@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, hverkuil-cisco@xs4all.nl, nicolas.dufresne@collabora.co.uk Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, Benjamin Gaignard , Nicolas Dufresne Subject: [PATCH v5 1/2] media: verisilicon: Do not change context bit depth before validating the format Date: Fri, 27 Jan 2023 10:21:25 +0100 Message-Id: <20230127092126.318268-2-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230127092126.318268-1-benjamin.gaignard@collabora.com> References: <20230127092126.318268-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230127_012137_924143_B5E5FD1C X-CRM114-Status: GOOD ( 18.34 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org It is needed to check if the proposed pixels format is valid before updating context bit depth and other internal states. Stop using ctx->bit_depth to check format depth match and return result to the caller. Fixes: dc39473d0340 ("media: hantro: imx8m: Enable 10bit decoding") Signed-off-by: Benjamin Gaignard Reviewed-by: Nicolas Dufresne --- version 5: - Add Review and Fixes tags .../platform/verisilicon/hantro_postproc.c | 2 +- .../media/platform/verisilicon/hantro_v4l2.c | 53 +++++++++---------- .../media/platform/verisilicon/hantro_v4l2.h | 3 +- 3 files changed, 28 insertions(+), 30 deletions(-) diff --git a/drivers/media/platform/verisilicon/hantro_postproc.c b/drivers/media/platform/verisilicon/hantro_postproc.c index 09d8cf942689..6437423ccf3a 100644 --- a/drivers/media/platform/verisilicon/hantro_postproc.c +++ b/drivers/media/platform/verisilicon/hantro_postproc.c @@ -197,7 +197,7 @@ int hantro_postproc_alloc(struct hantro_ctx *ctx) unsigned int i, buf_size; /* this should always pick native format */ - fmt = hantro_get_default_fmt(ctx, false); + fmt = hantro_get_default_fmt(ctx, false, ctx->bit_depth); if (!fmt) return -EINVAL; v4l2_fill_pixfmt_mp(&pix_mp, fmt->fourcc, ctx->src_fmt.width, diff --git a/drivers/media/platform/verisilicon/hantro_v4l2.c b/drivers/media/platform/verisilicon/hantro_v4l2.c index 2c7a805289e7..2475bc05dee9 100644 --- a/drivers/media/platform/verisilicon/hantro_v4l2.c +++ b/drivers/media/platform/verisilicon/hantro_v4l2.c @@ -76,17 +76,16 @@ int hantro_get_format_depth(u32 fourcc) } static bool -hantro_check_depth_match(const struct hantro_ctx *ctx, - const struct hantro_fmt *fmt) +hantro_check_depth_match(const struct hantro_fmt *fmt, int bit_depth) { - int fmt_depth, ctx_depth = 8; + int fmt_depth, depth = 8; if (!fmt->match_depth && !fmt->postprocessed) return true; /* 0 means default depth, which is 8 */ - if (ctx->bit_depth) - ctx_depth = ctx->bit_depth; + if (bit_depth) + depth = bit_depth; fmt_depth = hantro_get_format_depth(fmt->fourcc); @@ -95,9 +94,9 @@ hantro_check_depth_match(const struct hantro_ctx *ctx, * It may be possible to relax that on some HW. */ if (!fmt->match_depth) - return fmt_depth <= ctx_depth; + return fmt_depth <= depth; - return fmt_depth == ctx_depth; + return fmt_depth == depth; } static const struct hantro_fmt * @@ -119,7 +118,7 @@ hantro_find_format(const struct hantro_ctx *ctx, u32 fourcc) } const struct hantro_fmt * -hantro_get_default_fmt(const struct hantro_ctx *ctx, bool bitstream) +hantro_get_default_fmt(const struct hantro_ctx *ctx, bool bitstream, int bit_depth) { const struct hantro_fmt *formats; unsigned int i, num_fmts; @@ -128,7 +127,7 @@ hantro_get_default_fmt(const struct hantro_ctx *ctx, bool bitstream) for (i = 0; i < num_fmts; i++) { if (bitstream == (formats[i].codec_mode != HANTRO_MODE_NONE) && - hantro_check_depth_match(ctx, &formats[i])) + hantro_check_depth_match(&formats[i], bit_depth)) return &formats[i]; } return NULL; @@ -203,7 +202,7 @@ static int vidioc_enum_fmt(struct file *file, void *priv, if (skip_mode_none == mode_none) continue; - if (!hantro_check_depth_match(ctx, fmt)) + if (!hantro_check_depth_match(fmt, ctx->bit_depth)) continue; if (j == f->index) { f->pixelformat = fmt->fourcc; @@ -223,7 +222,7 @@ static int vidioc_enum_fmt(struct file *file, void *priv, for (i = 0; i < num_fmts; i++) { fmt = &formats[i]; - if (!hantro_check_depth_match(ctx, fmt)) + if (!hantro_check_depth_match(fmt, ctx->bit_depth)) continue; if (j == f->index) { f->pixelformat = fmt->fourcc; @@ -291,7 +290,7 @@ static int hantro_try_fmt(const struct hantro_ctx *ctx, fmt = hantro_find_format(ctx, pix_mp->pixelformat); if (!fmt) { - fmt = hantro_get_default_fmt(ctx, coded); + fmt = hantro_get_default_fmt(ctx, coded, 0); pix_mp->pixelformat = fmt->fourcc; } @@ -379,15 +378,12 @@ hantro_reset_encoded_fmt(struct hantro_ctx *ctx) const struct hantro_fmt *vpu_fmt; struct v4l2_pix_format_mplane *fmt; - vpu_fmt = hantro_get_default_fmt(ctx, true); + vpu_fmt = hantro_get_default_fmt(ctx, true, 0); - if (ctx->is_encoder) { - ctx->vpu_dst_fmt = vpu_fmt; + if (ctx->is_encoder) fmt = &ctx->dst_fmt; - } else { - ctx->vpu_src_fmt = vpu_fmt; + else fmt = &ctx->src_fmt; - } hantro_reset_fmt(fmt, vpu_fmt); fmt->width = vpu_fmt->frmsize.min_width; @@ -398,20 +394,21 @@ hantro_reset_encoded_fmt(struct hantro_ctx *ctx) hantro_set_fmt_out(ctx, fmt); } -static void -hantro_reset_raw_fmt(struct hantro_ctx *ctx) +int +hantro_reset_raw_fmt(struct hantro_ctx *ctx, int bit_depth) { const struct hantro_fmt *raw_vpu_fmt; struct v4l2_pix_format_mplane *raw_fmt, *encoded_fmt; - raw_vpu_fmt = hantro_get_default_fmt(ctx, false); + raw_vpu_fmt = hantro_get_default_fmt(ctx, false, bit_depth); + + if (!raw_vpu_fmt) + return -EINVAL; if (ctx->is_encoder) { - ctx->vpu_src_fmt = raw_vpu_fmt; raw_fmt = &ctx->src_fmt; encoded_fmt = &ctx->dst_fmt; } else { - ctx->vpu_dst_fmt = raw_vpu_fmt; raw_fmt = &ctx->dst_fmt; encoded_fmt = &ctx->src_fmt; } @@ -420,15 +417,15 @@ hantro_reset_raw_fmt(struct hantro_ctx *ctx) raw_fmt->width = encoded_fmt->width; raw_fmt->height = encoded_fmt->height; if (ctx->is_encoder) - hantro_set_fmt_out(ctx, raw_fmt); + return hantro_set_fmt_out(ctx, raw_fmt); else - hantro_set_fmt_cap(ctx, raw_fmt); + return hantro_set_fmt_cap(ctx, raw_fmt); } void hantro_reset_fmts(struct hantro_ctx *ctx) { hantro_reset_encoded_fmt(ctx); - hantro_reset_raw_fmt(ctx); + hantro_reset_raw_fmt(ctx, 0); } static void @@ -528,7 +525,7 @@ static int hantro_set_fmt_out(struct hantro_ctx *ctx, * changes to the raw format. */ if (!ctx->is_encoder) - hantro_reset_raw_fmt(ctx); + hantro_reset_raw_fmt(ctx, hantro_get_format_depth(pix_mp->pixelformat)); /* Colorimetry information are always propagated. */ ctx->dst_fmt.colorspace = pix_mp->colorspace; @@ -591,7 +588,7 @@ static int hantro_set_fmt_cap(struct hantro_ctx *ctx, * changes to the raw format. */ if (ctx->is_encoder) - hantro_reset_raw_fmt(ctx); + hantro_reset_raw_fmt(ctx, 0); /* Colorimetry information are always propagated. */ ctx->src_fmt.colorspace = pix_mp->colorspace; diff --git a/drivers/media/platform/verisilicon/hantro_v4l2.h b/drivers/media/platform/verisilicon/hantro_v4l2.h index 64f6f57e9d7a..9ea2fef57dcd 100644 --- a/drivers/media/platform/verisilicon/hantro_v4l2.h +++ b/drivers/media/platform/verisilicon/hantro_v4l2.h @@ -21,9 +21,10 @@ extern const struct v4l2_ioctl_ops hantro_ioctl_ops; extern const struct vb2_ops hantro_queue_ops; +int hantro_reset_raw_fmt(struct hantro_ctx *ctx, int bit_depth); void hantro_reset_fmts(struct hantro_ctx *ctx); int hantro_get_format_depth(u32 fourcc); const struct hantro_fmt * -hantro_get_default_fmt(const struct hantro_ctx *ctx, bool bitstream); +hantro_get_default_fmt(const struct hantro_ctx *ctx, bool bitstream, int bit_depth); #endif /* HANTRO_V4L2_H_ */ From patchwork Fri Jan 27 09:21:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 13118274 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 22796C54EAA for ; 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(unknown [IPv6:2a01:e0a:120:3210:4623:efe7:8a8:33c2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id EBB536602EA1; Fri, 27 Jan 2023 09:21:33 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1674811294; bh=7Fa9dzvTgBivHIPI4iHsytCfPy7D6F7WBpQuVBtYwF8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YWw6QuA4FDh22bhiEkZZUUBAskmKEsnvyu6ddHe9fd8TIV7CicdTkZ74WwJwjIxQh qQsl+9uhurLo58HpxZc7yjGO1j53x4onDuSM6Ax9/sDM1r7SBDnA6uIaUhCrD4lmiZ kooH7vIEZa/zGTCylqBDYQps+hT8oOnepCZ97Kxhq6eFLzmRcM7zYTXM4CbbyVodnr ZKtZ1uUBFCmH+3J7pXnUFT8f2xKEtyeIosw3hTDLZWL93yvtnmggpYniMB/bFC4MQK BFZfKzsks+w9HN3VbFWm9s3zz0SxcEcycI3MLYhrNUHAKfula1LyaMm5k59wdJRCgZ MZ7l+Ll3Kwtzw== From: Benjamin Gaignard To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, mchehab@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, hverkuil-cisco@xs4all.nl, nicolas.dufresne@collabora.co.uk Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, Benjamin Gaignard , Nicolas Dufresne Subject: [PATCH v5 2/2] media: verisilicon: HEVC: Only propose 10 bits compatible pixels formats Date: Fri, 27 Jan 2023 10:21:26 +0100 Message-Id: <20230127092126.318268-3-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230127092126.318268-1-benjamin.gaignard@collabora.com> References: <20230127092126.318268-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230127_012137_831512_CFF7AC08 X-CRM114-Status: GOOD ( 16.40 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org When decoding a 10bits bitstreams HEVC driver should only expose 10bits pixel formats. To fulfill this requirement it is needed to call hantro_reset_raw_fmt() when bit depth change and to correctly set match_depth in pixel formats enumeration. Fixes: dc39473d0340 ("media: hantro: imx8m: Enable 10bit decoding") Signed-off-by: Benjamin Gaignard Reviewed-by: Nicolas Dufresne --- version 5: - Add Review and Fixes tags .../media/platform/verisilicon/hantro_drv.c | 44 +++++++++++++++---- .../media/platform/verisilicon/imx8m_vpu_hw.c | 2 + 2 files changed, 38 insertions(+), 8 deletions(-) diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/media/platform/verisilicon/hantro_drv.c index 8cb4a68c9119..a736050fef5a 100644 --- a/drivers/media/platform/verisilicon/hantro_drv.c +++ b/drivers/media/platform/verisilicon/hantro_drv.c @@ -251,11 +251,6 @@ queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq) static int hantro_try_ctrl(struct v4l2_ctrl *ctrl) { - struct hantro_ctx *ctx; - - ctx = container_of(ctrl->handler, - struct hantro_ctx, ctrl_handler); - if (ctrl->id == V4L2_CID_STATELESS_H264_SPS) { const struct v4l2_ctrl_h264_sps *sps = ctrl->p_new.p_h264_sps; @@ -274,8 +269,6 @@ static int hantro_try_ctrl(struct v4l2_ctrl *ctrl) if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2) /* Only 8-bit and 10-bit are supported */ return -EINVAL; - - ctx->bit_depth = sps->bit_depth_luma_minus8 + 8; } else if (ctrl->id == V4L2_CID_STATELESS_VP9_FRAME) { const struct v4l2_ctrl_vp9_frame *dec_params = ctrl->p_new.p_vp9_frame; @@ -286,6 +279,36 @@ static int hantro_try_ctrl(struct v4l2_ctrl *ctrl) return 0; } +static int hantro_hevc_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct hantro_ctx *ctx; + + ctx = container_of(ctrl->handler, + struct hantro_ctx, ctrl_handler); + + switch (ctrl->id) { + case V4L2_CID_STATELESS_HEVC_SPS: + { + const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps; + int bit_depth = sps->bit_depth_luma_minus8 + 8; + int ret; + + if (ctx->bit_depth == bit_depth) + return 0; + + ret = hantro_reset_raw_fmt(ctx, bit_depth); + if (!ret) + ctx->bit_depth = bit_depth; + + return ret; + } + default: + return -EINVAL; + } + + return 0; +} + static int hantro_jpeg_s_ctrl(struct v4l2_ctrl *ctrl) { struct hantro_ctx *ctx; @@ -328,6 +351,11 @@ static const struct v4l2_ctrl_ops hantro_ctrl_ops = { .try_ctrl = hantro_try_ctrl, }; +static const struct v4l2_ctrl_ops hantro_hevc_ctrl_ops = { + .s_ctrl = hantro_hevc_s_ctrl, + .try_ctrl = hantro_try_ctrl, +}; + static const struct v4l2_ctrl_ops hantro_jpeg_ctrl_ops = { .s_ctrl = hantro_jpeg_s_ctrl, }; @@ -470,7 +498,7 @@ static const struct hantro_ctrl controls[] = { .codec = HANTRO_HEVC_DECODER, .cfg = { .id = V4L2_CID_STATELESS_HEVC_SPS, - .ops = &hantro_ctrl_ops, + .ops = &hantro_hevc_ctrl_ops, }, }, { .codec = HANTRO_HEVC_DECODER, diff --git a/drivers/media/platform/verisilicon/imx8m_vpu_hw.c b/drivers/media/platform/verisilicon/imx8m_vpu_hw.c index b390228fd3b4..f850d8bddef6 100644 --- a/drivers/media/platform/verisilicon/imx8m_vpu_hw.c +++ b/drivers/media/platform/verisilicon/imx8m_vpu_hw.c @@ -152,6 +152,7 @@ static const struct hantro_fmt imx8m_vpu_g2_postproc_fmts[] = { { .fourcc = V4L2_PIX_FMT_NV12, .codec_mode = HANTRO_MODE_NONE, + .match_depth = true, .postprocessed = true, .frmsize = { .min_width = FMT_MIN_WIDTH, @@ -165,6 +166,7 @@ static const struct hantro_fmt imx8m_vpu_g2_postproc_fmts[] = { { .fourcc = V4L2_PIX_FMT_P010, .codec_mode = HANTRO_MODE_NONE, + .match_depth = true, .postprocessed = true, .frmsize = { .min_width = FMT_MIN_WIDTH,