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envelope-from=sriram.yagnaraman@est.tech; helo=EUR05-DB8-obe.outbound.protection.outlook.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org I would like to review and be informed on changes to igb device Signed-off-by: Sriram Yagnaraman --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index ece23b2b15..7d0e84ce37 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2224,6 +2224,7 @@ F: tests/qtest/libqos/e1000e.* igb M: Akihiko Odaki +R: Sriram Yagnaraman S: Maintained F: docs/system/devices/igb.rst F: hw/net/igb* From patchwork Mon Jan 30 13:22:57 2023 Content-Type: text/plain; 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Mon, 30 Jan 2023 13:23:09 +0000 From: Sriram Yagnaraman To: Cc: qemu-devel@nongnu.org, Akihiko Odaki , Jason Wang , Dmitry Fleytman , "Michael S . Tsirkin" , Marcel Apfelbaum , Sriram Yagnaraman Subject: [PATCH v2 2/9] igb: handle PF/VF reset properly Date: Mon, 30 Jan 2023 14:22:57 +0100 Message-Id: <20230130132304.2347-3-sriram.yagnaraman@est.tech> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230130132304.2347-1-sriram.yagnaraman@est.tech> References: <20230130132304.2347-1-sriram.yagnaraman@est.tech> X-ClientProxiedBy: GV3P280CA0054.SWEP280.PROD.OUTLOOK.COM (2603:10a6:150:9::24) To DBBP189MB1433.EURP189.PROD.OUTLOOK.COM (2603:10a6:10:1e7::15) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DBBP189MB1433:EE_|DU0P189MB2225:EE_ X-MS-Office365-Filtering-Correlation-Id: 982919c5-86cd-4414-7e88-08db02c5211d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: KZBdecfqAQrR8QrkzloPG5a/KjvcBMtfKauvm4VSqbHxrDUgrvUuoJpPuPKimB+XaLChrYWDtwe1YVWWbYIT84qYJsL8aGtZR2zmgU3ng42YCUx2pj1CMN/8KvKUOT1zG/qTALO5Km+Gn0bkixdnYQ26oV98xSH8VGxG4vD2qiDfwDXlGlNAmEfpXrtpJf8dc4bL9T0Twv/A/L7587Bnq8wH81t/GQA6eeO8qm7o0QpPj4MzaOu0SuoaKFeC1I2ja7KZbKFObgFN/1qRI1BgTlvoHgsxeHMLBAqs5O/tTo0l3EBGi7y78bI8RB/lNfmGExYC1vuySEbXYYE8YXcWFK0GcZjWxzCBiodyvY1+PQtlVbdKa4GjvaCRs5bxG9stMCD5i4oe/jzkLhoMaa0fK3Ou5I9D4WF79PSOI4azjnRc3H/4pqnomOAdRsrzwLuiYkPH9KLxfu5NBuF8kxhQKdJLXBT5aAN9zi+gMt5LsAz4CcgMj/FiterQzUYc+IWPsuHF5Oy4vEfrU1b7Hui4LQhakqSPdsQOegUIdsqyTy/aFPlRfhwl5lPO0cteDxvzl+i8uhq2DjGZ6STj9mgECsiZDBDCTQeuaE+vhgswIbxrpNC2nBFKKkm/p5bOsXYApUKQCt6lE4OIhA5saOsZyjpHjKYmoUh6gv2eChaqCACxV6PYyfK271kEQVlTE+nG2HksZmEnwVbdRuYfHKQXJFJIUPaJK6XU30qgLU18AGM= X-Forefront-Antispam-Report: CIP:255.255.255.255; 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envelope-from=sriram.yagnaraman@est.tech; helo=EUR05-DB8-obe.outbound.protection.outlook.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Use PFRSTD to reset RSTI bit for VFs, and raise VFLRE interrupt when VF is reset. Signed-off-by: Sriram Yagnaraman --- hw/net/e1000x_regs.h | 1 + hw/net/igb_core.c | 33 +++++++++++++++++++++------------ hw/net/trace-events | 2 ++ 3 files changed, 24 insertions(+), 12 deletions(-) diff --git a/hw/net/e1000x_regs.h b/hw/net/e1000x_regs.h index fb5b861135..bb3fb36b8d 100644 --- a/hw/net/e1000x_regs.h +++ b/hw/net/e1000x_regs.h @@ -548,6 +548,7 @@ #define E1000_CTRL_EXT_ASDCHK 0x00001000 /* auto speed detection check */ #define E1000_CTRL_EXT_EE_RST 0x00002000 /* EEPROM reset */ +#define E1000_CTRL_EXT_PFRSTD 0x00004000 /* PF reset done indication */ #define E1000_CTRL_EXT_LINK_EN 0x00010000 /* enable link status from external LINK_0 and LINK_1 pins */ #define E1000_CTRL_EXT_DRV_LOAD 0x10000000 /* Driver loaded bit for FW */ #define E1000_CTRL_EXT_EIAME 0x01000000 diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index abeb9c7889..9bd53cc25f 100644 --- a/hw/net/igb_core.c +++ b/hw/net/igb_core.c @@ -1902,14 +1902,6 @@ static void igb_set_eims(IGBCore *core, int index, uint32_t val) igb_update_interrupt_state(core); } -static void igb_vf_reset(IGBCore *core, uint16_t vfn) -{ - /* TODO: Reset of the queue enable and the interrupt registers of the VF. */ - - core->mac[V2PMAILBOX0 + vfn] &= ~E1000_V2PMAILBOX_RSTI; - core->mac[V2PMAILBOX0 + vfn] = E1000_V2PMAILBOX_RSTD; -} - static void mailbox_interrupt_to_vf(IGBCore *core, uint16_t vfn) { uint32_t ent = core->mac[VTIVAR_MISC + vfn]; @@ -1987,6 +1979,17 @@ static void igb_set_vfmailbox(IGBCore *core, int index, uint32_t val) } } +static void igb_vf_reset(IGBCore *core, uint16_t vfn) +{ + /* disable Rx and Tx for the VF*/ + core->mac[VFTE] &= ~BIT(vfn); + core->mac[VFRE] &= ~BIT(vfn); + /* indicate VF reset to PF */ + core->mac[VFLRE] |= BIT(vfn); + /* VFLRE and mailbox use the same interrupt cause */ + mailbox_interrupt_to_pf(core); +} + static void igb_w1c(IGBCore *core, int index, uint32_t val) { core->mac[index] &= ~val; @@ -2241,14 +2244,20 @@ igb_set_status(IGBCore *core, int index, uint32_t val) static void igb_set_ctrlext(IGBCore *core, int index, uint32_t val) { - trace_e1000e_link_set_ext_params(!!(val & E1000_CTRL_EXT_ASDCHK), - !!(val & E1000_CTRL_EXT_SPD_BYPS)); - - /* TODO: PFRSTD */ + trace_igb_link_set_ext_params(!!(val & E1000_CTRL_EXT_ASDCHK), + !!(val & E1000_CTRL_EXT_SPD_BYPS), + !!(val & E1000_CTRL_EXT_PFRSTD)); /* Zero self-clearing bits */ val &= ~(E1000_CTRL_EXT_ASDCHK | E1000_CTRL_EXT_EE_RST); core->mac[CTRL_EXT] = val; + + if (core->mac[CTRL_EXT] & E1000_CTRL_EXT_PFRSTD) { + for (int vfn = 0; vfn < IGB_MAX_VF_FUNCTIONS; vfn++) { + core->mac[V2PMAILBOX0 + vfn] &= ~E1000_V2PMAILBOX_RSTI; + core->mac[V2PMAILBOX0 + vfn] |= E1000_V2PMAILBOX_RSTD; + } + } } static void diff --git a/hw/net/trace-events b/hw/net/trace-events index 2f791b9b57..e94172e748 100644 --- a/hw/net/trace-events +++ b/hw/net/trace-events @@ -281,6 +281,8 @@ igb_core_mdic_read_unhandled(uint32_t addr) "MDIC READ: PHY[%u] UNHANDLED" igb_core_mdic_write(uint32_t addr, uint32_t data) "MDIC WRITE: PHY[%u] = 0x%x" igb_core_mdic_write_unhandled(uint32_t addr) "MDIC WRITE: PHY[%u] UNHANDLED" +igb_link_set_ext_params(bool asd_check, bool speed_select_bypass, bool pfrstd) "Set extended link params: ASD check: %d, Speed select bypass: %d, PF reset done: %d" + igb_rx_desc_buff_size(uint32_t b) "buffer size: %u" igb_rx_desc_buff_write(uint64_t addr, uint16_t offset, const void* source, uint32_t len) "addr: 0x%"PRIx64", offset: %u, from: %p, length: %u" From patchwork Mon Jan 30 13:22:58 2023 Content-Type: text/plain; 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Mon, 30 Jan 2023 13:23:10 +0000 From: Sriram Yagnaraman To: Cc: qemu-devel@nongnu.org, Akihiko Odaki , Jason Wang , Dmitry Fleytman , "Michael S . Tsirkin" , Marcel Apfelbaum , Sriram Yagnaraman Subject: [PATCH v2 3/9] igb: implement VFRE and VFTE registers Date: Mon, 30 Jan 2023 14:22:58 +0100 Message-Id: <20230130132304.2347-4-sriram.yagnaraman@est.tech> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230130132304.2347-1-sriram.yagnaraman@est.tech> References: <20230130132304.2347-1-sriram.yagnaraman@est.tech> X-ClientProxiedBy: GV3P280CA0039.SWEP280.PROD.OUTLOOK.COM (2603:10a6:150:9::8) To DBBP189MB1433.EURP189.PROD.OUTLOOK.COM (2603:10a6:10:1e7::15) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DBBP189MB1433:EE_|DB8P189MB0885:EE_ X-MS-Office365-Filtering-Correlation-Id: cefeb85d-16d2-4156-4a78-08db02c521e8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 5IoOuvRz+2z9s4eZgypuaHkccfB4glSVeTjzurvPk/jrEMMQPho0G+x1olFMWn4lUmC1aBV++kDM6xHzFs4AGwOAZjuac4EboTK3gsJ+kuehFz1Vuz/sVwu4JfmCynxTKXuFTOFpGF2cIW3A7R/syFIqypmB0/21kyEfv5hssI5iQ9sYvdFUqnHdQAFnqXA70jzn5TrZneh67fHkbyw16hiAiAaCptIHjB5jDdqBvrg3fN6zuiYnirPEvp+NildSZLa9d7ihUmj+WJ36kXjwuDW1KITG9abZFE3BllrYjlH1z4bTtax/OQzkIrh1kwuLgiH3Ar9y64jDkTtzewQljm8SQ3p3dxmoJBZBwNbMZl6Tl/5ZpNkU1ufQ+F3j/dHhxTdaNT/bSqV45OqDwEYY0tyM9a6/b6fCmiVsonUjPfaIs6OPIKRTkHpEBtKGexdysJBwptbyy77OJ9X0o0LyjNn3s+TjNqUgsnmQYuwvvew5a0hYsOTp0W7MHCogT0FuRBQtMbry0pNRQGeP7RaL2b9God3ETHpS+/FILzZL55Irm4OFuySSBF9YqsHrc4F31iHnQumK2oHcQT9Y/OydosUItCuTTrl+psQ9A1fL5VVZ32fCWfNuJVtU76rImg5LWu0xQqQHkgnkfCj/ceF1t6ic7/Xe4FyRaQVM2yGkiFomQw2FKrdN5L+HdXJJD+LmzBqBOppDRPMJr/FEQjOzuxc7M9t6ZtpAl3hA7KmlUzs= X-Forefront-Antispam-Report: CIP:255.255.255.255; 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envelope-from=sriram.yagnaraman@est.tech; helo=EUR04-HE1-obe.outbound.protection.outlook.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Also add checks for RXDCTL/TXDCTL queue enable bits Signed-off-by: Sriram Yagnaraman --- hw/net/igb_core.c | 41 ++++++++++++++++++++++++++++++----------- hw/net/igb_regs.h | 4 +++- 2 files changed, 33 insertions(+), 12 deletions(-) diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index 9bd53cc25f..b8c01cb773 100644 --- a/hw/net/igb_core.c +++ b/hw/net/igb_core.c @@ -778,6 +778,18 @@ igb_txdesc_writeback(IGBCore *core, dma_addr_t base, return igb_tx_wb_eic(core, txi->idx); } +static inline bool +igb_tx_enabled(IGBCore *core, const E1000E_RingInfo *txi) +{ + bool vmdq = core->mac[MRQC] & 1; + uint16_t qn = txi->idx; + uint16_t vfn = qn % IGB_MAX_VM_POOLS; + + return (core->mac[TCTL] & E1000_TCTL_EN) && + (!vmdq || core->mac[VFTE] & BIT(vfn)) && + (core->mac[TXDCTL0 + (qn * 16)] & E1000_TXDCTL_QUEUE_ENABLE); +} + static void igb_start_xmit(IGBCore *core, const IGB_TxRing *txr) { @@ -787,8 +799,7 @@ igb_start_xmit(IGBCore *core, const IGB_TxRing *txr) const E1000E_RingInfo *txi = txr->i; uint32_t eic = 0; - /* TODO: check if the queue itself is enabled too. */ - if (!(core->mac[TCTL] & E1000_TCTL_EN)) { + if (!igb_tx_enabled(core, txi)) { trace_e1000e_tx_disabled(); return; } @@ -1003,6 +1014,7 @@ static uint16_t igb_receive_assign(IGBCore *core, const struct eth_header *ehdr, queues = BIT(def_pl >> E1000_VT_CTL_DEFAULT_POOL_SHIFT); } + queues &= core->mac[VFRE]; igb_rss_parse_packet(core, core->rx_pkt, external_tx != NULL, rss_info); if (rss_info->queue & 1) { queues <<= 8; @@ -1486,7 +1498,7 @@ igb_receive_internal(IGBCore *core, const struct iovec *iov, int iovcnt, static const int maximum_ethernet_hdr_len = (ETH_HLEN + 4); uint16_t queues = 0; - uint32_t n; + uint32_t n = 0; uint8_t min_buf[ETH_ZLEN]; struct iovec min_iov; struct eth_header *ehdr; @@ -1566,26 +1578,22 @@ igb_receive_internal(IGBCore *core, const struct iovec *iov, int iovcnt, } igb_rx_ring_init(core, &rxr, i); - - trace_e1000e_rx_rss_dispatched_to_queue(rxr.i->idx); - if (!igb_has_rxbufs(core, rxr.i, total_size)) { retval = 0; } } if (retval) { - n = E1000_ICR_RXT0; - igb_rx_fix_l4_csum(core, core->rx_pkt); for (i = 0; i < IGB_NUM_QUEUES; i++) { - if (!(queues & BIT(i))) { + if (!(queues & BIT(i)) || + !(core->mac[E1000_RXDCTL(i) >> 2] & E1000_RXDCTL_QUEUE_ENABLE)) { continue; } igb_rx_ring_init(core, &rxr, i); - + trace_e1000e_rx_rss_dispatched_to_queue(rxr.i->idx); igb_write_packet_to_guest(core, core->rx_pkt, &rxr, &rss_info); /* Check if receive descriptor minimum threshold hit */ @@ -1594,6 +1602,9 @@ igb_receive_internal(IGBCore *core, const struct iovec *iov, int iovcnt, } core->mac[EICR] |= igb_rx_wb_eic(core, rxr.i->idx); + + /* same as RXDW (rx descriptor written back)*/ + n = E1000_ICR_RXT0; } trace_e1000e_rx_written_to_guest(n); @@ -1981,9 +1992,16 @@ static void igb_set_vfmailbox(IGBCore *core, int index, uint32_t val) static void igb_vf_reset(IGBCore *core, uint16_t vfn) { + uint16_t qn0 = vfn; + uint16_t qn1 = vfn + IGB_MAX_VF_FUNCTIONS; + /* disable Rx and Tx for the VF*/ - core->mac[VFTE] &= ~BIT(vfn); + core->mac[RXDCTL0 + (qn0 * 16)] &= ~E1000_RXDCTL_QUEUE_ENABLE; + core->mac[RXDCTL0 + (qn1 * 16)] &= ~E1000_RXDCTL_QUEUE_ENABLE; + core->mac[TXDCTL0 + (qn0 * 16)] &= ~E1000_TXDCTL_QUEUE_ENABLE; + core->mac[TXDCTL0 + (qn1 * 16)] &= ~E1000_TXDCTL_QUEUE_ENABLE; core->mac[VFRE] &= ~BIT(vfn); + core->mac[VFTE] &= ~BIT(vfn); /* indicate VF reset to PF */ core->mac[VFLRE] |= BIT(vfn); /* VFLRE and mailbox use the same interrupt cause */ @@ -3889,6 +3907,7 @@ igb_phy_reg_init[] = { static const uint32_t igb_mac_reg_init[] = { [LEDCTL] = 2 | (3 << 8) | BIT(15) | (6 << 16) | (7 << 24), [EEMNGCTL] = BIT(31), + [TXDCTL0] = E1000_TXDCTL_QUEUE_ENABLE, [RXDCTL0] = E1000_RXDCTL_QUEUE_ENABLE | (1 << 16), [RXDCTL1] = 1 << 16, [RXDCTL2] = 1 << 16, diff --git a/hw/net/igb_regs.h b/hw/net/igb_regs.h index ebf3e95023..c8ce5b1671 100644 --- a/hw/net/igb_regs.h +++ b/hw/net/igb_regs.h @@ -147,6 +147,7 @@ union e1000_adv_rx_desc { #define IGB_MAX_TX_QUEUES 8 #define IGB_MAX_VF_MC_ENTRIES 30 #define IGB_MAX_VF_FUNCTIONS 8 +#define IGB_MAX_VM_POOLS 8 #define IGB_MAX_VFTA_ENTRIES 128 #define IGB_82576_VF_DEV_ID 0x10CA #define IGB_I350_VF_DEV_ID 0x1520 @@ -160,7 +161,8 @@ union e1000_adv_rx_desc { #define E1000_MRQC_RSS_FIELD_IPV6_UDP 0x00800000 #define E1000_MRQC_RSS_FIELD_IPV6_UDP_EX 0x01000000 -/* Additional Receive Descriptor Control definitions */ +/* Additional RX/TX Descriptor Control definitions */ +#define E1000_TXDCTL_QUEUE_ENABLE 0x02000000 /* Enable specific Tx Queue */ #define E1000_RXDCTL_QUEUE_ENABLE 0x02000000 /* Enable specific Rx Queue */ /* Direct Cache Access (DCA) definitions */ From patchwork Mon Jan 30 13:22:59 2023 Content-Type: text/plain; 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Mon, 30 Jan 2023 13:23:11 +0000 From: Sriram Yagnaraman To: Cc: qemu-devel@nongnu.org, Akihiko Odaki , Jason Wang , Dmitry Fleytman , "Michael S . Tsirkin" , Marcel Apfelbaum , Sriram Yagnaraman Subject: [PATCH v2 4/9] igb: add ICR_RXDW Date: Mon, 30 Jan 2023 14:22:59 +0100 Message-Id: <20230130132304.2347-5-sriram.yagnaraman@est.tech> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230130132304.2347-1-sriram.yagnaraman@est.tech> References: <20230130132304.2347-1-sriram.yagnaraman@est.tech> X-ClientProxiedBy: GV3P280CA0044.SWEP280.PROD.OUTLOOK.COM (2603:10a6:150:9::11) To DBBP189MB1433.EURP189.PROD.OUTLOOK.COM (2603:10a6:10:1e7::15) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DBBP189MB1433:EE_|DB8P189MB0885:EE_ X-MS-Office365-Filtering-Correlation-Id: 7c02263c-407a-448a-4a78-08db02c521e8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Hj983TxjAu8XjKTlOBrBEmUHALJb07rqUekyNZsutSKvpvE9RON9hkNpcPOPCAdTaLhYx5YV2falL+Ns+pWBvVkqToQ1y3Ev6fIm4XieayheV4RpLtndDjIHuLwato8Fynmq1rVoc3qytbaZR85s8oDOJyCe2OWhgR9rz9y1o/YE4izVi+MfsgY9r61ykxyMnRvd95qcf5K8gdCE6+yFy539z3c87eBKZExrtSJSQ8v9u2ueP7ndn9kt9+qSHCftQ1B1llLOkrnwi986vt+6hI7UJiZFZQFlQQBgoqha5MnillmvpsvcKlZSnLE+VstRQU2aP7RouwAC+JrgPV2OW3qvL8DZvmiaW70eowhfmrV80xh2CAtYzq3YZuiBDtc3i59g+aacQtFK9zo4Ou9C2XdQvxaV5n7d/dUaw9gxyzLhG6+C43Ro7sWtRXZFLTQvSEyFK1TiAgq0Lpc5M0i7RL2LHxpdc3HXRjrTpwXfhCf3JERshyK1AEzW8vEID+qA7si7Dm6I7AQczwXqBvez9X7EZR7pFkgWwl/JGlNWgUjAdRKnLmC83mcmEpXYeT6viCceyxpYH0gpzjcYqX0pbseopBiZEfdnGEAmdg4ZNlxOhB75ylttoLmbPfW48rAqupVVghqtiCy3GxiXR+IpuMU5QWdl7wcsnBtTTyMR0c8wDxBe63P0TSD08waO0NVEgcE2vQ9a0WAFIdY8PZDZYQJp73iOwTTGCY+Q8DZ0f4c= X-Forefront-Antispam-Report: CIP:255.255.255.255; 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envelope-from=sriram.yagnaraman@est.tech; helo=EUR04-HE1-obe.outbound.protection.outlook.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org IGB uses RXDW ICR bit to indicate that rx descriptor has been written back. This is the same as RXT0 bit in older HW. Signed-off-by: Sriram Yagnaraman --- hw/net/e1000x_regs.h | 4 ++++ hw/net/igb_core.c | 28 ++++++++++++++-------------- 2 files changed, 18 insertions(+), 14 deletions(-) diff --git a/hw/net/e1000x_regs.h b/hw/net/e1000x_regs.h index bb3fb36b8d..3a3431d878 100644 --- a/hw/net/e1000x_regs.h +++ b/hw/net/e1000x_regs.h @@ -335,6 +335,7 @@ #define E1000_ICR_RXDMT0 0x00000010 /* rx desc min. threshold (0) */ #define E1000_ICR_RXO 0x00000040 /* rx overrun */ #define E1000_ICR_RXT0 0x00000080 /* rx timer intr (ring 0) */ +#define E1000_ICR_RXDW 0x00000080 /* rx desc written back */ #define E1000_ICR_MDAC 0x00000200 /* MDIO access complete */ #define E1000_ICR_RXCFG 0x00000400 /* RX /c/ ordered set */ #define E1000_ICR_GPI_EN0 0x00000800 /* GP Int 0 */ @@ -378,6 +379,7 @@ #define E1000_ICS_RXDMT0 E1000_ICR_RXDMT0 /* rx desc min. threshold */ #define E1000_ICS_RXO E1000_ICR_RXO /* rx overrun */ #define E1000_ICS_RXT0 E1000_ICR_RXT0 /* rx timer intr */ +#define E1000_ICS_RXDW E1000_ICR_RXDW /* rx desc written back */ #define E1000_ICS_MDAC E1000_ICR_MDAC /* MDIO access complete */ #define E1000_ICS_RXCFG E1000_ICR_RXCFG /* RX /c/ ordered set */ #define E1000_ICS_GPI_EN0 E1000_ICR_GPI_EN0 /* GP Int 0 */ @@ -407,6 +409,7 @@ #define E1000_IMS_RXDMT0 E1000_ICR_RXDMT0 /* rx desc min. threshold */ #define E1000_IMS_RXO E1000_ICR_RXO /* rx overrun */ #define E1000_IMS_RXT0 E1000_ICR_RXT0 /* rx timer intr */ +#define E1000_IMS_RXDW E1000_ICR_RXDW /* rx desc written back */ #define E1000_IMS_MDAC E1000_ICR_MDAC /* MDIO access complete */ #define E1000_IMS_RXCFG E1000_ICR_RXCFG /* RX /c/ ordered set */ #define E1000_IMS_GPI_EN0 E1000_ICR_GPI_EN0 /* GP Int 0 */ @@ -441,6 +444,7 @@ #define E1000_IMC_RXDMT0 E1000_ICR_RXDMT0 /* rx desc min. threshold */ #define E1000_IMC_RXO E1000_ICR_RXO /* rx overrun */ #define E1000_IMC_RXT0 E1000_ICR_RXT0 /* rx timer intr */ +#define E1000_IMC_RXDW E1000_ICR_RXDW /* rx desc written back */ #define E1000_IMC_MDAC E1000_ICR_MDAC /* MDIO access complete */ #define E1000_IMC_RXCFG E1000_ICR_RXCFG /* RX /c/ ordered set */ #define E1000_IMC_GPI_EN0 E1000_ICR_GPI_EN0 /* GP Int 0 */ diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index b8c01cb773..cea7c036f0 100644 --- a/hw/net/igb_core.c +++ b/hw/net/igb_core.c @@ -1498,7 +1498,7 @@ igb_receive_internal(IGBCore *core, const struct iovec *iov, int iovcnt, static const int maximum_ethernet_hdr_len = (ETH_HLEN + 4); uint16_t queues = 0; - uint32_t n = 0; + uint32_t icr_bits = 0; uint8_t min_buf[ETH_ZLEN]; struct iovec min_iov; struct eth_header *ehdr; @@ -1508,7 +1508,7 @@ igb_receive_internal(IGBCore *core, const struct iovec *iov, int iovcnt, E1000E_RxRing rxr; E1000E_RSSInfo rss_info; size_t total_size; - ssize_t retval; + ssize_t retval = 0; int i; trace_e1000e_rx_receive_iov(iovcnt); @@ -1570,8 +1570,6 @@ igb_receive_internal(IGBCore *core, const struct iovec *iov, int iovcnt, total_size = net_rx_pkt_get_total_len(core->rx_pkt) + e1000x_fcs_len(core->mac); - retval = orig_size; - for (i = 0; i < IGB_NUM_QUEUES; i++) { if (!(queues & BIT(i))) { continue; @@ -1579,11 +1577,12 @@ igb_receive_internal(IGBCore *core, const struct iovec *iov, int iovcnt, igb_rx_ring_init(core, &rxr, i); if (!igb_has_rxbufs(core, rxr.i, total_size)) { - retval = 0; + icr_bits |= E1000_ICS_RXO; } } - if (retval) { + if (!icr_bits) { + retval = orig_size; igb_rx_fix_l4_csum(core, core->rx_pkt); for (i = 0; i < IGB_NUM_QUEUES; i++) { @@ -1593,28 +1592,29 @@ igb_receive_internal(IGBCore *core, const struct iovec *iov, int iovcnt, } igb_rx_ring_init(core, &rxr, i); + trace_e1000e_rx_rss_dispatched_to_queue(rxr.i->idx); igb_write_packet_to_guest(core, core->rx_pkt, &rxr, &rss_info); /* Check if receive descriptor minimum threshold hit */ if (igb_rx_descr_threshold_hit(core, rxr.i)) { - n |= E1000_ICS_RXDMT0; + icr_bits |= E1000_ICS_RXDMT0; } core->mac[EICR] |= igb_rx_wb_eic(core, rxr.i->idx); - /* same as RXDW (rx descriptor written back)*/ - n = E1000_ICR_RXT0; + icr_bits |= E1000_ICR_RXDW; } + } - trace_e1000e_rx_written_to_guest(n); + if (icr_bits & E1000_ICR_RXDW) { + trace_e1000e_rx_written_to_guest(icr_bits); } else { - n = E1000_ICS_RXO; - trace_e1000e_rx_not_written_to_guest(n); + trace_e1000e_rx_not_written_to_guest(icr_bits); } - trace_e1000e_rx_interrupt_set(n); - igb_set_interrupt_cause(core, n); + trace_e1000e_rx_interrupt_set(icr_bits); + igb_set_interrupt_cause(core, icr_bits); return retval; } From patchwork Mon Jan 30 13:23:00 2023 Content-Type: text/plain; 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Mon, 30 Jan 2023 13:23:11 +0000 From: Sriram Yagnaraman To: Cc: qemu-devel@nongnu.org, Akihiko Odaki , Jason Wang , Dmitry Fleytman , "Michael S . Tsirkin" , Marcel Apfelbaum , Sriram Yagnaraman Subject: [PATCH v2 5/9] igb: check oversized packets for VMDq Date: Mon, 30 Jan 2023 14:23:00 +0100 Message-Id: <20230130132304.2347-6-sriram.yagnaraman@est.tech> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230130132304.2347-1-sriram.yagnaraman@est.tech> References: <20230130132304.2347-1-sriram.yagnaraman@est.tech> X-ClientProxiedBy: GV3P280CA0047.SWEP280.PROD.OUTLOOK.COM (2603:10a6:150:9::15) To DBBP189MB1433.EURP189.PROD.OUTLOOK.COM (2603:10a6:10:1e7::15) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DBBP189MB1433:EE_|DB8P189MB0885:EE_ X-MS-Office365-Filtering-Correlation-Id: 616f6354-1422-406e-3e72-08db02c52264 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: oBFjLMYEEhDQ1/vk0RdV0RcJLEf/7102uq/rlfR9J0Z6Fi0VTE8nFkAv3+syT/BRRBScDbI21wrdU3stL/lcUmCKbENVXKcLNXhTTLRT9QwBJDJBBrb+dIkFGDCPQLD7Dg/v/DfsizyNP7qyrzEJXtAzbbJYWx3eNMYwOhODUAMI5kyf3mhh+wGc1sLO0ZZ4E+FdwjN5COD0qLlGAmZjQvQmO2nFeH2r0Q/Ab16maqkgxE4iKPtEAdtaoV6Gr4SW2DO/eW7xkhBk3OdmXP6r/rmx1blgh5vyljbv0ZzueDurwUod2Y9y12xBTpf0/5D9yAUAkdRopnhWTblVoaUSvLB7UvzqZMXagfRChtqZDNwPXfadawNA17ifZxnMYTQoG3kNW3QWdeznVaFBaAp44ZeKDy5TVUEjQakYqGfcMQ8ktxt1rLaBGSfPwFXVl4NgehkceDiEHXgyBj8PI6wDgq0n3+uxc81ilYRgvfU4zLzacQopU5uSMMajfS37FBk75x8l/mAhm5gBXdNlO9kB01muIWYgC4aZyWWUcaCyEZSKyoZh1UW3gCI3x/TJCHNANqYrjdclnCNPcTOiW/zNv7igs22fklirvyov34eJB6mXsKvlGvNYu3JAMuHYdw8YrRuy4yDA9/VPNnx/S6cMq/6TtD1Lv77FzalitSX6Sa9Qs7L2MhiIcBuQ4kGlzdoLChXtfV2NBniDu/SUr/7s/LKKHZybHMauHREUkbN70bk= X-Forefront-Antispam-Report: CIP:255.255.255.255; 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envelope-from=sriram.yagnaraman@est.tech; helo=EUR04-HE1-obe.outbound.protection.outlook.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Sriram Yagnaraman --- hw/net/igb_core.c | 48 +++++++++++++++++++++++++++++++++++++++-------- 1 file changed, 40 insertions(+), 8 deletions(-) diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index cea7c036f0..89650fcfd4 100644 --- a/hw/net/igb_core.c +++ b/hw/net/igb_core.c @@ -910,12 +910,27 @@ igb_rx_l4_cso_enabled(IGBCore *core) return !!(core->mac[RXCSUM] & E1000_RXCSUM_TUOFLD); } +static bool +igb_rx_is_oversized(IGBCore *core, uint16_t qn, size_t size) +{ + uint16_t pool = qn % IGB_MAX_VM_POOLS; + bool lpe = !!(core->mac[VMOLR0 + pool] & E1000_VMOLR_LPE); + int maximum_ethernet_lpe_size = + core->mac[VMOLR0 + pool] & E1000_VMOLR_RLPML_MASK; + int maximum_ethernet_vlan_size = 1522; + + return (size > maximum_ethernet_lpe_size || + (size > maximum_ethernet_vlan_size && !lpe)); +} + static uint16_t igb_receive_assign(IGBCore *core, const struct eth_header *ehdr, - E1000E_RSSInfo *rss_info, bool *external_tx) + size_t size, E1000E_RSSInfo *rss_info, + bool *external_tx) { static const int ta_shift[] = { 4, 3, 2, 0 }; uint32_t f, ra[2], *macp, rctl = core->mac[RCTL]; uint16_t queues = 0; + uint16_t oversized = 0; uint16_t vid = lduw_be_p(&PKT_GET_VLAN_HDR(ehdr)->h_tci) & VLAN_VID_MASK; bool accepted = false; int i; @@ -941,7 +956,7 @@ static uint16_t igb_receive_assign(IGBCore *core, const struct eth_header *ehdr, if (core->mac[MRQC] & 1) { if (is_broadcast_ether_addr(ehdr->h_dest)) { - for (i = 0; i < 8; i++) { + for (i = 0; i < IGB_MAX_VM_POOLS; i++) { if (core->mac[VMOLR0 + i] & E1000_VMOLR_BAM) { queues |= BIT(i); } @@ -975,7 +990,7 @@ static uint16_t igb_receive_assign(IGBCore *core, const struct eth_header *ehdr, f = ta_shift[(rctl >> E1000_RCTL_MO_SHIFT) & 3]; f = (((ehdr->h_dest[5] << 8) | ehdr->h_dest[4]) >> f) & 0xfff; if (macp[f >> 5] & (1 << (f & 0x1f))) { - for (i = 0; i < 8; i++) { + for (i = 0; i < IGB_MAX_VM_POOLS; i++) { if (core->mac[VMOLR0 + i] & E1000_VMOLR_ROMPE) { queues |= BIT(i); } @@ -998,7 +1013,7 @@ static uint16_t igb_receive_assign(IGBCore *core, const struct eth_header *ehdr, } } } else { - for (i = 0; i < 8; i++) { + for (i = 0; i < IGB_MAX_VM_POOLS; i++) { if (core->mac[VMOLR0 + i] & E1000_VMOLR_AUPE) { mask |= BIT(i); } @@ -1015,9 +1030,26 @@ static uint16_t igb_receive_assign(IGBCore *core, const struct eth_header *ehdr, } queues &= core->mac[VFRE]; - igb_rss_parse_packet(core, core->rx_pkt, external_tx != NULL, rss_info); - if (rss_info->queue & 1) { - queues <<= 8; + if (queues) { + for (i = 0; i < IGB_MAX_VM_POOLS; i++) { + if ((queues & BIT(i)) && igb_rx_is_oversized(core, i, size)) { + oversized |= BIT(i); + } + } + /* 8.19.37 increment ROC if packet is oversized for all queues */ + if (oversized == queues) { + trace_e1000x_rx_oversized(size); + e1000x_inc_reg_if_not_full(core->mac, ROC); + } + queues &= ~oversized; + } + + if (queues) { + igb_rss_parse_packet(core, core->rx_pkt, + external_tx != NULL, rss_info); + if (rss_info->queue & 1) { + queues <<= 8; + } } } else { switch (net_rx_pkt_get_packet_type(core->rx_pkt)) { @@ -1561,7 +1593,7 @@ igb_receive_internal(IGBCore *core, const struct iovec *iov, int iovcnt, e1000x_vlan_enabled(core->mac), core->mac[VET] & 0xffff); - queues = igb_receive_assign(core, ehdr, &rss_info, external_tx); + queues = igb_receive_assign(core, ehdr, size, &rss_info, external_tx); if (!queues) { trace_e1000e_rx_flt_dropped(); return orig_size; From patchwork Mon Jan 30 13:23:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sriram Yagnaraman X-Patchwork-Id: 13121096 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 38AD0C54EED for ; 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Signed-off-by: Sriram Yagnaraman --- hw/net/igb_core.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index 89650fcfd4..b41b1a5d21 100644 --- a/hw/net/igb_core.c +++ b/hw/net/igb_core.c @@ -1047,8 +1047,15 @@ static uint16_t igb_receive_assign(IGBCore *core, const struct eth_header *ehdr, if (queues) { igb_rss_parse_packet(core, core->rx_pkt, external_tx != NULL, rss_info); + /* Sec 8.26.1: PQn = VFn + VQn*8 */ if (rss_info->queue & 1) { - queues <<= 8; + for (i = 0; i < IGB_MAX_VM_POOLS; i++) { + if ((queues & BIT(i)) && + (core->mac[VMOLR0 + i] & E1000_VMOLR_RSSE)) { + queues |= BIT(i + IGB_MAX_VM_POOLS); + queues &= ~BIT(i); + } + } } } } else { From patchwork Mon Jan 30 13:23:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sriram Yagnaraman X-Patchwork-Id: 13121109 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 25F37C54EAA for ; Mon, 30 Jan 2023 13:30:55 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pMUA3-0002HJ-LS; Mon, 30 Jan 2023 08:25:28 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pMU8C-0007zK-DQ for qemu-devel@nongnu.org; Mon, 30 Jan 2023 08:23:49 -0500 Received: from mail-he1eur04on0730.outbound.protection.outlook.com ([2a01:111:f400:fe0d::730] helo=EUR04-HE1-obe.outbound.protection.outlook.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pMU8A-0006AH-GJ for qemu-devel@nongnu.org; Mon, 30 Jan 2023 08:23:31 -0500 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=lQKteGl37ebvmOm2d/f21QdlIXJEwWjkzFa9QRxChytP6bLHQdAt1vGL0By9DCKC5hW2IhTNicUSunRQ40/qNkQnhl2XKyQ6PIOGLh9Cdi1zPzfJVNqXzIONdFzYWQYmVyfYAc9u30DZM+GWp6iTmMZwpWN8EfYmcLvBNd81pcjTKt04Kxs2+BKkPlidF+pDIaNgry1BBp2vXto7E4zMtQGfgZXlSzaO0zEvvUsfGlCq7GFdHBTwOeeKsHLxgwpaESo+CCP3pzh+EJdCqqSFYRWRNzqAcHg5foR4CQZ4NpkE+Xc4R4GS4kY8xP7O7S5q4pRBWrStKwwGeyBedt0+YA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=kYeiHvKUBfCAXNtp/E6965ZC1ioE/jP3gr/WIC2RLZM=; b=SEfq5QmPQhhuu8IJrKwvk4Bw3MGcCYx/FDpa75IIeYnY1CMjS/k2CXNwwuy0D4veFmvCQs6ucUTsqZQ9NxNoJbVTbiDH3d6vG7ffhHRli8Y211U14Vcjg85rO+K6eVizizJO5Tpk1dhGdFc1U+tq44Jw0lKANTBKomvfD4NK9XYRbUckbLkLeaOIj3+Rtben/1hrWF+mepb6gfi2e62Ao7ND1LD4jBzqgQCJ4JCaQ5/BkIJZWDAu9WGwlgqHLJ8ygY2oxdTNgthjNPId9qt0nD0Y6XksNgS34VK2d7nCZDzBsbw9xpHT+aNln9v1FtBZE5fDewskbrNTphetNqk3YA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=est.tech; dmarc=pass action=none header.from=est.tech; dkim=pass header.d=est.tech; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=estab.onmicrosoft.com; s=selector2-estab-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=kYeiHvKUBfCAXNtp/E6965ZC1ioE/jP3gr/WIC2RLZM=; b=NK9e3yieNeogBxFP0vMYSbqH6PkmVR2ewGMu1hrxBfte2Hj4rHLFXqvx4m9CA8k+u4qelTFSPreIroYodudydk08E4AD0VZwWBdJHasFMXVeztW/xxO+DOByeRwleuIxvHs4/pvV5RpGk2b/t8M3A7jMWvqa9BIO1loiBxqsuJs= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=est.tech; Received: from DBBP189MB1433.EURP189.PROD.OUTLOOK.COM (2603:10a6:10:1e7::15) by DB8P189MB0885.EURP189.PROD.OUTLOOK.COM (2603:10a6:10:16f::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6043.36; Mon, 30 Jan 2023 13:23:12 +0000 Received: from DBBP189MB1433.EURP189.PROD.OUTLOOK.COM ([fe80::8f70:435b:ab64:9420]) by DBBP189MB1433.EURP189.PROD.OUTLOOK.COM ([fe80::8f70:435b:ab64:9420%9]) with mapi id 15.20.6043.036; Mon, 30 Jan 2023 13:23:12 +0000 From: Sriram Yagnaraman To: Cc: qemu-devel@nongnu.org, Akihiko Odaki , Jason Wang , Dmitry Fleytman , "Michael S . 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Signed-off-by: Sriram Yagnaraman --- hw/net/igb_core.c | 26 ++++++++++++++++++++++---- 1 file changed, 22 insertions(+), 4 deletions(-) diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index b41b1a5d21..89cad57cb8 100644 --- a/hw/net/igb_core.c +++ b/hw/net/igb_core.c @@ -488,7 +488,7 @@ igb_tx_pkt_send(IGBCore *core, struct igb_tx *tx, int queue_index) } static void -igb_on_tx_done_update_stats(IGBCore *core, struct NetTxPkt *tx_pkt) +igb_on_tx_done_update_stats(IGBCore *core, struct NetTxPkt *tx_pkt, int qn) { static const int PTCregs[6] = { PTC64, PTC127, PTC255, PTC511, PTC1023, PTC1522 }; @@ -515,6 +515,13 @@ igb_on_tx_done_update_stats(IGBCore *core, struct NetTxPkt *tx_pkt) core->mac[GPTC] = core->mac[TPT]; core->mac[GOTCL] = core->mac[TOTL]; core->mac[GOTCH] = core->mac[TOTH]; + + if (core->mac[MRQC] & 1) { + uint16_t pool = qn % IGB_MAX_VM_POOLS; + + core->mac[PVFGOTC0 + (pool * 64)] += tot_len; + core->mac[PVFGPTC0 + (pool * 64)]++; + } } static void @@ -577,7 +584,7 @@ igb_process_tx_desc(IGBCore *core, core->mac[VET] & 0xffff); } if (igb_tx_pkt_send(core, tx, queue_index)) { - igb_on_tx_done_update_stats(core, tx->tx_pkt); + igb_on_tx_done_update_stats(core, tx->tx_pkt, queue_index); } } @@ -1394,7 +1401,8 @@ igb_write_to_rx_buffers(IGBCore *core, } static void -igb_update_rx_stats(IGBCore *core, size_t data_size, size_t data_fcs_size) +igb_update_rx_stats(IGBCore *core, const E1000E_RingInfo *rxi, + size_t data_size, size_t data_fcs_size) { e1000x_update_rx_total_stats(core->mac, data_size, data_fcs_size); @@ -1410,6 +1418,16 @@ igb_update_rx_stats(IGBCore *core, size_t data_size, size_t data_fcs_size) default: break; } + + if (core->mac[MRQC] & 1) { + uint16_t pool = rxi->idx % IGB_MAX_VM_POOLS; + + core->mac[PVFGORC0 + (pool * 64)] += data_size + 4; + core->mac[PVFGPRC0 + (pool * 64)]++; + if (net_rx_pkt_get_packet_type(core->rx_pkt) == ETH_PKT_MCAST) { + core->mac[PVFMPRC0 + (pool * 64)]++; + } + } } static inline bool @@ -1511,7 +1529,7 @@ igb_write_packet_to_guest(IGBCore *core, struct NetRxPkt *pkt, } while (desc_offset < total_size); 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envelope-from=sriram.yagnaraman@est.tech; helo=EUR04-HE1-obe.outbound.protection.outlook.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Also trace out a warning if replication mode is disabled, since we only support replication mode enabled. Signed-off-by: Sriram Yagnaraman --- hw/net/igb_core.c | 9 +++++++++ hw/net/trace-events | 2 ++ 2 files changed, 11 insertions(+) diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index 89cad57cb8..5ca666229e 100644 --- a/hw/net/igb_core.c +++ b/hw/net/igb_core.c @@ -962,6 +962,10 @@ static uint16_t igb_receive_assign(IGBCore *core, const struct eth_header *ehdr, } if (core->mac[MRQC] & 1) { + if (!(core->mac[VT_CTL] & E1000_VT_CTL_VM_REPL_EN)) { + trace_igb_rx_vmdq_replication_mode_disabled(); + } + if (is_broadcast_ether_addr(ehdr->h_dest)) { for (i = 0; i < IGB_MAX_VM_POOLS; i++) { if (core->mac[VMOLR0 + i] & E1000_VMOLR_BAM) { @@ -1008,6 +1012,11 @@ static uint16_t igb_receive_assign(IGBCore *core, const struct eth_header *ehdr, } } + /* assume a full pool list if IGMAC is set */ + if (core->mac[VT_CTL] & E1000_VT_CTL_IGNORE_MAC) { + queues = BIT(IGB_MAX_VF_FUNCTIONS) - 1; + } + if (e1000x_vlan_rx_filter_enabled(core->mac)) { uint16_t mask = 0; diff --git a/hw/net/trace-events b/hw/net/trace-events index e94172e748..9bc7658692 100644 --- a/hw/net/trace-events +++ b/hw/net/trace-events @@ -288,6 +288,8 @@ igb_rx_desc_buff_write(uint64_t addr, uint16_t offset, const void* source, uint3 igb_rx_metadata_rss(uint32_t rss) "RSS data: 0x%X" +igb_rx_vmdq_replication_mode_disabled(void) "WARN: Only replication mode enabled is supported" + igb_irq_icr_clear_gpie_nsicr(void) "Clearing ICR on read due to GPIE.NSICR enabled" igb_irq_icr_write(uint32_t bits, uint32_t old_icr, uint32_t new_icr) "Clearing ICR bits 0x%x: 0x%x --> 0x%x" igb_irq_set_iam(uint32_t icr) "Update IAM: 0x%x" From patchwork Mon Jan 30 13:23:04 2023 Content-Type: text/plain; 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Mon, 30 Jan 2023 13:23:13 +0000 From: Sriram Yagnaraman To: Cc: qemu-devel@nongnu.org, Akihiko Odaki , Jason Wang , Dmitry Fleytman , "Michael S . Tsirkin" , Marcel Apfelbaum , Sriram Yagnaraman Subject: [PATCH v2 9/9] igb: respect VMVIR and VMOLR for VLAN Date: Mon, 30 Jan 2023 14:23:04 +0100 Message-Id: <20230130132304.2347-10-sriram.yagnaraman@est.tech> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230130132304.2347-1-sriram.yagnaraman@est.tech> References: <20230130132304.2347-1-sriram.yagnaraman@est.tech> X-ClientProxiedBy: GV3P280CA0057.SWEP280.PROD.OUTLOOK.COM (2603:10a6:150:9::25) To DBBP189MB1433.EURP189.PROD.OUTLOOK.COM (2603:10a6:10:1e7::15) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DBBP189MB1433:EE_|DB4P189MB2237:EE_ X-MS-Office365-Filtering-Correlation-Id: 7a4e4c17-bd1c-41bc-4156-08db02c523dd X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: sgdwCKPsQmWqN2DILz45ogFvob80NovFmlmBm+uwGucjcXTrRqcVyZD0RGMHcYqN7VbSyr3XGCY+agjv7s6c0QK7ypGNX0pcA8szBbCIhw/SpgR4VU3Bt2vqk56+MqPeTKCC2ovcn6y/bqL40WVClLQ1gD6b2kfDLsgCCGY9OzhiQ7L5P5sfgjbKLqZGH7p4+AubxDZJcQNjnsOokstqti387aA2bAi860ByVEN+4FZZUt/f9vOnoakDEmGOOu/1uTkiK3pBZ1ASlbXhCRG5WnZpCBAz7y+PPjERnqFeS0d235rTrpFLvUqJxXkMcpQZDvlmkL+PIcawZWZ9J0DT5bCaNqQ/eye5U2Sf31wDaOdw564NQZm/ih78IHQ85hbByNgQqOn0JblP1NtpQXMW3Npf00taLNlZaM5/8LNb++EvyMbBKGqyeqgn5oxv4qQLtvFFxcOcG9WaM7mO/0mRLLuNASs2JsykBucEuAf9Tj4fOwG+35sGR3meOJ8l0ZeYiZu6ls49IQ4ZQuDjSbEQVnl77FmCjf8vaRGddYBwvw/WbgBTxFOGXQALIrt8F26JCCzFHFmcmgLFkyl/diGowgliUBPbOGx9FcjPn0oQZIuOpgWUqLILxpG2U2XaPOPWoPj/2HSvo5NJT542/TVQbMKsKZwYyCxjIxCWfXk3RIBNQfrlO+T+TjlWg0yN3m8eGp+rLgkF62JfinDim9Qwt8SvKjpj6XoiRTFc9OWT7Hw= X-Forefront-Antispam-Report: CIP:255.255.255.255; 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envelope-from=sriram.yagnaraman@est.tech; helo=EUR04-HE1-obe.outbound.protection.outlook.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add support for stripping/inserting VLAN for VFs. Signed-off-by: Sriram Yagnaraman --- hw/net/igb_core.c | 84 ++++++++++++++++++++++++++++++----------------- 1 file changed, 54 insertions(+), 30 deletions(-) diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index 5ca666229e..a511c64773 100644 --- a/hw/net/igb_core.c +++ b/hw/net/igb_core.c @@ -384,6 +384,25 @@ igb_rss_parse_packet(IGBCore *core, struct NetRxPkt *pkt, bool tx, info->queue = E1000_RSS_QUEUE(&core->mac[RETA], info->hash); } +static inline bool +igb_tx_insert_vlan(IGBCore *core, uint16_t qn, + struct igb_tx *tx, bool desc_vle) +{ + if (core->mac[MRQC] & 1) { + uint16_t pool = qn % IGB_MAX_VM_POOLS; + + if (core->mac[VMVIR0 + pool] & E1000_VMVIR_VLANA_DEFAULT) { + /* always insert default VLAN */ + desc_vle = true; + tx->vlan = core->mac[VMVIR0 + pool] & 0xffff; + } else if (core->mac[VMVIR0 + pool] & E1000_VMVIR_VLANA_NEVER) { + return false; + } + } + + return desc_vle && e1000x_vlan_enabled(core->mac); +} + static bool igb_setup_tx_offloads(IGBCore *core, struct igb_tx *tx) { @@ -579,7 +598,8 @@ igb_process_tx_desc(IGBCore *core, if (cmd_type_len & E1000_TXD_CMD_EOP) { if (!tx->skip_cp && net_tx_pkt_parse(tx->tx_pkt)) { - if (cmd_type_len & E1000_TXD_CMD_VLE) { + if (igb_tx_insert_vlan(core, queue_index, tx, + !!(cmd_type_len & E1000_TXD_CMD_VLE))) { net_tx_pkt_setup_vlan_header_ex(tx->tx_pkt, tx->vlan, core->mac[VET] & 0xffff); } @@ -1541,6 +1561,19 @@ igb_write_packet_to_guest(IGBCore *core, struct NetRxPkt *pkt, igb_update_rx_stats(core, rxi, size, total_size); } +static bool +igb_rx_strip_vlan(IGBCore *core, const E1000E_RingInfo *rxi) +{ + if (core->mac[MRQC] & 1) { + uint16_t pool = rxi->idx % IGB_MAX_VM_POOLS; + return (net_rx_pkt_get_packet_type(core->rx_pkt) == ETH_PKT_MCAST) ? + core->mac[RPLOLR] & E1000_RPLOLR_STRVLAN : + core->mac[VMOLR0 + pool] & E1000_VMOLR_STRVLAN; + } + + return e1000x_vlan_enabled(core->mac); +} + static inline void igb_rx_fix_l4_csum(IGBCore *core, struct NetRxPkt *pkt) { @@ -1622,10 +1655,7 @@ igb_receive_internal(IGBCore *core, const struct iovec *iov, int iovcnt, ehdr = PKT_GET_ETH_HDR(filter_buf); net_rx_pkt_set_packet_type(core->rx_pkt, get_eth_packet_type(ehdr)); - - net_rx_pkt_attach_iovec_ex(core->rx_pkt, iov, iovcnt, iov_ofs, - e1000x_vlan_enabled(core->mac), - core->mac[VET] & 0xffff); + net_rx_pkt_set_protocols(core->rx_pkt, filter_buf, size); queues = igb_receive_assign(core, ehdr, size, &rss_info, external_tx); if (!queues) { @@ -1633,44 +1663,38 @@ igb_receive_internal(IGBCore *core, const struct iovec *iov, int iovcnt, return orig_size; } - total_size = net_rx_pkt_get_total_len(core->rx_pkt) + - e1000x_fcs_len(core->mac); + retval = orig_size; + total_size = size + e1000x_fcs_len(core->mac); for (i = 0; i < IGB_NUM_QUEUES; i++) { - if (!(queues & BIT(i))) { + if (!(queues & BIT(i)) && + !(core->mac[RXDCTL0 + (i * 16)] & E1000_RXDCTL_QUEUE_ENABLE)) { continue; } igb_rx_ring_init(core, &rxr, i); + net_rx_pkt_attach_iovec_ex(core->rx_pkt, iov, iovcnt, iov_ofs, + igb_rx_strip_vlan(core, rxr.i), + core->mac[VET] & 0xffff); + igb_rx_fix_l4_csum(core, core->rx_pkt); + if (!igb_has_rxbufs(core, rxr.i, total_size)) { icr_bits |= E1000_ICS_RXO; + continue; } - } - if (!icr_bits) { - retval = orig_size; - igb_rx_fix_l4_csum(core, core->rx_pkt); - - for (i = 0; i < IGB_NUM_QUEUES; i++) { - if (!(queues & BIT(i)) || - !(core->mac[E1000_RXDCTL(i) >> 2] & E1000_RXDCTL_QUEUE_ENABLE)) { - continue; - } - - igb_rx_ring_init(core, &rxr, i); + trace_e1000e_rx_rss_dispatched_to_queue(rxr.i->idx); + igb_write_packet_to_guest(core, core->rx_pkt, &rxr, &rss_info); - trace_e1000e_rx_rss_dispatched_to_queue(rxr.i->idx); - igb_write_packet_to_guest(core, core->rx_pkt, &rxr, &rss_info); - - /* Check if receive descriptor minimum threshold hit */ - if (igb_rx_descr_threshold_hit(core, rxr.i)) { - icr_bits |= E1000_ICS_RXDMT0; - } + /* Check if receive descriptor minimum threshold hit */ + if (igb_rx_descr_threshold_hit(core, rxr.i)) { + icr_bits |= E1000_ICS_RXDMT0; + } - core->mac[EICR] |= igb_rx_wb_eic(core, rxr.i->idx); + core->mac[EICR] |= igb_rx_wb_eic(core, rxr.i->idx); - icr_bits |= E1000_ICR_RXDW; - } + /* same as RXDW (rx descriptor written back)*/ + icr_bits |= E1000_ICR_RXDW; } if (icr_bits & E1000_ICR_RXDW) {