From patchwork Tue Jan 31 06:33:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Kandpal, Suraj" X-Patchwork-Id: 13122290 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 06B69C636D3 for ; Tue, 31 Jan 2023 06:36:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 86BFA10E324; Tue, 31 Jan 2023 06:36:05 +0000 (UTC) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7DED310E324 for ; Tue, 31 Jan 2023 06:36:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1675146964; x=1706682964; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=PJe6Q6gZnlLhYGAIyrEKmKa2fqxLK2uBZDqPTm1WvBk=; b=R9nvV+GnsSQ2+x/3oPRAxY4tY12NDHfUva1zYffRLWyznQ24pYxXTtHz 2lQAbl4Qq4uJFzLFQ+APR7HAvMVHwXCODBiCY7MJZNBCJMkD8YoFVbypB RKM4gw2IdUHGqPmgB+GR8i7Im7OwD7A1zP5A5F8axD2MWOc0ab5MvQmGL RP+JxtRlclSd75mgUOBX1aTmNchhnFOnCEuBX9Bhnha0kYrln5j8ocU9n iRyOb7QzuSUQZ+QYsVccYsliPGkq5GoGlpWzhCg0CZsXpdKr2Pz8+HIJC 81s/7ll5eBIu4e/wwk60T0SxpoC3Cx+GW2FDOL82aEcTTHz8ad2rbbyOQ w==; X-IronPort-AV: E=McAfee;i="6500,9779,10606"; a="390126789" X-IronPort-AV: E=Sophos;i="5.97,259,1669104000"; d="scan'208";a="390126789" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jan 2023 22:36:04 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10606"; a="838248445" X-IronPort-AV: E=Sophos;i="5.97,259,1669104000"; d="scan'208";a="838248445" Received: from kandpal-x299-ud4-pro.iind.intel.com ([10.190.239.32]) by orsmga005.jf.intel.com with ESMTP; 30 Jan 2023 22:36:02 -0800 From: Suraj Kandpal To: intel-gfx@lists.freedesktop.org Date: Tue, 31 Jan 2023 12:03:37 +0530 Message-Id: <20230131063342.2811275-2-suraj.kandpal@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230131063342.2811275-1-suraj.kandpal@intel.com> References: <20230131063342.2811275-1-suraj.kandpal@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v9 1/6] drm/i915/gsc: Create GSC request submission mechanism X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alan Previn Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" HDCP and PXP will require a common function to allow it to submit commands to the gsc cs. Also adding the gsc mtl header that needs to be added on to the existing payloads of HDCP and PXP. --v4 -Seprate gsc load and heci cmd submission into different functions in different files for better scalability [Alan] -Rename gsc address field [Alan] Cc: Daniele Ceraolo Spurio Cc: Alan Previn Signed-off-by: Suraj Kandpal Reviewed-by: Alan Previn --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 2 + drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.h | 1 + .../i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c | 94 +++++++++++++++++++ .../i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h | 45 +++++++++ 5 files changed, 143 insertions(+) create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 918470a04591..482928cffb1c 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -195,6 +195,7 @@ i915-y += \ i915-y += \ gt/uc/intel_gsc_fw.o \ gt/uc/intel_gsc_uc.o \ + gt/uc/intel_gsc_uc_heci_cmd_submit.o\ gt/uc/intel_guc.o \ gt/uc/intel_guc_ads.o \ gt/uc/intel_guc_capture.o \ diff --git a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h index 2af1ae3831df..454179884801 100644 --- a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h +++ b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h @@ -439,6 +439,8 @@ #define GSC_FW_LOAD GSC_INSTR(1, 0, 2) #define HECI1_FW_LIMIT_VALID (1 << 31) +#define GSC_HECI_CMD_PKT GSC_INSTR(0, 0, 6) + /* * Used to convert any address to canonical form. * Starting from gen8, some commands (e.g. STATE_BASE_ADDRESS, diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.h b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.h index 4b5dbb44afb4..146ac0128f69 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.h +++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.h @@ -12,4 +12,5 @@ struct intel_gsc_uc; int intel_gsc_uc_fw_upload(struct intel_gsc_uc *gsc); bool intel_gsc_uc_fw_init_done(struct intel_gsc_uc *gsc); + #endif diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c new file mode 100644 index 000000000000..be2424af521d --- /dev/null +++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c @@ -0,0 +1,94 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright © 2023 Intel Corporation + */ + +#include "gt/intel_engine_pm.h" +#include "gt/intel_gpu_commands.h" +#include "gt/intel_gt.h" +#include "gt/intel_ring.h" +#include "intel_gsc_uc_heci_cmd_submit.h" + +struct gsc_heci_pkt { + u64 addr_in; + u32 size_in; + u64 addr_out; + u32 size_out; +}; + +static int emit_gsc_heci_pkt(struct i915_request *rq, struct gsc_heci_pkt *pkt) +{ + u32 *cs; + + cs = intel_ring_begin(rq, 8); + if (IS_ERR(cs)) + return PTR_ERR(cs); + + *cs++ = GSC_HECI_CMD_PKT; + *cs++ = lower_32_bits(pkt->addr_in); + *cs++ = upper_32_bits(pkt->addr_in); + *cs++ = pkt->size_in; + *cs++ = lower_32_bits(pkt->addr_out); + *cs++ = upper_32_bits(pkt->addr_out); + *cs++ = pkt->size_out; + *cs++ = 0; + + intel_ring_advance(rq, cs); + + return 0; +} + +int intel_gsc_uc_heci_cmd_submit_packet(struct intel_gsc_uc *gsc, u64 addr_in, + u32 size_in, u64 addr_out, + u32 size_out) +{ + struct intel_context *ce = gsc->ce; + struct i915_request *rq; + struct gsc_heci_pkt pkt = { + .addr_in = addr_in, + .size_in = size_in, + .addr_out = addr_out, + .size_out = size_out + }; + int err; + + if (!ce) + return -ENODEV; + + rq = i915_request_create(ce); + if (IS_ERR(rq)) + return PTR_ERR(rq); + + if (ce->engine->emit_init_breadcrumb) { + err = ce->engine->emit_init_breadcrumb(rq); + if (err) + goto out_rq; + } + + err = emit_gsc_heci_pkt(rq, &pkt); + + if (err) + goto out_rq; + + err = ce->engine->emit_flush(rq, 0); + +out_rq: + i915_request_get(rq); + + if (unlikely(err)) + i915_request_set_error_once(rq, err); + + i915_request_add(rq); + + if (!err && i915_request_wait(rq, 0, msecs_to_jiffies(500)) < 0) + err = -ETIME; + + i915_request_put(rq); + + if (err) + drm_err(&gsc_uc_to_gt(gsc)->i915->drm, + "Request submission for GSC heci cmd failed (%d)\n", + err); + + return err; +} diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h b/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h new file mode 100644 index 000000000000..cf610dfca7a5 --- /dev/null +++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h @@ -0,0 +1,45 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2023 Intel Corporation + */ + +#ifndef _INTEL_GSC_UC_HECI_CMD_SUBMIT_H_ +#define _INTEL_GSC_UC_HECI_CMD_SUBMIT_H_ + +#include + +struct intel_gsc_uc; +struct intel_gsc_mtl_header { + u32 validity_marker; +#define GSC_HECI_VALIDITY_MARKER 0xA578875A + + u8 heci_client_id; +#define HECI_MEADDRESS_PXP 17 +#define HECI_MEADDRESS_HDCP 18 + + u8 reserved1; + + u16 header_version; +#define MTL_GSC_HEADER_VERSION 1 + + u64 host_session_handle; + u64 gsc_message_handle; + + u32 message_size; /* lower 20 bits only, upper 12 are reserved */ + + /* + * Flags mask: + * Bit 0: Pending + * Bit 1: Session Cleanup; + * Bits 2-15: Flags + * Bits 16-31: Extension Size + */ + u32 flags; + + u32 status; +} __packed; + +int intel_gsc_uc_heci_cmd_submit_packet(struct intel_gsc_uc *gsc, + u64 addr_in, u32 size_in, + u64 addr_out, u32 size_out); +#endif From patchwork Tue Jan 31 06:33:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kandpal, Suraj" X-Patchwork-Id: 13122291 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 34417C38142 for ; Tue, 31 Jan 2023 06:36:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A7D9810E325; Tue, 31 Jan 2023 06:36:10 +0000 (UTC) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9D72F10E325 for ; Tue, 31 Jan 2023 06:36:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1675146967; x=1706682967; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Ha+N4+GgCZ20D9urHGiU9EQIFtIpINbliFs6bQ3zgfg=; b=UgybwDuBXi5rlO8iwxB0EjZO2DreKGkv9WsHQgT9g61wuPfyz5nJe6Vj bTho8nWX9aeXSbgntejsd6PS15FcxTpJmLqNmMabC2iLCKcEVbopaui8A 8VfNbJBcX360SI0FjwFrBr6VhmwCYyQMl82yoPgHQ7niMecnkHAbE4idR MaBxVGr5Rkbx4BwVAFxDNEwRKZR4g6mq6VbLpxvKgt4HTwYCiuWX6x8Y4 se+2Ms9l0oxmYjbIYlAR8ZcXDfrLnyazmqOf+WN1iuYv2/kdmNgXxOE/g Yc9xlSndXZsqZV2j/TNuFgpdJKwGGkfLfJzzG+DZPmunKfrcX/rRCRnPz Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10606"; a="390126807" X-IronPort-AV: E=Sophos;i="5.97,259,1669104000"; d="scan'208";a="390126807" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jan 2023 22:36:07 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10606"; a="838248463" X-IronPort-AV: E=Sophos;i="5.97,259,1669104000"; d="scan'208";a="838248463" Received: from kandpal-x299-ud4-pro.iind.intel.com ([10.190.239.32]) by orsmga005.jf.intel.com with ESMTP; 30 Jan 2023 22:36:04 -0800 From: Suraj Kandpal To: intel-gfx@lists.freedesktop.org Date: Tue, 31 Jan 2023 12:03:38 +0530 Message-Id: <20230131063342.2811275-3-suraj.kandpal@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230131063342.2811275-1-suraj.kandpal@intel.com> References: <20230131063342.2811275-1-suraj.kandpal@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v9 2/6] drm/i915/hdcp: Keep hdcp agonstic naming convention X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rodrigo Vivi , Tomas Winkler Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Anshuman Gupta Change the include/drm/i915_mei_hdcp_interface.h to include/drm/i915_hdcp_interface.h --v6 -make each patch build individually [Jani] --v8 -change ME FW to ME/GSC FW [Ankit] -fix formatting issue [Ankit] Cc: Tomas Winkler Cc: Rodrigo Vivi Cc: Uma Shankar Cc: Ankit Nautiyal Signed-off-by: Anshuman Gupta Signed-off-by: Suraj Kandpal Reviewed-by: Ankit Nautiyal Acked-by: Tomas Winkler --- .../gpu/drm/i915/display/intel_display_core.h | 2 +- .../drm/i915/display/intel_display_types.h | 2 +- drivers/gpu/drm/i915/display/intel_hdcp.c | 81 ++++++++-------- drivers/misc/mei/hdcp/mei_hdcp.c | 61 ++++++------ ...hdcp_interface.h => i915_hdcp_interface.h} | 92 +++++++++---------- 5 files changed, 118 insertions(+), 120 deletions(-) rename include/drm/{i915_mei_hdcp_interface.h => i915_hdcp_interface.h} (73%) diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h index fb8670aa2932..8e7a68339876 100644 --- a/drivers/gpu/drm/i915/display/intel_display_core.h +++ b/drivers/gpu/drm/i915/display/intel_display_core.h @@ -378,7 +378,7 @@ struct intel_display { } gmbus; struct { - struct i915_hdcp_comp_master *master; + struct i915_hdcp_master *master; bool comp_added; /* Mutex to protect the above hdcp component related values. */ diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 9ccae7a46020..7accd3a8877c 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -43,7 +43,7 @@ #include #include #include -#include +#include #include #include "i915_vma.h" diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c index 6406fd487ee5..262c76f21801 100644 --- a/drivers/gpu/drm/i915/display/intel_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c @@ -1143,7 +1143,7 @@ hdcp2_prepare_ake_init(struct intel_connector *connector, struct intel_digital_port *dig_port = intel_attached_dig_port(connector); struct hdcp_port_data *data = &dig_port->hdcp_port_data; struct drm_i915_private *dev_priv = to_i915(connector->base.dev); - struct i915_hdcp_comp_master *comp; + struct i915_hdcp_master *comp; int ret; mutex_lock(&dev_priv->display.hdcp.comp_mutex); @@ -1154,7 +1154,7 @@ hdcp2_prepare_ake_init(struct intel_connector *connector, return -EINVAL; } - ret = comp->ops->initiate_hdcp2_session(comp->mei_dev, data, ake_data); + ret = comp->ops->initiate_hdcp2_session(comp->hdcp_dev, data, ake_data); if (ret) drm_dbg_kms(&dev_priv->drm, "Prepare_ake_init failed. %d\n", ret); @@ -1173,7 +1173,7 @@ hdcp2_verify_rx_cert_prepare_km(struct intel_connector *connector, struct intel_digital_port *dig_port = intel_attached_dig_port(connector); struct hdcp_port_data *data = &dig_port->hdcp_port_data; struct drm_i915_private *dev_priv = to_i915(connector->base.dev); - struct i915_hdcp_comp_master *comp; + struct i915_hdcp_master *comp; int ret; mutex_lock(&dev_priv->display.hdcp.comp_mutex); @@ -1184,7 +1184,7 @@ hdcp2_verify_rx_cert_prepare_km(struct intel_connector *connector, return -EINVAL; } - ret = comp->ops->verify_receiver_cert_prepare_km(comp->mei_dev, data, + ret = comp->ops->verify_receiver_cert_prepare_km(comp->hdcp_dev, data, rx_cert, paired, ek_pub_km, msg_sz); if (ret < 0) @@ -1201,7 +1201,7 @@ static int hdcp2_verify_hprime(struct intel_connector *connector, struct intel_digital_port *dig_port = intel_attached_dig_port(connector); struct hdcp_port_data *data = &dig_port->hdcp_port_data; struct drm_i915_private *dev_priv = to_i915(connector->base.dev); - struct i915_hdcp_comp_master *comp; + struct i915_hdcp_master *comp; int ret; mutex_lock(&dev_priv->display.hdcp.comp_mutex); @@ -1212,7 +1212,7 @@ static int hdcp2_verify_hprime(struct intel_connector *connector, return -EINVAL; } - ret = comp->ops->verify_hprime(comp->mei_dev, data, rx_hprime); + ret = comp->ops->verify_hprime(comp->hdcp_dev, data, rx_hprime); if (ret < 0) drm_dbg_kms(&dev_priv->drm, "Verify hprime failed. %d\n", ret); mutex_unlock(&dev_priv->display.hdcp.comp_mutex); @@ -1227,7 +1227,7 @@ hdcp2_store_pairing_info(struct intel_connector *connector, struct intel_digital_port *dig_port = intel_attached_dig_port(connector); struct hdcp_port_data *data = &dig_port->hdcp_port_data; struct drm_i915_private *dev_priv = to_i915(connector->base.dev); - struct i915_hdcp_comp_master *comp; + struct i915_hdcp_master *comp; int ret; mutex_lock(&dev_priv->display.hdcp.comp_mutex); @@ -1238,7 +1238,7 @@ hdcp2_store_pairing_info(struct intel_connector *connector, return -EINVAL; } - ret = comp->ops->store_pairing_info(comp->mei_dev, data, pairing_info); + ret = comp->ops->store_pairing_info(comp->hdcp_dev, data, pairing_info); if (ret < 0) drm_dbg_kms(&dev_priv->drm, "Store pairing info failed. %d\n", ret); @@ -1254,7 +1254,7 @@ hdcp2_prepare_lc_init(struct intel_connector *connector, struct intel_digital_port *dig_port = intel_attached_dig_port(connector); struct hdcp_port_data *data = &dig_port->hdcp_port_data; struct drm_i915_private *dev_priv = to_i915(connector->base.dev); - struct i915_hdcp_comp_master *comp; + struct i915_hdcp_master *comp; int ret; mutex_lock(&dev_priv->display.hdcp.comp_mutex); @@ -1265,7 +1265,7 @@ hdcp2_prepare_lc_init(struct intel_connector *connector, return -EINVAL; } - ret = comp->ops->initiate_locality_check(comp->mei_dev, data, lc_init); + ret = comp->ops->initiate_locality_check(comp->hdcp_dev, data, lc_init); if (ret < 0) drm_dbg_kms(&dev_priv->drm, "Prepare lc_init failed. %d\n", ret); @@ -1281,7 +1281,7 @@ hdcp2_verify_lprime(struct intel_connector *connector, struct intel_digital_port *dig_port = intel_attached_dig_port(connector); struct hdcp_port_data *data = &dig_port->hdcp_port_data; struct drm_i915_private *dev_priv = to_i915(connector->base.dev); - struct i915_hdcp_comp_master *comp; + struct i915_hdcp_master *comp; int ret; mutex_lock(&dev_priv->display.hdcp.comp_mutex); @@ -1292,7 +1292,7 @@ hdcp2_verify_lprime(struct intel_connector *connector, return -EINVAL; } - ret = comp->ops->verify_lprime(comp->mei_dev, data, rx_lprime); + ret = comp->ops->verify_lprime(comp->hdcp_dev, data, rx_lprime); if (ret < 0) drm_dbg_kms(&dev_priv->drm, "Verify L_Prime failed. %d\n", ret); @@ -1307,7 +1307,7 @@ static int hdcp2_prepare_skey(struct intel_connector *connector, struct intel_digital_port *dig_port = intel_attached_dig_port(connector); struct hdcp_port_data *data = &dig_port->hdcp_port_data; struct drm_i915_private *dev_priv = to_i915(connector->base.dev); - struct i915_hdcp_comp_master *comp; + struct i915_hdcp_master *comp; int ret; mutex_lock(&dev_priv->display.hdcp.comp_mutex); @@ -1318,7 +1318,7 @@ static int hdcp2_prepare_skey(struct intel_connector *connector, return -EINVAL; } - ret = comp->ops->get_session_key(comp->mei_dev, data, ske_data); + ret = comp->ops->get_session_key(comp->hdcp_dev, data, ske_data); if (ret < 0) drm_dbg_kms(&dev_priv->drm, "Get session key failed. %d\n", ret); @@ -1336,7 +1336,7 @@ hdcp2_verify_rep_topology_prepare_ack(struct intel_connector *connector, struct intel_digital_port *dig_port = intel_attached_dig_port(connector); struct hdcp_port_data *data = &dig_port->hdcp_port_data; struct drm_i915_private *dev_priv = to_i915(connector->base.dev); - struct i915_hdcp_comp_master *comp; + struct i915_hdcp_master *comp; int ret; mutex_lock(&dev_priv->display.hdcp.comp_mutex); @@ -1347,7 +1347,7 @@ hdcp2_verify_rep_topology_prepare_ack(struct intel_connector *connector, return -EINVAL; } - ret = comp->ops->repeater_check_flow_prepare_ack(comp->mei_dev, data, + ret = comp->ops->repeater_check_flow_prepare_ack(comp->hdcp_dev, data, rep_topology, rep_send_ack); if (ret < 0) @@ -1365,7 +1365,7 @@ hdcp2_verify_mprime(struct intel_connector *connector, struct intel_digital_port *dig_port = intel_attached_dig_port(connector); struct hdcp_port_data *data = &dig_port->hdcp_port_data; struct drm_i915_private *dev_priv = to_i915(connector->base.dev); - struct i915_hdcp_comp_master *comp; + struct i915_hdcp_master *comp; int ret; mutex_lock(&dev_priv->display.hdcp.comp_mutex); @@ -1376,7 +1376,7 @@ hdcp2_verify_mprime(struct intel_connector *connector, return -EINVAL; } - ret = comp->ops->verify_mprime(comp->mei_dev, data, stream_ready); + ret = comp->ops->verify_mprime(comp->hdcp_dev, data, stream_ready); if (ret < 0) drm_dbg_kms(&dev_priv->drm, "Verify mprime failed. %d\n", ret); mutex_unlock(&dev_priv->display.hdcp.comp_mutex); @@ -1389,7 +1389,7 @@ static int hdcp2_authenticate_port(struct intel_connector *connector) struct intel_digital_port *dig_port = intel_attached_dig_port(connector); struct hdcp_port_data *data = &dig_port->hdcp_port_data; struct drm_i915_private *dev_priv = to_i915(connector->base.dev); - struct i915_hdcp_comp_master *comp; + struct i915_hdcp_master *comp; int ret; mutex_lock(&dev_priv->display.hdcp.comp_mutex); @@ -1400,7 +1400,7 @@ static int hdcp2_authenticate_port(struct intel_connector *connector) return -EINVAL; } - ret = comp->ops->enable_hdcp_authentication(comp->mei_dev, data); + ret = comp->ops->enable_hdcp_authentication(comp->hdcp_dev, data); if (ret < 0) drm_dbg_kms(&dev_priv->drm, "Enable hdcp auth failed. %d\n", ret); @@ -1413,7 +1413,7 @@ static int hdcp2_close_mei_session(struct intel_connector *connector) { struct intel_digital_port *dig_port = intel_attached_dig_port(connector); struct drm_i915_private *dev_priv = to_i915(connector->base.dev); - struct i915_hdcp_comp_master *comp; + struct i915_hdcp_master *comp; int ret; mutex_lock(&dev_priv->display.hdcp.comp_mutex); @@ -1424,7 +1424,7 @@ static int hdcp2_close_mei_session(struct intel_connector *connector) return -EINVAL; } - ret = comp->ops->close_hdcp_session(comp->mei_dev, + ret = comp->ops->close_hdcp_session(comp->hdcp_dev, &dig_port->hdcp_port_data); mutex_unlock(&dev_priv->display.hdcp.comp_mutex); @@ -2145,8 +2145,8 @@ static int i915_hdcp_component_bind(struct device *i915_kdev, drm_dbg(&dev_priv->drm, "I915 HDCP comp bind\n"); mutex_lock(&dev_priv->display.hdcp.comp_mutex); - dev_priv->display.hdcp.master = (struct i915_hdcp_comp_master *)data; - dev_priv->display.hdcp.master->mei_dev = mei_kdev; + dev_priv->display.hdcp.master = (struct i915_hdcp_master *)data; + dev_priv->display.hdcp.master->hdcp_dev = mei_kdev; mutex_unlock(&dev_priv->display.hdcp.comp_mutex); return 0; @@ -2163,30 +2163,30 @@ static void i915_hdcp_component_unbind(struct device *i915_kdev, mutex_unlock(&dev_priv->display.hdcp.comp_mutex); } -static const struct component_ops i915_hdcp_component_ops = { +static const struct component_ops i915_hdcp_ops = { .bind = i915_hdcp_component_bind, .unbind = i915_hdcp_component_unbind, }; -static enum mei_fw_ddi intel_get_mei_fw_ddi_index(enum port port) +static enum hdcp_ddi intel_get_hdcp_ddi_index(enum port port) { switch (port) { case PORT_A: - return MEI_DDI_A; + return HDCP_DDI_A; case PORT_B ... PORT_F: - return (enum mei_fw_ddi)port; + return (enum hdcp_ddi)port; default: - return MEI_DDI_INVALID_PORT; + return HDCP_DDI_INVALID_PORT; } } -static enum mei_fw_tc intel_get_mei_fw_tc(enum transcoder cpu_transcoder) +static enum hdcp_transcoder intel_get_hdcp_transcoder(enum transcoder cpu_transcoder) { switch (cpu_transcoder) { case TRANSCODER_A ... TRANSCODER_D: - return (enum mei_fw_tc)(cpu_transcoder | 0x10); + return (enum hdcp_transcoder)(cpu_transcoder | 0x10); default: /* eDP, DSI TRANSCODERS are non HDCP capable */ - return MEI_INVALID_TRANSCODER; + return HDCP_INVALID_TRANSCODER; } } @@ -2200,20 +2200,20 @@ static int initialize_hdcp_port_data(struct intel_connector *connector, enum port port = dig_port->base.port; if (DISPLAY_VER(dev_priv) < 12) - data->fw_ddi = intel_get_mei_fw_ddi_index(port); + data->hdcp_ddi = intel_get_hdcp_ddi_index(port); else /* - * As per ME FW API expectation, for GEN 12+, fw_ddi is filled + * As per ME FW API expectation, for GEN 12+, hdcp_ddi is filled * with zero(INVALID PORT index). */ - data->fw_ddi = MEI_DDI_INVALID_PORT; + data->hdcp_ddi = HDCP_DDI_INVALID_PORT; /* - * As associated transcoder is set and modified at modeset, here fw_tc + * As associated transcoder is set and modified at modeset, here hdcp_transcoder * is initialized to zero (invalid transcoder index). This will be * retained for fw_tc = MEI_INVALID_TRANSCODER; + data->hdcp_transcoder = HDCP_INVALID_TRANSCODER; data->port_type = (u8)HDCP_PORT_TYPE_INTEGRATED; data->protocol = (u8)shim->protocol; @@ -2256,7 +2256,7 @@ void intel_hdcp_component_init(struct drm_i915_private *dev_priv) dev_priv->display.hdcp.comp_added = true; mutex_unlock(&dev_priv->display.hdcp.comp_mutex); - ret = component_add_typed(dev_priv->drm.dev, &i915_hdcp_component_ops, + ret = component_add_typed(dev_priv->drm.dev, &i915_hdcp_ops, I915_COMPONENT_HDCP); if (ret < 0) { drm_dbg_kms(&dev_priv->drm, "Failed at component add(%d)\n", @@ -2350,7 +2350,8 @@ int intel_hdcp_enable(struct intel_connector *connector, } if (DISPLAY_VER(dev_priv) >= 12) - dig_port->hdcp_port_data.fw_tc = intel_get_mei_fw_tc(hdcp->cpu_transcoder); + dig_port->hdcp_port_data.hdcp_transcoder = + intel_get_hdcp_transcoder(hdcp->cpu_transcoder); /* * Considering that HDCP2.2 is more secure than HDCP1.4, If the setup @@ -2485,7 +2486,7 @@ void intel_hdcp_component_fini(struct drm_i915_private *dev_priv) dev_priv->display.hdcp.comp_added = false; mutex_unlock(&dev_priv->display.hdcp.comp_mutex); - component_del(dev_priv->drm.dev, &i915_hdcp_component_ops); + component_del(dev_priv->drm.dev, &i915_hdcp_ops); } void intel_hdcp_cleanup(struct intel_connector *connector) diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c index e889a8bd7ac8..b2c49599809c 100644 --- a/drivers/misc/mei/hdcp/mei_hdcp.c +++ b/drivers/misc/mei/hdcp/mei_hdcp.c @@ -23,7 +23,7 @@ #include #include #include -#include +#include #include "mei_hdcp.h" @@ -57,8 +57,8 @@ mei_hdcp_initiate_session(struct device *dev, struct hdcp_port_data *data, WIRED_CMD_BUF_LEN_INITIATE_HDCP2_SESSION_IN; session_init_in.port.integrated_port_type = data->port_type; - session_init_in.port.physical_port = (u8)data->fw_ddi; - session_init_in.port.attached_transcoder = (u8)data->fw_tc; + session_init_in.port.physical_port = (u8)data->hdcp_ddi; + session_init_in.port.attached_transcoder = (u8)data->hdcp_transcoder; session_init_in.protocol = data->protocol; byte = mei_cldev_send(cldev, (u8 *)&session_init_in, @@ -127,8 +127,8 @@ mei_hdcp_verify_receiver_cert_prepare_km(struct device *dev, WIRED_CMD_BUF_LEN_VERIFY_RECEIVER_CERT_IN; verify_rxcert_in.port.integrated_port_type = data->port_type; - verify_rxcert_in.port.physical_port = (u8)data->fw_ddi; - verify_rxcert_in.port.attached_transcoder = (u8)data->fw_tc; + verify_rxcert_in.port.physical_port = (u8)data->hdcp_ddi; + verify_rxcert_in.port.attached_transcoder = (u8)data->hdcp_transcoder; verify_rxcert_in.cert_rx = rx_cert->cert_rx; memcpy(verify_rxcert_in.r_rx, &rx_cert->r_rx, HDCP_2_2_RRX_LEN); @@ -198,8 +198,8 @@ mei_hdcp_verify_hprime(struct device *dev, struct hdcp_port_data *data, send_hprime_in.header.buffer_len = WIRED_CMD_BUF_LEN_AKE_SEND_HPRIME_IN; send_hprime_in.port.integrated_port_type = data->port_type; - send_hprime_in.port.physical_port = (u8)data->fw_ddi; - send_hprime_in.port.attached_transcoder = (u8)data->fw_tc; + send_hprime_in.port.physical_port = (u8)data->hdcp_ddi; + send_hprime_in.port.attached_transcoder = (u8)data->hdcp_transcoder; memcpy(send_hprime_in.h_prime, rx_hprime->h_prime, HDCP_2_2_H_PRIME_LEN); @@ -256,8 +256,8 @@ mei_hdcp_store_pairing_info(struct device *dev, struct hdcp_port_data *data, WIRED_CMD_BUF_LEN_SEND_PAIRING_INFO_IN; pairing_info_in.port.integrated_port_type = data->port_type; - pairing_info_in.port.physical_port = (u8)data->fw_ddi; - pairing_info_in.port.attached_transcoder = (u8)data->fw_tc; + pairing_info_in.port.physical_port = (u8)data->hdcp_ddi; + pairing_info_in.port.attached_transcoder = (u8)data->hdcp_transcoder; memcpy(pairing_info_in.e_kh_km, pairing_info->e_kh_km, HDCP_2_2_E_KH_KM_LEN); @@ -315,8 +315,8 @@ mei_hdcp_initiate_locality_check(struct device *dev, lc_init_in.header.buffer_len = WIRED_CMD_BUF_LEN_INIT_LOCALITY_CHECK_IN; lc_init_in.port.integrated_port_type = data->port_type; - lc_init_in.port.physical_port = (u8)data->fw_ddi; - lc_init_in.port.attached_transcoder = (u8)data->fw_tc; + lc_init_in.port.physical_port = (u8)data->hdcp_ddi; + lc_init_in.port.attached_transcoder = (u8)data->hdcp_transcoder; byte = mei_cldev_send(cldev, (u8 *)&lc_init_in, sizeof(lc_init_in)); if (byte < 0) { @@ -371,8 +371,8 @@ mei_hdcp_verify_lprime(struct device *dev, struct hdcp_port_data *data, WIRED_CMD_BUF_LEN_VALIDATE_LOCALITY_IN; verify_lprime_in.port.integrated_port_type = data->port_type; - verify_lprime_in.port.physical_port = (u8)data->fw_ddi; - verify_lprime_in.port.attached_transcoder = (u8)data->fw_tc; + verify_lprime_in.port.physical_port = (u8)data->hdcp_ddi; + verify_lprime_in.port.attached_transcoder = (u8)data->hdcp_transcoder; memcpy(verify_lprime_in.l_prime, rx_lprime->l_prime, HDCP_2_2_L_PRIME_LEN); @@ -429,8 +429,8 @@ static int mei_hdcp_get_session_key(struct device *dev, get_skey_in.header.buffer_len = WIRED_CMD_BUF_LEN_GET_SESSION_KEY_IN; get_skey_in.port.integrated_port_type = data->port_type; - get_skey_in.port.physical_port = (u8)data->fw_ddi; - get_skey_in.port.attached_transcoder = (u8)data->fw_tc; + get_skey_in.port.physical_port = (u8)data->hdcp_ddi; + get_skey_in.port.attached_transcoder = (u8)data->hdcp_transcoder; byte = mei_cldev_send(cldev, (u8 *)&get_skey_in, sizeof(get_skey_in)); if (byte < 0) { @@ -494,8 +494,8 @@ mei_hdcp_repeater_check_flow_prepare_ack(struct device *dev, WIRED_CMD_BUF_LEN_VERIFY_REPEATER_IN; verify_repeater_in.port.integrated_port_type = data->port_type; - verify_repeater_in.port.physical_port = (u8)data->fw_ddi; - verify_repeater_in.port.attached_transcoder = (u8)data->fw_tc; + verify_repeater_in.port.physical_port = (u8)data->hdcp_ddi; + verify_repeater_in.port.attached_transcoder = (u8)data->hdcp_transcoder; memcpy(verify_repeater_in.rx_info, rep_topology->rx_info, HDCP_2_2_RXINFO_LEN); @@ -572,8 +572,8 @@ static int mei_hdcp_verify_mprime(struct device *dev, verify_mprime_in->header.buffer_len = cmd_size - sizeof(verify_mprime_in->header); verify_mprime_in->port.integrated_port_type = data->port_type; - verify_mprime_in->port.physical_port = (u8)data->fw_ddi; - verify_mprime_in->port.attached_transcoder = (u8)data->fw_tc; + verify_mprime_in->port.physical_port = (u8)data->hdcp_ddi; + verify_mprime_in->port.attached_transcoder = (u8)data->hdcp_transcoder; memcpy(verify_mprime_in->m_prime, stream_ready->m_prime, HDCP_2_2_MPRIME_LEN); drm_hdcp_cpu_to_be24(verify_mprime_in->seq_num_m, data->seq_num_m); @@ -634,8 +634,8 @@ static int mei_hdcp_enable_authentication(struct device *dev, enable_auth_in.header.buffer_len = WIRED_CMD_BUF_LEN_ENABLE_AUTH_IN; enable_auth_in.port.integrated_port_type = data->port_type; - enable_auth_in.port.physical_port = (u8)data->fw_ddi; - enable_auth_in.port.attached_transcoder = (u8)data->fw_tc; + enable_auth_in.port.physical_port = (u8)data->hdcp_ddi; + enable_auth_in.port.attached_transcoder = (u8)data->hdcp_transcoder; enable_auth_in.stream_type = data->streams[0].stream_type; byte = mei_cldev_send(cldev, (u8 *)&enable_auth_in, @@ -689,8 +689,8 @@ mei_hdcp_close_session(struct device *dev, struct hdcp_port_data *data) WIRED_CMD_BUF_LEN_CLOSE_SESSION_IN; session_close_in.port.integrated_port_type = data->port_type; - session_close_in.port.physical_port = (u8)data->fw_ddi; - session_close_in.port.attached_transcoder = (u8)data->fw_tc; + session_close_in.port.physical_port = (u8)data->hdcp_ddi; + session_close_in.port.attached_transcoder = (u8)data->hdcp_transcoder; byte = mei_cldev_send(cldev, (u8 *)&session_close_in, sizeof(session_close_in)); @@ -715,7 +715,7 @@ mei_hdcp_close_session(struct device *dev, struct hdcp_port_data *data) return 0; } -static const struct i915_hdcp_component_ops mei_hdcp_ops = { +static const struct i915_hdcp_ops mei_hdcp_ops = { .owner = THIS_MODULE, .initiate_hdcp2_session = mei_hdcp_initiate_session, .verify_receiver_cert_prepare_km = @@ -735,13 +735,12 @@ static const struct i915_hdcp_component_ops mei_hdcp_ops = { static int mei_component_master_bind(struct device *dev) { struct mei_cl_device *cldev = to_mei_cl_device(dev); - struct i915_hdcp_comp_master *comp_master = - mei_cldev_get_drvdata(cldev); + struct i915_hdcp_master *comp_master = mei_cldev_get_drvdata(cldev); int ret; dev_dbg(dev, "%s\n", __func__); comp_master->ops = &mei_hdcp_ops; - comp_master->mei_dev = dev; + comp_master->hdcp_dev = dev; ret = component_bind_all(dev, comp_master); if (ret < 0) return ret; @@ -752,8 +751,7 @@ static int mei_component_master_bind(struct device *dev) static void mei_component_master_unbind(struct device *dev) { struct mei_cl_device *cldev = to_mei_cl_device(dev); - struct i915_hdcp_comp_master *comp_master = - mei_cldev_get_drvdata(cldev); + struct i915_hdcp_master *comp_master = mei_cldev_get_drvdata(cldev); dev_dbg(dev, "%s\n", __func__); component_unbind_all(dev, comp_master); @@ -801,7 +799,7 @@ static int mei_hdcp_component_match(struct device *dev, int subcomponent, static int mei_hdcp_probe(struct mei_cl_device *cldev, const struct mei_cl_device_id *id) { - struct i915_hdcp_comp_master *comp_master; + struct i915_hdcp_master *comp_master; struct component_match *master_match; int ret; @@ -846,8 +844,7 @@ static int mei_hdcp_probe(struct mei_cl_device *cldev, static void mei_hdcp_remove(struct mei_cl_device *cldev) { - struct i915_hdcp_comp_master *comp_master = - mei_cldev_get_drvdata(cldev); + struct i915_hdcp_master *comp_master = mei_cldev_get_drvdata(cldev); int ret; component_master_del(&cldev->dev, &mei_component_master_ops); diff --git a/include/drm/i915_mei_hdcp_interface.h b/include/drm/i915_hdcp_interface.h similarity index 73% rename from include/drm/i915_mei_hdcp_interface.h rename to include/drm/i915_hdcp_interface.h index f441cbcd95a4..75c75f52ab1b 100644 --- a/include/drm/i915_mei_hdcp_interface.h +++ b/include/drm/i915_hdcp_interface.h @@ -6,15 +6,15 @@ * Ramalingam C */ -#ifndef _I915_MEI_HDCP_INTERFACE_H_ -#define _I915_MEI_HDCP_INTERFACE_H_ +#ifndef _I915_HDCP_INTERFACE_H_ +#define _I915_HDCP_INTERFACE_H_ #include #include #include /** - * enum hdcp_port_type - HDCP port implementation type defined by ME FW + * enum hdcp_port_type - HDCP port implementation type defined by ME/GSC FW * @HDCP_PORT_TYPE_INVALID: Invalid hdcp port type * @HDCP_PORT_TYPE_INTEGRATED: In-Host HDCP2.x port * @HDCP_PORT_TYPE_LSPCON: HDCP2.2 discrete wired Tx port with LSPCON @@ -41,46 +41,46 @@ enum hdcp_wired_protocol { HDCP_PROTOCOL_DP }; -enum mei_fw_ddi { - MEI_DDI_INVALID_PORT = 0x0, +enum hdcp_ddi { + HDCP_DDI_INVALID_PORT = 0x0, - MEI_DDI_B = 1, - MEI_DDI_C, - MEI_DDI_D, - MEI_DDI_E, - MEI_DDI_F, - MEI_DDI_A = 7, - MEI_DDI_RANGE_END = MEI_DDI_A, + HDCP_DDI_B = 1, + HDCP_DDI_C, + HDCP_DDI_D, + HDCP_DDI_E, + HDCP_DDI_F, + HDCP_DDI_A = 7, + HDCP_DDI_RANGE_END = HDCP_DDI_A, }; /** - * enum mei_fw_tc - ME Firmware defined index for transcoders - * @MEI_INVALID_TRANSCODER: Index for Invalid transcoder - * @MEI_TRANSCODER_EDP: Index for EDP Transcoder - * @MEI_TRANSCODER_DSI0: Index for DSI0 Transcoder - * @MEI_TRANSCODER_DSI1: Index for DSI1 Transcoder - * @MEI_TRANSCODER_A: Index for Transcoder A - * @MEI_TRANSCODER_B: Index for Transcoder B - * @MEI_TRANSCODER_C: Index for Transcoder C - * @MEI_TRANSCODER_D: Index for Transcoder D + * enum hdcp_tc - ME/GSC Firmware defined index for transcoders + * @HDCP_INVALID_TRANSCODER: Index for Invalid transcoder + * @HDCP_TRANSCODER_EDP: Index for EDP Transcoder + * @HDCP_TRANSCODER_DSI0: Index for DSI0 Transcoder + * @HDCP_TRANSCODER_DSI1: Index for DSI1 Transcoder + * @HDCP_TRANSCODER_A: Index for Transcoder A + * @HDCP_TRANSCODER_B: Index for Transcoder B + * @HDCP_TRANSCODER_C: Index for Transcoder C + * @HDCP_TRANSCODER_D: Index for Transcoder D */ -enum mei_fw_tc { - MEI_INVALID_TRANSCODER = 0x00, - MEI_TRANSCODER_EDP, - MEI_TRANSCODER_DSI0, - MEI_TRANSCODER_DSI1, - MEI_TRANSCODER_A = 0x10, - MEI_TRANSCODER_B, - MEI_TRANSCODER_C, - MEI_TRANSCODER_D +enum hdcp_transcoder { + HDCP_INVALID_TRANSCODER = 0x00, + HDCP_TRANSCODER_EDP, + HDCP_TRANSCODER_DSI0, + HDCP_TRANSCODER_DSI1, + HDCP_TRANSCODER_A = 0x10, + HDCP_TRANSCODER_B, + HDCP_TRANSCODER_C, + HDCP_TRANSCODER_D }; /** * struct hdcp_port_data - intel specific HDCP port data - * @fw_ddi: ddi index as per ME FW - * @fw_tc: transcoder index as per ME FW - * @port_type: HDCP port type as per ME FW classification - * @protocol: HDCP adaptation as per ME FW + * @hdcp_ddi: ddi index as per ME/GSC FW + * @hdcp_transcoder: transcoder index as per ME/GSC FW + * @port_type: HDCP port type as per ME/GSC FW classification + * @protocol: HDCP adaptation as per ME/GSC FW * @k: No of streams transmitted on a port. Only on DP MST this is != 1 * @seq_num_m: Count of RepeaterAuth_Stream_Manage msg propagated. * Initialized to 0 on AKE_INIT. Incremented after every successful @@ -90,8 +90,8 @@ enum mei_fw_tc { * streams */ struct hdcp_port_data { - enum mei_fw_ddi fw_ddi; - enum mei_fw_tc fw_tc; + enum hdcp_ddi hdcp_ddi; + enum hdcp_transcoder hdcp_transcoder; u8 port_type; u8 protocol; u16 k; @@ -100,7 +100,7 @@ struct hdcp_port_data { }; /** - * struct i915_hdcp_component_ops- ops for HDCP2.2 services. + * struct i915_hdcp_ops- ops for HDCP2.2 services. * @owner: Module providing the ops * @initiate_hdcp2_session: Initiate a Wired HDCP2.2 Tx Session. * And Prepare AKE_Init. @@ -119,9 +119,9 @@ struct hdcp_port_data { * @close_hdcp_session: Close the Wired HDCP Tx session per port. * This also disables the authenticated state of the port. */ -struct i915_hdcp_component_ops { +struct i915_hdcp_ops { /** - * @owner: mei_hdcp module + * @owner: hdcp module */ struct module *owner; @@ -169,16 +169,16 @@ struct i915_hdcp_component_ops { /** * struct i915_hdcp_component_master - Used for communication between i915 - * and mei_hdcp drivers for the HDCP2.2 services - * @mei_dev: device that provide the HDCP2.2 service from MEI Bus. - * @hdcp_ops: Ops implemented by mei_hdcp driver, used by i915 driver. + * and hdcp drivers for the HDCP2.2 services + * @hdcp_dev: device that provide the HDCP2.2 service from MEI Bus. + * @hdcp_ops: Ops implemented by hdcp driver or intel_hdcp_gsc , used by i915 driver. */ -struct i915_hdcp_comp_master { - struct device *mei_dev; - const struct i915_hdcp_component_ops *ops; +struct i915_hdcp_master { + struct device *hdcp_dev; + const struct i915_hdcp_ops *ops; /* To protect the above members. */ struct mutex mutex; }; -#endif /* _I915_MEI_HDCP_INTERFACE_H_ */ +#endif /* _I915_HDCP_INTERFACE_H_ */ From patchwork Tue Jan 31 06:33:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kandpal, Suraj" X-Patchwork-Id: 13122292 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1DBECC636D3 for ; Tue, 31 Jan 2023 06:36:14 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 205BF10E326; Tue, 31 Jan 2023 06:36:13 +0000 (UTC) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id E790310E325 for ; Tue, 31 Jan 2023 06:36:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1675146969; x=1706682969; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=XCNXO+bIUAEx59aObNyJbcuzmWObdTUrwFsL1dynx2g=; b=EtexM1ARkWX12+ifGrT0wvO4LpcoQH/d3CATq2autViINS+wAEg/PRz1 8F3qxYUoOf1qGGJmcOJ2+IeYg5p/MImXfW9UakL2KrgUfhGzXBTHsY3X0 WbpE2FQH6wXa1Hf+8N8UE06nxeRiPGnetSxO1qMXD2c9YGos812+QOaqo 8ztqHbTunOKnyRSwEWp6HCitCXFNfPdZIhsDO8iGNxHJ1WkLuOTcBMr2W FbMjehGDz3EMHVi/jM4dgUpn4LntopNft1oosPhyE/OnjAJvKC3FkzdNi BJc70tPFQZmPrdYd4gBvaDqPb/hdlvuRggu4mDAqS9MyWiqIKgHeCxVdF w==; X-IronPort-AV: E=McAfee;i="6500,9779,10606"; a="390126816" X-IronPort-AV: E=Sophos;i="5.97,259,1669104000"; d="scan'208";a="390126816" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jan 2023 22:36:09 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10606"; a="838248493" X-IronPort-AV: E=Sophos;i="5.97,259,1669104000"; d="scan'208";a="838248493" Received: from kandpal-x299-ud4-pro.iind.intel.com ([10.190.239.32]) by orsmga005.jf.intel.com with ESMTP; 30 Jan 2023 22:36:07 -0800 From: Suraj Kandpal To: intel-gfx@lists.freedesktop.org Date: Tue, 31 Jan 2023 12:03:39 +0530 Message-Id: <20230131063342.2811275-4-suraj.kandpal@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230131063342.2811275-1-suraj.kandpal@intel.com> References: <20230131063342.2811275-1-suraj.kandpal@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v9 3/6] i915/hdcp: HDCP2.x Refactoring to agnostic hdcp X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rodrigo Vivi , Tomas Winkler Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" As now we have more then one type of content protection secrity firmware. Let change the i915_hdcp_interface.h header naming convention to suit generic f/w type. %s/MEI_/HDCP_ %s/mei_dev/hdcp_dev As interface to CP FW can be either a non i915 component or i915 intergral component, change structure name Accordingly. %s/i915_hdcp_comp_master/i915_hdcp_master %s/i915_hdcp_component_ops/i915_hdcp_ops --v3 -Changing names to drop cp_fw to make naming more agnostic[Jani] Cc: Tomas Winkler Cc: Rodrigo Vivi Cc: Uma Shankar Cc: Ankit Nautiyal Signed-off-by: Anshuman Gupta Signed-off-by: Suraj Kandpal Reviewed-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display_core.h | 1 + drivers/gpu/drm/i915/display/intel_hdcp.c | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h index 8e7a68339876..139100fe2383 100644 --- a/drivers/gpu/drm/i915/display/intel_display_core.h +++ b/drivers/gpu/drm/i915/display/intel_display_core.h @@ -15,6 +15,7 @@ #include #include +#include #include "intel_cdclk.h" #include "intel_display_limits.h" diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c index 262c76f21801..0d6aed1eb171 100644 --- a/drivers/gpu/drm/i915/display/intel_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c @@ -1409,7 +1409,7 @@ static int hdcp2_authenticate_port(struct intel_connector *connector) return ret; } -static int hdcp2_close_mei_session(struct intel_connector *connector) +static int hdcp2_close_session(struct intel_connector *connector) { struct intel_digital_port *dig_port = intel_attached_dig_port(connector); struct drm_i915_private *dev_priv = to_i915(connector->base.dev); @@ -1433,7 +1433,7 @@ static int hdcp2_close_mei_session(struct intel_connector *connector) static int hdcp2_deauthenticate_port(struct intel_connector *connector) { - return hdcp2_close_mei_session(connector); + return hdcp2_close_session(connector); } /* Authentication flow starts from here */ From patchwork Tue Jan 31 06:33:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kandpal, Suraj" X-Patchwork-Id: 13122293 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DCEC4C38142 for ; Tue, 31 Jan 2023 06:36:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7238B10E32C; Tue, 31 Jan 2023 06:36:17 +0000 (UTC) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 435AF10E32B for ; Tue, 31 Jan 2023 06:36:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1675146973; x=1706682973; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=G31hQ2nFzNwYp6smpqLKDViSiI5w1ex36495uWHfpDE=; b=DiADc8YPaCVGFgulIpx0ZkzZkzbALCwY3w+xOAHH+Z/3qjd0j1mAyPYD l65FZB2EAxX23XqPT5/tHyJuSCRtiUDAr75jCvOEMiTJiTr0fjffFwPlW FOHbpEtEFfAgFoWYvhhGGQOF2ihSCdLLU0jRunOBEPRfQkHtbQXsOoFpt YtBm7u+vHgJlotlwgdWDLBpibcIC/TInJ//k6mCtNzzJcD5A9jYrh+V5b TKADuZHjI6x/M2oMdxScSl5D4A8KK3um+iB+cBZkqbAUWJmbQ3m14CSVT 4AiBBcoyVbQ7RTDsW5dqlclvxkIUfg9s/LPO10nt9TkAJGXvwKWBXngx6 A==; X-IronPort-AV: E=McAfee;i="6500,9779,10606"; a="390126827" X-IronPort-AV: E=Sophos;i="5.97,259,1669104000"; d="scan'208";a="390126827" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jan 2023 22:36:13 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10606"; a="838248506" X-IronPort-AV: E=Sophos;i="5.97,259,1669104000"; d="scan'208";a="838248506" Received: from kandpal-x299-ud4-pro.iind.intel.com ([10.190.239.32]) by orsmga005.jf.intel.com with ESMTP; 30 Jan 2023 22:36:09 -0800 From: Suraj Kandpal To: intel-gfx@lists.freedesktop.org Date: Tue, 31 Jan 2023 12:03:40 +0530 Message-Id: <20230131063342.2811275-5-suraj.kandpal@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230131063342.2811275-1-suraj.kandpal@intel.com> References: <20230131063342.2811275-1-suraj.kandpal@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v9 4/6] drm/i915/hdcp: Refactor HDCP API structures X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rodrigo Vivi , Tomas Winkler Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" It requires to move intel specific HDCP API structures to i915_hdcp_interface.h from driver/misc/mei/hdcp/mei_hdcp.h so that any content protection fw interfaces can use these structures. Cc: Tomas Winkler Cc: Rodrigo Vivi Cc: Uma Shankar Cc: Ankit Nautiyal Signed-off-by: Anshuman Gupta Signed-off-by: Suraj Kandpal Reviewed-by: Ankit Nautiyal --- drivers/misc/mei/hdcp/mei_hdcp.c | 44 ++-- drivers/misc/mei/hdcp/mei_hdcp.h | 354 ----------------------------- include/drm/i915_hdcp_interface.h | 355 ++++++++++++++++++++++++++++++ 3 files changed, 377 insertions(+), 376 deletions(-) diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c index b2c49599809c..a262e1fa3b48 100644 --- a/drivers/misc/mei/hdcp/mei_hdcp.c +++ b/drivers/misc/mei/hdcp/mei_hdcp.c @@ -52,7 +52,7 @@ mei_hdcp_initiate_session(struct device *dev, struct hdcp_port_data *data, session_init_in.header.api_version = HDCP_API_VERSION; session_init_in.header.command_id = WIRED_INITIATE_HDCP2_SESSION; - session_init_in.header.status = ME_HDCP_STATUS_SUCCESS; + session_init_in.header.status = FW_HDCP_STATUS_SUCCESS; session_init_in.header.buffer_len = WIRED_CMD_BUF_LEN_INITIATE_HDCP2_SESSION_IN; @@ -75,7 +75,7 @@ mei_hdcp_initiate_session(struct device *dev, struct hdcp_port_data *data, return byte; } - if (session_init_out.header.status != ME_HDCP_STATUS_SUCCESS) { + if (session_init_out.header.status != FW_HDCP_STATUS_SUCCESS) { dev_dbg(dev, "ME cmd 0x%08X Failed. Status: 0x%X\n", WIRED_INITIATE_HDCP2_SESSION, session_init_out.header.status); @@ -122,7 +122,7 @@ mei_hdcp_verify_receiver_cert_prepare_km(struct device *dev, verify_rxcert_in.header.api_version = HDCP_API_VERSION; verify_rxcert_in.header.command_id = WIRED_VERIFY_RECEIVER_CERT; - verify_rxcert_in.header.status = ME_HDCP_STATUS_SUCCESS; + verify_rxcert_in.header.status = FW_HDCP_STATUS_SUCCESS; verify_rxcert_in.header.buffer_len = WIRED_CMD_BUF_LEN_VERIFY_RECEIVER_CERT_IN; @@ -148,7 +148,7 @@ mei_hdcp_verify_receiver_cert_prepare_km(struct device *dev, return byte; } - if (verify_rxcert_out.header.status != ME_HDCP_STATUS_SUCCESS) { + if (verify_rxcert_out.header.status != FW_HDCP_STATUS_SUCCESS) { dev_dbg(dev, "ME cmd 0x%08X Failed. Status: 0x%X\n", WIRED_VERIFY_RECEIVER_CERT, verify_rxcert_out.header.status); @@ -194,7 +194,7 @@ mei_hdcp_verify_hprime(struct device *dev, struct hdcp_port_data *data, send_hprime_in.header.api_version = HDCP_API_VERSION; send_hprime_in.header.command_id = WIRED_AKE_SEND_HPRIME; - send_hprime_in.header.status = ME_HDCP_STATUS_SUCCESS; + send_hprime_in.header.status = FW_HDCP_STATUS_SUCCESS; send_hprime_in.header.buffer_len = WIRED_CMD_BUF_LEN_AKE_SEND_HPRIME_IN; send_hprime_in.port.integrated_port_type = data->port_type; @@ -218,7 +218,7 @@ mei_hdcp_verify_hprime(struct device *dev, struct hdcp_port_data *data, return byte; } - if (send_hprime_out.header.status != ME_HDCP_STATUS_SUCCESS) { + if (send_hprime_out.header.status != FW_HDCP_STATUS_SUCCESS) { dev_dbg(dev, "ME cmd 0x%08X Failed. Status: 0x%X\n", WIRED_AKE_SEND_HPRIME, send_hprime_out.header.status); return -EIO; @@ -251,7 +251,7 @@ mei_hdcp_store_pairing_info(struct device *dev, struct hdcp_port_data *data, pairing_info_in.header.api_version = HDCP_API_VERSION; pairing_info_in.header.command_id = WIRED_AKE_SEND_PAIRING_INFO; - pairing_info_in.header.status = ME_HDCP_STATUS_SUCCESS; + pairing_info_in.header.status = FW_HDCP_STATUS_SUCCESS; pairing_info_in.header.buffer_len = WIRED_CMD_BUF_LEN_SEND_PAIRING_INFO_IN; @@ -276,7 +276,7 @@ mei_hdcp_store_pairing_info(struct device *dev, struct hdcp_port_data *data, return byte; } - if (pairing_info_out.header.status != ME_HDCP_STATUS_SUCCESS) { + if (pairing_info_out.header.status != FW_HDCP_STATUS_SUCCESS) { dev_dbg(dev, "ME cmd 0x%08X failed. Status: 0x%X\n", WIRED_AKE_SEND_PAIRING_INFO, pairing_info_out.header.status); @@ -311,7 +311,7 @@ mei_hdcp_initiate_locality_check(struct device *dev, lc_init_in.header.api_version = HDCP_API_VERSION; lc_init_in.header.command_id = WIRED_INIT_LOCALITY_CHECK; - lc_init_in.header.status = ME_HDCP_STATUS_SUCCESS; + lc_init_in.header.status = FW_HDCP_STATUS_SUCCESS; lc_init_in.header.buffer_len = WIRED_CMD_BUF_LEN_INIT_LOCALITY_CHECK_IN; lc_init_in.port.integrated_port_type = data->port_type; @@ -330,7 +330,7 @@ mei_hdcp_initiate_locality_check(struct device *dev, return byte; } - if (lc_init_out.header.status != ME_HDCP_STATUS_SUCCESS) { + if (lc_init_out.header.status != FW_HDCP_STATUS_SUCCESS) { dev_dbg(dev, "ME cmd 0x%08X Failed. status: 0x%X\n", WIRED_INIT_LOCALITY_CHECK, lc_init_out.header.status); return -EIO; @@ -366,7 +366,7 @@ mei_hdcp_verify_lprime(struct device *dev, struct hdcp_port_data *data, verify_lprime_in.header.api_version = HDCP_API_VERSION; verify_lprime_in.header.command_id = WIRED_VALIDATE_LOCALITY; - verify_lprime_in.header.status = ME_HDCP_STATUS_SUCCESS; + verify_lprime_in.header.status = FW_HDCP_STATUS_SUCCESS; verify_lprime_in.header.buffer_len = WIRED_CMD_BUF_LEN_VALIDATE_LOCALITY_IN; @@ -391,7 +391,7 @@ mei_hdcp_verify_lprime(struct device *dev, struct hdcp_port_data *data, return byte; } - if (verify_lprime_out.header.status != ME_HDCP_STATUS_SUCCESS) { + if (verify_lprime_out.header.status != FW_HDCP_STATUS_SUCCESS) { dev_dbg(dev, "ME cmd 0x%08X failed. status: 0x%X\n", WIRED_VALIDATE_LOCALITY, verify_lprime_out.header.status); @@ -425,7 +425,7 @@ static int mei_hdcp_get_session_key(struct device *dev, get_skey_in.header.api_version = HDCP_API_VERSION; get_skey_in.header.command_id = WIRED_GET_SESSION_KEY; - get_skey_in.header.status = ME_HDCP_STATUS_SUCCESS; + get_skey_in.header.status = FW_HDCP_STATUS_SUCCESS; get_skey_in.header.buffer_len = WIRED_CMD_BUF_LEN_GET_SESSION_KEY_IN; get_skey_in.port.integrated_port_type = data->port_type; @@ -445,7 +445,7 @@ static int mei_hdcp_get_session_key(struct device *dev, return byte; } - if (get_skey_out.header.status != ME_HDCP_STATUS_SUCCESS) { + if (get_skey_out.header.status != FW_HDCP_STATUS_SUCCESS) { dev_dbg(dev, "ME cmd 0x%08X failed. status: 0x%X\n", WIRED_GET_SESSION_KEY, get_skey_out.header.status); return -EIO; @@ -489,7 +489,7 @@ mei_hdcp_repeater_check_flow_prepare_ack(struct device *dev, verify_repeater_in.header.api_version = HDCP_API_VERSION; verify_repeater_in.header.command_id = WIRED_VERIFY_REPEATER; - verify_repeater_in.header.status = ME_HDCP_STATUS_SUCCESS; + verify_repeater_in.header.status = FW_HDCP_STATUS_SUCCESS; verify_repeater_in.header.buffer_len = WIRED_CMD_BUF_LEN_VERIFY_REPEATER_IN; @@ -520,7 +520,7 @@ mei_hdcp_repeater_check_flow_prepare_ack(struct device *dev, return byte; } - if (verify_repeater_out.header.status != ME_HDCP_STATUS_SUCCESS) { + if (verify_repeater_out.header.status != FW_HDCP_STATUS_SUCCESS) { dev_dbg(dev, "ME cmd 0x%08X failed. status: 0x%X\n", WIRED_VERIFY_REPEATER, verify_repeater_out.header.status); @@ -568,7 +568,7 @@ static int mei_hdcp_verify_mprime(struct device *dev, verify_mprime_in->header.api_version = HDCP_API_VERSION; verify_mprime_in->header.command_id = WIRED_REPEATER_AUTH_STREAM_REQ; - verify_mprime_in->header.status = ME_HDCP_STATUS_SUCCESS; + verify_mprime_in->header.status = FW_HDCP_STATUS_SUCCESS; verify_mprime_in->header.buffer_len = cmd_size - sizeof(verify_mprime_in->header); verify_mprime_in->port.integrated_port_type = data->port_type; @@ -597,7 +597,7 @@ static int mei_hdcp_verify_mprime(struct device *dev, return byte; } - if (verify_mprime_out.header.status != ME_HDCP_STATUS_SUCCESS) { + if (verify_mprime_out.header.status != FW_HDCP_STATUS_SUCCESS) { dev_dbg(dev, "ME cmd 0x%08X failed. status: 0x%X\n", WIRED_REPEATER_AUTH_STREAM_REQ, verify_mprime_out.header.status); @@ -630,7 +630,7 @@ static int mei_hdcp_enable_authentication(struct device *dev, enable_auth_in.header.api_version = HDCP_API_VERSION; enable_auth_in.header.command_id = WIRED_ENABLE_AUTH; - enable_auth_in.header.status = ME_HDCP_STATUS_SUCCESS; + enable_auth_in.header.status = FW_HDCP_STATUS_SUCCESS; enable_auth_in.header.buffer_len = WIRED_CMD_BUF_LEN_ENABLE_AUTH_IN; enable_auth_in.port.integrated_port_type = data->port_type; @@ -652,7 +652,7 @@ static int mei_hdcp_enable_authentication(struct device *dev, return byte; } - if (enable_auth_out.header.status != ME_HDCP_STATUS_SUCCESS) { + if (enable_auth_out.header.status != FW_HDCP_STATUS_SUCCESS) { dev_dbg(dev, "ME cmd 0x%08X failed. status: 0x%X\n", WIRED_ENABLE_AUTH, enable_auth_out.header.status); return -EIO; @@ -684,7 +684,7 @@ mei_hdcp_close_session(struct device *dev, struct hdcp_port_data *data) session_close_in.header.api_version = HDCP_API_VERSION; session_close_in.header.command_id = WIRED_CLOSE_SESSION; - session_close_in.header.status = ME_HDCP_STATUS_SUCCESS; + session_close_in.header.status = FW_HDCP_STATUS_SUCCESS; session_close_in.header.buffer_len = WIRED_CMD_BUF_LEN_CLOSE_SESSION_IN; @@ -706,7 +706,7 @@ mei_hdcp_close_session(struct device *dev, struct hdcp_port_data *data) return byte; } - if (session_close_out.header.status != ME_HDCP_STATUS_SUCCESS) { + if (session_close_out.header.status != FW_HDCP_STATUS_SUCCESS) { dev_dbg(dev, "Session Close Failed. status: 0x%X\n", session_close_out.header.status); return -EIO; diff --git a/drivers/misc/mei/hdcp/mei_hdcp.h b/drivers/misc/mei/hdcp/mei_hdcp.h index ca09c8f83d6b..0683d83ec17a 100644 --- a/drivers/misc/mei/hdcp/mei_hdcp.h +++ b/drivers/misc/mei/hdcp/mei_hdcp.h @@ -11,358 +11,4 @@ #include -/* me_hdcp_status: Enumeration of all HDCP Status Codes */ -enum me_hdcp_status { - ME_HDCP_STATUS_SUCCESS = 0x0000, - - /* WiDi Generic Status Codes */ - ME_HDCP_STATUS_INTERNAL_ERROR = 0x1000, - ME_HDCP_STATUS_UNKNOWN_ERROR = 0x1001, - ME_HDCP_STATUS_INCORRECT_API_VERSION = 0x1002, - ME_HDCP_STATUS_INVALID_FUNCTION = 0x1003, - ME_HDCP_STATUS_INVALID_BUFFER_LENGTH = 0x1004, - ME_HDCP_STATUS_INVALID_PARAMS = 0x1005, - ME_HDCP_STATUS_AUTHENTICATION_FAILED = 0x1006, - - /* WiDi Status Codes */ - ME_HDCP_INVALID_SESSION_STATE = 0x6000, - ME_HDCP_SRM_FRAGMENT_UNEXPECTED = 0x6001, - ME_HDCP_SRM_INVALID_LENGTH = 0x6002, - ME_HDCP_SRM_FRAGMENT_OFFSET_INVALID = 0x6003, - ME_HDCP_SRM_VERIFICATION_FAILED = 0x6004, - ME_HDCP_SRM_VERSION_TOO_OLD = 0x6005, - ME_HDCP_RX_CERT_VERIFICATION_FAILED = 0x6006, - ME_HDCP_RX_REVOKED = 0x6007, - ME_HDCP_H_VERIFICATION_FAILED = 0x6008, - ME_HDCP_REPEATER_CHECK_UNEXPECTED = 0x6009, - ME_HDCP_TOPOLOGY_MAX_EXCEEDED = 0x600A, - ME_HDCP_V_VERIFICATION_FAILED = 0x600B, - ME_HDCP_L_VERIFICATION_FAILED = 0x600C, - ME_HDCP_STREAM_KEY_ALLOC_FAILED = 0x600D, - ME_HDCP_BASE_KEY_RESET_FAILED = 0x600E, - ME_HDCP_NONCE_GENERATION_FAILED = 0x600F, - ME_HDCP_STATUS_INVALID_E_KEY_STATE = 0x6010, - ME_HDCP_STATUS_INVALID_CS_ICV = 0x6011, - ME_HDCP_STATUS_INVALID_KB_KEY_STATE = 0x6012, - ME_HDCP_STATUS_INVALID_PAVP_MODE_ICV = 0x6013, - ME_HDCP_STATUS_INVALID_PAVP_MODE = 0x6014, - ME_HDCP_STATUS_LC_MAX_ATTEMPTS = 0x6015, - - /* New status for HDCP 2.1 */ - ME_HDCP_STATUS_MISMATCH_IN_M = 0x6016, - - /* New status code for HDCP 2.2 Rx */ - ME_HDCP_STATUS_RX_PROV_NOT_ALLOWED = 0x6017, - ME_HDCP_STATUS_RX_PROV_WRONG_SUBJECT = 0x6018, - ME_HDCP_RX_NEEDS_PROVISIONING = 0x6019, - ME_HDCP_BKSV_ICV_AUTH_FAILED = 0x6020, - ME_HDCP_STATUS_INVALID_STREAM_ID = 0x6021, - ME_HDCP_STATUS_CHAIN_NOT_INITIALIZED = 0x6022, - ME_HDCP_FAIL_NOT_EXPECTED = 0x6023, - ME_HDCP_FAIL_HDCP_OFF = 0x6024, - ME_HDCP_FAIL_INVALID_PAVP_MEMORY_MODE = 0x6025, - ME_HDCP_FAIL_AES_ECB_FAILURE = 0x6026, - ME_HDCP_FEATURE_NOT_SUPPORTED = 0x6027, - ME_HDCP_DMA_READ_ERROR = 0x6028, - ME_HDCP_DMA_WRITE_ERROR = 0x6029, - ME_HDCP_FAIL_INVALID_PACKET_SIZE = 0x6030, - ME_HDCP_H264_PARSING_ERROR = 0x6031, - ME_HDCP_HDCP2_ERRATA_VIDEO_VIOLATION = 0x6032, - ME_HDCP_HDCP2_ERRATA_AUDIO_VIOLATION = 0x6033, - ME_HDCP_TX_ACTIVE_ERROR = 0x6034, - ME_HDCP_MODE_CHANGE_ERROR = 0x6035, - ME_HDCP_STREAM_TYPE_ERROR = 0x6036, - ME_HDCP_STREAM_MANAGE_NOT_POSSIBLE = 0x6037, - - ME_HDCP_STATUS_PORT_INVALID_COMMAND = 0x6038, - ME_HDCP_STATUS_UNSUPPORTED_PROTOCOL = 0x6039, - ME_HDCP_STATUS_INVALID_PORT_INDEX = 0x603a, - ME_HDCP_STATUS_TX_AUTH_NEEDED = 0x603b, - ME_HDCP_STATUS_NOT_INTEGRATED_PORT = 0x603c, - ME_HDCP_STATUS_SESSION_MAX_REACHED = 0x603d, - - /* hdcp capable bit is not set in rx_caps(error is unique to DP) */ - ME_HDCP_STATUS_NOT_HDCP_CAPABLE = 0x6041, - - ME_HDCP_STATUS_INVALID_STREAM_COUNT = 0x6042, -}; - -#define HDCP_API_VERSION 0x00010000 - -#define HDCP_M_LEN 16 -#define HDCP_KH_LEN 16 - -/* Payload Buffer size(Excluding Header) for CMDs and corresponding response */ -/* Wired_Tx_AKE */ -#define WIRED_CMD_BUF_LEN_INITIATE_HDCP2_SESSION_IN (4 + 1) -#define WIRED_CMD_BUF_LEN_INITIATE_HDCP2_SESSION_OUT (4 + 8 + 3) - -#define WIRED_CMD_BUF_LEN_VERIFY_RECEIVER_CERT_IN (4 + 522 + 8 + 3) -#define WIRED_CMD_BUF_LEN_VERIFY_RECEIVER_CERT_MIN_OUT (4 + 1 + 3 + 16 + 16) -#define WIRED_CMD_BUF_LEN_VERIFY_RECEIVER_CERT_MAX_OUT (4 + 1 + 3 + 128) - -#define WIRED_CMD_BUF_LEN_AKE_SEND_HPRIME_IN (4 + 32) -#define WIRED_CMD_BUF_LEN_AKE_SEND_HPRIME_OUT (4) - -#define WIRED_CMD_BUF_LEN_SEND_PAIRING_INFO_IN (4 + 16) -#define WIRED_CMD_BUF_LEN_SEND_PAIRING_INFO_OUT (4) - -#define WIRED_CMD_BUF_LEN_CLOSE_SESSION_IN (4) -#define WIRED_CMD_BUF_LEN_CLOSE_SESSION_OUT (4) - -/* Wired_Tx_LC */ -#define WIRED_CMD_BUF_LEN_INIT_LOCALITY_CHECK_IN (4) -#define WIRED_CMD_BUF_LEN_INIT_LOCALITY_CHECK_OUT (4 + 8) - -#define WIRED_CMD_BUF_LEN_VALIDATE_LOCALITY_IN (4 + 32) -#define WIRED_CMD_BUF_LEN_VALIDATE_LOCALITY_OUT (4) - -/* Wired_Tx_SKE */ -#define WIRED_CMD_BUF_LEN_GET_SESSION_KEY_IN (4) -#define WIRED_CMD_BUF_LEN_GET_SESSION_KEY_OUT (4 + 16 + 8) - -/* Wired_Tx_SKE */ -#define WIRED_CMD_BUF_LEN_ENABLE_AUTH_IN (4 + 1) -#define WIRED_CMD_BUF_LEN_ENABLE_AUTH_OUT (4) - -/* Wired_Tx_Repeater */ -#define WIRED_CMD_BUF_LEN_VERIFY_REPEATER_IN (4 + 2 + 3 + 16 + 155) -#define WIRED_CMD_BUF_LEN_VERIFY_REPEATER_OUT (4 + 1 + 16) - -#define WIRED_CMD_BUF_LEN_REPEATER_AUTH_STREAM_REQ_MIN_IN (4 + 3 + \ - 32 + 2 + 2) - -#define WIRED_CMD_BUF_LEN_REPEATER_AUTH_STREAM_REQ_OUT (4) - -/* hdcp_command_id: Enumeration of all WIRED HDCP Command IDs */ -enum hdcp_command_id { - _WIDI_COMMAND_BASE = 0x00030000, - WIDI_INITIATE_HDCP2_SESSION = _WIDI_COMMAND_BASE, - HDCP_GET_SRM_STATUS, - HDCP_SEND_SRM_FRAGMENT, - - /* The wired HDCP Tx commands */ - _WIRED_COMMAND_BASE = 0x00031000, - WIRED_INITIATE_HDCP2_SESSION = _WIRED_COMMAND_BASE, - WIRED_VERIFY_RECEIVER_CERT, - WIRED_AKE_SEND_HPRIME, - WIRED_AKE_SEND_PAIRING_INFO, - WIRED_INIT_LOCALITY_CHECK, - WIRED_VALIDATE_LOCALITY, - WIRED_GET_SESSION_KEY, - WIRED_ENABLE_AUTH, - WIRED_VERIFY_REPEATER, - WIRED_REPEATER_AUTH_STREAM_REQ, - WIRED_CLOSE_SESSION, - - _WIRED_COMMANDS_COUNT, -}; - -union encrypted_buff { - u8 e_kpub_km[HDCP_2_2_E_KPUB_KM_LEN]; - u8 e_kh_km_m[HDCP_2_2_E_KH_KM_M_LEN]; - struct { - u8 e_kh_km[HDCP_KH_LEN]; - u8 m[HDCP_M_LEN]; - } __packed; -}; - -/* HDCP HECI message header. All header values are little endian. */ -struct hdcp_cmd_header { - u32 api_version; - u32 command_id; - enum me_hdcp_status status; - /* Length of the HECI message (excluding the header) */ - u32 buffer_len; -} __packed; - -/* Empty command request or response. No data follows the header. */ -struct hdcp_cmd_no_data { - struct hdcp_cmd_header header; -} __packed; - -/* Uniquely identifies the hdcp port being addressed for a given command. */ -struct hdcp_port_id { - u8 integrated_port_type; - /* physical_port is used until Gen11.5. Must be zero for Gen11.5+ */ - u8 physical_port; - /* attached_transcoder is for Gen11.5+. Set to zero for X-Patchwork-Id: 13122294 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8C01BC636CD for ; Tue, 31 Jan 2023 06:36:19 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0074610E32D; Tue, 31 Jan 2023 06:36:19 +0000 (UTC) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4164210E32B for ; Tue, 31 Jan 2023 06:36:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1675146976; x=1706682976; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5aPSGW0UMEEaIlpt1RBzPESG/HnqfkF9RMpwnNcr94U=; b=nEwyaGkdlGiKVPrpKkRcYzW641TP7wke3ZN2bJS8IzMt3FaqqPJCFfmj o9JA4/Wn7EIHawq5clU4INHmPGjgTXE/ye3fc+q04esdrNQoULCHOPrff gc7eVi5N1ev6R9E21bnPJ9CB2uWjaDmtbwrXo334oSAL/4Y3ZIRymlsbc L1r3zuH+EXDn/IQW2dwVN/uWwvDE2cK1rRHOYPzWMoTnWAjZlQC4ghLC9 FipeNF8v730KpoYny5oYDdZncn79cuZD/A+m7kcQWqXkdYTRSBHP1FUGm EmbL8ecTkoUkASPXIF/VokediwqVz0znI6aHiiHKJ4eIX1T41nyva5s0c w==; X-IronPort-AV: E=McAfee;i="6500,9779,10606"; a="390126830" X-IronPort-AV: E=Sophos;i="5.97,259,1669104000"; d="scan'208";a="390126830" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jan 2023 22:36:16 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10606"; a="838248513" X-IronPort-AV: E=Sophos;i="5.97,259,1669104000"; d="scan'208";a="838248513" Received: from kandpal-x299-ud4-pro.iind.intel.com ([10.190.239.32]) by orsmga005.jf.intel.com with ESMTP; 30 Jan 2023 22:36:13 -0800 From: Suraj Kandpal To: intel-gfx@lists.freedesktop.org Date: Tue, 31 Jan 2023 12:03:41 +0530 Message-Id: <20230131063342.2811275-6-suraj.kandpal@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230131063342.2811275-1-suraj.kandpal@intel.com> References: <20230131063342.2811275-1-suraj.kandpal@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v9 5/6] drm/i915/mtl: Add function to send command to GSC CS X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alan Pervin Teres Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add function that takes care of sending command to gsc cs. We start of with allocation of memory for our command intel_hdcp_gsc_message that contains gsc cs memory header as directed in specs followed by the actual payload hdcp message that we want to send. Spec states that we need to poll pending bit of response header around 20 times each try being 50ms apart hence adding that to current gsc_msg_send function Also we use the same function to take care of both sending and receiving hence no separate function to get the response. --v4 -Create common function to fill in gsc_mtl_header [Alan] -define host session bitmask [Alan] --v5 -use i915 directly instead of gt->i915 [Alan] -No need to make fields NULL as we are already using kzalloc [Alan] --v8 -change mechanism to reuse the same memory for one hdcp session[Alan] -fix header ordering -add comments to explain flags and host session mask [Alan] --v9 -remove gem obj from hdcp message as we can use i915_vma_unpin_and_release [Alan] -move hdcp message allocation and deallocation from hdcp2_enable and hdcp2_disable to init and teardown of HDCP [Alan] Cc: Ankit Nautiyal Cc: Daniele Ceraolo Spurio Cc: Alan Pervin Teres Cc: Uma Shankar Cc: Anshuman Gupta Signed-off-by: Suraj Kandpal Reviewed-by: Alan Previn --- drivers/gpu/drm/i915/Makefile | 1 + .../gpu/drm/i915/display/intel_display_core.h | 5 + drivers/gpu/drm/i915/display/intel_hdcp_gsc.c | 200 ++++++++++++++++++ drivers/gpu/drm/i915/display/intel_hdcp_gsc.h | 23 ++ .../i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c | 15 ++ .../i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h | 16 ++ 6 files changed, 260 insertions(+) create mode 100644 drivers/gpu/drm/i915/display/intel_hdcp_gsc.c create mode 100644 drivers/gpu/drm/i915/display/intel_hdcp_gsc.h diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 482928cffb1c..ba76bec715af 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -255,6 +255,7 @@ i915-y += \ display/intel_frontbuffer.o \ display/intel_global_state.o \ display/intel_hdcp.o \ + display/intel_hdcp_gsc.o \ display/intel_hotplug.o \ display/intel_hti.o \ display/intel_lpe_audio.o \ diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h index 139100fe2383..20d2a79a5d05 100644 --- a/drivers/gpu/drm/i915/display/intel_display_core.h +++ b/drivers/gpu/drm/i915/display/intel_display_core.h @@ -382,6 +382,11 @@ struct intel_display { struct i915_hdcp_master *master; bool comp_added; + /*HDCP message struct for allocation of memory which can be reused + * when sending message to gsc cs + * this is only populated post Meteorlake + */ + struct intel_hdcp_gsc_message *hdcp_message; /* Mutex to protect the above hdcp component related values. */ struct mutex comp_mutex; } hdcp; diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c new file mode 100644 index 000000000000..6bf81414d34f --- /dev/null +++ b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c @@ -0,0 +1,200 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright 2023, Intel Corporation. + */ + +#include "display/intel_hdcp_gsc.h" +#include "gem/i915_gem_region.h" +#include "gt/uc/intel_gsc_uc_heci_cmd_submit.h" +#include "i915_drv.h" +#include "i915_utils.h" + +/*This function helps allocate memory for the command that we will send to gsc cs */ +static int intel_hdcp_gsc_initialize_message(struct drm_i915_private *i915, + struct intel_hdcp_gsc_message *hdcp_message) +{ + struct intel_gt *gt = i915->media_gt; + struct drm_i915_gem_object *obj = NULL; + struct i915_vma *vma = NULL; + void *cmd; + int err; + + /* allocate object of one page for HDCP command memory and store it */ + obj = i915_gem_object_create_shmem(i915, PAGE_SIZE); + + if (IS_ERR(obj)) { + drm_err(&i915->drm, "Failed to allocate HDCP streaming command!\n"); + return PTR_ERR(obj); + } + + cmd = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true)); + if (IS_ERR(cmd)) { + drm_err(&i915->drm, "Failed to map gsc message page!\n"); + err = PTR_ERR(cmd); + goto out_unpin; + } + + vma = i915_vma_instance(obj, >->ggtt->vm, NULL); + if (IS_ERR(vma)) { + err = PTR_ERR(vma); + goto out_unmap; + } + + err = i915_vma_pin(vma, 0, 0, PIN_GLOBAL); + if (err) + goto out_unmap; + + memset(cmd, 0, obj->base.size); + + hdcp_message->hdcp_cmd = cmd; + hdcp_message->vma = vma; + + return 0; + +out_unmap: + i915_gem_object_unpin_map(obj); +out_unpin: + i915_gem_object_put(obj); + return err; +} + +int intel_hdcp_gsc_hdcp2_init(struct drm_i915_private *i915) +{ + struct intel_hdcp_gsc_message *hdcp_message; + int ret; + + hdcp_message = kzalloc(sizeof(*hdcp_message), GFP_KERNEL); + + if (!hdcp_message) + return -ENOMEM; + + /* NOTE: No need to lock the comp mutex here as it is already + * going to be taken before this function called + */ + i915->display.hdcp.hdcp_message = hdcp_message; + ret = intel_hdcp_gsc_initialize_message(i915, hdcp_message); + + if (ret) + drm_err(&i915->drm, "Could not initialize hdcp_message\n"); + + return ret; +} + +void intel_hdcp_gsc_free_message(struct drm_i915_private *i915) +{ + struct intel_hdcp_gsc_message *hdcp_message = + i915->display.hdcp.hdcp_message; + if (hdcp_message->vma) + i915_vma_unpin(fetch_and_zero(&hdcp_message->vma)); + + i915_vma_unpin_and_release(&hdcp_message->vma, I915_VMA_RELEASE_MAP); + kfree(hdcp_message); +} + +static int intel_gsc_send_sync(struct drm_i915_private *i915, + struct intel_gsc_mtl_header *header, u64 addr, + size_t msg_out_len) +{ + struct intel_gt *gt = i915->media_gt; + int ret; + + header->flags = 0; + ret = intel_gsc_uc_heci_cmd_submit_packet(>->uc.gsc, addr, + header->message_size, + addr, + msg_out_len + sizeof(*header)); + if (ret) { + drm_err(&i915->drm, "failed to send gsc HDCP msg (%d)\n", ret); + return ret; + } + /* + * Checking validity marker for memory sanity + */ + if (header->validity_marker != GSC_HECI_VALIDITY_MARKER) { + drm_err(&i915->drm, "invalid validity marker\n"); + return -EINVAL; + } + + if (header->status != 0) { + drm_err(&i915->drm, "header status indicates error %d\n", + header->status); + return -EINVAL; + } + + if (header->flags & GSC_OUTFLAG_MSG_PENDING) + return -EAGAIN; + + return 0; +} + +/* + * This function can now be used for sending requests and will also handle + * receipt of reply messages hence no different function of message retrieval + * is required. We will initialize intel_hdcp_gsc_message structure then add + * gsc cs memory header as stated in specs after which the normal HDCP payload + * will follow + */ +ssize_t intel_hdcp_gsc_msg_send(struct drm_i915_private *i915, u8 *msg_in, + size_t msg_in_len, u8 *msg_out, size_t msg_out_len) +{ + struct intel_gt *gt = i915->media_gt; + struct intel_gsc_mtl_header *header; + const size_t max_msg_size = PAGE_SIZE - sizeof(*header); + struct intel_hdcp_gsc_message *hdcp_message; + u64 addr, host_session_id; + u32 reply_size, msg_size; + int ret, tries = 0; + + if (!intel_uc_uses_gsc_uc(>->uc)) + return -ENODEV; + + if (msg_in_len > max_msg_size || msg_out_len > max_msg_size) + return -ENOSPC; + + hdcp_message = i915->display.hdcp.hdcp_message; + header = hdcp_message->hdcp_cmd; + addr = i915_ggtt_offset(hdcp_message->vma); + + msg_size = msg_in_len + sizeof(*header); + memset(header, 0, msg_size); + get_random_bytes(&host_session_id, sizeof(u64)); + intel_gsc_uc_heci_cmd_emit_mtl_header(header, HECI_MEADDRESS_HDCP, + msg_size, host_session_id); + memcpy(hdcp_message->hdcp_cmd + sizeof(*header), msg_in, msg_in_len); + + /* + * Keep sending request in case the pending bit is set no need to add + * message handle as we are using same address hence loc. of header is + * same and it will contain the message handle. we will send the message + * 20 times each message 50 ms apart + */ + do { + ret = intel_gsc_send_sync(i915, header, addr, msg_out_len); + + /* Only try again if gsc says so */ + if (ret != -EAGAIN) + break; + + msleep(50); + + } while (++tries < 20); + + if (ret) + goto err; + + /* we use the same mem for the reply, so header is in the same loc */ + reply_size = header->message_size - sizeof(*header); + if (reply_size > msg_out_len) { + drm_warn(&i915->drm, "caller with insufficient HDCP reply size %u (%d)\n", + reply_size, (u32)msg_out_len); + reply_size = msg_out_len; + } else if (reply_size != msg_out_len) { + drm_dbg_kms(&i915->drm, "caller unexpected HCDP reply size %u (%d)\n", + reply_size, (u32)msg_out_len); + } + + memcpy(msg_out, hdcp_message->hdcp_cmd + sizeof(*header), msg_out_len); + +err: + return ret; +} diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h new file mode 100644 index 000000000000..09ffd7ec02cd --- /dev/null +++ b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2023 Intel Corporation + */ + +#ifndef __INTEL_HDCP_GSC_H__ +#define __INTEL_HDCP_GSC_H__ + +#include +#include + +struct drm_i915_private; + +struct intel_hdcp_gsc_message { + struct i915_vma *vma; + void *hdcp_cmd; +}; + +ssize_t intel_hdcp_gsc_msg_send(struct drm_i915_private *i915, u8 *msg_in, + size_t msg_in_len, u8 *msg_out, + size_t msg_out_len); + +#endif /* __INTEL_HDCP_GCS_H__ */ diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c index be2424af521d..ea0da06e2f39 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c @@ -92,3 +92,18 @@ int intel_gsc_uc_heci_cmd_submit_packet(struct intel_gsc_uc *gsc, u64 addr_in, return err; } + +void intel_gsc_uc_heci_cmd_emit_mtl_header(struct intel_gsc_mtl_header *header, + u8 heci_client_id, u32 message_size, + u64 host_session_id) +{ + host_session_id &= ~HOST_SESSION_MASK; + if (heci_client_id == HECI_MEADDRESS_PXP) + host_session_id |= HOST_SESSION_PXP_SINGLE; + + header->validity_marker = GSC_HECI_VALIDITY_MARKER; + header->heci_client_id = heci_client_id; + header->host_session_handle = host_session_id; + header->header_version = MTL_GSC_HEADER_VERSION; + header->message_size = message_size; +} diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h b/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h index cf610dfca7a5..3d56ae501991 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h +++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h @@ -22,7 +22,17 @@ struct intel_gsc_mtl_header { u16 header_version; #define MTL_GSC_HEADER_VERSION 1 + /* + * FW allows host to decide host_session handle + * as it sees fit. + * For intertracebility reserving select bits(60-63) + * to differentiate caller-target subsystem + * 0000 - HDCP + * 0001 - PXP Single Session + */ u64 host_session_handle; +#define HOST_SESSION_MASK REG_GENMASK64(63, 60) +#define HOST_SESSION_PXP_SINGLE BIT_ULL(60) u64 gsc_message_handle; u32 message_size; /* lower 20 bits only, upper 12 are reserved */ @@ -33,8 +43,11 @@ struct intel_gsc_mtl_header { * Bit 1: Session Cleanup; * Bits 2-15: Flags * Bits 16-31: Extension Size + * According to internal spec flags are either input or output + * we distinguish the flags using OUTFLAG or INFLAG */ u32 flags; +#define GSC_OUTFLAG_MSG_PENDING 1 u32 status; } __packed; @@ -42,4 +55,7 @@ struct intel_gsc_mtl_header { int intel_gsc_uc_heci_cmd_submit_packet(struct intel_gsc_uc *gsc, u64 addr_in, u32 size_in, u64 addr_out, u32 size_out); +void intel_gsc_uc_heci_cmd_emit_mtl_header(struct intel_gsc_mtl_header *header, + u8 heci_client_id, u32 message_size, + u64 host_session_id); #endif From patchwork Tue Jan 31 06:33:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kandpal, Suraj" X-Patchwork-Id: 13122295 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3C66CC636CD for ; Tue, 31 Jan 2023 06:36:23 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B3CE610E330; Tue, 31 Jan 2023 06:36:22 +0000 (UTC) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6C4BD10E32E for ; Tue, 31 Jan 2023 06:36:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1675146979; x=1706682979; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=w0cKWXylgt0FOl0FSNoug26OkNgiQpdd+U7FSxyOx60=; b=bGJpHrjZgGoPmIbzk38/NAFoItcMFFfrdxdq0fY4a2DzSS5uTZc5tdrn ZCS0yg/KEg/tzLl9q/d7TKb6qE59vZd69rioAZTdGLxooyyDYUuS7GVAv nnnmxHACudAfK0mUO/b1yl/fuMKjBGAydYeSfrp9kA7N8tzRZBeCrHoOA 9PiQF9S7X9VS/zGLF0bfttUhQIuQrA9LmALV9mQ8gWJDI8AXhoHlDmLH/ ffPU7S+9ZTgGu6Z8wKfY1X+SiW2XoeeT9ryi7SOIGezSN9546hyvylEqI sCARyrV3/4IooKE7b3HoZQGkRHWURPssxaJPpDA53FKxfk4qGGG83sl5J A==; X-IronPort-AV: E=McAfee;i="6500,9779,10606"; a="390126837" X-IronPort-AV: E=Sophos;i="5.97,259,1669104000"; d="scan'208";a="390126837" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jan 2023 22:36:19 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10606"; a="838248527" X-IronPort-AV: E=Sophos;i="5.97,259,1669104000"; d="scan'208";a="838248527" Received: from kandpal-x299-ud4-pro.iind.intel.com ([10.190.239.32]) by orsmga005.jf.intel.com with ESMTP; 30 Jan 2023 22:36:16 -0800 From: Suraj Kandpal To: intel-gfx@lists.freedesktop.org Date: Tue, 31 Jan 2023 12:03:42 +0530 Message-Id: <20230131063342.2811275-7-suraj.kandpal@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230131063342.2811275-1-suraj.kandpal@intel.com> References: <20230131063342.2811275-1-suraj.kandpal@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v9 6/6] drm/i915/mtl: Add HDCP GSC interface X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rodrigo Vivi , Tomas Winkler Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" MTL uses GSC command streamer i.e gsc cs to send HDCP/PXP commands to GSC f/w. It requires to keep hdcp display driver agnostic to content protection f/w (ME/GSC fw) in the form of i915_hdcp_fw_ops generic ops. Adding HDCP GSC CS interface by leveraging the i915_hdcp_fw_ops generic ops instead of I915_HDCP_COMPONENT as integral part of i915. Adding checks to see if GSC is loaded and proxy is setup --v6 -dont change the license date in same patch series [Jani] -fix the license year {Jani] --v8 -remove stale comment [Ankit] -get headers in alphabetical order [Ankit] -fix hdcp2_supported check [Ankit] --v9 -remove return statement from hdcp_gsc_fini [Ankit] Cc: Tomas Winkler Cc: Rodrigo Vivi Cc: Uma Shankar Cc: Ankit Nautiyal Signed-off-by: Anshuman Gupta Signed-off-by: Suraj Kandpal Reviewed-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_hdcp.c | 28 +- drivers/gpu/drm/i915/display/intel_hdcp_gsc.c | 637 +++++++++++++++++- drivers/gpu/drm/i915/display/intel_hdcp_gsc.h | 3 + 3 files changed, 660 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c index 0d6aed1eb171..61bb2bbd0349 100644 --- a/drivers/gpu/drm/i915/display/intel_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c @@ -23,6 +23,7 @@ #include "intel_display_power_well.h" #include "intel_display_types.h" #include "intel_hdcp.h" +#include "intel_hdcp_gsc.h" #include "intel_hdcp_regs.h" #include "intel_pcode.h" @@ -203,13 +204,20 @@ bool intel_hdcp2_capable(struct intel_connector *connector) struct intel_digital_port *dig_port = intel_attached_dig_port(connector); struct drm_i915_private *dev_priv = to_i915(connector->base.dev); struct intel_hdcp *hdcp = &connector->hdcp; + struct intel_gt *gt = dev_priv->media_gt; + struct intel_gsc_uc *gsc = >->uc.gsc; bool capable = false; /* I915 support for HDCP2.2 */ if (!hdcp->hdcp2_supported) return false; - /* MEI interface is solid */ + /* If MTL+ make sure gsc is loaded and proxy is setup */ + if (intel_hdcp_gsc_cs_required(dev_priv)) + if (!intel_uc_fw_is_running(&gsc->fw)) + return false; + + /* MEI/GSC interface is solid depending on which is used */ mutex_lock(&dev_priv->display.hdcp.comp_mutex); if (!dev_priv->display.hdcp.comp_added || !dev_priv->display.hdcp.master) { mutex_unlock(&dev_priv->display.hdcp.comp_mutex); @@ -2235,6 +2243,9 @@ static int initialize_hdcp_port_data(struct intel_connector *connector, static bool is_hdcp2_supported(struct drm_i915_private *dev_priv) { + if (intel_hdcp_gsc_cs_required(dev_priv)) + return true; + if (!IS_ENABLED(CONFIG_INTEL_MEI_HDCP)) return false; @@ -2256,10 +2267,14 @@ void intel_hdcp_component_init(struct drm_i915_private *dev_priv) dev_priv->display.hdcp.comp_added = true; mutex_unlock(&dev_priv->display.hdcp.comp_mutex); - ret = component_add_typed(dev_priv->drm.dev, &i915_hdcp_ops, - I915_COMPONENT_HDCP); + if (intel_hdcp_gsc_cs_required(dev_priv)) + ret = intel_hdcp_gsc_init(dev_priv); + else + ret = component_add_typed(dev_priv->drm.dev, &i915_hdcp_ops, + I915_COMPONENT_HDCP); + if (ret < 0) { - drm_dbg_kms(&dev_priv->drm, "Failed at component add(%d)\n", + drm_dbg_kms(&dev_priv->drm, "Failed at fw component add(%d)\n", ret); mutex_lock(&dev_priv->display.hdcp.comp_mutex); dev_priv->display.hdcp.comp_added = false; @@ -2486,7 +2501,10 @@ void intel_hdcp_component_fini(struct drm_i915_private *dev_priv) dev_priv->display.hdcp.comp_added = false; mutex_unlock(&dev_priv->display.hdcp.comp_mutex); - component_del(dev_priv->drm.dev, &i915_hdcp_ops); + if (intel_hdcp_gsc_cs_required(dev_priv)) + intel_hdcp_gsc_fini(dev_priv); + else + component_del(dev_priv->drm.dev, &i915_hdcp_ops); } void intel_hdcp_cleanup(struct intel_connector *connector) diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c index 6bf81414d34f..6f123a107e5f 100644 --- a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c +++ b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c @@ -3,12 +3,617 @@ * Copyright 2023, Intel Corporation. */ +#include + #include "display/intel_hdcp_gsc.h" #include "gem/i915_gem_region.h" #include "gt/uc/intel_gsc_uc_heci_cmd_submit.h" #include "i915_drv.h" #include "i915_utils.h" +bool intel_hdcp_gsc_cs_required(struct drm_i915_private *i915) +{ + return DISPLAY_VER(i915) >= 14; +} + +static int +gsc_hdcp_initiate_session(struct device *dev, struct hdcp_port_data *data, + struct hdcp2_ake_init *ake_data) +{ + struct wired_cmd_initiate_hdcp2_session_in session_init_in = { { 0 } }; + struct wired_cmd_initiate_hdcp2_session_out + session_init_out = { { 0 } }; + struct drm_i915_private *i915; + ssize_t byte; + + if (!dev || !data || !ake_data) + return -EINVAL; + + i915 = kdev_to_i915(dev); + if (!i915) { + dev_err(dev, "DRM not initialized, aborting HDCP.\n"); + return -ENODEV; + } + + session_init_in.header.api_version = HDCP_API_VERSION; + session_init_in.header.command_id = WIRED_INITIATE_HDCP2_SESSION; + session_init_in.header.status = FW_HDCP_STATUS_SUCCESS; + session_init_in.header.buffer_len = + WIRED_CMD_BUF_LEN_INITIATE_HDCP2_SESSION_IN; + + session_init_in.port.integrated_port_type = data->port_type; + session_init_in.port.physical_port = (u8)data->hdcp_ddi; + session_init_in.port.attached_transcoder = (u8)data->hdcp_transcoder; + session_init_in.protocol = data->protocol; + + byte = intel_hdcp_gsc_msg_send(i915, (u8 *)&session_init_in, + sizeof(session_init_in), + (u8 *)&session_init_out, + sizeof(session_init_out)); + if (byte < 0) { + drm_dbg_kms(&i915->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); + return byte; + } + + if (session_init_out.header.status != FW_HDCP_STATUS_SUCCESS) { + drm_dbg_kms(&i915->drm, "FW cmd 0x%08X Failed. Status: 0x%X\n", + WIRED_INITIATE_HDCP2_SESSION, + session_init_out.header.status); + return -EIO; + } + + ake_data->msg_id = HDCP_2_2_AKE_INIT; + ake_data->tx_caps = session_init_out.tx_caps; + memcpy(ake_data->r_tx, session_init_out.r_tx, HDCP_2_2_RTX_LEN); + + return 0; +} + +static int +gsc_hdcp_verify_receiver_cert_prepare_km(struct device *dev, + struct hdcp_port_data *data, + struct hdcp2_ake_send_cert *rx_cert, + bool *km_stored, + struct hdcp2_ake_no_stored_km + *ek_pub_km, + size_t *msg_sz) +{ + struct wired_cmd_verify_receiver_cert_in verify_rxcert_in = { { 0 } }; + struct wired_cmd_verify_receiver_cert_out verify_rxcert_out = { { 0 } }; + struct drm_i915_private *i915; + ssize_t byte; + + if (!dev || !data || !rx_cert || !km_stored || !ek_pub_km || !msg_sz) + return -EINVAL; + + i915 = kdev_to_i915(dev); + if (!i915) { + dev_err(dev, "DRM not initialized, aborting HDCP.\n"); + return -ENODEV; + } + + verify_rxcert_in.header.api_version = HDCP_API_VERSION; + verify_rxcert_in.header.command_id = WIRED_VERIFY_RECEIVER_CERT; + verify_rxcert_in.header.status = FW_HDCP_STATUS_SUCCESS; + verify_rxcert_in.header.buffer_len = + WIRED_CMD_BUF_LEN_VERIFY_RECEIVER_CERT_IN; + + verify_rxcert_in.port.integrated_port_type = data->port_type; + verify_rxcert_in.port.physical_port = (u8)data->hdcp_ddi; + verify_rxcert_in.port.attached_transcoder = (u8)data->hdcp_transcoder; + + verify_rxcert_in.cert_rx = rx_cert->cert_rx; + memcpy(verify_rxcert_in.r_rx, &rx_cert->r_rx, HDCP_2_2_RRX_LEN); + memcpy(verify_rxcert_in.rx_caps, rx_cert->rx_caps, HDCP_2_2_RXCAPS_LEN); + + byte = intel_hdcp_gsc_msg_send(i915, (u8 *)&verify_rxcert_in, + sizeof(verify_rxcert_in), + (u8 *)&verify_rxcert_out, + sizeof(verify_rxcert_out)); + if (byte < 0) { + drm_dbg_kms(&i915->drm, "intel_hdcp_gsc_msg_send failed: %zd\n", byte); + return byte; + } + + if (verify_rxcert_out.header.status != FW_HDCP_STATUS_SUCCESS) { + drm_dbg_kms(&i915->drm, "FW cmd 0x%08X Failed. Status: 0x%X\n", + WIRED_VERIFY_RECEIVER_CERT, + verify_rxcert_out.header.status); + return -EIO; + } + + *km_stored = !!verify_rxcert_out.km_stored; + if (verify_rxcert_out.km_stored) { + ek_pub_km->msg_id = HDCP_2_2_AKE_STORED_KM; + *msg_sz = sizeof(struct hdcp2_ake_stored_km); + } else { + ek_pub_km->msg_id = HDCP_2_2_AKE_NO_STORED_KM; + *msg_sz = sizeof(struct hdcp2_ake_no_stored_km); + } + + memcpy(ek_pub_km->e_kpub_km, &verify_rxcert_out.ekm_buff, + sizeof(verify_rxcert_out.ekm_buff)); + + return 0; +} + +static int +gsc_hdcp_verify_hprime(struct device *dev, struct hdcp_port_data *data, + struct hdcp2_ake_send_hprime *rx_hprime) +{ + struct wired_cmd_ake_send_hprime_in send_hprime_in = { { 0 } }; + struct wired_cmd_ake_send_hprime_out send_hprime_out = { { 0 } }; + struct drm_i915_private *i915; + ssize_t byte; + + if (!dev || !data || !rx_hprime) + return -EINVAL; + + i915 = kdev_to_i915(dev); + if (!i915) { + dev_err(dev, "DRM not initialized, aborting HDCP.\n"); + return -ENODEV; + } + + send_hprime_in.header.api_version = HDCP_API_VERSION; + send_hprime_in.header.command_id = WIRED_AKE_SEND_HPRIME; + send_hprime_in.header.status = FW_HDCP_STATUS_SUCCESS; + send_hprime_in.header.buffer_len = WIRED_CMD_BUF_LEN_AKE_SEND_HPRIME_IN; + + send_hprime_in.port.integrated_port_type = data->port_type; + send_hprime_in.port.physical_port = (u8)data->hdcp_ddi; + send_hprime_in.port.attached_transcoder = (u8)data->hdcp_transcoder; + + memcpy(send_hprime_in.h_prime, rx_hprime->h_prime, + HDCP_2_2_H_PRIME_LEN); + + byte = intel_hdcp_gsc_msg_send(i915, (u8 *)&send_hprime_in, + sizeof(send_hprime_in), + (u8 *)&send_hprime_out, + sizeof(send_hprime_out)); + if (byte < 0) { + drm_dbg_kms(&i915->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); + return byte; + } + + if (send_hprime_out.header.status != FW_HDCP_STATUS_SUCCESS) { + drm_dbg_kms(&i915->drm, "FW cmd 0x%08X Failed. Status: 0x%X\n", + WIRED_AKE_SEND_HPRIME, send_hprime_out.header.status); + return -EIO; + } + + return 0; +} + +static int +gsc_hdcp_store_pairing_info(struct device *dev, struct hdcp_port_data *data, + struct hdcp2_ake_send_pairing_info *pairing_info) +{ + struct wired_cmd_ake_send_pairing_info_in pairing_info_in = { { 0 } }; + struct wired_cmd_ake_send_pairing_info_out pairing_info_out = { { 0 } }; + struct drm_i915_private *i915; + ssize_t byte; + + if (!dev || !data || !pairing_info) + return -EINVAL; + + i915 = kdev_to_i915(dev); + if (!i915) { + dev_err(dev, "DRM not initialized, aborting HDCP.\n"); + return -ENODEV; + } + + pairing_info_in.header.api_version = HDCP_API_VERSION; + pairing_info_in.header.command_id = WIRED_AKE_SEND_PAIRING_INFO; + pairing_info_in.header.status = FW_HDCP_STATUS_SUCCESS; + pairing_info_in.header.buffer_len = + WIRED_CMD_BUF_LEN_SEND_PAIRING_INFO_IN; + + pairing_info_in.port.integrated_port_type = data->port_type; + pairing_info_in.port.physical_port = (u8)data->hdcp_ddi; + pairing_info_in.port.attached_transcoder = (u8)data->hdcp_transcoder; + + memcpy(pairing_info_in.e_kh_km, pairing_info->e_kh_km, + HDCP_2_2_E_KH_KM_LEN); + + byte = intel_hdcp_gsc_msg_send(i915, (u8 *)&pairing_info_in, + sizeof(pairing_info_in), + (u8 *)&pairing_info_out, + sizeof(pairing_info_out)); + if (byte < 0) { + drm_dbg_kms(&i915->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); + return byte; + } + + if (pairing_info_out.header.status != FW_HDCP_STATUS_SUCCESS) { + drm_dbg_kms(&i915->drm, "FW cmd 0x%08X failed. Status: 0x%X\n", + WIRED_AKE_SEND_PAIRING_INFO, + pairing_info_out.header.status); + return -EIO; + } + + return 0; +} + +static int +gsc_hdcp_initiate_locality_check(struct device *dev, + struct hdcp_port_data *data, + struct hdcp2_lc_init *lc_init_data) +{ + struct wired_cmd_init_locality_check_in lc_init_in = { { 0 } }; + struct wired_cmd_init_locality_check_out lc_init_out = { { 0 } }; + struct drm_i915_private *i915; + ssize_t byte; + + if (!dev || !data || !lc_init_data) + return -EINVAL; + + i915 = kdev_to_i915(dev); + if (!i915) { + dev_err(dev, "DRM not initialized, aborting HDCP.\n"); + return -ENODEV; + } + + lc_init_in.header.api_version = HDCP_API_VERSION; + lc_init_in.header.command_id = WIRED_INIT_LOCALITY_CHECK; + lc_init_in.header.status = FW_HDCP_STATUS_SUCCESS; + lc_init_in.header.buffer_len = WIRED_CMD_BUF_LEN_INIT_LOCALITY_CHECK_IN; + + lc_init_in.port.integrated_port_type = data->port_type; + lc_init_in.port.physical_port = (u8)data->hdcp_ddi; + lc_init_in.port.attached_transcoder = (u8)data->hdcp_transcoder; + + byte = intel_hdcp_gsc_msg_send(i915, (u8 *)&lc_init_in, sizeof(lc_init_in), + (u8 *)&lc_init_out, sizeof(lc_init_out)); + if (byte < 0) { + drm_dbg_kms(&i915->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); + return byte; + } + + if (lc_init_out.header.status != FW_HDCP_STATUS_SUCCESS) { + drm_dbg_kms(&i915->drm, "FW cmd 0x%08X Failed. status: 0x%X\n", + WIRED_INIT_LOCALITY_CHECK, lc_init_out.header.status); + return -EIO; + } + + lc_init_data->msg_id = HDCP_2_2_LC_INIT; + memcpy(lc_init_data->r_n, lc_init_out.r_n, HDCP_2_2_RN_LEN); + + return 0; +} + +static int +gsc_hdcp_verify_lprime(struct device *dev, struct hdcp_port_data *data, + struct hdcp2_lc_send_lprime *rx_lprime) +{ + struct wired_cmd_validate_locality_in verify_lprime_in = { { 0 } }; + struct wired_cmd_validate_locality_out verify_lprime_out = { { 0 } }; + struct drm_i915_private *i915; + ssize_t byte; + + if (!dev || !data || !rx_lprime) + return -EINVAL; + + i915 = kdev_to_i915(dev); + if (!i915) { + dev_err(dev, "DRM not initialized, aborting HDCP.\n"); + return -ENODEV; + } + + verify_lprime_in.header.api_version = HDCP_API_VERSION; + verify_lprime_in.header.command_id = WIRED_VALIDATE_LOCALITY; + verify_lprime_in.header.status = FW_HDCP_STATUS_SUCCESS; + verify_lprime_in.header.buffer_len = + WIRED_CMD_BUF_LEN_VALIDATE_LOCALITY_IN; + + verify_lprime_in.port.integrated_port_type = data->port_type; + verify_lprime_in.port.physical_port = (u8)data->hdcp_ddi; + verify_lprime_in.port.attached_transcoder = (u8)data->hdcp_transcoder; + + memcpy(verify_lprime_in.l_prime, rx_lprime->l_prime, + HDCP_2_2_L_PRIME_LEN); + + byte = intel_hdcp_gsc_msg_send(i915, (u8 *)&verify_lprime_in, + sizeof(verify_lprime_in), + (u8 *)&verify_lprime_out, + sizeof(verify_lprime_out)); + if (byte < 0) { + drm_dbg_kms(&i915->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); + return byte; + } + + if (verify_lprime_out.header.status != FW_HDCP_STATUS_SUCCESS) { + drm_dbg_kms(&i915->drm, "FW cmd 0x%08X failed. status: 0x%X\n", + WIRED_VALIDATE_LOCALITY, + verify_lprime_out.header.status); + return -EIO; + } + + return 0; +} + +static int gsc_hdcp_get_session_key(struct device *dev, + struct hdcp_port_data *data, + struct hdcp2_ske_send_eks *ske_data) +{ + struct wired_cmd_get_session_key_in get_skey_in = { { 0 } }; + struct wired_cmd_get_session_key_out get_skey_out = { { 0 } }; + struct drm_i915_private *i915; + ssize_t byte; + + if (!dev || !data || !ske_data) + return -EINVAL; + + i915 = kdev_to_i915(dev); + if (!i915) { + dev_err(dev, "DRM not initialized, aborting HDCP.\n"); + return -ENODEV; + } + + get_skey_in.header.api_version = HDCP_API_VERSION; + get_skey_in.header.command_id = WIRED_GET_SESSION_KEY; + get_skey_in.header.status = FW_HDCP_STATUS_SUCCESS; + get_skey_in.header.buffer_len = WIRED_CMD_BUF_LEN_GET_SESSION_KEY_IN; + + get_skey_in.port.integrated_port_type = data->port_type; + get_skey_in.port.physical_port = (u8)data->hdcp_ddi; + get_skey_in.port.attached_transcoder = (u8)data->hdcp_transcoder; + + byte = intel_hdcp_gsc_msg_send(i915, (u8 *)&get_skey_in, sizeof(get_skey_in), + (u8 *)&get_skey_out, sizeof(get_skey_out)); + if (byte < 0) { + drm_dbg_kms(&i915->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); + return byte; + } + + if (get_skey_out.header.status != FW_HDCP_STATUS_SUCCESS) { + drm_dbg_kms(&i915->drm, "FW cmd 0x%08X failed. status: 0x%X\n", + WIRED_GET_SESSION_KEY, get_skey_out.header.status); + return -EIO; + } + + ske_data->msg_id = HDCP_2_2_SKE_SEND_EKS; + memcpy(ske_data->e_dkey_ks, get_skey_out.e_dkey_ks, + HDCP_2_2_E_DKEY_KS_LEN); + memcpy(ske_data->riv, get_skey_out.r_iv, HDCP_2_2_RIV_LEN); + + return 0; +} + +static int +gsc_hdcp_repeater_check_flow_prepare_ack(struct device *dev, + struct hdcp_port_data *data, + struct hdcp2_rep_send_receiverid_list + *rep_topology, + struct hdcp2_rep_send_ack + *rep_send_ack) +{ + struct wired_cmd_verify_repeater_in verify_repeater_in = { { 0 } }; + struct wired_cmd_verify_repeater_out verify_repeater_out = { { 0 } }; + struct drm_i915_private *i915; + ssize_t byte; + + if (!dev || !rep_topology || !rep_send_ack || !data) + return -EINVAL; + + i915 = kdev_to_i915(dev); + if (!i915) { + dev_err(dev, "DRM not initialized, aborting HDCP.\n"); + return -ENODEV; + } + + verify_repeater_in.header.api_version = HDCP_API_VERSION; + verify_repeater_in.header.command_id = WIRED_VERIFY_REPEATER; + verify_repeater_in.header.status = FW_HDCP_STATUS_SUCCESS; + verify_repeater_in.header.buffer_len = + WIRED_CMD_BUF_LEN_VERIFY_REPEATER_IN; + + verify_repeater_in.port.integrated_port_type = data->port_type; + verify_repeater_in.port.physical_port = (u8)data->hdcp_ddi; + verify_repeater_in.port.attached_transcoder = (u8)data->hdcp_transcoder; + + memcpy(verify_repeater_in.rx_info, rep_topology->rx_info, + HDCP_2_2_RXINFO_LEN); + memcpy(verify_repeater_in.seq_num_v, rep_topology->seq_num_v, + HDCP_2_2_SEQ_NUM_LEN); + memcpy(verify_repeater_in.v_prime, rep_topology->v_prime, + HDCP_2_2_V_PRIME_HALF_LEN); + memcpy(verify_repeater_in.receiver_ids, rep_topology->receiver_ids, + HDCP_2_2_RECEIVER_IDS_MAX_LEN); + + byte = intel_hdcp_gsc_msg_send(i915, (u8 *)&verify_repeater_in, + sizeof(verify_repeater_in), + (u8 *)&verify_repeater_out, + sizeof(verify_repeater_out)); + if (byte < 0) { + drm_dbg_kms(&i915->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); + return byte; + } + + if (verify_repeater_out.header.status != FW_HDCP_STATUS_SUCCESS) { + drm_dbg_kms(&i915->drm, "FW cmd 0x%08X failed. status: 0x%X\n", + WIRED_VERIFY_REPEATER, + verify_repeater_out.header.status); + return -EIO; + } + + memcpy(rep_send_ack->v, verify_repeater_out.v, + HDCP_2_2_V_PRIME_HALF_LEN); + rep_send_ack->msg_id = HDCP_2_2_REP_SEND_ACK; + + return 0; +} + +static int gsc_hdcp_verify_mprime(struct device *dev, + struct hdcp_port_data *data, + struct hdcp2_rep_stream_ready *stream_ready) +{ + struct wired_cmd_repeater_auth_stream_req_in *verify_mprime_in; + struct wired_cmd_repeater_auth_stream_req_out + verify_mprime_out = { { 0 } }; + struct drm_i915_private *i915; + ssize_t byte; + size_t cmd_size; + + if (!dev || !stream_ready || !data) + return -EINVAL; + + i915 = kdev_to_i915(dev); + if (!i915) { + dev_err(dev, "DRM not initialized, aborting HDCP.\n"); + return -ENODEV; + } + + cmd_size = struct_size(verify_mprime_in, streams, data->k); + if (cmd_size == SIZE_MAX) + return -EINVAL; + + verify_mprime_in = kzalloc(cmd_size, GFP_KERNEL); + if (!verify_mprime_in) + return -ENOMEM; + + verify_mprime_in->header.api_version = HDCP_API_VERSION; + verify_mprime_in->header.command_id = WIRED_REPEATER_AUTH_STREAM_REQ; + verify_mprime_in->header.status = FW_HDCP_STATUS_SUCCESS; + verify_mprime_in->header.buffer_len = cmd_size - sizeof(verify_mprime_in->header); + + verify_mprime_in->port.integrated_port_type = data->port_type; + verify_mprime_in->port.physical_port = (u8)data->hdcp_ddi; + verify_mprime_in->port.attached_transcoder = (u8)data->hdcp_transcoder; + + memcpy(verify_mprime_in->m_prime, stream_ready->m_prime, HDCP_2_2_MPRIME_LEN); + drm_hdcp_cpu_to_be24(verify_mprime_in->seq_num_m, data->seq_num_m); + + memcpy(verify_mprime_in->streams, data->streams, + array_size(data->k, sizeof(*data->streams))); + + verify_mprime_in->k = cpu_to_be16(data->k); + + byte = intel_hdcp_gsc_msg_send(i915, (u8 *)verify_mprime_in, cmd_size, + (u8 *)&verify_mprime_out, + sizeof(verify_mprime_out)); + kfree(verify_mprime_in); + if (byte < 0) { + drm_dbg_kms(&i915->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); + return byte; + } + + if (verify_mprime_out.header.status != FW_HDCP_STATUS_SUCCESS) { + drm_dbg_kms(&i915->drm, "FW cmd 0x%08X failed. status: 0x%X\n", + WIRED_REPEATER_AUTH_STREAM_REQ, + verify_mprime_out.header.status); + return -EIO; + } + + return 0; +} + +static int gsc_hdcp_enable_authentication(struct device *dev, + struct hdcp_port_data *data) +{ + struct wired_cmd_enable_auth_in enable_auth_in = { { 0 } }; + struct wired_cmd_enable_auth_out enable_auth_out = { { 0 } }; + struct drm_i915_private *i915; + ssize_t byte; + + if (!dev || !data) + return -EINVAL; + + i915 = kdev_to_i915(dev); + if (!i915) { + dev_err(dev, "DRM not initialized, aborting HDCP.\n"); + return -ENODEV; + } + + enable_auth_in.header.api_version = HDCP_API_VERSION; + enable_auth_in.header.command_id = WIRED_ENABLE_AUTH; + enable_auth_in.header.status = FW_HDCP_STATUS_SUCCESS; + enable_auth_in.header.buffer_len = WIRED_CMD_BUF_LEN_ENABLE_AUTH_IN; + + enable_auth_in.port.integrated_port_type = data->port_type; + enable_auth_in.port.physical_port = (u8)data->hdcp_ddi; + enable_auth_in.port.attached_transcoder = (u8)data->hdcp_transcoder; + enable_auth_in.stream_type = data->streams[0].stream_type; + + byte = intel_hdcp_gsc_msg_send(i915, (u8 *)&enable_auth_in, + sizeof(enable_auth_in), + (u8 *)&enable_auth_out, + sizeof(enable_auth_out)); + if (byte < 0) { + drm_dbg_kms(&i915->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); + return byte; + } + + if (enable_auth_out.header.status != FW_HDCP_STATUS_SUCCESS) { + drm_dbg_kms(&i915->drm, "FW cmd 0x%08X failed. status: 0x%X\n", + WIRED_ENABLE_AUTH, enable_auth_out.header.status); + return -EIO; + } + + return 0; +} + +static int +gsc_hdcp_close_session(struct device *dev, struct hdcp_port_data *data) +{ + struct wired_cmd_close_session_in session_close_in = { { 0 } }; + struct wired_cmd_close_session_out session_close_out = { { 0 } }; + struct drm_i915_private *i915; + ssize_t byte; + + if (!dev || !data) + return -EINVAL; + + i915 = kdev_to_i915(dev); + if (!i915) { + dev_err(dev, "DRM not initialized, aborting HDCP.\n"); + return -ENODEV; + } + + session_close_in.header.api_version = HDCP_API_VERSION; + session_close_in.header.command_id = WIRED_CLOSE_SESSION; + session_close_in.header.status = FW_HDCP_STATUS_SUCCESS; + session_close_in.header.buffer_len = + WIRED_CMD_BUF_LEN_CLOSE_SESSION_IN; + + session_close_in.port.integrated_port_type = data->port_type; + session_close_in.port.physical_port = (u8)data->hdcp_ddi; + session_close_in.port.attached_transcoder = (u8)data->hdcp_transcoder; + + byte = intel_hdcp_gsc_msg_send(i915, (u8 *)&session_close_in, + sizeof(session_close_in), + (u8 *)&session_close_out, + sizeof(session_close_out)); + if (byte < 0) { + drm_dbg_kms(&i915->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); + return byte; + } + + if (session_close_out.header.status != FW_HDCP_STATUS_SUCCESS) { + drm_dbg_kms(&i915->drm, "Session Close Failed. status: 0x%X\n", + session_close_out.header.status); + return -EIO; + } + + return 0; +} + +static const struct i915_hdcp_ops gsc_hdcp_ops = { + .initiate_hdcp2_session = gsc_hdcp_initiate_session, + .verify_receiver_cert_prepare_km = + gsc_hdcp_verify_receiver_cert_prepare_km, + .verify_hprime = gsc_hdcp_verify_hprime, + .store_pairing_info = gsc_hdcp_store_pairing_info, + .initiate_locality_check = gsc_hdcp_initiate_locality_check, + .verify_lprime = gsc_hdcp_verify_lprime, + .get_session_key = gsc_hdcp_get_session_key, + .repeater_check_flow_prepare_ack = + gsc_hdcp_repeater_check_flow_prepare_ack, + .verify_mprime = gsc_hdcp_verify_mprime, + .enable_hdcp_authentication = gsc_hdcp_enable_authentication, + .close_hdcp_session = gsc_hdcp_close_session, +}; + /*This function helps allocate memory for the command that we will send to gsc cs */ static int intel_hdcp_gsc_initialize_message(struct drm_i915_private *i915, struct intel_hdcp_gsc_message *hdcp_message) @@ -58,7 +663,7 @@ static int intel_hdcp_gsc_initialize_message(struct drm_i915_private *i915, return err; } -int intel_hdcp_gsc_hdcp2_init(struct drm_i915_private *i915) +static int intel_hdcp_gsc_hdcp2_init(struct drm_i915_private *i915) { struct intel_hdcp_gsc_message *hdcp_message; int ret; @@ -80,7 +685,7 @@ int intel_hdcp_gsc_hdcp2_init(struct drm_i915_private *i915) return ret; } -void intel_hdcp_gsc_free_message(struct drm_i915_private *i915) +static void intel_hdcp_gsc_free_message(struct drm_i915_private *i915) { struct intel_hdcp_gsc_message *hdcp_message = i915->display.hdcp.hdcp_message; @@ -91,6 +696,31 @@ void intel_hdcp_gsc_free_message(struct drm_i915_private *i915) kfree(hdcp_message); } +int intel_hdcp_gsc_init(struct drm_i915_private *i915) +{ + struct i915_hdcp_master *data; + int ret; + + data = kzalloc(sizeof(struct i915_hdcp_master), GFP_KERNEL); + if (!data) + return -ENOMEM; + + mutex_lock(&i915->display.hdcp.comp_mutex); + i915->display.hdcp.master = data; + i915->display.hdcp.master->hdcp_dev = i915->drm.dev; + i915->display.hdcp.master->ops = &gsc_hdcp_ops; + ret = intel_hdcp_gsc_hdcp2_init(i915); + mutex_unlock(&i915->display.hdcp.comp_mutex); + + return ret; +} + +void intel_hdcp_gsc_fini(struct drm_i915_private *i915) +{ + intel_hdcp_gsc_free_message(i915); + kfree(i915->display.hdcp.master); +} + static int intel_gsc_send_sync(struct drm_i915_private *i915, struct intel_gsc_mtl_header *header, u64 addr, size_t msg_out_len) @@ -135,7 +765,8 @@ static int intel_gsc_send_sync(struct drm_i915_private *i915, * will follow */ ssize_t intel_hdcp_gsc_msg_send(struct drm_i915_private *i915, u8 *msg_in, - size_t msg_in_len, u8 *msg_out, size_t msg_out_len) + size_t msg_in_len, u8 *msg_out, + size_t msg_out_len) { struct intel_gt *gt = i915->media_gt; struct intel_gsc_mtl_header *header; diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h index 09ffd7ec02cd..5cc9fd2e88f6 100644 --- a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h +++ b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h @@ -16,8 +16,11 @@ struct intel_hdcp_gsc_message { void *hdcp_cmd; }; +bool intel_hdcp_gsc_cs_required(struct drm_i915_private *i915); ssize_t intel_hdcp_gsc_msg_send(struct drm_i915_private *i915, u8 *msg_in, size_t msg_in_len, u8 *msg_out, size_t msg_out_len); +int intel_hdcp_gsc_init(struct drm_i915_private *i915); +void intel_hdcp_gsc_fini(struct drm_i915_private *i915); #endif /* __INTEL_HDCP_GCS_H__ */