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envelope-from=sriram.yagnaraman@est.tech; helo=EUR01-HE1-obe.outbound.protection.outlook.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org I would like to review and be informed on changes to igb device Signed-off-by: Sriram Yagnaraman --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index ece23b2b15..7d0e84ce37 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2224,6 +2224,7 @@ F: tests/qtest/libqos/e1000e.* igb M: Akihiko Odaki +R: Sriram Yagnaraman S: Maintained F: docs/system/devices/igb.rst F: hw/net/igb* From patchwork Tue Jan 31 09:42:25 2023 Content-Type: text/plain; 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Tue, 31 Jan 2023 09:42:37 +0000 From: Sriram Yagnaraman To: Cc: qemu-devel@nongnu.org, Akihiko Odaki , Jason Wang , Dmitry Fleytman , "Michael S . Tsirkin" , Marcel Apfelbaum , Sriram Yagnaraman Subject: [PATCH v3 2/9] igb: handle PF/VF reset properly Date: Tue, 31 Jan 2023 10:42:25 +0100 Message-Id: <20230131094232.28863-3-sriram.yagnaraman@est.tech> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230131094232.28863-1-sriram.yagnaraman@est.tech> References: <20230131094232.28863-1-sriram.yagnaraman@est.tech> X-ClientProxiedBy: GV3P280CA0051.SWEP280.PROD.OUTLOOK.COM (2603:10a6:150:9::35) To DBBP189MB1433.EURP189.PROD.OUTLOOK.COM (2603:10a6:10:1e7::15) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DBBP189MB1433:EE_|VI1P18901MB0733:EE_ X-MS-Office365-Filtering-Correlation-Id: e235eb0b-26f6-404f-49c4-08db036f7ca3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: c9rzybYv+Y++nDwZyqEbevMI8aWgpI+tIPuFPudZV69aStaXmQmD3d3mzudwG3nGmXK7fz7b9277Vr9TNN/t2GZUUPGbxe+onPQv7T2Ecgl3cPi5t9uQ++p42s+jo5q79F74IrpU6BnCKK5NM8QgEQ7K6YxKRhPMEb5A41TOUURT/SfR5oXwCJVe6G/K7VFE2RUQXGudl5evVW4NAtQ3LP9WwqjKSRgvjovr3gnl3luC4M/huMcDBv+XCDi9+a//JykIPlxTtQ2o+qjVWGgaru16OD8UOzZLmevBk9M2Dddo5xkhipkRt7whwNRGpCS/mCkf1VMj2ZOkk4DsUXaZ+gEk92enE6ANBY3s6ZfSa4nYdvUbVB0dFMmPqAzj9j9nhTjzk8bAGSNjtey4c2TrPuLMTfgOTxoGCy1bbuQA2Iy+Pq4T8Qe9ER6CjAySAwIIIHevN0fp9o8T/gVbC114TYZZbuKkgPaY78OL1wPQEhcmVvNthe4LizT71pRDGFXMg851VCwh+GorNXwGNIPyljw6m3fACo1d4alY8KPPhWmODQAQXuuPKZqfn7uL1JjOeCl8oydZZzOSpowNYFSTuqswVkvAJi+DCPZLzBGfDbKcWS7yVVw2PTmY0NQD5zejp4IAfWKViILx3HdKuQxSoJTmUJDAEovO8JBV3bgqWrcgq1ZeuUQx6c9Su5NBQ4C8AimiCU53LeBNNVhIQ6kb/I4PzOuWdFC4asFRztW3cck= X-Forefront-Antispam-Report: CIP:255.255.255.255; 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envelope-from=sriram.yagnaraman@est.tech; helo=EUR04-HE1-obe.outbound.protection.outlook.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Use PFRSTD to reset RSTI bit for VFs, and raise VFLRE interrupt when VF is reset. Signed-off-by: Sriram Yagnaraman --- hw/net/igb_core.c | 33 +++++++++++++++++++++------------ hw/net/igb_regs.h | 3 +++ hw/net/trace-events | 2 ++ 3 files changed, 26 insertions(+), 12 deletions(-) diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index bf1bcac747..9c32ad5e36 100644 --- a/hw/net/igb_core.c +++ b/hw/net/igb_core.c @@ -1904,14 +1904,6 @@ static void igb_set_eims(IGBCore *core, int index, uint32_t val) igb_update_interrupt_state(core); } -static void igb_vf_reset(IGBCore *core, uint16_t vfn) -{ - /* TODO: Reset of the queue enable and the interrupt registers of the VF. */ - - core->mac[V2PMAILBOX0 + vfn] &= ~E1000_V2PMAILBOX_RSTI; - core->mac[V2PMAILBOX0 + vfn] = E1000_V2PMAILBOX_RSTD; -} - static void mailbox_interrupt_to_vf(IGBCore *core, uint16_t vfn) { uint32_t ent = core->mac[VTIVAR_MISC + vfn]; @@ -1989,6 +1981,17 @@ static void igb_set_vfmailbox(IGBCore *core, int index, uint32_t val) } } +static void igb_vf_reset(IGBCore *core, uint16_t vfn) +{ + /* disable Rx and Tx for the VF*/ + core->mac[VFTE] &= ~BIT(vfn); + core->mac[VFRE] &= ~BIT(vfn); + /* indicate VF reset to PF */ + core->mac[VFLRE] |= BIT(vfn); + /* VFLRE and mailbox use the same interrupt cause */ + mailbox_interrupt_to_pf(core); +} + static void igb_w1c(IGBCore *core, int index, uint32_t val) { core->mac[index] &= ~val; @@ -2243,14 +2246,20 @@ igb_set_status(IGBCore *core, int index, uint32_t val) static void igb_set_ctrlext(IGBCore *core, int index, uint32_t val) { - trace_e1000e_link_set_ext_params(!!(val & E1000_CTRL_EXT_ASDCHK), - !!(val & E1000_CTRL_EXT_SPD_BYPS)); - - /* TODO: PFRSTD */ + trace_igb_link_set_ext_params(!!(val & E1000_CTRL_EXT_ASDCHK), + !!(val & E1000_CTRL_EXT_SPD_BYPS), + !!(val & E1000_CTRL_EXT_PFRSTD)); /* Zero self-clearing bits */ val &= ~(E1000_CTRL_EXT_ASDCHK | E1000_CTRL_EXT_EE_RST); core->mac[CTRL_EXT] = val; + + if (core->mac[CTRL_EXT] & E1000_CTRL_EXT_PFRSTD) { + for (int vfn = 0; vfn < IGB_MAX_VF_FUNCTIONS; vfn++) { + core->mac[V2PMAILBOX0 + vfn] &= ~E1000_V2PMAILBOX_RSTI; + core->mac[V2PMAILBOX0 + vfn] |= E1000_V2PMAILBOX_RSTD; + } + } } static void diff --git a/hw/net/igb_regs.h b/hw/net/igb_regs.h index ebf3e95023..ddc0f931d6 100644 --- a/hw/net/igb_regs.h +++ b/hw/net/igb_regs.h @@ -240,6 +240,9 @@ union e1000_adv_rx_desc { /* from igb/e1000_defines.h */ +/* Physical Func Reset Done Indication */ +#define E1000_CTRL_EXT_PFRSTD 0x00004000 + #define E1000_IVAR_VALID 0x80 #define E1000_GPIE_NSICR 0x00000001 #define E1000_GPIE_MSIX_MODE 0x00000010 diff --git a/hw/net/trace-events b/hw/net/trace-events index 2f791b9b57..e94172e748 100644 --- a/hw/net/trace-events +++ b/hw/net/trace-events @@ -281,6 +281,8 @@ igb_core_mdic_read_unhandled(uint32_t addr) "MDIC READ: PHY[%u] UNHANDLED" igb_core_mdic_write(uint32_t addr, uint32_t data) "MDIC WRITE: PHY[%u] = 0x%x" igb_core_mdic_write_unhandled(uint32_t addr) "MDIC WRITE: PHY[%u] UNHANDLED" +igb_link_set_ext_params(bool asd_check, bool speed_select_bypass, bool pfrstd) "Set extended link params: ASD check: %d, Speed select bypass: %d, PF reset done: %d" + igb_rx_desc_buff_size(uint32_t b) "buffer size: %u" igb_rx_desc_buff_write(uint64_t addr, uint16_t offset, const void* source, uint32_t len) "addr: 0x%"PRIx64", offset: %u, from: %p, length: %u" From patchwork Tue Jan 31 09:42:26 2023 Content-Type: text/plain; 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Tue, 31 Jan 2023 09:42:38 +0000 From: Sriram Yagnaraman To: Cc: qemu-devel@nongnu.org, Akihiko Odaki , Jason Wang , Dmitry Fleytman , "Michael S . Tsirkin" , Marcel Apfelbaum , Sriram Yagnaraman Subject: [PATCH v3 3/9] igb: add ICR_RXDW Date: Tue, 31 Jan 2023 10:42:26 +0100 Message-Id: <20230131094232.28863-4-sriram.yagnaraman@est.tech> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230131094232.28863-1-sriram.yagnaraman@est.tech> References: <20230131094232.28863-1-sriram.yagnaraman@est.tech> X-ClientProxiedBy: GV3P280CA0041.SWEP280.PROD.OUTLOOK.COM (2603:10a6:150:9::19) To DBBP189MB1433.EURP189.PROD.OUTLOOK.COM (2603:10a6:10:1e7::15) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DBBP189MB1433:EE_|VI1P18901MB0733:EE_ X-MS-Office365-Filtering-Correlation-Id: 9d2dab2b-a9fb-4a61-971d-08db036f7cb1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Ja5o6izVPJPogE5xbrNKgQWolp/exy3bF9EDmRYDF+TvK9Fzx4fMq98jOioh3uw07tPKgDT84ITqhO7/hNkeTDwgdNOFEd9N4lWKjUVnqL3pPbMHAisx5yXmIzdDLWpOmzYg2SfPqz+Ru3dHwHWnckFvzq91CdcUUeJ3BpaSXvOBsiMZnGUf9AVMAU7QgL2DXPtOeA0HROiEamFmki6C2VsALMImgcpM59fY1b3WDYui4UqDAD3DI4RfqjYlrsAWMswwvRhqFKpHh7kgqAATPSxh69+iSnbGy2HA+Jy/2MYAKOAcwa5uH2ZEVHnoob56Ro1ohUHD+Uc+OJnpqAdRUuxvwa4wTWjGF5jgba19480uRTP1kzUFKfTxY27ZG3HOw/H0ceQ038UXCE7z2Wx9X0ZPx63AbTBenhf4iWcE0vyLsyv3+myywXuR5o1vxqi0NYboLX7rwZeppdIlKaDak3jaTWVkeQU5bVK00xwJY6tRrYsBY1lThkPzpb3JWht2++NmJyjuK5Yl0Mt9cOKkaeXYdoiT5ALsHJbQsh8FkYfRdmzeSk70A7C2O6VoTiHcG6fe3lSwk3B9Oy2o3kUmmicpdJRYnom3ZbpXe7Kxo2+ZznfaqhclnGq3m+pAWZKNfghE4Cy3MpbaQfve9ZXp5zdy3p0keKSW3lwRawF2RtC986rCsWPzHgkFzRuw1TL1SR1UUxuNql1j3lEuEk3fWKlC+qPXoh/pGXvXIWI6f1I= X-Forefront-Antispam-Report: CIP:255.255.255.255; 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envelope-from=sriram.yagnaraman@est.tech; helo=EUR04-HE1-obe.outbound.protection.outlook.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org IGB uses RXDW ICR bit to indicate that rx descriptor has been written back. This is the same as RXT0 bit in older HW. Signed-off-by: Sriram Yagnaraman --- hw/net/e1000x_regs.h | 4 ++++ hw/net/igb_core.c | 46 +++++++++++++++++--------------------------- 2 files changed, 22 insertions(+), 28 deletions(-) diff --git a/hw/net/e1000x_regs.h b/hw/net/e1000x_regs.h index fb5b861135..f509db73a7 100644 --- a/hw/net/e1000x_regs.h +++ b/hw/net/e1000x_regs.h @@ -335,6 +335,7 @@ #define E1000_ICR_RXDMT0 0x00000010 /* rx desc min. threshold (0) */ #define E1000_ICR_RXO 0x00000040 /* rx overrun */ #define E1000_ICR_RXT0 0x00000080 /* rx timer intr (ring 0) */ +#define E1000_ICR_RXDW 0x00000080 /* rx desc written back */ #define E1000_ICR_MDAC 0x00000200 /* MDIO access complete */ #define E1000_ICR_RXCFG 0x00000400 /* RX /c/ ordered set */ #define E1000_ICR_GPI_EN0 0x00000800 /* GP Int 0 */ @@ -378,6 +379,7 @@ #define E1000_ICS_RXDMT0 E1000_ICR_RXDMT0 /* rx desc min. threshold */ #define E1000_ICS_RXO E1000_ICR_RXO /* rx overrun */ #define E1000_ICS_RXT0 E1000_ICR_RXT0 /* rx timer intr */ +#define E1000_ICS_RXDW E1000_ICR_RXDW /* rx desc written back */ #define E1000_ICS_MDAC E1000_ICR_MDAC /* MDIO access complete */ #define E1000_ICS_RXCFG E1000_ICR_RXCFG /* RX /c/ ordered set */ #define E1000_ICS_GPI_EN0 E1000_ICR_GPI_EN0 /* GP Int 0 */ @@ -407,6 +409,7 @@ #define E1000_IMS_RXDMT0 E1000_ICR_RXDMT0 /* rx desc min. threshold */ #define E1000_IMS_RXO E1000_ICR_RXO /* rx overrun */ #define E1000_IMS_RXT0 E1000_ICR_RXT0 /* rx timer intr */ +#define E1000_IMS_RXDW E1000_ICR_RXDW /* rx desc written back */ #define E1000_IMS_MDAC E1000_ICR_MDAC /* MDIO access complete */ #define E1000_IMS_RXCFG E1000_ICR_RXCFG /* RX /c/ ordered set */ #define E1000_IMS_GPI_EN0 E1000_ICR_GPI_EN0 /* GP Int 0 */ @@ -441,6 +444,7 @@ #define E1000_IMC_RXDMT0 E1000_ICR_RXDMT0 /* rx desc min. threshold */ #define E1000_IMC_RXO E1000_ICR_RXO /* rx overrun */ #define E1000_IMC_RXT0 E1000_ICR_RXT0 /* rx timer intr */ +#define E1000_IMC_RXDW E1000_ICR_RXDW /* rx desc written back */ #define E1000_IMC_MDAC E1000_ICR_MDAC /* MDIO access complete */ #define E1000_IMC_RXCFG E1000_ICR_RXCFG /* RX /c/ ordered set */ #define E1000_IMC_GPI_EN0 E1000_ICR_GPI_EN0 /* GP Int 0 */ diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index 9c32ad5e36..e78bc3611a 100644 --- a/hw/net/igb_core.c +++ b/hw/net/igb_core.c @@ -1488,7 +1488,7 @@ igb_receive_internal(IGBCore *core, const struct iovec *iov, int iovcnt, static const int maximum_ethernet_hdr_len = (ETH_HLEN + 4); uint16_t queues = 0; - uint32_t n; + uint32_t icr_bits = 0; uint8_t min_buf[ETH_ZLEN]; struct iovec min_iov; struct eth_header *ehdr; @@ -1561,6 +1561,7 @@ igb_receive_internal(IGBCore *core, const struct iovec *iov, int iovcnt, e1000x_fcs_len(core->mac); retval = orig_size; + igb_rx_fix_l4_csum(core, core->rx_pkt); for (i = 0; i < IGB_NUM_QUEUES; i++) { if (!(queues & BIT(i))) { @@ -1569,43 +1570,32 @@ igb_receive_internal(IGBCore *core, const struct iovec *iov, int iovcnt, igb_rx_ring_init(core, &rxr, i); - trace_e1000e_rx_rss_dispatched_to_queue(rxr.i->idx); - if (!igb_has_rxbufs(core, rxr.i, total_size)) { - retval = 0; + icr_bits |= E1000_ICS_RXO; + continue; } - } - if (retval) { - n = E1000_ICR_RXT0; - - igb_rx_fix_l4_csum(core, core->rx_pkt); - - for (i = 0; i < IGB_NUM_QUEUES; i++) { - if (!(queues & BIT(i))) { - continue; - } - - igb_rx_ring_init(core, &rxr, i); + trace_e1000e_rx_rss_dispatched_to_queue(rxr.i->idx); + igb_write_packet_to_guest(core, core->rx_pkt, &rxr, &rss_info); - igb_write_packet_to_guest(core, core->rx_pkt, &rxr, &rss_info); + /* Check if receive descriptor minimum threshold hit */ + if (igb_rx_descr_threshold_hit(core, rxr.i)) { + icr_bits |= E1000_ICS_RXDMT0; + } - /* Check if receive descriptor minimum threshold hit */ - if (igb_rx_descr_threshold_hit(core, rxr.i)) { - n |= E1000_ICS_RXDMT0; - } + core->mac[EICR] |= igb_rx_wb_eic(core, rxr.i->idx); - core->mac[EICR] |= igb_rx_wb_eic(core, rxr.i->idx); - } + icr_bits |= E1000_ICR_RXDW; + } - trace_e1000e_rx_written_to_guest(n); + if (icr_bits & E1000_ICR_RXDW) { + trace_e1000e_rx_written_to_guest(icr_bits); } else { - n = E1000_ICS_RXO; - trace_e1000e_rx_not_written_to_guest(n); + trace_e1000e_rx_not_written_to_guest(icr_bits); } - trace_e1000e_rx_interrupt_set(n); - igb_set_interrupt_cause(core, n); + trace_e1000e_rx_interrupt_set(icr_bits); + igb_set_interrupt_cause(core, icr_bits); return retval; } From patchwork Tue Jan 31 09:42:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sriram Yagnaraman X-Patchwork-Id: 13122688 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 152B6C636CC for ; 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envelope-from=sriram.yagnaraman@est.tech; helo=EUR04-HE1-obe.outbound.protection.outlook.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Also add checks for RXDCTL/TXDCTL queue enable bits Signed-off-by: Sriram Yagnaraman --- hw/net/igb_core.c | 30 +++++++++++++++++++++++++----- hw/net/igb_core.h | 1 + hw/net/igb_regs.h | 3 +++ 3 files changed, 29 insertions(+), 5 deletions(-) diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index e78bc3611a..4a1b98bf0e 100644 --- a/hw/net/igb_core.c +++ b/hw/net/igb_core.c @@ -780,6 +780,18 @@ igb_txdesc_writeback(IGBCore *core, dma_addr_t base, return igb_tx_wb_eic(core, txi->idx); } +static inline bool +igb_tx_enabled(IGBCore *core, const E1000E_RingInfo *txi) +{ + bool vmdq = core->mac[MRQC] & 1; + uint16_t qn = txi->idx; + uint16_t pool = qn % IGB_NUM_VM_POOLS; + + return (core->mac[TCTL] & E1000_TCTL_EN) && + (!vmdq || core->mac[VFTE] & BIT(pool)) && + (core->mac[TXDCTL0 + (qn * 16)] & E1000_TXDCTL_QUEUE_ENABLE); +} + static void igb_start_xmit(IGBCore *core, const IGB_TxRing *txr) { @@ -789,8 +801,7 @@ igb_start_xmit(IGBCore *core, const IGB_TxRing *txr) const E1000E_RingInfo *txi = txr->i; uint32_t eic = 0; - /* TODO: check if the queue itself is enabled too. */ - if (!(core->mac[TCTL] & E1000_TCTL_EN)) { + if (!igb_tx_enabled(core, txi)) { trace_e1000e_tx_disabled(); return; } @@ -1005,6 +1016,7 @@ static uint16_t igb_receive_assign(IGBCore *core, const struct eth_header *ehdr, queues = BIT(def_pl >> E1000_VT_CTL_DEFAULT_POOL_SHIFT); } + queues &= core->mac[VFRE]; igb_rss_parse_packet(core, core->rx_pkt, external_tx != NULL, rss_info); if (rss_info->queue & 1) { queues <<= 8; @@ -1564,12 +1576,12 @@ igb_receive_internal(IGBCore *core, const struct iovec *iov, int iovcnt, igb_rx_fix_l4_csum(core, core->rx_pkt); for (i = 0; i < IGB_NUM_QUEUES; i++) { - if (!(queues & BIT(i))) { + if (!(queues & BIT(i)) || + !(core->mac[RXDCTL0 + (i * 16)] & E1000_RXDCTL_QUEUE_ENABLE)) { continue; } igb_rx_ring_init(core, &rxr, i); - if (!igb_has_rxbufs(core, rxr.i, total_size)) { icr_bits |= E1000_ICS_RXO; continue; @@ -1973,9 +1985,16 @@ static void igb_set_vfmailbox(IGBCore *core, int index, uint32_t val) static void igb_vf_reset(IGBCore *core, uint16_t vfn) { + uint16_t qn0 = vfn; + uint16_t qn1 = vfn + IGB_NUM_VM_POOLS; + /* disable Rx and Tx for the VF*/ - core->mac[VFTE] &= ~BIT(vfn); + core->mac[RXDCTL0 + (qn0 * 16)] &= ~E1000_RXDCTL_QUEUE_ENABLE; + core->mac[RXDCTL0 + (qn1 * 16)] &= ~E1000_RXDCTL_QUEUE_ENABLE; + core->mac[TXDCTL0 + (qn0 * 16)] &= ~E1000_TXDCTL_QUEUE_ENABLE; + core->mac[TXDCTL0 + (qn1 * 16)] &= ~E1000_TXDCTL_QUEUE_ENABLE; core->mac[VFRE] &= ~BIT(vfn); + core->mac[VFTE] &= ~BIT(vfn); /* indicate VF reset to PF */ core->mac[VFLRE] |= BIT(vfn); /* VFLRE and mailbox use the same interrupt cause */ @@ -3881,6 +3900,7 @@ igb_phy_reg_init[] = { static const uint32_t igb_mac_reg_init[] = { [LEDCTL] = 2 | (3 << 8) | BIT(15) | (6 << 16) | (7 << 24), [EEMNGCTL] = BIT(31), + [TXDCTL0] = E1000_TXDCTL_QUEUE_ENABLE, [RXDCTL0] = E1000_RXDCTL_QUEUE_ENABLE | (1 << 16), [RXDCTL1] = 1 << 16, [RXDCTL2] = 1 << 16, diff --git a/hw/net/igb_core.h b/hw/net/igb_core.h index cc3b4d1f2b..9938922598 100644 --- a/hw/net/igb_core.h +++ b/hw/net/igb_core.h @@ -47,6 +47,7 @@ #define IGB_MSIX_VEC_NUM (10) #define IGBVF_MSIX_VEC_NUM (3) #define IGB_NUM_QUEUES (16) +#define IGB_NUM_VM_POOLS (8) typedef struct IGBCore IGBCore; diff --git a/hw/net/igb_regs.h b/hw/net/igb_regs.h index ddc0f931d6..4d98079906 100644 --- a/hw/net/igb_regs.h +++ b/hw/net/igb_regs.h @@ -160,6 +160,9 @@ union e1000_adv_rx_desc { #define E1000_MRQC_RSS_FIELD_IPV6_UDP 0x00800000 #define E1000_MRQC_RSS_FIELD_IPV6_UDP_EX 0x01000000 +/* Additional Transmit Descriptor Control definitions */ +#define E1000_TXDCTL_QUEUE_ENABLE 0x02000000 /* Enable specific Tx Queue */ + /* Additional Receive Descriptor Control definitions */ #define E1000_RXDCTL_QUEUE_ENABLE 0x02000000 /* Enable specific Rx Queue */ From patchwork Tue Jan 31 09:42:28 2023 Content-Type: text/plain; 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Tue, 31 Jan 2023 09:42:40 +0000 From: Sriram Yagnaraman To: Cc: qemu-devel@nongnu.org, Akihiko Odaki , Jason Wang , Dmitry Fleytman , "Michael S . Tsirkin" , Marcel Apfelbaum , Sriram Yagnaraman Subject: [PATCH v3 5/9] igb: check oversized packets for VMDq Date: Tue, 31 Jan 2023 10:42:28 +0100 Message-Id: <20230131094232.28863-6-sriram.yagnaraman@est.tech> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230131094232.28863-1-sriram.yagnaraman@est.tech> References: <20230131094232.28863-1-sriram.yagnaraman@est.tech> X-ClientProxiedBy: GV3P280CA0043.SWEP280.PROD.OUTLOOK.COM (2603:10a6:150:9::7) To DBBP189MB1433.EURP189.PROD.OUTLOOK.COM (2603:10a6:10:1e7::15) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DBBP189MB1433:EE_|VI1P18901MB0733:EE_ X-MS-Office365-Filtering-Correlation-Id: d9889738-8853-4626-28dd-08db036f7d2b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: zqutT2nQW7TX5WVkEs2NCLG99dsoN1e4WVYuv2zuHwFwRp0om23/65Z1wdjGIF0p/FB7MGyDBrYPPsJuxbGlqBPd8rhQodyFkueukM9LYhvw5CCZjYkLcv82DC8viMA1suCBgXVGiCn9GTOJp/At2h3T/REeOwhW5TTZwk12nqvGvrwKhPeKIC6O6asK3+JnU2sZzNJ+lRw8vcBODQAuFwhLhDNzjg5bnIKuX3m82r83NsLHRDdaJjSiv2WwGFJdzEaJOOGF5w3c5ldrDRX2koKC1LwmWXcTHaveudnDRNxMs94wfJofoZiuamoKahkh8YokS/PLY/TC1NaiKqtk8Cc2K+dD/f+rYT5QV81FYd6UUZfWdyTUaaNpRIDBBLOXj3a6WghDiJ70P7SmhGM0IFJlzpHRpANmh85K1uPbLa5pYVbat0uAdJ1aUanGrsHECaqZC/tpIbjkxKBh9KP8XppgMkm8qhoORiXfp0BUIxPa60ZW2U3cw0prms9HnFUa4cQr1Tds9Vo9knHZqEMg9OcGMKC7hzUQuoedXcbydxDuLE78iGuu3hUeSxL75vfMgUwXXBLipGcB8oZFX9zkbn808fNpjVyz5rcH7UpKhF8MUFzwe2bYgqLOf/OXeYcUkqwvB0Ry/HIJQ15QlDie6ae0CdxvCu8LPVFaGaZAF4kkzhQqGMPvcdOmuneyb80Bbfx5IcPbJXDHr8IBBSxvaQw1P0oIRilH2YMca/yIvB8= X-Forefront-Antispam-Report: CIP:255.255.255.255; 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envelope-from=sriram.yagnaraman@est.tech; helo=EUR04-HE1-obe.outbound.protection.outlook.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Sriram Yagnaraman --- hw/net/igb_core.c | 48 +++++++++++++++++++++++++++++++++++++++-------- 1 file changed, 40 insertions(+), 8 deletions(-) diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index 4a1b98bf0e..2f6f30341f 100644 --- a/hw/net/igb_core.c +++ b/hw/net/igb_core.c @@ -912,12 +912,27 @@ igb_rx_l4_cso_enabled(IGBCore *core) return !!(core->mac[RXCSUM] & E1000_RXCSUM_TUOFLD); } +static bool +igb_rx_is_oversized(IGBCore *core, uint16_t qn, size_t size) +{ + uint16_t pool = qn % IGB_NUM_VM_POOLS; + bool lpe = !!(core->mac[VMOLR0 + pool] & E1000_VMOLR_LPE); + int maximum_ethernet_lpe_size = + core->mac[VMOLR0 + pool] & E1000_VMOLR_RLPML_MASK; + int maximum_ethernet_vlan_size = 1522; + + return lpe ? size > maximum_ethernet_lpe_size : + size > maximum_ethernet_vlan_size; +} + static uint16_t igb_receive_assign(IGBCore *core, const struct eth_header *ehdr, - E1000E_RSSInfo *rss_info, bool *external_tx) + size_t size, E1000E_RSSInfo *rss_info, + bool *external_tx) { static const int ta_shift[] = { 4, 3, 2, 0 }; uint32_t f, ra[2], *macp, rctl = core->mac[RCTL]; uint16_t queues = 0; + uint16_t oversized = 0; uint16_t vid = lduw_be_p(&PKT_GET_VLAN_HDR(ehdr)->h_tci) & VLAN_VID_MASK; bool accepted = false; int i; @@ -943,7 +958,7 @@ static uint16_t igb_receive_assign(IGBCore *core, const struct eth_header *ehdr, if (core->mac[MRQC] & 1) { if (is_broadcast_ether_addr(ehdr->h_dest)) { - for (i = 0; i < 8; i++) { + for (i = 0; i < IGB_NUM_VM_POOLS; i++) { if (core->mac[VMOLR0 + i] & E1000_VMOLR_BAM) { queues |= BIT(i); } @@ -977,7 +992,7 @@ static uint16_t igb_receive_assign(IGBCore *core, const struct eth_header *ehdr, f = ta_shift[(rctl >> E1000_RCTL_MO_SHIFT) & 3]; f = (((ehdr->h_dest[5] << 8) | ehdr->h_dest[4]) >> f) & 0xfff; if (macp[f >> 5] & (1 << (f & 0x1f))) { - for (i = 0; i < 8; i++) { + for (i = 0; i < IGB_NUM_VM_POOLS; i++) { if (core->mac[VMOLR0 + i] & E1000_VMOLR_ROMPE) { queues |= BIT(i); } @@ -1000,7 +1015,7 @@ static uint16_t igb_receive_assign(IGBCore *core, const struct eth_header *ehdr, } } } else { - for (i = 0; i < 8; i++) { + for (i = 0; i < IGB_NUM_VM_POOLS; i++) { if (core->mac[VMOLR0 + i] & E1000_VMOLR_AUPE) { mask |= BIT(i); } @@ -1017,9 +1032,26 @@ static uint16_t igb_receive_assign(IGBCore *core, const struct eth_header *ehdr, } queues &= core->mac[VFRE]; - igb_rss_parse_packet(core, core->rx_pkt, external_tx != NULL, rss_info); - if (rss_info->queue & 1) { - queues <<= 8; + if (queues) { + for (i = 0; i < IGB_NUM_VM_POOLS; i++) { + if ((queues & BIT(i)) && igb_rx_is_oversized(core, i, size)) { + oversized |= BIT(i); + } + } + /* 8.19.37 increment ROC if packet is oversized for all queues */ + if (oversized == queues) { + trace_e1000x_rx_oversized(size); + e1000x_inc_reg_if_not_full(core->mac, ROC); + } + queues &= ~oversized; + } + + if (queues) { + igb_rss_parse_packet(core, core->rx_pkt, + external_tx != NULL, rss_info); + if (rss_info->queue & 1) { + queues <<= 8; + } } } else { switch (net_rx_pkt_get_packet_type(core->rx_pkt)) { @@ -1563,7 +1595,7 @@ igb_receive_internal(IGBCore *core, const struct iovec *iov, int iovcnt, e1000x_vlan_enabled(core->mac), core->mac[VET] & 0xffff); - queues = igb_receive_assign(core, ehdr, &rss_info, external_tx); + queues = igb_receive_assign(core, ehdr, size, &rss_info, external_tx); if (!queues) { trace_e1000e_rx_flt_dropped(); return orig_size; From patchwork Tue Jan 31 09:42:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sriram Yagnaraman X-Patchwork-Id: 13122692 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1FDE3C38142 for ; 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Signed-off-by: Sriram Yagnaraman --- hw/net/igb_core.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index 2f6f30341f..31a325d374 100644 --- a/hw/net/igb_core.c +++ b/hw/net/igb_core.c @@ -1049,8 +1049,15 @@ static uint16_t igb_receive_assign(IGBCore *core, const struct eth_header *ehdr, if (queues) { igb_rss_parse_packet(core, core->rx_pkt, external_tx != NULL, rss_info); + /* Sec 8.26.1: PQn = VFn + VQn*8 */ if (rss_info->queue & 1) { - queues <<= 8; + for (i = 0; i < IGB_NUM_VM_POOLS; i++) { + if ((queues & BIT(i)) && + (core->mac[VMOLR0 + i] & E1000_VMOLR_RSSE)) { + queues |= BIT(i + IGB_NUM_VM_POOLS); + queues &= ~BIT(i); + } + } } } } else { From patchwork Tue Jan 31 09:42:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sriram Yagnaraman X-Patchwork-Id: 13122691 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 20864C636CC for ; Tue, 31 Jan 2023 09:45:24 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pMnAV-0002HE-1u; Tue, 31 Jan 2023 04:43:11 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pMnAL-0002Cb-Q2 for qemu-devel@nongnu.org; Tue, 31 Jan 2023 04:43:03 -0500 Received: from mail-he1eur04on2115.outbound.protection.outlook.com ([40.107.7.115] helo=EUR04-HE1-obe.outbound.protection.outlook.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pMnAI-0001hD-Eb for qemu-devel@nongnu.org; Tue, 31 Jan 2023 04:43:00 -0500 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=C7INIZCGYx1Aw6V7SgxYsWEWhxJG6a7N2vvytdMWtRul9Mnne46MvSENS9FUL4Dj+MRzqUay6BUQI9b/muSC7B4vBNxVTSgzEMIVFMCvT/sJpZrqgL8EZofZjC30/L8SFUI9hLYo4Rnrg/1U1NZcv9f8UpwjjWV5A7KJVsteUJMHTYqPxF58VSUvinc4C/19p19paOQgrx43KrNv4+CgPWgoyZJx7KECw8nOZDdHlzh0UZkOM4Dro6pnnGBG3II+08HEf29dr4pTR+LDJL7tiZzfkQWDfGlwxiWx+Eqmru9v3Ly6R1rWl/nI8lPqWHN10QfOZ6F30jV9X9ZIRs+m1g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=uIkAS+i5c2z8IctwjHQQJbtynRClHb9dEPnRbfuV9I8=; b=F5F/ym1sYSc0vra3UJ2zb0BxAmu4st7g/k1frCHAwL7h1+3vNjFoHI8XxbxaQw3BysDfeNa25owDjiKt8KiOaxyD3U2OT2F6R8D7FHWn155tl9ttq5dbR3wN7n3TwA0+Y2VHRG1Z+D+FEr/W+elu8Oer13yADUQLVMIImQcUcGB58r9pxYeYERzdLSbuh0JA6UeZbQIcdBxURFm5EeYJMt+xS1m4sex2mnUi4J4Is01f8s6P8N/Z/ck/xQnkV4Eid3YPobo65jN4Nqy4UhnftViABSRfKKduOlaIQlReZFwm5ZfJusMi1i36/O6eWpQ8mNwPrd/OoH93g9JiovyZMg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=est.tech; dmarc=pass action=none header.from=est.tech; dkim=pass header.d=est.tech; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=estab.onmicrosoft.com; s=selector2-estab-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=uIkAS+i5c2z8IctwjHQQJbtynRClHb9dEPnRbfuV9I8=; b=XLW16sX7cgD4DeaLDiiFnssud9fLQ3EQopfDdHiNV/LYLJV09U81k+Ym3QQnK53OXUjxO1QBqH0A7ZhGE5BE4JdiTMIQKWsPpRPAQkFWXjsnp2rGUWYciYgReeev9ASrpkjGY9Jzl4ZO70KxNlHcoNfuTo+L5SxbklW7DWba9Is= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=est.tech; Received: from DBBP189MB1433.EURP189.PROD.OUTLOOK.COM (2603:10a6:10:1e7::15) by VI1P18901MB0733.EURP189.PROD.OUTLOOK.COM (2603:10a6:800:127::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6043.38; Tue, 31 Jan 2023 09:42:44 +0000 Received: from DBBP189MB1433.EURP189.PROD.OUTLOOK.COM ([fe80::8f70:435b:ab64:9420]) by DBBP189MB1433.EURP189.PROD.OUTLOOK.COM ([fe80::8f70:435b:ab64:9420%8]) with mapi id 15.20.6043.038; Tue, 31 Jan 2023 09:42:44 +0000 From: Sriram Yagnaraman To: Cc: qemu-devel@nongnu.org, Akihiko Odaki , Jason Wang , Dmitry Fleytman , "Michael S . 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Signed-off-by: Sriram Yagnaraman --- hw/net/igb_core.c | 26 ++++++++++++++++++++++---- 1 file changed, 22 insertions(+), 4 deletions(-) diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index 31a325d374..c5f9c14f47 100644 --- a/hw/net/igb_core.c +++ b/hw/net/igb_core.c @@ -490,7 +490,7 @@ igb_tx_pkt_send(IGBCore *core, struct igb_tx *tx, int queue_index) } static void -igb_on_tx_done_update_stats(IGBCore *core, struct NetTxPkt *tx_pkt) +igb_on_tx_done_update_stats(IGBCore *core, struct NetTxPkt *tx_pkt, int qn) { static const int PTCregs[6] = { PTC64, PTC127, PTC255, PTC511, PTC1023, PTC1522 }; @@ -517,6 +517,13 @@ igb_on_tx_done_update_stats(IGBCore *core, struct NetTxPkt *tx_pkt) core->mac[GPTC] = core->mac[TPT]; core->mac[GOTCL] = core->mac[TOTL]; core->mac[GOTCH] = core->mac[TOTH]; + + if (core->mac[MRQC] & 1) { + uint16_t pool = qn % IGB_NUM_VM_POOLS; + + core->mac[PVFGOTC0 + (pool * 64)] += tot_len; + core->mac[PVFGPTC0 + (pool * 64)]++; + } } static void @@ -579,7 +586,7 @@ igb_process_tx_desc(IGBCore *core, core->mac[VET] & 0xffff); } if (igb_tx_pkt_send(core, tx, queue_index)) { - igb_on_tx_done_update_stats(core, tx->tx_pkt); + igb_on_tx_done_update_stats(core, tx->tx_pkt, queue_index); } } @@ -1396,7 +1403,8 @@ igb_write_to_rx_buffers(IGBCore *core, } static void -igb_update_rx_stats(IGBCore *core, size_t data_size, size_t data_fcs_size) +igb_update_rx_stats(IGBCore *core, const E1000E_RingInfo *rxi, + size_t data_size, size_t data_fcs_size) { e1000x_update_rx_total_stats(core->mac, data_size, data_fcs_size); @@ -1412,6 +1420,16 @@ igb_update_rx_stats(IGBCore *core, size_t data_size, size_t data_fcs_size) default: break; } + + if (core->mac[MRQC] & 1) { + uint16_t pool = rxi->idx % IGB_NUM_VM_POOLS; + + core->mac[PVFGORC0 + (pool * 64)] += data_size + 4; + core->mac[PVFGPRC0 + (pool * 64)]++; + if (net_rx_pkt_get_packet_type(core->rx_pkt) == ETH_PKT_MCAST) { + core->mac[PVFMPRC0 + (pool * 64)]++; + } + } } static inline bool @@ -1513,7 +1531,7 @@ igb_write_packet_to_guest(IGBCore *core, struct NetRxPkt *pkt, } while (desc_offset < total_size); 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envelope-from=sriram.yagnaraman@est.tech; helo=EUR04-HE1-obe.outbound.protection.outlook.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Also trace out a warning if replication mode is disabled, since we only support replication mode enabled. Signed-off-by: Sriram Yagnaraman --- hw/net/igb_core.c | 9 +++++++++ hw/net/trace-events | 2 ++ 2 files changed, 11 insertions(+) diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index c5f9c14f47..8115be2d76 100644 --- a/hw/net/igb_core.c +++ b/hw/net/igb_core.c @@ -964,6 +964,10 @@ static uint16_t igb_receive_assign(IGBCore *core, const struct eth_header *ehdr, } if (core->mac[MRQC] & 1) { + if (!(core->mac[VT_CTL] & E1000_VT_CTL_VM_REPL_EN)) { + trace_igb_rx_vmdq_replication_mode_disabled(); + } + if (is_broadcast_ether_addr(ehdr->h_dest)) { for (i = 0; i < IGB_NUM_VM_POOLS; i++) { if (core->mac[VMOLR0 + i] & E1000_VMOLR_BAM) { @@ -1010,6 +1014,11 @@ static uint16_t igb_receive_assign(IGBCore *core, const struct eth_header *ehdr, } } + /* assume a full pool list if IGMAC is set */ + if (core->mac[VT_CTL] & E1000_VT_CTL_IGNORE_MAC) { + queues = BIT(IGB_MAX_VF_FUNCTIONS) - 1; + } + if (e1000x_vlan_rx_filter_enabled(core->mac)) { uint16_t mask = 0; diff --git a/hw/net/trace-events b/hw/net/trace-events index e94172e748..9bc7658692 100644 --- a/hw/net/trace-events +++ b/hw/net/trace-events @@ -288,6 +288,8 @@ igb_rx_desc_buff_write(uint64_t addr, uint16_t offset, const void* source, uint3 igb_rx_metadata_rss(uint32_t rss) "RSS data: 0x%X" +igb_rx_vmdq_replication_mode_disabled(void) "WARN: Only replication mode enabled is supported" + igb_irq_icr_clear_gpie_nsicr(void) "Clearing ICR on read due to GPIE.NSICR enabled" igb_irq_icr_write(uint32_t bits, uint32_t old_icr, uint32_t new_icr) "Clearing ICR bits 0x%x: 0x%x --> 0x%x" igb_irq_set_iam(uint32_t icr) "Update IAM: 0x%x" From patchwork Tue Jan 31 09:42:32 2023 Content-Type: text/plain; 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Tue, 31 Jan 2023 09:42:44 +0000 From: Sriram Yagnaraman To: Cc: qemu-devel@nongnu.org, Akihiko Odaki , Jason Wang , Dmitry Fleytman , "Michael S . Tsirkin" , Marcel Apfelbaum , Sriram Yagnaraman Subject: [PATCH v3 9/9] igb: respect VMVIR and VMOLR for VLAN Date: Tue, 31 Jan 2023 10:42:32 +0100 Message-Id: <20230131094232.28863-10-sriram.yagnaraman@est.tech> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230131094232.28863-1-sriram.yagnaraman@est.tech> References: <20230131094232.28863-1-sriram.yagnaraman@est.tech> X-ClientProxiedBy: GV3P280CA0057.SWEP280.PROD.OUTLOOK.COM (2603:10a6:150:9::25) To DBBP189MB1433.EURP189.PROD.OUTLOOK.COM (2603:10a6:10:1e7::15) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DBBP189MB1433:EE_|VI1P18901MB0733:EE_ X-MS-Office365-Filtering-Correlation-Id: 96f1dc5a-7b6e-495f-8060-08db036f7db0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: UUpKsyHOGRXbRe0J9sE/zzDpHfhX63A2SN7EhFK7gkW4ij4LFZ4FCBMRimGRs3TdfM9GzP6xXTtFXSOe43CyQ8MZEAfdXXgN1VFQOgttos+ywPErc0RsiGdXlXfqBF6s6FMsS1fFAl1KSAeIQ4ZyClZu49+fF5HxkP9dVYKRESyImJzPbq69YYvRz0HR0wN2RCHVtbpQ2jMqOLKde5IPsooj9JkziF5nXcDmW3r5JyIyeGZsdBlzmZQuXQE047LCQJ3lNwWxM5ZVLxDg9J4TBxBxlO7G8bdSbN0DgZsViUJjdu1qB/GR1akSoIpwogYDcT84yVd7u5Sc2Eog1uarfce0A6wzFObqp2R53HSorovRpX0Kx7AZR31K1f8lOm6PAoqe/dtcBl7X0jkIEPWIbuJYMHco1mn7x5p8MTk+UA2ZqQTe/E4mTpBNsn0IfO/NWu7p4v8rCgiyrWF2IJGyzpilY47PpJIfZb4kdfUgKE4J1BBaVHarERFfK2nytgoYHjYaCsWbcyflihV5f2M6PVQ9rDFkOzuWriXP0isUHG7Wdy71c95y/mI6zw2LFHsXKAeAguJcEndaeXyzDhVAPOTSsm+kcUfvATjt/gQBvVOF2mJjJcO7EaMuwX/OPnyh5IATcGR7UUkKKUGn9T/lVyM7Mvx7IfVRscRhXPAncyInLIu2/+hZ+3fHpvMKZQEMmQtzoQBZgOIYkdq1WPJAjHG2R4cEFhhOar5ANV/3Ayg= X-Forefront-Antispam-Report: CIP:255.255.255.255; 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envelope-from=sriram.yagnaraman@est.tech; helo=EUR04-HE1-obe.outbound.protection.outlook.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add support for stripping/inserting VLAN for VFs. Signed-off-by: Sriram Yagnaraman --- hw/net/igb_core.c | 51 ++++++++++++++++++++++++++++++++++++++--------- 1 file changed, 42 insertions(+), 9 deletions(-) diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index 8115be2d76..a697fcf56a 100644 --- a/hw/net/igb_core.c +++ b/hw/net/igb_core.c @@ -386,6 +386,25 @@ igb_rss_parse_packet(IGBCore *core, struct NetRxPkt *pkt, bool tx, info->queue = E1000_RSS_QUEUE(&core->mac[RETA], info->hash); } +static inline bool +igb_tx_insert_vlan(IGBCore *core, uint16_t qn, + struct igb_tx *tx, bool desc_vle) +{ + if (core->mac[MRQC] & 1) { + uint16_t pool = qn % IGB_NUM_VM_POOLS; + + if (core->mac[VMVIR0 + pool] & E1000_VMVIR_VLANA_DEFAULT) { + /* always insert default VLAN */ + desc_vle = true; + tx->vlan = core->mac[VMVIR0 + pool] & 0xffff; + } else if (core->mac[VMVIR0 + pool] & E1000_VMVIR_VLANA_NEVER) { + return false; + } + } + + return desc_vle && e1000x_vlan_enabled(core->mac); +} + static bool igb_setup_tx_offloads(IGBCore *core, struct igb_tx *tx) { @@ -581,7 +600,8 @@ igb_process_tx_desc(IGBCore *core, if (cmd_type_len & E1000_TXD_CMD_EOP) { if (!tx->skip_cp && net_tx_pkt_parse(tx->tx_pkt)) { - if (cmd_type_len & E1000_TXD_CMD_VLE) { + if (igb_tx_insert_vlan(core, queue_index, tx, + !!(cmd_type_len & E1000_TXD_CMD_VLE))) { net_tx_pkt_setup_vlan_header_ex(tx->tx_pkt, tx->vlan, core->mac[VET] & 0xffff); } @@ -1543,6 +1563,20 @@ igb_write_packet_to_guest(IGBCore *core, struct NetRxPkt *pkt, igb_update_rx_stats(core, rxi, size, total_size); } +static bool +igb_rx_strip_vlan(IGBCore *core, const E1000E_RingInfo *rxi) +{ + if (core->mac[MRQC] & 1) { + uint16_t pool = rxi->idx % IGB_NUM_VM_POOLS; + /* Sec 7.10.3.8: CTRL.VME is ignored, only VMOLR/RPLOLR is used */ + return (net_rx_pkt_get_packet_type(core->rx_pkt) == ETH_PKT_MCAST) ? + core->mac[RPLOLR] & E1000_RPLOLR_STRVLAN : + core->mac[VMOLR0 + pool] & E1000_VMOLR_STRVLAN; + } + + return e1000x_vlan_enabled(core->mac); +} + static inline void igb_rx_fix_l4_csum(IGBCore *core, struct NetRxPkt *pkt) { @@ -1624,10 +1658,7 @@ igb_receive_internal(IGBCore *core, const struct iovec *iov, int iovcnt, ehdr = PKT_GET_ETH_HDR(filter_buf); net_rx_pkt_set_packet_type(core->rx_pkt, get_eth_packet_type(ehdr)); - - net_rx_pkt_attach_iovec_ex(core->rx_pkt, iov, iovcnt, iov_ofs, - e1000x_vlan_enabled(core->mac), - core->mac[VET] & 0xffff); + net_rx_pkt_set_protocols(core->rx_pkt, filter_buf, size); queues = igb_receive_assign(core, ehdr, size, &rss_info, external_tx); if (!queues) { @@ -1635,11 +1666,8 @@ igb_receive_internal(IGBCore *core, const struct iovec *iov, int iovcnt, return orig_size; } - total_size = net_rx_pkt_get_total_len(core->rx_pkt) + - e1000x_fcs_len(core->mac); - retval = orig_size; - igb_rx_fix_l4_csum(core, core->rx_pkt); + total_size = size + e1000x_fcs_len(core->mac); for (i = 0; i < IGB_NUM_QUEUES; i++) { if (!(queues & BIT(i)) || @@ -1648,6 +1676,11 @@ igb_receive_internal(IGBCore *core, const struct iovec *iov, int iovcnt, } igb_rx_ring_init(core, &rxr, i); + net_rx_pkt_attach_iovec_ex(core->rx_pkt, iov, iovcnt, iov_ofs, + igb_rx_strip_vlan(core, rxr.i), + core->mac[VET] & 0xffff); + igb_rx_fix_l4_csum(core, core->rx_pkt); + if (!igb_has_rxbufs(core, rxr.i, total_size)) { icr_bits |= E1000_ICS_RXO; continue;