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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Feb 2023 15:35:19.8557 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8c79cab6-79f1-45f9-90e9-08db0b7c6ad1 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF000108EB.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL3PR12MB6617 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Sanjay R Mehta AMD Yellow Carp and Pink Sardine don't support CLx state, hence disabling it. Signed-off-by: Sanjay R Mehta Signed-off-by: Basavaraj Natikar --- drivers/thunderbolt/nhi.h | 6 ++++++ drivers/thunderbolt/quirks.c | 6 ++++++ drivers/thunderbolt/tb.h | 35 ++++++++++++++++++++++++++++++++--- 3 files changed, 44 insertions(+), 3 deletions(-) diff --git a/drivers/thunderbolt/nhi.h b/drivers/thunderbolt/nhi.h index b071802..3d8cfaf 100644 --- a/drivers/thunderbolt/nhi.h +++ b/drivers/thunderbolt/nhi.h @@ -87,6 +87,12 @@ extern const struct tb_nhi_ops icl_nhi_ops; #define PCI_DEVICE_ID_INTEL_RPL_NHI0 0xa73e #define PCI_DEVICE_ID_INTEL_RPL_NHI1 0xa76d +/* PCI IDs for AMD USB4 controllers */ +#define PCI_DEVICE_ID_AMD_YELLOW_CARP_NHI0 0x162e +#define PCI_DEVICE_ID_AMD_YELLOW_CARP_NHI1 0x162f +#define PCI_DEVICE_ID_AMD_PINK_SARDINE_NHI0 0x1668 +#define PCI_DEVICE_ID_AMD_PINK_SARDINE_NHI1 0x1669 + #define PCI_CLASS_SERIAL_USB_USB4 0x0c0340 #endif diff --git a/drivers/thunderbolt/quirks.c b/drivers/thunderbolt/quirks.c index b5f2ec7..f38db02 100644 --- a/drivers/thunderbolt/quirks.c +++ b/drivers/thunderbolt/quirks.c @@ -63,4 +63,10 @@ void tb_check_quirks(struct tb_switch *sw) q->hook(sw); } + + /* + * CLx is not supported on AMD USB4 Yellow Carp and Pink Sardine platforms. + */ + if (tb_switch_is_yellow_carp(sw->tb->nhi) || tb_switch_is_pink_sardine(sw->tb->nhi)) + sw->quirks |= QUIRK_NO_CLX; } diff --git a/drivers/thunderbolt/tb.h b/drivers/thunderbolt/tb.h index f978697..d7988ad 100644 --- a/drivers/thunderbolt/tb.h +++ b/drivers/thunderbolt/tb.h @@ -23,6 +23,11 @@ #define NVM_MAX_SIZE SZ_512K #define NVM_DATA_DWORDS 16 +/* Keep link controller awake during update */ +#define QUIRK_FORCE_POWER_LINK_CONTROLLER BIT(0) +/* Disable CLx if not supported */ +#define QUIRK_NO_CLX BIT(1) + /** * struct tb_nvm - Structure holding NVM information * @dev: Owner of the NVM @@ -905,6 +910,30 @@ static inline bool tb_switch_is_tiger_lake(const struct tb_switch *sw) return false; } +static inline bool tb_switch_is_yellow_carp(const struct tb_nhi *nhi) +{ + if (nhi->pdev->vendor == PCI_VENDOR_ID_AMD) { + switch (nhi->pdev->device) { + case PCI_DEVICE_ID_AMD_YELLOW_CARP_NHI0: + case PCI_DEVICE_ID_AMD_YELLOW_CARP_NHI1: + return true; + } + } + return false; +} + +static inline bool tb_switch_is_pink_sardine(const struct tb_nhi *nhi) +{ + if (nhi->pdev->vendor == PCI_VENDOR_ID_AMD) { + switch (nhi->pdev->device) { + case PCI_DEVICE_ID_AMD_PINK_SARDINE_NHI0: + case PCI_DEVICE_ID_AMD_PINK_SARDINE_NHI1: + return true; + } + } + return false; +} + /** * tb_switch_is_usb4() - Is the switch USB4 compliant * @sw: Switch to check @@ -997,6 +1026,9 @@ static inline bool tb_switch_is_clx_enabled(const struct tb_switch *sw, */ static inline bool tb_switch_is_clx_supported(const struct tb_switch *sw) { + if (sw->quirks & QUIRK_NO_CLX) + return false; + return tb_switch_is_usb4(sw) || tb_switch_is_titan_ridge(sw); } @@ -1254,9 +1286,6 @@ struct usb4_port *usb4_port_device_add(struct tb_port *port); void usb4_port_device_remove(struct usb4_port *usb4); int usb4_port_device_resume(struct usb4_port *usb4); -/* Keep link controller awake during update */ -#define QUIRK_FORCE_POWER_LINK_CONTROLLER BIT(0) - void tb_check_quirks(struct tb_switch *sw); #ifdef CONFIG_ACPI