From patchwork Tue Feb 14 07:42:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Christian_K=C3=B6nig?= X-Patchwork-Id: 13139547 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BBD8DC61DA4 for ; Tue, 14 Feb 2023 07:43:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 128F410E801; Tue, 14 Feb 2023 07:42:49 +0000 (UTC) Received: from mail-wr1-x429.google.com (mail-wr1-x429.google.com [IPv6:2a00:1450:4864:20::429]) by gabe.freedesktop.org (Postfix) with ESMTPS id AF0C810E042; Tue, 14 Feb 2023 07:42:43 +0000 (UTC) Received: by mail-wr1-x429.google.com with SMTP id o18so14688087wrj.3; Mon, 13 Feb 2023 23:42:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=pQQFrBizUdFKPezAzjnBMsO4C0aui2hfp5xwGSsDpiM=; b=NNvXDphBZ28jy4mUD6LIAIPP95pNwoxaQEcRnbGJ7pSGu8vGvawhijzaw2icxcjOhy wSyS8tIqnO+MfpJzm7FanELxfKF1kMT97P8xXFO4nOzImfYDEy2gQih2k76Akyrshy0n TDvMcSI2ASZQ/mrgdDUzn+qB2yfacNvVQZcXA7gboLHaoU7lt8dYtdpEUrv39FxFiK2o DDfIAVKym7aO0tDAHf8/fyHuHPy/DWnr8flYAbzTQldJpDRED2qnnlE4SVZdClyxN5kI WUNRlL48sWlkkUA9zqn8Hj1xNtK+z4HzP7nQNjZNsz4kiIrJLCMC1kwghZ36dpuGP4Om vwmw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pQQFrBizUdFKPezAzjnBMsO4C0aui2hfp5xwGSsDpiM=; b=GM/XCNZNk+Q6qEY9NWYKui3itQz/FfuARjPzDWP9HrF8t2Z1aoRqf0YRzABWMmaT4u oSnp4+hYXAufp7nqsPZrcUF7hGmF83e8oZBPYW6x190TZdYI2TYjVuTGhg80ucZPbI+x rhXdDWtFURDhB7Cb9McJtq9RzvXHfA/Yfw6ZVJdm+MODOmEEsJn8VA/pBVodYyFJ2dXk 3v5UbNTo9pIGCMYXs4X1CCVguwFZWt9AsCIQ3SMvflsNrCmNujuaEC4tq5vASTz+L+H5 QxUrj9aS520r2AuhKw/+quVsfjnFUbI25BFXFU4FAtAMA9FA7lO2j4Zg7NM9f1kGFgTb ZIUw== X-Gm-Message-State: AO0yUKWxn5cqkoOPyV9NH7jx5CpzYmaHbBjKLEP/VRtdB2I0o9TNFOgR EEymBqsbWKRds/HEC4SACFah75/X7qI= X-Google-Smtp-Source: AK7set9EmmdNYA6j9SZoV2Egp4bzLc67TiqfOonSvDg++mn2qXm2ThrLqzC2Ca1D/1PkxhWrSQXUTg== X-Received: by 2002:adf:d845:0:b0:2c5:598a:dd0f with SMTP id k5-20020adfd845000000b002c5598add0fmr1270015wrl.0.1676360562150; Mon, 13 Feb 2023 23:42:42 -0800 (PST) Received: from able.fritz.box (p5b0ea2e7.dip0.t-ipconnect.de. [91.14.162.231]) by smtp.gmail.com with ESMTPSA id e14-20020a5d65ce000000b002c561805a4csm1679855wrw.45.2023.02.13.23.42.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Feb 2023 23:42:41 -0800 (PST) From: " =?utf-8?q?Christian_K=C3=B6nig?= " X-Google-Original-From: =?utf-8?q?Christian_K=C3=B6nig?= To: intel-gfx@lists.freedesktop.org, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Date: Tue, 14 Feb 2023 08:42:36 +0100 Message-Id: <20230214074238.65865-2-christian.koenig@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230214074238.65865-1-christian.koenig@amd.com> References: <20230214074238.65865-1-christian.koenig@amd.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 1/3] drm/amdgpu: use amdgpu_res_cursor in more places v2 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amaranath.Somalapuram@amd.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Instead of resource->start use the cursor to get this. v2 (chk): remove changes to amdgpu_bo_gpu_offset_no_check(), that won't work with the AGP aperture otherwise. Signed-off-by: Somalapuram Amaranath Reviewed-by: Christian König Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 8 ++++++-- drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 6 +++++- 2 files changed, 11 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index 2cd081cbf706..f62e5398e620 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -845,6 +845,7 @@ static int amdgpu_ttm_backend_bind(struct ttm_device *bdev, { struct amdgpu_device *adev = amdgpu_ttm_adev(bdev); struct amdgpu_ttm_tt *gtt = ttm_to_amdgpu_ttm_tt(ttm); + struct amdgpu_res_cursor cursor; uint64_t flags; int r; @@ -892,7 +893,8 @@ static int amdgpu_ttm_backend_bind(struct ttm_device *bdev, flags = amdgpu_ttm_tt_pte_flags(adev, ttm, bo_mem); /* bind pages into GART page tables */ - gtt->offset = (u64)bo_mem->start << PAGE_SHIFT; + amdgpu_res_first(bo_mem, 0, bo_mem->size, &cursor); + gtt->offset = cursor.start; amdgpu_gart_bind(adev, gtt->offset, ttm->num_pages, gtt->ttm.dma_address, flags); gtt->bound = true; @@ -912,6 +914,7 @@ int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo) struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev); struct ttm_operation_ctx ctx = { false, false }; struct amdgpu_ttm_tt *gtt = ttm_to_amdgpu_ttm_tt(bo->ttm); + struct amdgpu_res_cursor cursor; struct ttm_placement placement; struct ttm_place placements; struct ttm_resource *tmp; @@ -945,7 +948,8 @@ int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo) flags = amdgpu_ttm_tt_pte_flags(adev, bo->ttm, tmp); /* Bind pages */ - gtt->offset = (u64)tmp->start << PAGE_SHIFT; + amdgpu_res_first(tmp, 0, tmp->size, &cursor); + gtt->offset = cursor.start; amdgpu_ttm_gart_bind(adev, bo, flags); amdgpu_gart_invalidate_tlb(adev); ttm_resource_free(bo, &bo->resource); diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c index c06ada0844ba..9114393d2ee6 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c @@ -200,8 +200,12 @@ static int add_queue_mes(struct device_queue_manager *dqm, struct queue *q, queue_input.wptr_addr = (uint64_t)q->properties.write_ptr; if (q->wptr_bo) { + struct amdgpu_res_cursor cursor; + wptr_addr_off = (uint64_t)q->properties.write_ptr & (PAGE_SIZE - 1); - queue_input.wptr_mc_addr = ((uint64_t)q->wptr_bo->tbo.resource->start << PAGE_SHIFT) + wptr_addr_off; + amdgpu_res_first(q->wptr_bo->tbo.resource, 0, + q->wptr_bo->tbo.resource->size, &cursor); + queue_input.wptr_mc_addr = cursor.start + wptr_addr_off; } queue_input.is_kfd_process = 1; From patchwork Tue Feb 14 07:42:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Christian_K=C3=B6nig?= X-Patchwork-Id: 13139549 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 59D4EC05027 for ; Tue, 14 Feb 2023 07:43:05 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CE70910E7FD; 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[91.14.162.231]) by smtp.gmail.com with ESMTPSA id e14-20020a5d65ce000000b002c561805a4csm1679855wrw.45.2023.02.13.23.42.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Feb 2023 23:42:42 -0800 (PST) From: " =?utf-8?q?Christian_K=C3=B6nig?= " X-Google-Original-From: =?utf-8?q?Christian_K=C3=B6nig?= To: intel-gfx@lists.freedesktop.org, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Date: Tue, 14 Feb 2023 08:42:37 +0100 Message-Id: <20230214074238.65865-3-christian.koenig@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230214074238.65865-1-christian.koenig@amd.com> References: <20230214074238.65865-1-christian.koenig@amd.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 2/3] drm/ttm: Change the parameters of ttm_range_man_init() from pages to bytes X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amaranath.Somalapuram@amd.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Somalapuram Amaranath Change the parameters of ttm_range_man_init_nocheck() size from page size to byte size. Cleanup the PAGE_SHIFT operation on the depended caller functions. Signed-off-by: Somalapuram Amaranath Reviewed-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 4 ++-- drivers/gpu/drm/drm_gem_vram_helper.c | 2 +- drivers/gpu/drm/radeon/radeon_ttm.c | 4 ++-- drivers/gpu/drm/ttm/ttm_range_manager.c | 8 ++++---- drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 2 +- include/drm/ttm/ttm_range_manager.h | 6 +++--- 6 files changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index f62e5398e620..77c2da886f5b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -75,10 +75,10 @@ static void amdgpu_ttm_backend_unbind(struct ttm_device *bdev, static int amdgpu_ttm_init_on_chip(struct amdgpu_device *adev, unsigned int type, - uint64_t size_in_page) + uint64_t size) { return ttm_range_man_init(&adev->mman.bdev, type, - false, size_in_page); + false, size << PAGE_SHIFT); } /** diff --git a/drivers/gpu/drm/drm_gem_vram_helper.c b/drivers/gpu/drm/drm_gem_vram_helper.c index d40b3edb52d0..f70d11e1cd47 100644 --- a/drivers/gpu/drm/drm_gem_vram_helper.c +++ b/drivers/gpu/drm/drm_gem_vram_helper.c @@ -999,7 +999,7 @@ static int drm_vram_mm_init(struct drm_vram_mm *vmm, struct drm_device *dev, return ret; ret = ttm_range_man_init(&vmm->bdev, TTM_PL_VRAM, - false, vram_size >> PAGE_SHIFT); + false, vram_size); if (ret) return ret; diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c index 67075c85f847..78dd6a87fb65 100644 --- a/drivers/gpu/drm/radeon/radeon_ttm.c +++ b/drivers/gpu/drm/radeon/radeon_ttm.c @@ -70,13 +70,13 @@ struct radeon_device *radeon_get_rdev(struct ttm_device *bdev) static int radeon_ttm_init_vram(struct radeon_device *rdev) { return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_VRAM, - false, rdev->mc.real_vram_size >> PAGE_SHIFT); + false, rdev->mc.real_vram_size); } static int radeon_ttm_init_gtt(struct radeon_device *rdev) { return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_TT, - true, rdev->mc.gtt_size >> PAGE_SHIFT); + true, rdev->mc.gtt_size); } static void radeon_evict_flags(struct ttm_buffer_object *bo, diff --git a/drivers/gpu/drm/ttm/ttm_range_manager.c b/drivers/gpu/drm/ttm/ttm_range_manager.c index ae11d07eb63a..62fddcc59f02 100644 --- a/drivers/gpu/drm/ttm/ttm_range_manager.c +++ b/drivers/gpu/drm/ttm/ttm_range_manager.c @@ -169,7 +169,7 @@ static const struct ttm_resource_manager_func ttm_range_manager_func = { * @bdev: ttm device * @type: memory manager type * @use_tt: if the memory manager uses tt - * @p_size: size of area to be managed in pages. + * @size: size of area to be managed in bytes. * * The range manager is installed for this device in the type slot. * @@ -177,7 +177,7 @@ static const struct ttm_resource_manager_func ttm_range_manager_func = { */ int ttm_range_man_init_nocheck(struct ttm_device *bdev, unsigned type, bool use_tt, - unsigned long p_size) + u64 size) { struct ttm_resource_manager *man; struct ttm_range_manager *rman; @@ -191,9 +191,9 @@ int ttm_range_man_init_nocheck(struct ttm_device *bdev, man->func = &ttm_range_manager_func; - ttm_resource_manager_init(man, bdev, p_size); + ttm_resource_manager_init(man, bdev, size); - drm_mm_init(&rman->mm, 0, p_size); + drm_mm_init(&rman->mm, 0, size); spin_lock_init(&rman->lock); ttm_set_driver_manager(bdev, type, &rman->manager); diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c index 2588615a2a38..18cf4edea197 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c @@ -706,7 +706,7 @@ static int vmw_vram_manager_init(struct vmw_private *dev_priv) { int ret; ret = ttm_range_man_init(&dev_priv->bdev, TTM_PL_VRAM, false, - dev_priv->vram_size >> PAGE_SHIFT); + dev_priv->vram_size); ttm_resource_manager_set_used(ttm_manager_type(&dev_priv->bdev, TTM_PL_VRAM), false); return ret; } diff --git a/include/drm/ttm/ttm_range_manager.h b/include/drm/ttm/ttm_range_manager.h index 7963b957e9ef..05bffded1b53 100644 --- a/include/drm/ttm/ttm_range_manager.h +++ b/include/drm/ttm/ttm_range_manager.h @@ -36,15 +36,15 @@ to_ttm_range_mgr_node(struct ttm_resource *res) int ttm_range_man_init_nocheck(struct ttm_device *bdev, unsigned type, bool use_tt, - unsigned long p_size); + u64 size); int ttm_range_man_fini_nocheck(struct ttm_device *bdev, unsigned type); static __always_inline int ttm_range_man_init(struct ttm_device *bdev, unsigned int type, bool use_tt, - unsigned long p_size) + u64 size) { BUILD_BUG_ON(__builtin_constant_p(type) && type >= TTM_NUM_MEM_TYPES); - return ttm_range_man_init_nocheck(bdev, type, use_tt, p_size); + return ttm_range_man_init_nocheck(bdev, type, use_tt, size); } static __always_inline int ttm_range_man_fini(struct ttm_device *bdev, From patchwork Tue Feb 14 07:42:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Christian_K=C3=B6nig?= X-Patchwork-Id: 13139548 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7B4ABC6379F for ; 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[91.14.162.231]) by smtp.gmail.com with ESMTPSA id e14-20020a5d65ce000000b002c561805a4csm1679855wrw.45.2023.02.13.23.42.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Feb 2023 23:42:43 -0800 (PST) From: " =?utf-8?q?Christian_K=C3=B6nig?= " X-Google-Original-From: =?utf-8?q?Christian_K=C3=B6nig?= To: intel-gfx@lists.freedesktop.org, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Date: Tue, 14 Feb 2023 08:42:38 +0100 Message-Id: <20230214074238.65865-4-christian.koenig@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230214074238.65865-1-christian.koenig@amd.com> References: <20230214074238.65865-1-christian.koenig@amd.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 3/3] drm/ttm: Change the meaning of the fields in the drm_mm_nodes structure from pfn to bytes v2 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amaranath.Somalapuram@amd.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Somalapuram Amaranath Change the ttm_range_man_alloc() allocation from pages to size in bytes. Fix the dependent drm_mm_nodes start and size from pages to bytes. v2 (chk): Change the drm_mm_node usage in amdgpu as well. re-order the patch to be independent of the resource->start change. Signed-off-by: Somalapuram Amaranath Reviewed-by: Christian König Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 15 ++++++++------- drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h | 8 ++++---- drivers/gpu/drm/i915/i915_scatterlist.c | 6 +++--- drivers/gpu/drm/ttm/ttm_range_manager.c | 17 ++++++++--------- 4 files changed, 23 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c index 44367f03316f..c90423cd1292 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c @@ -116,7 +116,6 @@ static int amdgpu_gtt_mgr_new(struct ttm_resource_manager *man, struct ttm_resource **res) { struct amdgpu_gtt_mgr *mgr = to_gtt_mgr(man); - uint32_t num_pages = PFN_UP(tbo->base.size); struct ttm_range_mgr_node *node; int r; @@ -134,17 +133,19 @@ static int amdgpu_gtt_mgr_new(struct ttm_resource_manager *man, if (place->lpfn) { spin_lock(&mgr->lock); r = drm_mm_insert_node_in_range(&mgr->mm, &node->mm_nodes[0], - num_pages, tbo->page_alignment, - 0, place->fpfn, place->lpfn, + tbo->base.size, + tbo->page_alignment << PAGE_SHIFT, 0, + place->fpfn << PAGE_SHIFT, + place->lpfn << PAGE_SHIFT, DRM_MM_INSERT_BEST); spin_unlock(&mgr->lock); if (unlikely(r)) goto err_free; - node->base.start = node->mm_nodes[0].start; + node->base.start = node->mm_nodes[0].start >> PAGE_SHIFT; } else { node->mm_nodes[0].start = 0; - node->mm_nodes[0].size = PFN_UP(node->base.size); + node->mm_nodes[0].size = node->base.size; node->base.start = AMDGPU_BO_INVALID_OFFSET; } @@ -285,8 +286,8 @@ int amdgpu_gtt_mgr_init(struct amdgpu_device *adev, uint64_t gtt_size) ttm_resource_manager_init(man, &adev->mman.bdev, gtt_size); - start = AMDGPU_GTT_MAX_TRANSFER_SIZE * AMDGPU_GTT_NUM_TRANSFER_WINDOWS; - size = (adev->gmc.gart_size >> PAGE_SHIFT) - start; + start = (AMDGPU_GTT_MAX_TRANSFER_SIZE * AMDGPU_GTT_NUM_TRANSFER_WINDOWS) << PAGE_SHIFT; + size = adev->gmc.gart_size - start; drm_mm_init(&mgr->mm, start, size); spin_lock_init(&mgr->lock); diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h index 5c4f93ee0c57..5c78f0b09351 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h @@ -94,8 +94,8 @@ static inline void amdgpu_res_first(struct ttm_resource *res, while (start >= node->size << PAGE_SHIFT) start -= node++->size << PAGE_SHIFT; - cur->start = (node->start << PAGE_SHIFT) + start; - cur->size = min((node->size << PAGE_SHIFT) - start, size); + cur->start = node->start + start; + cur->size = min(node->size - start, size); cur->remaining = size; cur->node = node; break; @@ -155,8 +155,8 @@ static inline void amdgpu_res_next(struct amdgpu_res_cursor *cur, uint64_t size) node = cur->node; cur->node = ++node; - cur->start = node->start << PAGE_SHIFT; - cur->size = min(node->size << PAGE_SHIFT, cur->remaining); + cur->start = node->start; + cur->size = min(node->size, cur->remaining); break; default: return; diff --git a/drivers/gpu/drm/i915/i915_scatterlist.c b/drivers/gpu/drm/i915/i915_scatterlist.c index 756289e43dff..7defda1219d0 100644 --- a/drivers/gpu/drm/i915/i915_scatterlist.c +++ b/drivers/gpu/drm/i915/i915_scatterlist.c @@ -94,7 +94,7 @@ struct i915_refct_sgt *i915_rsgt_from_mm_node(const struct drm_mm_node *node, if (!rsgt) return ERR_PTR(-ENOMEM); - i915_refct_sgt_init(rsgt, node->size << PAGE_SHIFT); + i915_refct_sgt_init(rsgt, node->size); st = &rsgt->table; /* restricted by sg_alloc_table */ if (WARN_ON(overflows_type(DIV_ROUND_UP_ULL(node->size, segment_pages), @@ -110,8 +110,8 @@ struct i915_refct_sgt *i915_rsgt_from_mm_node(const struct drm_mm_node *node, sg = st->sgl; st->nents = 0; prev_end = (resource_size_t)-1; - block_size = node->size << PAGE_SHIFT; - offset = node->start << PAGE_SHIFT; + block_size = node->size; + offset = node->start; while (block_size) { u64 len; diff --git a/drivers/gpu/drm/ttm/ttm_range_manager.c b/drivers/gpu/drm/ttm/ttm_range_manager.c index 62fddcc59f02..9da6054f2955 100644 --- a/drivers/gpu/drm/ttm/ttm_range_manager.c +++ b/drivers/gpu/drm/ttm/ttm_range_manager.c @@ -83,9 +83,10 @@ static int ttm_range_man_alloc(struct ttm_resource_manager *man, spin_lock(&rman->lock); ret = drm_mm_insert_node_in_range(mm, &node->mm_nodes[0], - PFN_UP(node->base.size), - bo->page_alignment, 0, - place->fpfn, lpfn, mode); + node->base.size, + bo->page_alignment << PAGE_SHIFT, 0, + place->fpfn << PAGE_SHIFT, + lpfn << PAGE_SHIFT, mode); spin_unlock(&rman->lock); if (unlikely(ret)) { @@ -94,7 +95,7 @@ static int ttm_range_man_alloc(struct ttm_resource_manager *man, return ret; } - node->base.start = node->mm_nodes[0].start; + node->base.start = node->mm_nodes[0].start >> PAGE_SHIFT; *res = &node->base; return 0; } @@ -119,11 +120,10 @@ static bool ttm_range_man_intersects(struct ttm_resource_manager *man, size_t size) { struct drm_mm_node *node = &to_ttm_range_mgr_node(res)->mm_nodes[0]; - u32 num_pages = PFN_UP(size); /* Don't evict BOs outside of the requested placement range */ - if (place->fpfn >= (node->start + num_pages) || - (place->lpfn && place->lpfn <= node->start)) + if ((place->fpfn << PAGE_SHIFT) >= (node->start + size) || + (place->lpfn && (place->lpfn << PAGE_SHIFT) <= node->start)) return false; return true; @@ -135,10 +135,9 @@ static bool ttm_range_man_compatible(struct ttm_resource_manager *man, size_t size) { struct drm_mm_node *node = &to_ttm_range_mgr_node(res)->mm_nodes[0]; - u32 num_pages = PFN_UP(size); if (node->start < place->fpfn || - (place->lpfn && (node->start + num_pages) > place->lpfn)) + (place->lpfn && (node->start + size) > place->lpfn << PAGE_SHIFT)) return false; return true;