From patchwork Tue Feb 14 18:46:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mingwei Zhang X-Patchwork-Id: 13140718 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 07E17C05027 for ; Tue, 14 Feb 2023 18:46:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232637AbjBNSqY (ORCPT ); Tue, 14 Feb 2023 13:46:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39254 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232960AbjBNSqW (ORCPT ); Tue, 14 Feb 2023 13:46:22 -0500 Received: from mail-pl1-x64a.google.com (mail-pl1-x64a.google.com [IPv6:2607:f8b0:4864:20::64a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 25B2E241E2 for ; Tue, 14 Feb 2023 10:46:21 -0800 (PST) Received: by mail-pl1-x64a.google.com with SMTP id y15-20020a1709029b8f00b00198e0564d73so9635452plp.22 for ; Tue, 14 Feb 2023 10:46:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=+go4BhcPBxPqXa9WF1he5E5XfcGSfVCPuFvF4GvTBzc=; b=BW9GqgUf1FJASuJhuuFGu81Hnjl89OJ5Z7TQ4bQrSTxdB+KNcb/d1qurRVo5ciXqjE r4kYbqOEURxhJ+clDgUgUxeGEkhBTXx3fsKv9BcxumA//FemtB2dqCsPqtYnhN8eP/Wf P7HZ35twoIBIWhh0+SYGlOfLizui8nxzRu4rzYVjP7oCp7bFpfiy1wjC9WcORisJ4AJB onnjoL0v0Pd9Bu3bQ38oHws6dlSWAEdeMjGDg9BJgJYZd17u7adV9xkJldb4yroo9oD3 NRYj5OBKsvzQsfXDfB+jm4PaErXBR0OjcKx32xzrXZVNYkJSHb+m1C9sAlWfXLZJsagh x6FQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=+go4BhcPBxPqXa9WF1he5E5XfcGSfVCPuFvF4GvTBzc=; b=xGyHbDnL9cbyRAKp/AK9TxanuTGhbrXqVTdXYShXO0J6ZQSwaO0eMF2PsEG6Gi/1rL oLmlmG7Ms1m5NwtNpHQtzelrz4WpW1V96JIGu9T85byvT/BhJlPtGQ/fcuuJllblNROI c9lH8gS7iRihdiN9yuQVywkhSji6CpXgq3Y4QkTto9+d6Yd8PPk3UZyKAebzAxFvZV+n wMJmWRbl6vxN7sNwEF8BDmKEIF8RZaNz+cAnfPA6tPCJSCQEJayPUwzkzWTkEaI2gBIo KZSBjNnkScfGCKyYegyEt20F7M/VGtXKyh+vpxDrYRQ860Qm9QxjyliyvAkWv8wKpkx/ w1+A== X-Gm-Message-State: AO0yUKXKph2n1+DAMX97Qz1aoXETegBLY27pnIJ1QbY/xs8Fcl7N+wD+ kqYoCS65BH2TQtDzr5g12eXOJ3y96ZvW X-Google-Smtp-Source: AK7set+yJFd50Jozx+ouelF1ogOjQJRtgJa/RcuiNxmep7BHS5FC/WtuO2elD1uMUOxK0PZIvO7lHSndpLB/ X-Received: from mizhang-super.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:1071]) (user=mizhang job=sendgmr) by 2002:a05:6a00:10:b0:5a8:dd21:cbe3 with SMTP id h16-20020a056a00001000b005a8dd21cbe3mr630563pfk.45.1676400380622; Tue, 14 Feb 2023 10:46:20 -0800 (PST) Reply-To: Mingwei Zhang Date: Tue, 14 Feb 2023 18:46:00 +0000 In-Reply-To: <20230214184606.510551-1-mizhang@google.com> Mime-Version: 1.0 References: <20230214184606.510551-1-mizhang@google.com> X-Mailer: git-send-email 2.39.1.581.gbfd45094c4-goog Message-ID: <20230214184606.510551-2-mizhang@google.com> Subject: [PATCH v2 1/7] KVM: selftests: x86: Add a working xstate data structure From: Mingwei Zhang To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, Mingwei Zhang , Jim Mattson , Venkatesh Srinivas , Aaron Lewis , "Chang S. Bae" Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org Add a working xstate data structure for the usage of AMX and potential future usage on other xstate components. AMX selftest requires checking both the xstate_bv and xcomp_bv. Existing code relies on pointer arithmetics to fetch xstate_bv and does not support xcomp_bv. So, add a working xstate data structure into processor.h for x86. Suggested-by: Sean Christopherson Signed-off-by: Mingwei Zhang --- .../selftests/kvm/include/x86_64/processor.h | 12 +++++++ tools/testing/selftests/kvm/x86_64/amx_test.c | 36 ++++++------------- 2 files changed, 23 insertions(+), 25 deletions(-) diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools/testing/selftests/kvm/include/x86_64/processor.h index 2a5f47d51388..8110fdfd0d01 100644 --- a/tools/testing/selftests/kvm/include/x86_64/processor.h +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h @@ -45,6 +45,18 @@ #define X86_CR4_SMAP (1ul << 21) #define X86_CR4_PKE (1ul << 22) +struct xstate_header { + u64 xstate_bv; + u64 xcomp_bv; + u64 reserved[6]; +} __attribute__((packed)); + +struct xstate { + u8 i387[512]; + struct xstate_header header; + u8 extended_state_area[0]; +} __attribute__ ((packed, aligned (64))); + /* Note, these are ordered alphabetically to match kvm_cpuid_entry2. Eww. */ enum cpuid_output_regs { KVM_CPUID_EAX, diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c index bd72c6eb3b67..d506821a5a26 100644 --- a/tools/testing/selftests/kvm/x86_64/amx_test.c +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c @@ -41,10 +41,6 @@ #define XSAVE_HDR_OFFSET 512 -struct xsave_data { - u8 area[XSAVE_SIZE]; -} __aligned(64); - struct tile_config { u8 palette_id; u8 start_row; @@ -103,13 +99,13 @@ static inline void __tilerelease(void) asm volatile(".byte 0xc4, 0xe2, 0x78, 0x49, 0xc0" ::); } -static inline void __xsavec(struct xsave_data *data, uint64_t rfbm) +static inline void __xsavec(struct xstate *xstate, uint64_t rfbm) { uint32_t rfbm_lo = rfbm; uint32_t rfbm_hi = rfbm >> 32; asm volatile("xsavec (%%rdi)" - : : "D" (data), "a" (rfbm_lo), "d" (rfbm_hi) + : : "D" (xstate), "a" (rfbm_lo), "d" (rfbm_hi) : "memory"); } @@ -158,16 +154,6 @@ static void set_tilecfg(struct tile_config *cfg) } } -static void set_xstatebv(void *data, uint64_t bv) -{ - *(uint64_t *)(data + XSAVE_HDR_OFFSET) = bv; -} - -static u64 get_xstatebv(void *data) -{ - return *(u64 *)(data + XSAVE_HDR_OFFSET); -} - static void init_regs(void) { uint64_t cr4, xcr0; @@ -184,7 +170,7 @@ static void init_regs(void) static void __attribute__((__flatten__)) guest_code(struct tile_config *amx_cfg, struct tile_data *tiledata, - struct xsave_data *xsave_data) + struct xstate *xstate) { init_regs(); check_cpuid_xsave(); @@ -205,9 +191,9 @@ static void __attribute__((__flatten__)) guest_code(struct tile_config *amx_cfg, __tilerelease(); GUEST_SYNC(5); /* bit 18 not in the XCOMP_BV after xsavec() */ - set_xstatebv(xsave_data, XFEATURE_MASK_XTILEDATA); - __xsavec(xsave_data, XFEATURE_MASK_XTILEDATA); - GUEST_ASSERT((get_xstatebv(xsave_data) & XFEATURE_MASK_XTILEDATA) == 0); + xstate->header.xstate_bv = XFEATURE_MASK_XTILEDATA; + __xsavec(xstate, XFEATURE_MASK_XTILEDATA); + GUEST_ASSERT(!(xstate->header.xstate_bv & XFEATURE_MASK_XTILEDATA)); /* xfd=0x40000, disable amx tiledata */ wrmsr(MSR_IA32_XFD, XFEATURE_MASK_XTILEDATA); @@ -244,7 +230,7 @@ int main(int argc, char *argv[]) struct kvm_run *run; struct kvm_x86_state *state; int xsave_restore_size; - vm_vaddr_t amx_cfg, tiledata, xsavedata; + vm_vaddr_t amx_cfg, tiledata, xstate; struct ucall uc; u32 amx_offset; int stage, ret; @@ -284,10 +270,10 @@ int main(int argc, char *argv[]) tiledata = vm_vaddr_alloc_pages(vm, 2); memset(addr_gva2hva(vm, tiledata), rand() | 1, 2 * getpagesize()); - /* xsave data for guest_code */ - xsavedata = vm_vaddr_alloc_pages(vm, 3); - memset(addr_gva2hva(vm, xsavedata), 0, 3 * getpagesize()); - vcpu_args_set(vcpu, 3, amx_cfg, tiledata, xsavedata); + /* XSAVE state for guest_code */ + xstate = vm_vaddr_alloc_pages(vm, DIV_ROUND_UP(XSAVE_SIZE, PAGE_SIZE)); + memset(addr_gva2hva(vm, xstate), 0, DIV_ROUND_UP(XSAVE_SIZE, PAGE_SIZE)); + vcpu_args_set(vcpu, 3, amx_cfg, tiledata, xstate); for (stage = 1; ; stage++) { vcpu_run(vcpu); From patchwork Tue Feb 14 18:46:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mingwei Zhang X-Patchwork-Id: 13140719 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 157AEC64ED8 for ; Tue, 14 Feb 2023 18:46:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233041AbjBNSqY (ORCPT ); Tue, 14 Feb 2023 13:46:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39312 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232889AbjBNSqY (ORCPT ); Tue, 14 Feb 2023 13:46:24 -0500 Received: from mail-pl1-x64a.google.com (mail-pl1-x64a.google.com [IPv6:2607:f8b0:4864:20::64a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 95B9F25B98 for ; Tue, 14 Feb 2023 10:46:22 -0800 (PST) Received: by mail-pl1-x64a.google.com with SMTP id h5-20020a170902748500b0019aacd1fb04so2520817pll.2 for ; Tue, 14 Feb 2023 10:46:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=5nUSaAHTCtcISA3mdIgge3B10pS6vcmVmT5MYhffil4=; b=ZTtGmMonLp63QLXd3+qi7ZNjcLN08BBqVEFbE3+QZzT8r/Pvq6CIEIGkJohT90B8R6 Bjpx1TI25787jVCqUdpEHMgeHJvFIM+nIpyq8XN3inXL4spBTFSwqXwQZnhoZiBQzJO6 TN+GES4KnuSQWeoAnQ4EAPgfIVhNAudXijByl3hE8hl2j4fi1LWLZYCYu9CdvXUxaZ+u whraXb0fPSbe/bqB67ELNCxCUtB7C5sm77ANXkef5sRLCRoQqMBaN9IQ5ZVI5yJYOoTD LYXZbCC5CA9silAM3ISnSO2mnYZASaUQMaJVmym+J7JMADsXMw8yOX1wcizMa5EDG6+W muJA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=5nUSaAHTCtcISA3mdIgge3B10pS6vcmVmT5MYhffil4=; b=AqMFcmXNhz5x9Tahx+SWBtHz6jb0b4VOPL5zppThN2tXSlJUJNX61LLcght6hQ6O0S sxng+2qgIqAU1+nW+luMc2sFuJX6ZtsOSBlSmOmSzaQmUCbHCf8+d98ZzhmGivg4GrLh FE2VZ2dajDhvgsXn77kSk+1GgSHUb5oEYeN2MmeAu+PlDqcmwExGr73LAobpSjgzkp/p aqXCQgqS6Wtf+eirZebBUMTd9N1+67OdAgkPLctnoXhpUQSgj+W0GeJ31KS1GGKDnNxU QRkSL10SxQWt/J4aay8rRInUIDZ8R0YfnpM0Xj/LeWyCwUPV5+8IcUfydKK/Q5jxuz2r 1P9Q== X-Gm-Message-State: AO0yUKUWD5q0TMgLfFwnR9sJCB+dkOhOBputImo1y/E+9FMk8dQUwxFp mSvF1Rlq1+geT6vv5sD2n9FrpFaEeZdI X-Google-Smtp-Source: AK7set+TikdqMEeRUvVc4ODDzinFrSvu9UtzSrnUkSE7ruTqGTaliOA/CLOW87EdIftH6vdxa9RhB7caRSYZ X-Received: from mizhang-super.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:1071]) (user=mizhang job=sendgmr) by 2002:a63:6dc7:0:b0:4fb:ba81:7143 with SMTP id i190-20020a636dc7000000b004fbba817143mr63323pgc.0.1676400382093; Tue, 14 Feb 2023 10:46:22 -0800 (PST) Reply-To: Mingwei Zhang Date: Tue, 14 Feb 2023 18:46:01 +0000 In-Reply-To: <20230214184606.510551-1-mizhang@google.com> Mime-Version: 1.0 References: <20230214184606.510551-1-mizhang@google.com> X-Mailer: git-send-email 2.39.1.581.gbfd45094c4-goog Message-ID: <20230214184606.510551-3-mizhang@google.com> Subject: [PATCH v2 2/7] KVM: selftests: x86: Fix an error in comment of amx_test From: Mingwei Zhang To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, Mingwei Zhang , Jim Mattson , Venkatesh Srinivas , Aaron Lewis , "Chang S. Bae" Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org After the execution of __tilerelease(), AMX component will be in INIT state. Therefore, execution of XSAVEC saving the AMX state into memory will cause the xstate_bv[18] cleared in xheader. However, the xcomp_bv[18] will remain set. Fix the error in comment. Also, update xsavec() to XSAVEC because xcomp_bv[18] is set due to the instruction, not the function. Finally, use XTILEDATA instead 'bit 18' in comments. Cc: Jim Mattson Cc: Venkatesh Srinivas Cc: Aaron Lewis Signed-off-by: Mingwei Zhang --- tools/testing/selftests/kvm/x86_64/amx_test.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c index d506821a5a26..aac727ff7cf8 100644 --- a/tools/testing/selftests/kvm/x86_64/amx_test.c +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c @@ -190,7 +190,10 @@ static void __attribute__((__flatten__)) guest_code(struct tile_config *amx_cfg, GUEST_SYNC(4); __tilerelease(); GUEST_SYNC(5); - /* bit 18 not in the XCOMP_BV after xsavec() */ + /* + * After XSAVEC, XTILEDATA is cleared in the xstate_bv but is set in + * the xcomp_bv. + */ xstate->header.xstate_bv = XFEATURE_MASK_XTILEDATA; __xsavec(xstate, XFEATURE_MASK_XTILEDATA); GUEST_ASSERT(!(xstate->header.xstate_bv & XFEATURE_MASK_XTILEDATA)); From patchwork Tue Feb 14 18:46:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mingwei Zhang X-Patchwork-Id: 13140720 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 52363C05027 for ; Tue, 14 Feb 2023 18:46:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233210AbjBNSq3 (ORCPT ); Tue, 14 Feb 2023 13:46:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39492 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233117AbjBNSq2 (ORCPT ); Tue, 14 Feb 2023 13:46:28 -0500 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 332AF2FCE1 for ; Tue, 14 Feb 2023 10:46:25 -0800 (PST) Received: by mail-yb1-xb4a.google.com with SMTP id e191-20020a2537c8000000b009433a21be0dso1393299yba.19 for ; Tue, 14 Feb 2023 10:46:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=yFTrZ49NPc/OCN422DTCBQnAUieTNXYf1AUTcxKKvJo=; b=HkiNOU0OtF0CfkY42/ahYT9mmm4slpuv+KGwhyzZGBxJ7S+wC9r1M0X7JT9YhltQca VKbAk2ZR15AQcB6XBfCFC5nNuXzWQcCApf8nWUiAAuIq1Oym4XMmrfaWRHJljB8ceTkh W7ci1QAam82T757rvrhOmt6xe08JQcIQS5lImc48pPMqdSVDQwnZQ4WlxGBZ2BJU5CMP Sh2yCuKp9LYj106cTZoHjb6wRLvUHqInuWShbiLlngs+0OVkIwzDTCFW1mw0QMhSYI6o IITMqyO6TEyQFx4rLl9qwosAhabd2sb6poZ8UZchfe0jMzMDHNMus26SuAFvmp1IpJNJ LhSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=yFTrZ49NPc/OCN422DTCBQnAUieTNXYf1AUTcxKKvJo=; b=EExyZUFlN+dmFTF5XD8/fWNTliFCuCr66peN0SFUb5qQOcEqnVAfXlTIAGlgDkn2Zv dJKkVb71qcg2wwv6tr+OZfzD/9rijLib5tWyz88t7rqqL1vzd8yjFoiMGF0mLHBDjqCf u/VTOoD0XlTyEU4o9LrL0NfsUp/bcNJzOOFfk+hV7lZKN69f0K9B7Emycb1FOAdIW4kn neVEznoKG1LxaP6FIpi1QdGYqrgUph3xUFqsFL0EoITO/LODI+sr+E0dH4OKs3XK4IkF krgsO9sXcrV4oMbj40lMaof2voIVjMaV1UFRO0+9YGBKu8XOuuMTl9O2WULPkW5pMGPL H4Gg== X-Gm-Message-State: AO0yUKU9yN5jFx2eI2JhhQqsCfHRkEkof/OcJS7IJCd6Dtw5Y3CFJS/T NFugPjk8sVIpeQy9wd3WcaadmXjST8Cd X-Google-Smtp-Source: AK7set9KuUaNnI3Q0H0pQH8TJTXywQ56ZpibfOMhNc75iu7Y8nfC8wCG/aWVPnx016Mn3unZW4Bcbn+4Mbyx X-Received: from mizhang-super.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:1071]) (user=mizhang job=sendgmr) by 2002:a05:6902:110f:b0:8da:f656:8da6 with SMTP id o15-20020a056902110f00b008daf6568da6mr30ybu.7.1676400383934; Tue, 14 Feb 2023 10:46:23 -0800 (PST) Reply-To: Mingwei Zhang Date: Tue, 14 Feb 2023 18:46:02 +0000 In-Reply-To: <20230214184606.510551-1-mizhang@google.com> Mime-Version: 1.0 References: <20230214184606.510551-1-mizhang@google.com> X-Mailer: git-send-email 2.39.1.581.gbfd45094c4-goog Message-ID: <20230214184606.510551-4-mizhang@google.com> Subject: [PATCH v2 3/7] KVM: selftests: x86: Add check of CR0.TS in the #NM handler in amx_test From: Mingwei Zhang To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, Mingwei Zhang , Jim Mattson , Venkatesh Srinivas , Aaron Lewis , "Chang S. Bae" Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org Add check of CR0.TS[bit 3] before the check of IA32_XFD_ERR in the #NM handler in amx_test. This is because XFD may not be the only reason of the IA32_XFD MSR and the bitmap corresponding to the state components required by the faulting instruction." (Intel SDM vol 1. Section 13.14) Add the missing check of CR0.TS. Signed-off-by: Mingwei Zhang --- tools/testing/selftests/kvm/x86_64/amx_test.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c index aac727ff7cf8..847752998660 100644 --- a/tools/testing/selftests/kvm/x86_64/amx_test.c +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c @@ -215,6 +215,7 @@ void guest_nm_handler(struct ex_regs *regs) { /* Check if #NM is triggered by XFEATURE_MASK_XTILEDATA */ GUEST_SYNC(7); + GUEST_ASSERT((get_cr0() & X86_CR0_TS) == 0); GUEST_ASSERT(rdmsr(MSR_IA32_XFD_ERR) == XFEATURE_MASK_XTILEDATA); GUEST_SYNC(8); GUEST_ASSERT(rdmsr(MSR_IA32_XFD_ERR) == XFEATURE_MASK_XTILEDATA); From patchwork Tue Feb 14 18:46:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mingwei Zhang X-Patchwork-Id: 13140721 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B5C37C6379F for ; Tue, 14 Feb 2023 18:46:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233441AbjBNSqd (ORCPT ); Tue, 14 Feb 2023 13:46:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39586 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233178AbjBNSq2 (ORCPT ); Tue, 14 Feb 2023 13:46:28 -0500 Received: from mail-pl1-x64a.google.com (mail-pl1-x64a.google.com [IPv6:2607:f8b0:4864:20::64a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D371630283 for ; Tue, 14 Feb 2023 10:46:26 -0800 (PST) Received: by mail-pl1-x64a.google.com with SMTP id h5-20020a170902748500b0019aacd1fb04so2520929pll.2 for ; Tue, 14 Feb 2023 10:46:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=3bW5FuKrIfXRo88FKUNDpYqHZp7+18tX4wacmmrm8Gk=; b=aB+fVOG0ZogMNPWQZ2b1Wf3xANIRYlugnuwlbdPPGPEHz6wvWyQ3TNUhDEGEfmqq0m TymQAkocu2l38TVGBDqJRcGkKsMZtKKGls3r3ORrZOQ3gmRHFd7nDtml1wqoiuAtyBU0 2Pn/wGx/LAhcM8siOvd/nLPYmZOXZA/Yn0k35vv1/jU16Ulmua9W/NLy9ifYxf4eOFhN Mrms9i+uHgqEW9d1sVT5rY+M9Ui9+ImWRApVZjuOQTg2PpKYUAehBZ2qWD6W8iocMU/L goLl3zrgBxV2lL+KJAI/4taxOisx85I7gG+m1FIKQjVjRn8ldQmhSqY5G3hYDh5VNqFV fDRQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=3bW5FuKrIfXRo88FKUNDpYqHZp7+18tX4wacmmrm8Gk=; b=5oxqd8UK/tp+KIv3YYeRcDuLkBVqgAraU9aq30RlhDJzfQs+BoinV6ZUgqKm7rM6WK /WDZso0o+FrMZhxj5qhH9Opnt/n+nIJFZXqoFx2j421Fa2uH70nNxJRXhhYixAGpgRLv 76JUMRhI568zic5iF+YLXH/IAwGSc6K1aKia74zMxcuZg/0W5R0FBY5kft6strHuNqVS NVSFRwHwBX029eQTejHJpvZLhqBPGGbFudol/TtnLk9eS79YAgwsjfboOBSFqt+MZ8dx duFIaSAgUfLhfIbeioe0sSkItunmtqmVq9XJPtQWVrJmttQF6PAnXncHH1vsduDtpWpS /zOg== X-Gm-Message-State: AO0yUKWnTU7xQFvwU4JqX8F5JIPkpbmulmvY9dKCNb0JHL3sPFnfiP8Q UhW8PefRq5AW4vMUIhRCjeWRCm34Arp+ X-Google-Smtp-Source: AK7set9WUSpyDoSjh/Xxe2GtC0MW65lxlPEcpJKTam+H34pLso9YWFBBVwE8KxMflLxS11pdrY6LOmflZhQm X-Received: from mizhang-super.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:1071]) (user=mizhang job=sendgmr) by 2002:a63:3dc4:0:b0:4fb:58bf:d25f with SMTP id k187-20020a633dc4000000b004fb58bfd25fmr62667pga.7.1676400386299; Tue, 14 Feb 2023 10:46:26 -0800 (PST) Reply-To: Mingwei Zhang Date: Tue, 14 Feb 2023 18:46:03 +0000 In-Reply-To: <20230214184606.510551-1-mizhang@google.com> Mime-Version: 1.0 References: <20230214184606.510551-1-mizhang@google.com> X-Mailer: git-send-email 2.39.1.581.gbfd45094c4-goog Message-ID: <20230214184606.510551-5-mizhang@google.com> Subject: [PATCH v2 4/7] KVM: selftests: Add the XFD check to IA32_XFD in #NM handler From: Mingwei Zhang To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, Mingwei Zhang , Jim Mattson , Venkatesh Srinivas , Aaron Lewis , "Chang S. Bae" Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org Add an extra check to IA32_XFD to ensure the behavior is consistent with the AMX archtecture. In addition, repeat the checks across context switch to ensure the values of IA32_XFD and IA32_XFD_ERR are well preserved. Signed-off-by: Mingwei Zhang --- tools/testing/selftests/kvm/x86_64/amx_test.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c index 847752998660..44c907215343 100644 --- a/tools/testing/selftests/kvm/x86_64/amx_test.c +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c @@ -217,8 +217,10 @@ void guest_nm_handler(struct ex_regs *regs) GUEST_SYNC(7); GUEST_ASSERT((get_cr0() & X86_CR0_TS) == 0); GUEST_ASSERT(rdmsr(MSR_IA32_XFD_ERR) == XFEATURE_MASK_XTILEDATA); + GUEST_ASSERT(rdmsr(MSR_IA32_XFD) & XFEATURE_MASK_XTILEDATA); GUEST_SYNC(8); GUEST_ASSERT(rdmsr(MSR_IA32_XFD_ERR) == XFEATURE_MASK_XTILEDATA); + GUEST_ASSERT(rdmsr(MSR_IA32_XFD) & XFEATURE_MASK_XTILEDATA); /* Clear xfd_err */ wrmsr(MSR_IA32_XFD_ERR, 0); /* xfd=0, enable amx */ From patchwork Tue Feb 14 18:46:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mingwei Zhang X-Patchwork-Id: 13140722 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 55D4CC05027 for ; Tue, 14 Feb 2023 18:46:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233329AbjBNSqj (ORCPT ); Tue, 14 Feb 2023 13:46:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39588 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233343AbjBNSqb (ORCPT ); Tue, 14 Feb 2023 13:46:31 -0500 Received: from mail-pl1-x64a.google.com (mail-pl1-x64a.google.com [IPv6:2607:f8b0:4864:20::64a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F2E852F79C for ; Tue, 14 Feb 2023 10:46:28 -0800 (PST) Received: by mail-pl1-x64a.google.com with SMTP id jn16-20020a170903051000b00198f5741d23so9562038plb.18 for ; Tue, 14 Feb 2023 10:46:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=7uxY5HEkDwcZZuAHavQWO22Vrq80QNHmWiRNorTGn5M=; b=k6jyHH/fo402XGiKzCkPmNeQxvWT/0j/dzTZ3oRJINHoyfJjHfah2NgP/YbXYVBSMS r4rrwYLddzVocM0gztsCewVyiyPhV6bpdtxJId4hmcPrCqpo+MD82WyjmVOa1r0hF+CT SFmTR7MX6CWLebu8+IrY9TauVnMb7u/FQo6tNfKEZar9wtt8PjAm6E+nQ0BIiBUakE4x K4+A+tXmINfBvTS6yDjgHeb993ZzPFb+Zs8rCUYRl05n6uylqcERYPRrBGuTabqiP4HZ AVOHw3689Megm8h2j9fsXtg8yJfvPT1IKVPil1j0oG9ESksT7qLq6VTjgzh+zo4LY8e2 WPLg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=7uxY5HEkDwcZZuAHavQWO22Vrq80QNHmWiRNorTGn5M=; b=xaT9kbIGGvJb9L06A2KyKVkGBpchAwf88szPu5w0/vl+6OFS06uL/JcDou82sGrAeM CarVC0Z5V0pGGRphTlswlf5trjzkFnF+fPOzXTxzERNGPijKuEFtZreRq/S8C6B+pywC WGHyLOCgmDXtOaVFesLG3qoMVad6LEj6GFH7jVwsfN3F24JmhN6O5aYPW3FhhJmmdx+P RAYHUT8w9lgCJUYPwfK6NFRNV5k2ia3ZzpNrUvv3chcMaUPjG688taTgqw9dY14OWiQ7 GfQiAIzJGjLDZWqhkjoSCvif1NZZ2a8i0VUxDSd5JFoK4Vjd47WAXhYMAYTE634qcUOJ PGZg== X-Gm-Message-State: AO0yUKXLGzsBzDVHj/PBSpKiwEscibdfX1k9sc1z1y2gA2uEzhdpo4r7 3fxiTknT6MvV4288AJX05af1rvRDdM4r X-Google-Smtp-Source: AK7set+NnusIEZKiPfoYABOZJdE9wp2ItLIFuMmQ30K7vI1Ff5Ug1HI4/A/3gL2fmhdtCIQKOA6ETq4gKJIo X-Received: from mizhang-super.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:1071]) (user=mizhang job=sendgmr) by 2002:a17:90a:c7:b0:234:5380:7f80 with SMTP id v7-20020a17090a00c700b0023453807f80mr778pjd.1.1676400388078; Tue, 14 Feb 2023 10:46:28 -0800 (PST) Reply-To: Mingwei Zhang Date: Tue, 14 Feb 2023 18:46:04 +0000 In-Reply-To: <20230214184606.510551-1-mizhang@google.com> Mime-Version: 1.0 References: <20230214184606.510551-1-mizhang@google.com> X-Mailer: git-send-email 2.39.1.581.gbfd45094c4-goog Message-ID: <20230214184606.510551-6-mizhang@google.com> Subject: [PATCH v2 5/7] KVM: selftests: Fix the checks to XFD_ERR using and operation From: Mingwei Zhang To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, Mingwei Zhang , Jim Mattson , Venkatesh Srinivas , Aaron Lewis , "Chang S. Bae" Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org Fix the checks to XFD_ERR using logical AND operation because XFD_ERR might contain more information in the future. According Intel SDM Vol 1. 13.14: "Specifically, the MSR is loaded with the logical AND of the IA32_XFD MSR and the bitmap corresponding to the state component(s) required by the faulting instruction." So fix the check by using AND instead of '=='. Signed-off-by: Mingwei Zhang --- tools/testing/selftests/kvm/x86_64/amx_test.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c index 44c907215343..bd8bd9936f8e 100644 --- a/tools/testing/selftests/kvm/x86_64/amx_test.c +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c @@ -216,10 +216,10 @@ void guest_nm_handler(struct ex_regs *regs) /* Check if #NM is triggered by XFEATURE_MASK_XTILEDATA */ GUEST_SYNC(7); GUEST_ASSERT((get_cr0() & X86_CR0_TS) == 0); - GUEST_ASSERT(rdmsr(MSR_IA32_XFD_ERR) == XFEATURE_MASK_XTILEDATA); + GUEST_ASSERT(rdmsr(MSR_IA32_XFD_ERR) & XFEATURE_MASK_XTILEDATA); GUEST_ASSERT(rdmsr(MSR_IA32_XFD) & XFEATURE_MASK_XTILEDATA); GUEST_SYNC(8); - GUEST_ASSERT(rdmsr(MSR_IA32_XFD_ERR) == XFEATURE_MASK_XTILEDATA); + GUEST_ASSERT(rdmsr(MSR_IA32_XFD_ERR) & XFEATURE_MASK_XTILEDATA); GUEST_ASSERT(rdmsr(MSR_IA32_XFD) & XFEATURE_MASK_XTILEDATA); /* Clear xfd_err */ wrmsr(MSR_IA32_XFD_ERR, 0); From patchwork Tue Feb 14 18:46:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mingwei Zhang X-Patchwork-Id: 13140723 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2F27FC64EC7 for ; Tue, 14 Feb 2023 18:46:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233213AbjBNSqn (ORCPT ); Tue, 14 Feb 2023 13:46:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40286 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231964AbjBNSqi (ORCPT ); Tue, 14 Feb 2023 13:46:38 -0500 Received: from mail-pl1-x649.google.com (mail-pl1-x649.google.com [IPv6:2607:f8b0:4864:20::649]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A9C36302B6 for ; Tue, 14 Feb 2023 10:46:30 -0800 (PST) Received: by mail-pl1-x649.google.com with SMTP id h15-20020a170902f7cf00b0019a819e2d93so6180791plw.4 for ; Tue, 14 Feb 2023 10:46:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=6RZ7TspMKDDk7tmMAFyvIRoGpdz/k0McGOaNtuOXScs=; b=mHLMbcVVgMDEwYayJ9YUqi2Dw/jj0GYAjAZKWXI4WKsLDy/gyCPJJ0nf7Qy2PNmSyp k6KjMqwph6digoMqvido6AvIDuV+z+trxmm7HluclADFe1vYGJfovo80iN7x5D3Ni8aj RncvhqsMaqT+sRK+wYRVHs8u94Y6vhKS4jWU3AHQmyXPGprS0/tuVqk08DitnA0wlGWg VSfm0DI1b1QvgzpNC7HkBN6EaboH9RGMY5tCaCfxK3sq0IOjGdLvYMfEtrW7q0L9ADrb rNGLC+ah7weJiVsJSeqmbOjqWuXkrRTroxPUja7wHZgIxhi2NRChj/KcnUDNyRnb9GNe aQhg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=6RZ7TspMKDDk7tmMAFyvIRoGpdz/k0McGOaNtuOXScs=; b=4KW3quEEjitD098dU6NEcCsmZFJuMyLgwukjj6bHq7L53idPhUgfJMmU7fBPD3Grzf 1kHKXMMJnIl7NEffsgCUcI6CLzBNA3EgMi28ox2y6f081Utrye6jRA9oks5kRpGyAaVS fCI+eUApGAQPxygibJTens4dLUGmayvCyV9Jt06VU9A5s592Iqwp9LAZJs8lYhGRhBcb 5rl5G1EXM2hgJNtdwsqb21bboEQOd1pWYUyiVV2U7BKbhc/vklK8Bzdga45NXyLDmGU7 4hXWzR0LwW4BAEP/RhgrbSJtAKvCN4WagqILMmhmbFLUjU6thHUw0QljsaqYamXDnaiW iaaQ== X-Gm-Message-State: AO0yUKXaol3PfLE9gFDp7vDSEGvSZip8y9dpOBML5UsXDeEmHRcOTVGV aqKh0sbb7wbVtndL0mdLjVjgZ9QrHPj3 X-Google-Smtp-Source: AK7set/dCoOrkzvEF9g82ilEvxmu8NS4Fkw+W9zyWTu/n8cDaqHWmQp5aPVWu/ReyfWEMU8QXVaMyzvYJTPx X-Received: from mizhang-super.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:1071]) (user=mizhang job=sendgmr) by 2002:a63:3855:0:b0:4fb:d300:c637 with SMTP id h21-20020a633855000000b004fbd300c637mr63299pgn.6.1676400389768; Tue, 14 Feb 2023 10:46:29 -0800 (PST) Reply-To: Mingwei Zhang Date: Tue, 14 Feb 2023 18:46:05 +0000 In-Reply-To: <20230214184606.510551-1-mizhang@google.com> Mime-Version: 1.0 References: <20230214184606.510551-1-mizhang@google.com> X-Mailer: git-send-email 2.39.1.581.gbfd45094c4-goog Message-ID: <20230214184606.510551-7-mizhang@google.com> Subject: [PATCH v2 6/7] KVM: selftests: x86: Enable checking on xcomp_bv in amx_test From: Mingwei Zhang To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, Mingwei Zhang , Jim Mattson , Venkatesh Srinivas , Aaron Lewis , "Chang S. Bae" Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org After tilerelease instruction, AMX tiles are in INIT state. According to Intel SDM vol 1. 13.10: "If RFBM[i] = 1, XSTATE_BV[i] is set to the value of XINUSE[i].", XSTATE_BV[18] should be cleared after xsavec. On the other hand, according to Intel SDM vol 1. 13.4.3: "If XCOMP_BV[i] = 1, state component i is located at a byte offset locationI from the base address of the XSAVE area". Since at the time of xsavec, XCR0[18] is set indicating AMX tile data component is still enabled, xcomp_bv[18] should be set. Complete the checks by adding the assert to xcomp_bv[18] after xsavec. Signed-off-by: Mingwei Zhang --- tools/testing/selftests/kvm/x86_64/amx_test.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c index bd8bd9936f8e..0e4c65f9e2f2 100644 --- a/tools/testing/selftests/kvm/x86_64/amx_test.c +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c @@ -197,6 +197,7 @@ static void __attribute__((__flatten__)) guest_code(struct tile_config *amx_cfg, xstate->header.xstate_bv = XFEATURE_MASK_XTILEDATA; __xsavec(xstate, XFEATURE_MASK_XTILEDATA); GUEST_ASSERT(!(xstate->header.xstate_bv & XFEATURE_MASK_XTILEDATA)); + GUEST_ASSERT((xstate->header.xcomp_bv & XFEATURE_MASK_XTILEDATA)); /* xfd=0x40000, disable amx tiledata */ wrmsr(MSR_IA32_XFD, XFEATURE_MASK_XTILEDATA); From patchwork Tue Feb 14 18:46:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mingwei Zhang X-Patchwork-Id: 13140724 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23732C05027 for ; Tue, 14 Feb 2023 18:46:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233553AbjBNSqy (ORCPT ); Tue, 14 Feb 2023 13:46:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40360 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233176AbjBNSqk (ORCPT ); Tue, 14 Feb 2023 13:46:40 -0500 Received: from mail-pf1-x44a.google.com (mail-pf1-x44a.google.com [IPv6:2607:f8b0:4864:20::44a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 17807303D1 for ; Tue, 14 Feb 2023 10:46:32 -0800 (PST) Received: by mail-pf1-x44a.google.com with SMTP id s4-20020a056a00194400b0058d9b9fecb6so8331969pfk.1 for ; Tue, 14 Feb 2023 10:46:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=e45OX0NDJeq5V2rb+kyK4NF8qvuYK8lS9xJETTcIBfY=; b=dZKwalR76soWtGMo/M8feDWZleE8F9YbvhBn5jO8JQodvtlgXYVbP2EGrU3801TD0y qZ73+c84YWss5A8SySkBl4yjbd5/Sdb9gX8yrAhd8ZDXv3BGLwH7I7oSt+MdL3y7KsfG Ax5xYOxRWQCfS4AMl1Bn5wfNiLbvTkEblo1oqACBQy4blH/k4aS5QPnbDwXs3q3SwMaA Z2P0/jyyYL1IRfYgvFR1GVcBLZD+mpcMLUJ+m0MNq1Sdc9SweqA6lyI/wW4fMAb/HxTy NhrEoJVgUbXAd8RbJeCwCZcad7WhTgasXlKj8/OO5iXOlPFjN13GumPwwidYLsqwbhXk PoAA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=e45OX0NDJeq5V2rb+kyK4NF8qvuYK8lS9xJETTcIBfY=; b=PVezDSNO7mdDx+iA20oAKbZsahobjOvw20TZhYJMNck+jyk0ubPurlyDmBpei7L0Nq 6vxm7wQkZF8ppFFfytGy/vLWu658qrOqXhLkPydWbSUL55k27RDD08iKf7jtEcww67fi i9DkqBNlkfJMbq9W1MSVOZpdX92ASbpaVcHuRhOaKtcR0nfM+5h28A7tXeYY/dkL7uoB FtxLpKHK2kZLzTibi/qMNU3Wel2I0SO1w1G1Lc3d26aX8qodVQocEtqGy9Sa++9EIB1P 39dUfkLHCufCLXMdgYWy8fVV8vIJu1Hv2FtSaX0cBu9e5AersybDw4ZI+zyP63um49/x 1nhw== X-Gm-Message-State: AO0yUKVAo4m93UcEMi2J2ZOegPTKQabYY6WVBh6VZW4e97C6/aotSRve PGelFKkMwi88ooFTwuYhWOjKo6VK6EVw X-Google-Smtp-Source: AK7set//OVAlomKtVqsffFhmB4sl1HHUTQadW/RJWg56amu5xkKi7jMMXJu5dXgWFGhOHPGvtD2SDMH++G7n X-Received: from mizhang-super.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:1071]) (user=mizhang job=sendgmr) by 2002:a63:3f81:0:b0:4fb:92bb:a648 with SMTP id m123-20020a633f81000000b004fb92bba648mr64175pga.7.1676400391579; Tue, 14 Feb 2023 10:46:31 -0800 (PST) Reply-To: Mingwei Zhang Date: Tue, 14 Feb 2023 18:46:06 +0000 In-Reply-To: <20230214184606.510551-1-mizhang@google.com> Mime-Version: 1.0 References: <20230214184606.510551-1-mizhang@google.com> X-Mailer: git-send-email 2.39.1.581.gbfd45094c4-goog Message-ID: <20230214184606.510551-8-mizhang@google.com> Subject: [PATCH v2 7/7] KVM: selftests: x86: Repeat the checking of xheader when IA32_XFD[XTILEDATA] is set in amx_test From: Mingwei Zhang To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, Mingwei Zhang , Jim Mattson , Venkatesh Srinivas , Aaron Lewis , "Chang S. Bae" Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org Repeat the checking of AMX component in xheader after XSAVEC when IA32_XFD[XTILEDATA] is set. This check calibrates the functionality scope of IA32_XFD: it does not intercept the XSAVE state management. Regardless of the values in IA32_XFD, AMX component state will still be managed by XSAVE* and XRSTOR* as long as the corresponding bits are set XCR0. Signed-off-by: Mingwei Zhang --- tools/testing/selftests/kvm/x86_64/amx_test.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c index 0e4c65f9e2f2..d991a473dc11 100644 --- a/tools/testing/selftests/kvm/x86_64/amx_test.c +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c @@ -201,6 +201,16 @@ static void __attribute__((__flatten__)) guest_code(struct tile_config *amx_cfg, /* xfd=0x40000, disable amx tiledata */ wrmsr(MSR_IA32_XFD, XFEATURE_MASK_XTILEDATA); + + /* + * XTILEDATA is cleared in xstate_bv but set in xcomp_bv, this property + * remains the same even when amx tiledata is disabled by IA32_XFD. + */ + xstate->header.xstate_bv = XFEATURE_MASK_XTILEDATA; + __xsavec(xstate, XFEATURE_MASK_XTILEDATA); + GUEST_ASSERT(!(xstate->header.xstate_bv & XFEATURE_MASK_XTILEDATA)); + GUEST_ASSERT((xstate->header.xcomp_bv & XFEATURE_MASK_XTILEDATA)); + GUEST_SYNC(6); GUEST_ASSERT(rdmsr(MSR_IA32_XFD) == XFEATURE_MASK_XTILEDATA); set_tilecfg(amx_cfg);