From patchwork Tue Feb 14 23:44:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Joseph, Jithu" X-Patchwork-Id: 13141036 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 97967C6379F for ; Tue, 14 Feb 2023 23:45:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232381AbjBNXp4 (ORCPT ); Tue, 14 Feb 2023 18:45:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60444 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229725AbjBNXp4 (ORCPT ); Tue, 14 Feb 2023 18:45:56 -0500 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 44FCC2CC42; Tue, 14 Feb 2023 15:45:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1676418355; x=1707954355; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=RJlwSFVpT1cewwIwRvUfBxfg5OygWbxR/zFOIt+ZgzQ=; b=TibgpoaUuRq5ZSm+amD9pUoPlf57cAzpVsHfNiYJEYNJFvEHO0Mr2Ijj XWYj4GqGiinoLsXETGizxqyVLlI3wRBp+iM7xhDgmXPOFTjelyoEYbUZ3 1CwvhpHeEsykdvBraNpVWdmdMfPcNF3LQKnicj7y8GRxgduu0yi4I8PYf XsX+Mvt3db+S9vgiwB6iIFAYt/m2JclUmcZkxj09rcoA6/te3JI0smBFC OWH9B5XibHvVQpcvCPIlwkvBwwU48GbhFnfuZ/AuWnP6ouw67KA6+nFrv qB9XVCwE86qhFGXoTH4wsWu2clxlJthdeoTEbhq8OqSw96O06ctyprbm/ g==; X-IronPort-AV: E=McAfee;i="6500,9779,10621"; a="417522992" X-IronPort-AV: E=Sophos;i="5.97,298,1669104000"; d="scan'208";a="417522992" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2023 15:45:54 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10621"; a="669391008" X-IronPort-AV: E=Sophos;i="5.97,298,1669104000"; d="scan'208";a="669391008" Received: from jithujos.sc.intel.com ([172.25.103.66]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2023 15:45:53 -0800 From: Jithu Joseph To: hdegoede@redhat.com, markgross@kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, gregkh@linuxfoundation.org, rostedt@goodmis.org, jithu.joseph@intel.com, ashok.raj@intel.com, tony.luck@intel.com, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, patches@lists.linux.dev, ravi.v.shankar@intel.com, thiago.macieira@intel.com, athenas.jimenez.gonzalez@intel.com, sohil.mehta@intel.com Subject: [PATCH v2 1/7] x86/include/asm/msr-index.h: Add IFS Array test bits Date: Tue, 14 Feb 2023 15:44:20 -0800 Message-Id: <20230214234426.344960-2-jithu.joseph@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230214234426.344960-1-jithu.joseph@intel.com> References: <20230131234302.3997223-1-jithu.joseph@intel.com> <20230214234426.344960-1-jithu.joseph@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Define MSR bitfields for enumerating support for Array BIST test. Signed-off-by: Jithu Joseph Reviewed-by: Tony Luck --- arch/x86/include/asm/msr-index.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index d3fe82c5d6b6..ad8997773ad3 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -197,6 +197,8 @@ /* Abbreviated from Intel SDM name IA32_INTEGRITY_CAPABILITIES */ #define MSR_INTEGRITY_CAPS 0x000002d9 +#define MSR_INTEGRITY_CAPS_ARRAY_BIST_BIT 2 +#define MSR_INTEGRITY_CAPS_ARRAY_BIST BIT(MSR_INTEGRITY_CAPS_ARRAY_BIST_BIT) #define MSR_INTEGRITY_CAPS_PERIODIC_BIST_BIT 4 #define MSR_INTEGRITY_CAPS_PERIODIC_BIST BIT(MSR_INTEGRITY_CAPS_PERIODIC_BIST_BIT) From patchwork Tue Feb 14 23:44:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Joseph, Jithu" X-Patchwork-Id: 13141037 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 36E46C64EC7 for ; Tue, 14 Feb 2023 23:45:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229461AbjBNXp5 (ORCPT ); Tue, 14 Feb 2023 18:45:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60450 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232271AbjBNXp4 (ORCPT ); Tue, 14 Feb 2023 18:45:56 -0500 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B86272BF18; Tue, 14 Feb 2023 15:45:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1676418355; x=1707954355; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Mvhv6zkaH9H97cKt0p0n94x4bwBzoDv9AW5TNmZ4ZsU=; b=Cqq0Gxw76Sylkd4H9mN2Uv+Qoi4mCb+hcCOxr+zFyxtGtbEESUfE6gWL HNrsxiwcvAHu8bITbrZQwiYTD9kqMf7oqZlUJ9g+AS+JE7UaU2taYdtuA 4zYUo/fXS7KuKozxt0vrfkKf5zJAX7EbnQEa0wwXGA/J7BFKqphZIsba8 1TI4mqxAbXhawB6EyRTWaeGN8V59Cj3i2ZotVmPEEaUp0arzVnEbWCXeZ hgpRzl0W2G8KjgSram1AFD4kNvkUWJO9REJfOnwf4fNfnSXAUafWiH/vO 11IFtiozbbWG/v/feXMsZ7WTD1y25fQV8gtoDj9uDN5EKlM23Jd2UmzvN Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10621"; a="417523003" X-IronPort-AV: E=Sophos;i="5.97,298,1669104000"; d="scan'208";a="417523003" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2023 15:45:55 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10621"; a="669391011" X-IronPort-AV: E=Sophos;i="5.97,298,1669104000"; d="scan'208";a="669391011" Received: from jithujos.sc.intel.com ([172.25.103.66]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2023 15:45:54 -0800 From: Jithu Joseph To: hdegoede@redhat.com, markgross@kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, gregkh@linuxfoundation.org, rostedt@goodmis.org, jithu.joseph@intel.com, ashok.raj@intel.com, tony.luck@intel.com, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, patches@lists.linux.dev, ravi.v.shankar@intel.com, thiago.macieira@intel.com, athenas.jimenez.gonzalez@intel.com, sohil.mehta@intel.com Subject: [PATCH v2 2/7] platform/x86/intel/ifs: Introduce Array Scan test to IFS Date: Tue, 14 Feb 2023 15:44:21 -0800 Message-Id: <20230214234426.344960-3-jithu.joseph@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230214234426.344960-1-jithu.joseph@intel.com> References: <20230131234302.3997223-1-jithu.joseph@intel.com> <20230214234426.344960-1-jithu.joseph@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Array BIST is a new type of core test introduced under the Intel Infield Scan (IFS) suite of tests. Emerald Rapids (EMR) is the first CPU to support Array BIST. Array BIST performs tests on some portions of the core logic such as caches and register files. These are different portions of the silicon compared to the parts tested by the first test type i.e Scan at Field (SAF). Make changes in the device driver init flow to register this new test type with the device driver framework. Each test will have its own sysfs directory (intel_ifs_0 , intel_ifs_1) under misc hierarchy to accommodate for the differences in test type and how they are initiated. Upcoming patches will add actual support. Signed-off-by: Jithu Joseph Reviewed-by: Tony Luck --- drivers/platform/x86/intel/ifs/ifs.h | 5 ++ drivers/platform/x86/intel/ifs/core.c | 70 ++++++++++++++++++--------- 2 files changed, 52 insertions(+), 23 deletions(-) diff --git a/drivers/platform/x86/intel/ifs/ifs.h b/drivers/platform/x86/intel/ifs/ifs.h index 046e39304fd5..2cef88a88aa9 100644 --- a/drivers/platform/x86/intel/ifs/ifs.h +++ b/drivers/platform/x86/intel/ifs/ifs.h @@ -137,6 +137,11 @@ #define SCAN_TEST_PASS 1 #define SCAN_TEST_FAIL 2 +enum test_types { + IFS_SAF, + IFS_ARRAY, +}; + /* MSR_SCAN_HASHES_STATUS bit fields */ union ifs_scan_hashes_status { u64 data; diff --git a/drivers/platform/x86/intel/ifs/core.c b/drivers/platform/x86/intel/ifs/core.c index 206a617c2e02..ab234620ef4c 100644 --- a/drivers/platform/x86/intel/ifs/core.c +++ b/drivers/platform/x86/intel/ifs/core.c @@ -16,27 +16,44 @@ static const struct x86_cpu_id ifs_cpu_ids[] __initconst = { X86_MATCH(SAPPHIRERAPIDS_X), + X86_MATCH(EMERALDRAPIDS_X), {} }; MODULE_DEVICE_TABLE(x86cpu, ifs_cpu_ids); -static struct ifs_device ifs_device = { - .data = { - .integrity_cap_bit = MSR_INTEGRITY_CAPS_PERIODIC_BIST_BIT, - .test_num = 0, +static struct ifs_device ifs_devices[] = { + [IFS_SAF] = { + .data = { + .integrity_cap_bit = MSR_INTEGRITY_CAPS_PERIODIC_BIST_BIT, + .test_num = IFS_SAF, + }, + .misc = { + .name = "intel_ifs_0", + .nodename = "intel_ifs/0", + .minor = MISC_DYNAMIC_MINOR, + }, }, - .misc = { - .name = "intel_ifs_0", - .nodename = "intel_ifs/0", - .minor = MISC_DYNAMIC_MINOR, + [IFS_ARRAY] = { + .data = { + .integrity_cap_bit = MSR_INTEGRITY_CAPS_ARRAY_BIST_BIT, + .test_num = IFS_ARRAY, + }, + .misc = { + .name = "intel_ifs_1", + .nodename = "intel_ifs/1", + .minor = MISC_DYNAMIC_MINOR, + }, }, }; +#define IFS_NUMTESTS ARRAY_SIZE(ifs_devices) + static int __init ifs_init(void) { const struct x86_cpu_id *m; + int ndevices = 0; u64 msrval; - int ret; + int i; m = x86_match_cpu(ifs_cpu_ids); if (!m) @@ -51,28 +68,35 @@ static int __init ifs_init(void) if (rdmsrl_safe(MSR_INTEGRITY_CAPS, &msrval)) return -ENODEV; - ifs_device.misc.groups = ifs_get_groups(); - - if (!(msrval & BIT(ifs_device.data.integrity_cap_bit))) - return -ENODEV; + for (i = 0; i < IFS_NUMTESTS; i++) { + if (!(msrval & BIT(ifs_devices[i].data.integrity_cap_bit))) + continue; - ifs_device.data.pkg_auth = kmalloc_array(topology_max_packages(), sizeof(bool), GFP_KERNEL); - if (!ifs_device.data.pkg_auth) - return -ENOMEM; + ifs_devices[i].data.pkg_auth = kmalloc_array(topology_max_packages(), + sizeof(bool), GFP_KERNEL); + if (!ifs_devices[i].data.pkg_auth) + continue; + ifs_devices[i].misc.groups = ifs_get_groups(); - ret = misc_register(&ifs_device.misc); - if (ret) { - kfree(ifs_device.data.pkg_auth); - return ret; + if (misc_register(&ifs_devices[i].misc)) + kfree(ifs_devices[i].data.pkg_auth); + else + ndevices++; } - return 0; + return ndevices ? 0 : -ENODEV; } static void __exit ifs_exit(void) { - misc_deregister(&ifs_device.misc); - kfree(ifs_device.data.pkg_auth); + int i; + + for (i = 0; i < IFS_NUMTESTS; i++) { + if (ifs_devices[i].misc.this_device) { + misc_deregister(&ifs_devices[i].misc); + kfree(ifs_devices[i].data.pkg_auth); + } + } } module_init(ifs_init); From patchwork Tue Feb 14 23:44:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Joseph, Jithu" X-Patchwork-Id: 13141038 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 154DFC6379F for ; Tue, 14 Feb 2023 23:46:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232712AbjBNXp6 (ORCPT ); Tue, 14 Feb 2023 18:45:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60462 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229551AbjBNXp5 (ORCPT ); Tue, 14 Feb 2023 18:45:57 -0500 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 86FFB2914A; Tue, 14 Feb 2023 15:45:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1676418356; x=1707954356; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=FZhdytTplH8hafL4/6++wppoH2ryGQJ9fu1jV9238GY=; b=eWjEPY2gqEvbANrEkPWUVxpFjBToTT1qtAw6tRUCJqu7G6CMSBqXBWn+ gOA8LlA64JK83YyDwEjQhOwBQ1DRph0UOswlEH2mvVRzNHK4RbgcZZCUg ki2WqZzQvqf6tEJ5Skjt/5DILN9y1+51mRdG8kxh+J1WdxsEzEQ/1n0ml LFPCfRTZPHkWWIAk1Kx1xfDJYrIC+ZA7C+q4wdfzc3ITYSLVFpyLxFv8h Qi5qulSIrtNj7KkuHf76jp6Uw8uoVkFzJB7v+3kY4af9YVDnIPdKvhgJx vPRpp33IBl5y7QwqjXfTnuDI64M0uUck/uTbQx+qd1UPuxIz3Y5dL7/aN g==; X-IronPort-AV: E=McAfee;i="6500,9779,10621"; a="417523018" X-IronPort-AV: E=Sophos;i="5.97,298,1669104000"; d="scan'208";a="417523018" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2023 15:45:56 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10621"; a="669391014" X-IronPort-AV: E=Sophos;i="5.97,298,1669104000"; d="scan'208";a="669391014" Received: from jithujos.sc.intel.com ([172.25.103.66]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2023 15:45:55 -0800 From: Jithu Joseph To: hdegoede@redhat.com, markgross@kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, gregkh@linuxfoundation.org, rostedt@goodmis.org, jithu.joseph@intel.com, ashok.raj@intel.com, tony.luck@intel.com, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, patches@lists.linux.dev, ravi.v.shankar@intel.com, thiago.macieira@intel.com, athenas.jimenez.gonzalez@intel.com, sohil.mehta@intel.com Subject: [PATCH v2 3/7] platform/x86/intel/ifs: Sysfs interface for Array BIST Date: Tue, 14 Feb 2023 15:44:22 -0800 Message-Id: <20230214234426.344960-4-jithu.joseph@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230214234426.344960-1-jithu.joseph@intel.com> References: <20230131234302.3997223-1-jithu.joseph@intel.com> <20230214234426.344960-1-jithu.joseph@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org The interface to trigger Array BIST test and obtain its result is similar to the existing scan test. The only notable difference is that, Array BIST doesn't require any test content to be loaded. So binary load related options are not needed for this test. Add sysfs interface for array BIST test, the testing support will be added by subsequent patch. Signed-off-by: Jithu Joseph Reviewed-by: Tony Luck --- drivers/platform/x86/intel/ifs/ifs.h | 1 + drivers/platform/x86/intel/ifs/core.c | 21 ++++++++++++++++----- drivers/platform/x86/intel/ifs/runtest.c | 11 ++++++++++- drivers/platform/x86/intel/ifs/sysfs.c | 10 +++++++++- 4 files changed, 36 insertions(+), 7 deletions(-) diff --git a/drivers/platform/x86/intel/ifs/ifs.h b/drivers/platform/x86/intel/ifs/ifs.h index 2cef88a88aa9..a0cb2696c1d9 100644 --- a/drivers/platform/x86/intel/ifs/ifs.h +++ b/drivers/platform/x86/intel/ifs/ifs.h @@ -249,5 +249,6 @@ static inline struct ifs_data *ifs_get_data(struct device *dev) int ifs_load_firmware(struct device *dev); int do_core_test(int cpu, struct device *dev); const struct attribute_group **ifs_get_groups(void); +extern struct attribute *plat_ifs_array_attrs[]; #endif diff --git a/drivers/platform/x86/intel/ifs/core.c b/drivers/platform/x86/intel/ifs/core.c index ab234620ef4c..d0d4e1fb62f6 100644 --- a/drivers/platform/x86/intel/ifs/core.c +++ b/drivers/platform/x86/intel/ifs/core.c @@ -25,6 +25,7 @@ static struct ifs_device ifs_devices[] = { [IFS_SAF] = { .data = { .integrity_cap_bit = MSR_INTEGRITY_CAPS_PERIODIC_BIST_BIT, + .pkg_auth = NULL, .test_num = IFS_SAF, }, .misc = { @@ -36,6 +37,7 @@ static struct ifs_device ifs_devices[] = { [IFS_ARRAY] = { .data = { .integrity_cap_bit = MSR_INTEGRITY_CAPS_ARRAY_BIST_BIT, + .pkg_auth = NULL, .test_num = IFS_ARRAY, }, .misc = { @@ -48,6 +50,8 @@ static struct ifs_device ifs_devices[] = { #define IFS_NUMTESTS ARRAY_SIZE(ifs_devices) +ATTRIBUTE_GROUPS(plat_ifs_array); + static int __init ifs_init(void) { const struct x86_cpu_id *m; @@ -72,11 +76,18 @@ static int __init ifs_init(void) if (!(msrval & BIT(ifs_devices[i].data.integrity_cap_bit))) continue; - ifs_devices[i].data.pkg_auth = kmalloc_array(topology_max_packages(), - sizeof(bool), GFP_KERNEL); - if (!ifs_devices[i].data.pkg_auth) - continue; - ifs_devices[i].misc.groups = ifs_get_groups(); + switch (ifs_devices[i].data.test_num) { + case IFS_SAF: + ifs_devices[i].data.pkg_auth = kmalloc_array(topology_max_packages(), + sizeof(bool), GFP_KERNEL); + if (!ifs_devices[i].data.pkg_auth) + continue; + ifs_devices[i].misc.groups = ifs_get_groups(); + break; + case IFS_ARRAY: + ifs_devices[i].misc.groups = plat_ifs_array_groups; + break; + } if (misc_register(&ifs_devices[i].misc)) kfree(ifs_devices[i].data.pkg_auth); diff --git a/drivers/platform/x86/intel/ifs/runtest.c b/drivers/platform/x86/intel/ifs/runtest.c index 0bfd8fcdd7e8..65e08af70994 100644 --- a/drivers/platform/x86/intel/ifs/runtest.c +++ b/drivers/platform/x86/intel/ifs/runtest.c @@ -236,6 +236,7 @@ static void ifs_test_core(int cpu, struct device *dev) */ int do_core_test(int cpu, struct device *dev) { + struct ifs_data *ifsd = ifs_get_data(dev); int ret = 0; /* Prevent CPUs from being taken offline during the scan test */ @@ -247,7 +248,15 @@ int do_core_test(int cpu, struct device *dev) goto out; } - ifs_test_core(cpu, dev); + switch (ifsd->test_num) { + case IFS_SAF: + ifs_test_core(cpu, dev); + break; + case IFS_ARRAY: + default: + return -EINVAL; + } + out: cpus_read_unlock(); return ret; diff --git a/drivers/platform/x86/intel/ifs/sysfs.c b/drivers/platform/x86/intel/ifs/sysfs.c index ee636a76b083..3e205fead7ab 100644 --- a/drivers/platform/x86/intel/ifs/sysfs.c +++ b/drivers/platform/x86/intel/ifs/sysfs.c @@ -75,7 +75,7 @@ static ssize_t run_test_store(struct device *dev, if (down_interruptible(&ifs_sem)) return -EINTR; - if (!ifsd->loaded) + if (ifsd->test_num != IFS_ARRAY && !ifsd->loaded) rc = -EPERM; else rc = do_core_test(cpu, dev); @@ -156,3 +156,11 @@ const struct attribute_group **ifs_get_groups(void) { return plat_ifs_groups; } + +/* global array sysfs attributes */ +struct attribute *plat_ifs_array_attrs[] = { + &dev_attr_details.attr, + &dev_attr_status.attr, + &dev_attr_run_test.attr, + NULL +}; From patchwork Tue Feb 14 23:44:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Joseph, Jithu" X-Patchwork-Id: 13141039 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15EB2C61DA4 for ; Tue, 14 Feb 2023 23:46:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229813AbjBNXp7 (ORCPT ); Tue, 14 Feb 2023 18:45:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60488 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232636AbjBNXp6 (ORCPT ); Tue, 14 Feb 2023 18:45:58 -0500 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5D1892FCCA; Tue, 14 Feb 2023 15:45:57 -0800 (PST) DKIM-Signature: v=1; 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d="scan'208";a="669391017" Received: from jithujos.sc.intel.com ([172.25.103.66]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2023 15:45:56 -0800 From: Jithu Joseph To: hdegoede@redhat.com, markgross@kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, gregkh@linuxfoundation.org, rostedt@goodmis.org, jithu.joseph@intel.com, ashok.raj@intel.com, tony.luck@intel.com, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, patches@lists.linux.dev, ravi.v.shankar@intel.com, thiago.macieira@intel.com, athenas.jimenez.gonzalez@intel.com, sohil.mehta@intel.com Subject: [PATCH v2 4/7] platform/x86/intel/ifs: Implement Array BIST test Date: Tue, 14 Feb 2023 15:44:23 -0800 Message-Id: <20230214234426.344960-5-jithu.joseph@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230214234426.344960-1-jithu.joseph@intel.com> References: <20230131234302.3997223-1-jithu.joseph@intel.com> <20230214234426.344960-1-jithu.joseph@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Array BIST test (for a particlular core) is triggered by writing to MSR_ARRAY_BIST from one sibling of the core. This will initiate a test for all supported arrays on that CPU. Array BIST test may be aborted before completing all the arrays in the event of an interrupt or other reasons. In this case, kernel will restart the test from that point onwards. Array test will also be aborted when the test fails, in which case the test is stopped immediately without further retry. Signed-off-by: Jithu Joseph Reviewed-by: Tony Luck --- drivers/platform/x86/intel/ifs/ifs.h | 12 ++++ drivers/platform/x86/intel/ifs/runtest.c | 90 ++++++++++++++++++++++++ 2 files changed, 102 insertions(+) diff --git a/drivers/platform/x86/intel/ifs/ifs.h b/drivers/platform/x86/intel/ifs/ifs.h index a0cb2696c1d9..e5375191b56d 100644 --- a/drivers/platform/x86/intel/ifs/ifs.h +++ b/drivers/platform/x86/intel/ifs/ifs.h @@ -127,6 +127,7 @@ #include #include +#define MSR_ARRAY_BIST 0x00000105 #define MSR_COPY_SCAN_HASHES 0x000002c2 #define MSR_SCAN_HASHES_STATUS 0x000002c3 #define MSR_AUTHENTICATE_AND_COPY_CHUNK 0x000002c4 @@ -194,6 +195,17 @@ union ifs_status { }; }; +/* MSR_ARRAY_BIST bit fields */ +union ifs_array { + u64 data; + struct { + u32 array_bitmask :32; + u32 array_bank :16; + u32 rsvd :15; + u32 ctrl_result :1; + }; +}; + /* * Driver populated error-codes * 0xFD: Test timed out before completing all the chunks. diff --git a/drivers/platform/x86/intel/ifs/runtest.c b/drivers/platform/x86/intel/ifs/runtest.c index 65e08af70994..12880fca0aa8 100644 --- a/drivers/platform/x86/intel/ifs/runtest.c +++ b/drivers/platform/x86/intel/ifs/runtest.c @@ -229,6 +229,94 @@ static void ifs_test_core(int cpu, struct device *dev) } } +#define SPINUNIT 100 /* 100 nsec */ +static atomic_t array_cpus_out; + +/* + * Simplified cpu sibling rendezvous loop based on microcode loader __wait_for_cpus() + */ +static void wait_for_sibling_cpu(atomic_t *t, long long timeout) +{ + int cpu = smp_processor_id(); + const struct cpumask *smt_mask = cpu_smt_mask(cpu); + int all_cpus = cpumask_weight(smt_mask); + + atomic_inc(t); + while (atomic_read(t) < all_cpus) { + if (timeout < SPINUNIT) + return; + ndelay(SPINUNIT); + timeout -= SPINUNIT; + touch_nmi_watchdog(); + } +} + +static int do_array_test(void *data) +{ + int cpu = smp_processor_id(); + u64 *msrs = data; + int first; + + /* + * Only one logical CPU on a core needs to trigger the Array test via MSR write. + */ + first = cpumask_first(cpu_smt_mask(cpu)); + + if (cpu == first) { + wrmsrl(MSR_ARRAY_BIST, msrs[0]); + /* Pass back the result of the test */ + rdmsrl(MSR_ARRAY_BIST, msrs[1]); + } + + /* Tests complete faster if the sibling is spinning here */ + wait_for_sibling_cpu(&array_cpus_out, NSEC_PER_SEC); + + return 0; +} + +static void ifs_array_test_core(int cpu, struct device *dev) +{ + union ifs_array activate, status = {0}; + bool timed_out = false; + struct ifs_data *ifsd; + unsigned long timeout; + u64 msrvals[2]; + + ifsd = ifs_get_data(dev); + + activate.array_bitmask = ~0U; + timeout = jiffies + HZ / 2; + + do { + if (time_after(jiffies, timeout)) { + timed_out = true; + break; + } + + msrvals[0] = activate.data; + + atomic_set(&array_cpus_out, 0); + stop_core_cpuslocked(cpu, do_array_test, msrvals); + status.data = msrvals[1]; + + if (status.ctrl_result) + break; + + activate.array_bitmask = status.array_bitmask; + activate.array_bank = status.array_bank; + + } while (status.array_bitmask); + + ifsd->scan_details = status.data; + + if (status.ctrl_result) + ifsd->status = SCAN_TEST_FAIL; + else if (timed_out || status.array_bitmask) + ifsd->status = SCAN_NOT_TESTED; + else + ifsd->status = SCAN_TEST_PASS; +} + /* * Initiate per core test. It wakes up work queue threads on the target cpu and * its sibling cpu. Once all sibling threads wake up, the scan test gets executed and @@ -253,6 +341,8 @@ int do_core_test(int cpu, struct device *dev) ifs_test_core(cpu, dev); break; case IFS_ARRAY: + ifs_array_test_core(cpu, dev); + break; default: return -EINVAL; } From patchwork Tue Feb 14 23:44:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Joseph, Jithu" X-Patchwork-Id: 13141040 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 95F9DC6379F for ; Tue, 14 Feb 2023 23:46:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232787AbjBNXqB (ORCPT ); Tue, 14 Feb 2023 18:46:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60516 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232504AbjBNXp7 (ORCPT ); Tue, 14 Feb 2023 18:45:59 -0500 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3044C2914A; Tue, 14 Feb 2023 15:45:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1676418358; x=1707954358; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=U58Wafc7htqFPRhoLYl7u0MCfTww372m3K2hlfQ7h3U=; b=iKz26d3AoUeirHw5J6DgmLk8LanUUvaFm9QZxoMDU5C5lApMg+fLySWO v+7ADvbWdzq4LsNW4m4/XwbBb6ND8suIl2rjmIc9ktbsbDcKVkFmn5guh 9iYlgzl1htpaAxf6q7Qjcpc3ME6eRvdBk7HsXe8H6BxbywHjAtQ4CvCSH ExGRGHRejqdPnBXYTX/l2TVyWPkZ3FVwDvh8f67l2V3r9iPutrciLZyl1 jtkrbAy3v6FNSKstI/e2z70Lk8i4Ld2eKLUYfVNWDXqD8wwN/d9gnWdsY 95ySRR5V6+A1o+PWJrGU6Uly2liCTzAiJTPnOFx5aQOMTyE6Mghg2OAx0 w==; X-IronPort-AV: E=McAfee;i="6500,9779,10621"; a="417523039" X-IronPort-AV: E=Sophos;i="5.97,298,1669104000"; d="scan'208";a="417523039" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2023 15:45:57 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10621"; a="669391020" X-IronPort-AV: E=Sophos;i="5.97,298,1669104000"; d="scan'208";a="669391020" Received: from jithujos.sc.intel.com ([172.25.103.66]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2023 15:45:56 -0800 From: Jithu Joseph To: hdegoede@redhat.com, markgross@kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, gregkh@linuxfoundation.org, rostedt@goodmis.org, jithu.joseph@intel.com, ashok.raj@intel.com, tony.luck@intel.com, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, patches@lists.linux.dev, ravi.v.shankar@intel.com, thiago.macieira@intel.com, athenas.jimenez.gonzalez@intel.com, sohil.mehta@intel.com Subject: [PATCH v2 5/7] platform/x86/intel/ifs: Trace support for array test Date: Tue, 14 Feb 2023 15:44:24 -0800 Message-Id: <20230214234426.344960-6-jithu.joseph@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230214234426.344960-1-jithu.joseph@intel.com> References: <20230131234302.3997223-1-jithu.joseph@intel.com> <20230214234426.344960-1-jithu.joseph@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Enable tracing support in array test flow. Signed-off-by: Jithu Joseph Reviewed-by: Tony Luck Reviewed-by: Steven Rostedt (Google) --- include/trace/events/intel_ifs.h | 25 ++++++++++++++++++++++++ drivers/platform/x86/intel/ifs/runtest.c | 1 + 2 files changed, 26 insertions(+) diff --git a/include/trace/events/intel_ifs.h b/include/trace/events/intel_ifs.h index d7353024016c..d15037943b80 100644 --- a/include/trace/events/intel_ifs.h +++ b/include/trace/events/intel_ifs.h @@ -35,6 +35,31 @@ TRACE_EVENT(ifs_status, __entry->status) ); +TRACE_EVENT(ifs_array, + + TP_PROTO(int cpu, union ifs_array activate, union ifs_array status), + + TP_ARGS(cpu, activate, status), + + TP_STRUCT__entry( + __field( u64, activate ) + __field( u64, status ) + __field( int, cpu ) + ), + + TP_fast_assign( + __entry->activate = activate.data; + __entry->status = status.data; + __entry->cpu = cpu; + ), + + TP_printk("cpu: %d, array_list: %.8llx, array_bank: %.4llx, status: %.16llx", + __entry->cpu, + __entry->activate & 0xffffffff, + (__entry->activate >> 32) & 0xffff, + __entry->status) +); + #endif /* _TRACE_IFS_H */ /* This part must be outside protection */ diff --git a/drivers/platform/x86/intel/ifs/runtest.c b/drivers/platform/x86/intel/ifs/runtest.c index 12880fca0aa8..e74004fab1aa 100644 --- a/drivers/platform/x86/intel/ifs/runtest.c +++ b/drivers/platform/x86/intel/ifs/runtest.c @@ -299,6 +299,7 @@ static void ifs_array_test_core(int cpu, struct device *dev) stop_core_cpuslocked(cpu, do_array_test, msrvals); status.data = msrvals[1]; + trace_ifs_array(cpu, activate, status); if (status.ctrl_result) break; From patchwork Tue Feb 14 23:44:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Joseph, Jithu" X-Patchwork-Id: 13141041 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 56576C05027 for ; Tue, 14 Feb 2023 23:46:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229563AbjBNXqC (ORCPT ); Tue, 14 Feb 2023 18:46:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60562 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229725AbjBNXqA (ORCPT ); Tue, 14 Feb 2023 18:46:00 -0500 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ED00930B35; Tue, 14 Feb 2023 15:45:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1676418358; x=1707954358; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Sv9VY7ZhDkazi+PPN2tu+ANJj7RA9Fo3Wl/1+QS58MM=; b=Sf2aELFd+X1Xki/QpP4UB2770AyOm8yL7OgK7idaHNpvQOJGind6CFxt WjnApE7GYlaSaJVCeZ7Xg/Xe+EMpZvlVkXfKtlA0a/0WjDISy8ZBEEcHA tIX/UaeyVHjC7PdDMwmNud/GM4Q8oq9D1DC4+qzdee7rF+HYmuUzFSg01 6mZd20Y1lBE73snR69wqRgvT8CZnY0rQ24rFWLdU8qzlPoryqrLbaw288 slcZ2omcrD3YRGZa9ngQogFD1wTd4NROOzlNe6AFTiklZ4RN4r4GnGJd5 XKJQrHvs4ElSIpExgoFi1L51xDz0WxUqf8IE1RdiTMqYwJbfQ+zAu4L5P g==; X-IronPort-AV: E=McAfee;i="6500,9779,10621"; a="417523050" X-IronPort-AV: E=Sophos;i="5.97,298,1669104000"; d="scan'208";a="417523050" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2023 15:45:58 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10621"; a="669391023" X-IronPort-AV: E=Sophos;i="5.97,298,1669104000"; d="scan'208";a="669391023" Received: from jithujos.sc.intel.com ([172.25.103.66]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2023 15:45:57 -0800 From: Jithu Joseph To: hdegoede@redhat.com, markgross@kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, gregkh@linuxfoundation.org, rostedt@goodmis.org, jithu.joseph@intel.com, ashok.raj@intel.com, tony.luck@intel.com, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, patches@lists.linux.dev, ravi.v.shankar@intel.com, thiago.macieira@intel.com, athenas.jimenez.gonzalez@intel.com, sohil.mehta@intel.com Subject: [PATCH v2 6/7] platform/x86/intel/ifs: Update IFS doc Date: Tue, 14 Feb 2023 15:44:25 -0800 Message-Id: <20230214234426.344960-7-jithu.joseph@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230214234426.344960-1-jithu.joseph@intel.com> References: <20230131234302.3997223-1-jithu.joseph@intel.com> <20230214234426.344960-1-jithu.joseph@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Array BIST is the second test supported by IFS. Modify IFS doc entry to be more general. Signed-off-by: Jithu Joseph Reviewed-by: Tony Luck --- drivers/platform/x86/intel/ifs/ifs.h | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) diff --git a/drivers/platform/x86/intel/ifs/ifs.h b/drivers/platform/x86/intel/ifs/ifs.h index e5375191b56d..00bc86db1193 100644 --- a/drivers/platform/x86/intel/ifs/ifs.h +++ b/drivers/platform/x86/intel/ifs/ifs.h @@ -17,7 +17,7 @@ * In Field Scan (IFS) is a hardware feature to run circuit level tests on * a CPU core to detect problems that are not caught by parity or ECC checks. * Future CPUs will support more than one type of test which will show up - * with a new platform-device instance-id, for now only .0 is exposed. + * with a new platform-device instance-id. * * * IFS Image @@ -25,7 +25,10 @@ * * Intel provides a firmware file containing the scan tests via * github [#f1]_. Similar to microcode there is a separate file for each - * family-model-stepping. + * family-model-stepping. IFS Images are not applicable for some test types. + * Wherever applicable the sysfs directory would provide a "current_batch" file + * (see below) for loading the image. + * * * IFS Image Loading * ----------------- @@ -35,7 +38,7 @@ * SHA hashes for the test. Then the tests themselves. Status MSRs provide * feedback on the success/failure of these steps. * - * The test files are kept in a fixed location: /lib/firmware/intel/ifs_0/ + * The test files are kept in a fixed location: /lib/firmware/intel/ifs_/ * For e.g if there are 3 test files, they would be named in the following * fashion: * ff-mm-ss-01.scan @@ -47,7 +50,7 @@ * (e.g 1, 2 or 3 in the above scenario) into the curent_batch file. * To load ff-mm-ss-02.scan, the following command can be used:: * - * # echo 2 > /sys/devices/virtual/misc/intel_ifs_0/current_batch + * # echo 2 > /sys/devices/virtual/misc/intel_ifs_/current_batch * * The above file can also be read to know the currently loaded image. * @@ -69,16 +72,16 @@ * to migrate those applications to other cores before running a core test. * It may also be necessary to redirect interrupts to other CPUs. * - * In all cases reading the SCAN_STATUS MSR provides details on what + * In all cases reading the corresponding test's STATUS MSR provides details on what * happened. The driver makes the value of this MSR visible to applications * via the "details" file (see below). Interrupted tests may be restarted. * - * The IFS driver provides sysfs interfaces via /sys/devices/virtual/misc/intel_ifs_0/ + * The IFS driver provides sysfs interfaces via /sys/devices/virtual/misc/intel_ifs_/ * to control execution: * * Test a specific core:: * - * # echo > /sys/devices/virtual/misc/intel_ifs_0/run_test + * # echo > /sys/devices/virtual/misc/intel_ifs_/run_test * * when HT is enabled any of the sibling cpu# can be specified to test * its corresponding physical core. Since the tests are per physical core, @@ -87,18 +90,18 @@ * * For e.g. to test core corresponding to cpu5 * - * # echo 5 > /sys/devices/virtual/misc/intel_ifs_0/run_test + * # echo 5 > /sys/devices/virtual/misc/intel_ifs_/run_test * * Results of the last test is provided in /sys:: * - * $ cat /sys/devices/virtual/misc/intel_ifs_0/status + * $ cat /sys/devices/virtual/misc/intel_ifs_/status * pass * * Status can be one of pass, fail, untested * * Additional details of the last test is provided by the details file:: * - * $ cat /sys/devices/virtual/misc/intel_ifs_0/details + * $ cat /sys/devices/virtual/misc/intel_ifs_/details * 0x8081 * * The details file reports the hex value of the SCAN_STATUS MSR. From patchwork Tue Feb 14 23:44:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Joseph, Jithu" X-Patchwork-Id: 13141042 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DDDC3C61DA4 for ; Tue, 14 Feb 2023 23:46:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229739AbjBNXqD (ORCPT ); Tue, 14 Feb 2023 18:46:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60592 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229578AbjBNXqA (ORCPT ); Tue, 14 Feb 2023 18:46:00 -0500 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 01FF630EA1; Tue, 14 Feb 2023 15:45:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1676418359; x=1707954359; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=eiS3IxaAsk6x7BayF1DCQxveYExshrK1kKyFW8zL/CQ=; b=hp3GBOYZqwZ3M6mPyYU86CkDWifK7aevTJV4n52mu0YSqmcJESltHjpg U00N6YESJvCTosSEPuM9EVuK8u9ECZ6Oc8eYDGvfZylx36S7tMyOa5/MI NtdVxV/gY4ufK1o4QqGM9qy1pt1Cm5GfEt/9W8UV3alA1mnCxUwc6RWsy mgU5EHLmRE/RbVhUMYBJxm3D/oRCtVEVHP4R6N5Ja3YFjbB/oGqGkeO/r 8MwUBARMuTaXt1faeHXotPlQAUM435DY5SDRK3Cr779p2VgI8tAXgdvdN B5f19DtKhR70HtybFLfNW4NMX5UDgRjaonl2i3pGoPLy3GdxmEAPbKjUy Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10621"; a="417523061" X-IronPort-AV: E=Sophos;i="5.97,298,1669104000"; d="scan'208";a="417523061" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2023 15:45:59 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10621"; a="669391026" X-IronPort-AV: E=Sophos;i="5.97,298,1669104000"; d="scan'208";a="669391026" Received: from jithujos.sc.intel.com ([172.25.103.66]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2023 15:45:58 -0800 From: Jithu Joseph To: hdegoede@redhat.com, markgross@kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, gregkh@linuxfoundation.org, rostedt@goodmis.org, jithu.joseph@intel.com, ashok.raj@intel.com, tony.luck@intel.com, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, patches@lists.linux.dev, ravi.v.shankar@intel.com, thiago.macieira@intel.com, athenas.jimenez.gonzalez@intel.com, sohil.mehta@intel.com Subject: [PATCH v2 7/7] Documentation/ABI: Update IFS ABI doc Date: Tue, 14 Feb 2023 15:44:26 -0800 Message-Id: <20230214234426.344960-8-jithu.joseph@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230214234426.344960-1-jithu.joseph@intel.com> References: <20230131234302.3997223-1-jithu.joseph@intel.com> <20230214234426.344960-1-jithu.joseph@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Array BIST test doesn't need an IFS test image to operate unlike the SCAN test. Consequently current_batch and image_version files are not applicable for Array BIST IFS device instance, clarify this in the ABI doc. Also given that multiple tests are supported, take the opportunity to generalize descriptions wherever applicable. Signed-off-by: Jithu Joseph Reviewed-by: Tony Luck --- Documentation/ABI/testing/sysfs-platform-intel-ifs | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/Documentation/ABI/testing/sysfs-platform-intel-ifs b/Documentation/ABI/testing/sysfs-platform-intel-ifs index 55991983d0d0..c0cc5ef0739a 100644 --- a/Documentation/ABI/testing/sysfs-platform-intel-ifs +++ b/Documentation/ABI/testing/sysfs-platform-intel-ifs @@ -21,15 +21,16 @@ Date: Nov 16 2022 KernelVersion: 6.2 Contact: "Jithu Joseph" Description: Additional information regarding the last test. The details file reports - the hex value of the SCAN_STATUS MSR. Note that the error_code field + the hex value of the STATUS MSR for this test. Note that the error_code field may contain driver defined software code not defined in the Intel SDM. What: /sys/devices/virtual/misc/intel_ifs_/image_version Date: Nov 16 2022 KernelVersion: 6.2 Contact: "Jithu Joseph" -Description: Version (hexadecimal) of loaded IFS binary image. If no scan image - is loaded reports "none". +Description: Version (hexadecimal) of loaded IFS test image. If no test image + is loaded reports "none". Only present for device instances where a test image + is applicable. What: /sys/devices/virtual/misc/intel_ifs_/current_batch Date: Nov 16 2022 @@ -39,3 +40,4 @@ Description: Write a number less than or equal to 0xff to load an IFS test image The number written treated as the 2 digit suffix in the following file name: /lib/firmware/intel/ifs_/ff-mm-ss-02x.scan Reading the file will provide the suffix of the currently loaded IFS test image. + This file is present only for device instances where a test image is applicable.