From patchwork Wed Feb 15 15:39:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 13141821 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0E3D2C636CC for ; Wed, 15 Feb 2023 15:40:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230090AbjBOPkP (ORCPT ); Wed, 15 Feb 2023 10:40:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58520 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230137AbjBOPkO (ORCPT ); Wed, 15 Feb 2023 10:40:14 -0500 Received: from mail-wm1-x332.google.com (mail-wm1-x332.google.com [IPv6:2a00:1450:4864:20::332]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0C951366A6 for ; Wed, 15 Feb 2023 07:40:11 -0800 (PST) Received: by mail-wm1-x332.google.com with SMTP id z13so13639756wmp.2 for ; Wed, 15 Feb 2023 07:40:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=KBKUFOg3aIZtzc5AANsCexRTxeA9fGhbkcwkIm+GvMw=; b=Ga82GK7mqpyKTgaGh6zhWl7XgCKeqt5mh3eW8BPGnsmKXgQyxq+Z6g5wIzCpBNhH8r mS3PXiGZV3E59K6ygFrj3LFfpdGS2f2uUMRdxBWPJq2J5Eh688dMY+Qx9PfxQrLCxPST d6isykjBcW+fUJRFiD5wYDy9L7izCD6hoT/hGxuF0kiF3W2+KHm44zi2QqVpSpOX/edE zWm9Baw9Mgm5OHckkpUQnbMI5tw2Ndt/9lmwC+EwOc5aMWJ4rxx+SBGfYtsstIeAiCdA R/l8lttm7VrUWjTplzN1qKVEEwHhZK9ETaf2TzdkBUoMLHcDOgQT7j5Ktf3K1HDIjOD6 EFVg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=KBKUFOg3aIZtzc5AANsCexRTxeA9fGhbkcwkIm+GvMw=; b=kEcCzmgXmLXJ/mx0lg1i3UQ+91KjNS2COcip/m/EpjOh6sS26dXLOvWRj1sc07YSrh PvSUB2cOHqGcnmMBbpqIlxIMsoATSySvloaTwIybAQwWQWaz3ljRKHZJwX37SKlLAHzJ fhbIP0BNMy1RQKSH9oROm6BG0iWgEDokf7En4Vq1GnV6vbciCm79ZaOy7dwb0RqEuuGY wUYDF6DItcaEOvCd44gVLWKfnrirLiOD6l2bJnLU++x1sS2MJalYrjgimDtO3Z9IXuza nJ7/s/xC9jaB+JySAD4ObyTTrOuUtkskxPtQSV/u6ttSmyW5BAP7eEtYxJjZ+JQs5980 5UXA== X-Gm-Message-State: AO0yUKUXMTZbHa22j9Y8kMVHJqtK4EDwzbqPlw2XRSmvjseZZkuG8koB cZoMBIKBtn+CIXf4wvAIh6d2xA== X-Google-Smtp-Source: AK7set/jizCiUpNhg8+PeUbKUwFxlTUdoMGqI6sl77dkTOJxA4pb0GcHwMNv5a1unqvXb92wMqd4eQ== X-Received: by 2002:a05:600c:329a:b0:3db:15b1:fb28 with SMTP id t26-20020a05600c329a00b003db15b1fb28mr2241734wmp.19.1676475609534; Wed, 15 Feb 2023 07:40:09 -0800 (PST) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:ea02:3f39:48c0:67ce]) by smtp.gmail.com with ESMTPSA id j17-20020a05600c191100b003dd1c45a7b0sm2808877wmq.23.2023.02.15.07.40.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Feb 2023 07:40:09 -0800 (PST) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH v2 1/4] arm64: dts: qcom: sa8775p: add the i2c node for sa8775p-ride Date: Wed, 15 Feb 2023 16:39:59 +0100 Message-Id: <20230215154002.446808-2-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230215154002.446808-1-brgl@bgdev.pl> References: <20230215154002.446808-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Add the i2c node for the interface exposed on the sa8775p-ride board. Signed-off-by: Bartosz Golaszewski --- arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 19 +++++++++++++ arch/arm64/boot/dts/qcom/sa8775p.dtsi | 34 +++++++++++++++++++++++ 2 files changed, 53 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts index 3adf7349f4e5..5fdce8279537 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts @@ -13,6 +13,7 @@ / { aliases { serial0 = &uart10; + i2c18 = &i2c18; }; chosen { @@ -20,10 +21,21 @@ chosen { }; }; +&i2c18 { + clock-frequency = <400000>; + pinctrl-0 = <&qup_i2c18_default>; + pinctrl-names = "default"; + status = "okay"; +}; + &qupv3_id_1 { status = "okay"; }; +&qupv3_id_2 { + status = "okay"; +}; + &sleep_clk { clock-frequency = <32764>; }; @@ -33,6 +45,13 @@ qup_uart10_default: qup-uart10-state { pins = "gpio46", "gpio47"; function = "qup1_se3"; }; + + qup_i2c18_default: qup-i2c18-state { + pins = "gpio95", "gpio96"; + function = "qup2_se4"; + drive-strength = <2>; + bias-pull-up; + }; }; &uart10 { diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index 565c1376073e..82582825f92a 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -491,6 +491,40 @@ &clk_virt SLAVE_QUP_CORE_1 0>, }; }; + qupv3_id_2: geniqup@8c0000 { + compatible = "qcom,geni-se-qup"; + reg = <0x0 0x8c0000 0x0 0x6000>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + clock-names = "m-ahb", "s-ahb"; + clocks = <&gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>, + <&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>; + iommus = <&apps_smmu 0x5a3 0x0>; + status = "disabled"; + + i2c18: i2c@890000 { + compatible = "qcom,geni-i2c"; + reg = <0x0 0x890000 0x0 0x4000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clock-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; + interconnects = <&clk_virt MASTER_QUP_CORE_2 0 + &clk_virt SLAVE_QUP_CORE_2 0>, + <&gem_noc MASTER_APPSS_PROC 0 + &config_noc SLAVE_QUP_2 0>, + <&aggre2_noc MASTER_QUP_2 0 + &mc_virt SLAVE_EBI1 0>; + interconnect-names = "qup-core", + "qup-config", + "qup-memory"; + power-domains = <&rpmhpd SA8775P_CX>; + status = "disabled"; + }; + }; + intc: interrupt-controller@17a00000 { compatible = "arm,gic-v3"; reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */ From patchwork Wed Feb 15 15:40:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 13141822 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BE06EC64ED6 for ; Wed, 15 Feb 2023 15:40:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230153AbjBOPkR (ORCPT ); Wed, 15 Feb 2023 10:40:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58634 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230032AbjBOPkP (ORCPT ); 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Wed, 15 Feb 2023 07:40:10 -0800 (PST) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH v2 2/4] arm64: dts: qcom: sa8775p: add the SPI node for sa8775p-ride Date: Wed, 15 Feb 2023 16:40:00 +0100 Message-Id: <20230215154002.446808-3-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230215154002.446808-1-brgl@bgdev.pl> References: <20230215154002.446808-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Add the SPI node for the interface exposed on the sa8775p-ride board. Signed-off-by: Bartosz Golaszewski --- arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 14 ++++++++++++++ arch/arm64/boot/dts/qcom/sa8775p.dtsi | 21 +++++++++++++++++++++ 2 files changed, 35 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts index 5fdce8279537..d01ca3a9ee37 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts @@ -14,6 +14,7 @@ / { aliases { serial0 = &uart10; i2c18 = &i2c18; + spi16 = &spi16; }; chosen { @@ -40,12 +41,25 @@ &sleep_clk { clock-frequency = <32764>; }; +&spi16 { + pinctrl-0 = <&qup_spi16_default>; + pinctrl-names = "default"; + status = "okay"; +}; + &tlmm { qup_uart10_default: qup-uart10-state { pins = "gpio46", "gpio47"; function = "qup1_se3"; }; + qup_spi16_default: qup-spi16-state { + pins = "gpio86", "gpio87", "gpio88", "gpio89"; + function = "qup2_se2"; + drive-strength = <6>; + bias-disable; + }; + qup_i2c18_default: qup-i2c18-state { pins = "gpio95", "gpio96"; function = "qup2_se4"; diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index 82582825f92a..1abb545ff4f4 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -503,6 +503,27 @@ qupv3_id_2: geniqup@8c0000 { iommus = <&apps_smmu 0x5a3 0x0>; status = "disabled"; + spi16: spi@888000 { + compatible = "qcom,geni-spi"; + reg = <0x0 0x888000 0x0 0x4000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; + clock-names = "se"; + interconnects = <&clk_virt MASTER_QUP_CORE_2 0 + &clk_virt SLAVE_QUP_CORE_2 0>, + <&gem_noc MASTER_APPSS_PROC 0 + &config_noc SLAVE_QUP_2 0>, + <&aggre2_noc MASTER_QUP_2 0 + &mc_virt SLAVE_EBI1 0>; + interconnect-names = "qup-core", + "qup-config", + "qup-memory"; + power-domains = <&rpmhpd SA8775P_CX>; + status = "disabled"; + }; + i2c18: i2c@890000 { compatible = "qcom,geni-i2c"; reg = <0x0 0x890000 0x0 0x4000>; From patchwork Wed Feb 15 15:40:01 2023 Content-Type: text/plain; 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Wed, 15 Feb 2023 07:40:11 -0800 (PST) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:ea02:3f39:48c0:67ce]) by smtp.gmail.com with ESMTPSA id j17-20020a05600c191100b003dd1c45a7b0sm2808877wmq.23.2023.02.15.07.40.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Feb 2023 07:40:11 -0800 (PST) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH v2 3/4] arm64: dts: qcom: sa8775p: add the GNSS high-speed UART for sa8775p-ride Date: Wed, 15 Feb 2023 16:40:01 +0100 Message-Id: <20230215154002.446808-4-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230215154002.446808-1-brgl@bgdev.pl> References: <20230215154002.446808-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Add the serial port connected to the GNSS on sa8775p-ride. Signed-off-by: Bartosz Golaszewski --- arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 34 +++++++++++++++++++++++ arch/arm64/boot/dts/qcom/sa8775p.dtsi | 15 ++++++++++ 2 files changed, 49 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts index d01ca3a9ee37..47cf26ea49e8 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts @@ -13,6 +13,7 @@ / { aliases { serial0 = &uart10; + serial1 = &uart12; i2c18 = &i2c18; spi16 = &spi16; }; @@ -66,6 +67,30 @@ qup_i2c18_default: qup-i2c18-state { drive-strength = <2>; bias-pull-up; }; + + qup_uart12_cts: qup-uart12-cts-state { + pins = "gpio52"; + function = "qup1_se5"; + bias-disable; + }; + + qup_uart12_rts: qup_uart12_rts-state { + pins = "gpio53"; + function = "qup1_se5"; + bias-pull-down; + }; + + qup_uart12_tx: qup_uart12_tx-state { + pins = "gpio54"; + function = "qup1_se5"; + bias-pull-up; + }; + + qup_uart12_rx: qup_uart12_rx-state { + pins = "gpio55"; + function = "qup1_se5"; + bias-pull-down; + }; }; &uart10 { @@ -75,6 +100,15 @@ &uart10 { status = "okay"; }; +&uart12 { + pinctrl-0 = <&qup_uart12_cts>, + <&qup_uart12_rts>, + <&qup_uart12_tx>, + <&qup_uart12_rx>; + pinctrl-names = "default"; + status = "okay"; +}; + &xo_board_clk { clock-frequency = <38400000>; }; diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index 1abb545ff4f4..8b8931ea739d 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -489,6 +489,21 @@ &clk_virt SLAVE_QUP_CORE_1 0>, operating-points-v2 = <&qup_opp_table_100mhz>; status = "disabled"; }; + + uart12: serial@a94000 { + compatible = "qcom,geni-uart"; + reg = <0x0 0xa94000 0x0 0x4000>; + interrupts = ; + clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; + clock-names = "se"; + interconnects = <&clk_virt MASTER_QUP_CORE_1 0 + &clk_virt SLAVE_QUP_CORE_1 0>, + <&gem_noc MASTER_APPSS_PROC 0 + &config_noc SLAVE_QUP_1 0>; + interconnect-names = "qup-core", "qup-config"; + power-domains = <&rpmhpd SA8775P_CX>; + status = "disabled"; + }; }; qupv3_id_2: geniqup@8c0000 { From patchwork Wed Feb 15 15:40:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 13141824 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7DE9EC678D5 for ; Wed, 15 Feb 2023 15:40:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229761AbjBOPkT (ORCPT ); Wed, 15 Feb 2023 10:40:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58686 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229916AbjBOPkQ (ORCPT ); Wed, 15 Feb 2023 10:40:16 -0500 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [IPv6:2a00:1450:4864:20::331]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C02A43669F for ; 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Wed, 15 Feb 2023 07:40:12 -0800 (PST) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH v2 4/4] arm64: dts: qcom: sa8775p: add the BT high-speed UART for sa8775p-ride Date: Wed, 15 Feb 2023 16:40:02 +0100 Message-Id: <20230215154002.446808-5-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230215154002.446808-1-brgl@bgdev.pl> References: <20230215154002.446808-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Add the serial port connected to the Bluetooth controller on sa8775p-ride. Signed-off-by: Bartosz Golaszewski --- arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 33 +++++++++++++++++++++++ arch/arm64/boot/dts/qcom/sa8775p.dtsi | 17 ++++++++++++ 2 files changed, 50 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts index 47cf26ea49e8..e7629cb0306c 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts @@ -14,6 +14,7 @@ / { aliases { serial0 = &uart10; serial1 = &uart12; + serial2 = &uart17; i2c18 = &i2c18; spi16 = &spi16; }; @@ -89,6 +90,29 @@ qup_uart12_tx: qup_uart12_tx-state { qup_uart12_rx: qup_uart12_rx-state { pins = "gpio55"; function = "qup1_se5"; + }; + + qup_uart17_cts: qup-uart17-cts-state { + pins = "gpio91"; + function = "qup2_se3"; + bias-disable; + }; + + qup_uart17_rts: qup0_uart17_rts-state { + pins = "gpio92"; + function = "qup2_se3"; + bias-pull-down; + }; + + qup_uart17_tx: qup0_uart17_tx-state { + pins = "gpio93"; + function = "qup2_se3"; + bias-pull-up; + }; + + qup_uart17_rx: qup0_uart17_rx-state { + pins = "gpio94"; + function = "qup2_se3"; bias-pull-down; }; }; @@ -109,6 +133,15 @@ &uart12 { status = "okay"; }; +&uart17 { + pinctrl-0 = <&qup_uart17_cts>, + <&qup_uart17_rts>, + <&qup_uart17_tx>, + <&qup_uart17_rx>; + pinctrl-names = "default"; + status = "okay"; +}; + &xo_board_clk { clock-frequency = <38400000>; }; diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index 8b8931ea739d..9e057a34b14f 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -539,6 +539,23 @@ &config_noc SLAVE_QUP_2 0>, status = "disabled"; }; + uart17: serial@88c000 { + compatible = "qcom,geni-uart"; + reg = <0x0 0x88c000 0x0 0x4000>; + interrupts-extended = <&intc GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>, + <&tlmm 94 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; + clock-names = "se"; + interconnects = <&clk_virt MASTER_QUP_CORE_2 0 + &clk_virt SLAVE_QUP_CORE_2 0>, + <&gem_noc MASTER_APPSS_PROC 0 + &config_noc SLAVE_QUP_2 0>; + interconnect-names = "qup-core", + "qup-config"; + power-domains = <&rpmhpd SA8775P_CX>; + status = "disabled"; + }; + i2c18: i2c@890000 { compatible = "qcom,geni-i2c"; reg = <0x0 0x890000 0x0 0x4000>;