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Thu, 16 Feb 2023 20:19:30 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT007.mail.protection.outlook.com (10.13.177.109) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6111.13 via Frontend Transport; Thu, 16 Feb 2023 20:19:29 +0000 Received: from AUS-LX-MLIMONCI.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Thu, 16 Feb 2023 14:19:29 -0600 From: Mario Limonciello To: Andreas Noever , Michael Jamet , Mika Westerberg , Yehezkel Bernat CC: , Mario Limonciello , , Subject: [PATCH v3 1/3] thunderbolt: Adjust how NVM reading works Date: Thu, 16 Feb 2023 14:19:08 -0600 Message-ID: <20230216201910.12370-2-mario.limonciello@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230216201910.12370-1-mario.limonciello@amd.com> References: <20230216201910.12370-1-mario.limonciello@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT007:EE_|PH7PR12MB6635:EE_ X-MS-Office365-Filtering-Correlation-Id: 61bf302f-6874-42e0-23a0-08db105b1bfa X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Feb 2023 20:19:29.9878 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 61bf302f-6874-42e0-23a0-08db105b1bfa X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT007.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6635 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Some TBT3 devices have a hard time reliably responding to bit banging requests correctly when connected to AMD USB4 hosts running Linux. These problems are not reported in any other CM supported on AMD platforms, and comparing the Windows and Pre-OS implementations the Linux CM is the only one that utilizes bit banging to access the DROM. Other CM implementations access the DROM directly from the NVM instead of bit banging. Adjust the flow to use this method to fetch the NVM when the downstream device has an LC that can be used to fetch the UUID later. The bit banging method will only be used if this has failed or no LC is present. Signed-off-by: Mario Limonciello --- v2->v3: * Split out refactor v1->v2: * Update commit message to indicate which CMs are tested * Adjust flow to only fetch DROM from NVM on TBT3 and bit bang on TBT1/2 --- drivers/thunderbolt/eeprom.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/thunderbolt/eeprom.c b/drivers/thunderbolt/eeprom.c index c90d22f56d4e..177bc51316f7 100644 --- a/drivers/thunderbolt/eeprom.c +++ b/drivers/thunderbolt/eeprom.c @@ -640,6 +640,10 @@ int tb_drom_read(struct tb_switch *sw) return 0; } + /* We can use LC to get UUID later */ + if (sw->cap_lc && tb_drom_copy_nvm(sw, &size) == 0) + goto parse; + res = tb_drom_read_n(sw, 14, (u8 *) &size, 2); if (res) return res; From patchwork Thu Feb 16 20:19:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 13143722 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 83688C636D7 for ; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Feb 2023 20:19:30.8902 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 54cbb06a-7297-4317-7479-08db105b1c81 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT043.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6090 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org The static function `tb_eeprom_get_drom_offset` has more safety guards for the DROM offset fetching. Use this instead of just `tb_sw_read` No intended functional changes. Signed-off-by: Mario Limonciello --- drivers/thunderbolt/eeprom.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/thunderbolt/eeprom.c b/drivers/thunderbolt/eeprom.c index 177bc51316f7..a326cf16ca3d 100644 --- a/drivers/thunderbolt/eeprom.c +++ b/drivers/thunderbolt/eeprom.c @@ -471,14 +471,13 @@ static int tb_drom_copy_efi(struct tb_switch *sw, u16 *size) static int tb_drom_copy_nvm(struct tb_switch *sw, u16 *size) { - u32 drom_offset; + u16 drom_offset; int ret; if (!sw->dma_port) return -ENODEV; - ret = tb_sw_read(sw, &drom_offset, TB_CFG_SWITCH, - sw->cap_plug_events + 12, 1); + ret = tb_eeprom_get_drom_offset(sw, &drom_offset); if (ret) return ret; From patchwork Thu Feb 16 20:19:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 13143723 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E8874C61DA4 for ; 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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT105.mail.protection.outlook.com (10.13.176.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6111.14 via Frontend Transport; Thu, 16 Feb 2023 20:19:32 +0000 Received: from AUS-LX-MLIMONCI.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Thu, 16 Feb 2023 14:19:31 -0600 From: Mario Limonciello To: Andreas Noever , Michael Jamet , Mika Westerberg , Yehezkel Bernat CC: , Mario Limonciello , , Subject: [PATCH v3 3/3] thunderbolt: Refactor DROM reading Date: Thu, 16 Feb 2023 14:19:10 -0600 Message-ID: <20230216201910.12370-4-mario.limonciello@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230216201910.12370-1-mario.limonciello@amd.com> References: <20230216201910.12370-1-mario.limonciello@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT105:EE_|PH7PR12MB7795:EE_ X-MS-Office365-Filtering-Correlation-Id: 23d023f8-01c9-4d78-4d5f-08db105b1d2b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Feb 2023 20:19:32.0190 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 23d023f8-01c9-4d78-4d5f-08db105b1d2b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT105.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7795 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org The NVM reading code has a series of gotos that potentially introduce unexpected behaviors with retries if something unexpected has failed to parse. Additionally the retry logic introduced in commit f022ff7bf377 ("thunderbolt: Retry DROM read once if parsing fails") was added from failures in bit banging, which aren't expected to be present when the DROM is fetched directly from the NVM. Refactor the code to remove the gotos and drop the retry logic. Signed-off-by: Mario Limonciello --- v2->v3: * Split out refactor --- drivers/thunderbolt/eeprom.c | 147 +++++++++++++++++++---------------- 1 file changed, 79 insertions(+), 68 deletions(-) diff --git a/drivers/thunderbolt/eeprom.c b/drivers/thunderbolt/eeprom.c index a326cf16ca3d..2a078c69f0d2 100644 --- a/drivers/thunderbolt/eeprom.c +++ b/drivers/thunderbolt/eeprom.c @@ -416,7 +416,7 @@ static int tb_drom_parse_entries(struct tb_switch *sw, size_t header_size) if (pos + 1 == drom_size || pos + entry->len > drom_size || !entry->len) { tb_sw_warn(sw, "DROM buffer overrun\n"); - return -EILSEQ; + return -EIO; } switch (entry->type) { @@ -543,7 +543,37 @@ static int tb_drom_read_n(struct tb_switch *sw, u16 offset, u8 *val, return tb_eeprom_read_n(sw, offset, val, count); } -static int tb_drom_parse(struct tb_switch *sw) +static int tb_drom_bit_bang(struct tb_switch *sw, u16 *size) +{ + int res; + + res = tb_drom_read_n(sw, 14, (u8 *) size, 2); + if (res) + return res; + *size &= 0x3ff; + *size += TB_DROM_DATA_START; + tb_sw_dbg(sw, "reading drom (length: %#x)\n", *size); + if (*size < sizeof(struct tb_drom_header)) { + tb_sw_warn(sw, "drom too small, aborting\n"); + return -EIO; + } + + sw->drom = kzalloc(*size, GFP_KERNEL); + if (!sw->drom) + return -ENOMEM; + + res = tb_drom_read_n(sw, 0, sw->drom, *size); + if (res) + goto err; + + return 0; +err: + kfree(sw->drom); + sw->drom = NULL; + return res; +} + +static int tb_drom_parse_v1(struct tb_switch *sw) { const struct tb_drom_header *header = (const struct tb_drom_header *)sw->drom; @@ -554,7 +584,7 @@ static int tb_drom_parse(struct tb_switch *sw) tb_sw_warn(sw, "DROM UID CRC8 mismatch (expected: %#x, got: %#x)\n", header->uid_crc8, crc); - return -EILSEQ; + return -EIO; } if (!sw->uid) sw->uid = header->uid; @@ -588,6 +618,43 @@ static int usb4_drom_parse(struct tb_switch *sw) return tb_drom_parse_entries(sw, USB4_DROM_HEADER_SIZE); } +static int tb_drom_parse(struct tb_switch *sw, u16 *size) +{ + struct tb_drom_header *header = (void *) sw->drom; + int res; + + if (header->data_len + TB_DROM_DATA_START != *size) { + tb_sw_warn(sw, "drom size mismatch\n"); + goto err; + } + + tb_sw_dbg(sw, "DROM version: %d\n", header->device_rom_revision); + + switch (header->device_rom_revision) { + case 3: + res = usb4_drom_parse(sw); + break; + default: + tb_sw_warn(sw, "DROM device_rom_revision %#x unknown\n", + header->device_rom_revision); + fallthrough; + case 1: + res = tb_drom_parse_v1(sw); + break; + } + + if (res) { + tb_sw_warn(sw, "parsing DROM failed\n"); + goto err; + } + + return 0; +err: + kfree(sw->drom); + sw->drom = NULL; + return -EIO; +} + /** * tb_drom_read() - Copy DROM to sw->drom and parse it * @sw: Router whose DROM to read and parse @@ -601,8 +668,7 @@ static int usb4_drom_parse(struct tb_switch *sw) int tb_drom_read(struct tb_switch *sw) { u16 size; - struct tb_drom_header *header; - int res, retries = 1; + int res; if (sw->drom) return 0; @@ -613,11 +679,11 @@ int tb_drom_read(struct tb_switch *sw) * in a device property. Use it if available. */ if (tb_drom_copy_efi(sw, &size) == 0) - goto parse; + return tb_drom_parse(sw, &size); /* Non-Apple hardware has the DROM as part of NVM */ if (tb_drom_copy_nvm(sw, &size) == 0) - goto parse; + return tb_drom_parse(sw, &size); /* * USB4 hosts may support reading DROM through router @@ -626,7 +692,7 @@ int tb_drom_read(struct tb_switch *sw) if (tb_switch_is_usb4(sw)) { usb4_switch_read_uid(sw, &sw->uid); if (!usb4_copy_host_drom(sw, &size)) - goto parse; + return tb_drom_parse(sw, &size); } else { /* * The root switch contains only a dummy drom @@ -640,67 +706,12 @@ int tb_drom_read(struct tb_switch *sw) } /* We can use LC to get UUID later */ - if (sw->cap_lc && tb_drom_copy_nvm(sw, &size) == 0) - goto parse; - - res = tb_drom_read_n(sw, 14, (u8 *) &size, 2); + if (sw->cap_lc) + res = tb_drom_copy_nvm(sw, &size); + else + res = tb_drom_bit_bang(sw, &size); if (res) return res; - size &= 0x3ff; - size += TB_DROM_DATA_START; - tb_sw_dbg(sw, "reading drom (length: %#x)\n", size); - if (size < sizeof(*header)) { - tb_sw_warn(sw, "drom too small, aborting\n"); - return -EIO; - } - - sw->drom = kzalloc(size, GFP_KERNEL); - if (!sw->drom) - return -ENOMEM; -read: - res = tb_drom_read_n(sw, 0, sw->drom, size); - if (res) - goto err; - -parse: - header = (void *) sw->drom; - - if (header->data_len + TB_DROM_DATA_START != size) { - tb_sw_warn(sw, "drom size mismatch\n"); - if (retries--) { - msleep(100); - goto read; - } - goto err; - } - - tb_sw_dbg(sw, "DROM version: %d\n", header->device_rom_revision); - - switch (header->device_rom_revision) { - case 3: - res = usb4_drom_parse(sw); - break; - default: - tb_sw_warn(sw, "DROM device_rom_revision %#x unknown\n", - header->device_rom_revision); - fallthrough; - case 1: - res = tb_drom_parse(sw); - break; - } - - /* If the DROM parsing fails, wait a moment and retry once */ - if (res == -EILSEQ && retries--) { - tb_sw_warn(sw, "parsing DROM failed\n"); - msleep(100); - goto read; - } - if (!res) - return 0; - -err: - kfree(sw->drom); - sw->drom = NULL; - return -EIO; + return tb_drom_parse(sw, &size); }