From patchwork Wed Feb 22 17:25:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 13149393 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E5F37C636D6 for ; Wed, 22 Feb 2023 17:27:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=mLnhkV/2AXQ7Er75WdgTphimPIVfElolI1OHapP93UI=; b=30pSU5TMe2vL6q yKGbBUoeTwRrDTCvXLJkeOTy6OVIl1IOiACxIUQao7YsR6WsIBju40CgyyLOk3BMJB6ySmRmfHtsu DPvrKg7D6nMf8Sgi2oxg8vBgq0MUALDa+pQ9r5hh1gSITJB2p9e+XIa74c0jsIOcSTYHSU7VoqKn8 ngoSX2HExb/aVPXZAK9hJeD9aAbcf9STh3kgj3c/h3c6FG7pZ52ozlgA6aXTbNkQQlJmk6JsBLHIH po6KqPqrsBSuAhB31BiRILf2x7mQRHiL1VxsX3yxqFmc4c9EbAXAK4xhBRSXUGNmYwT7ogC7urLGR dTk+j6kFiX+NgpcM2CAw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pUssY-00DDp3-G2; Wed, 22 Feb 2023 17:26:06 +0000 Received: from relay2-d.mail.gandi.net ([2001:4b98:dc4:8::222]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pUssU-00DDlk-Ea for linux-arm-kernel@lists.infradead.org; Wed, 22 Feb 2023 17:26:04 +0000 Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 9323A4000B; Wed, 22 Feb 2023 17:25:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1677086759; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=liyc04uOfojNPzcXlOkF1rgtORQMcNRHYaWkiDbA6a0=; b=mvjWs1Z5miVuBFhQ2lrmffWQEUftHKgpfdmtOtiNOKutAM7No18k/KwnwSTsSxOXe2aUms XNs3u/bdFz07d8XJFz4Mf1mNL8e+7xXuH+D7aWyN/p4UdW9i9FIEB+Fe34Zd9g1y3d5ES7 0tyava2uy+oe6FI+3Id5/4DEcCgSvbj8R4DnJQjD1Ur6KNaVw0kbNZ6xiG+eoHhg9Xz0ap JE18X0lYrp9C5qHwspz3T3h1JfBl8A9pM1tDRiP6MIr2/qVdKh3TTeQhtozxzs1SidYIAJ J2PVlp6SBl7i8ex/TODZ2wV1tzELjcC/S+f/Ha/y+g6UMaDKy42WH8csXWp65A== From: Luca Ceresoli To: Rob Herring , Krzysztof Kozlowski , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Luca Ceresoli , Martyn Welch Cc: Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Marek Vasut , Abel Vesa , Jacky Bai , Laurent Pinchart , Lucas Stach , Michael Turquette , Stephen Boyd , Thomas Petazzoni Subject: [PATCH] arm64: dts: imx8mp-msc-sm2s: Add sound card Date: Wed, 22 Feb 2023 18:25:52 +0100 Message-Id: <20230222172552.1545519-1-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230222182252.2ad6d82b@booty> References: <20230222182252.2ad6d82b@booty> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230222_092602_831137_4F2E75C6 X-CRM114-Status: GOOD ( 10.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The MSC SM2-MB-EP1 carrier board for the SM2S-IMX8PLUS SMARC module has an NXPP SGTL5000 audio codec connected to I2S-0 (sai2). This requires to: * add the power supplies (always on) * enable sai2 with pinmuxes * reparent the CLKOUT1 clock that feeds the codec SYS_MCLK to IMX8MP_CLK_24M in order it to generate an accurate 24 MHz rate Signed-off-by: Luca Ceresoli --- .../dts/freescale/imx8mp-msc-sm2s-ep1.dts | 60 +++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s-ep1.dts b/arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s-ep1.dts index 470ff8e31e32..894d9809f76d 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s-ep1.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s-ep1.dts @@ -14,6 +14,57 @@ / { compatible = "avnet,sm2s-imx8mp-14N0600E-ep1", "avnet,sm2s-imx8mp-14N0600E", "avnet,sm2s-imx8mp", "fsl,imx8mp"; + + reg_vcc_3v3_audio: 3v3_audio_regulator { + compatible = "regulator-fixed"; + regulator-name = "VCC_3V3_AUD"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_vcc_1v8_audio: 1v8_audio_regulator { + compatible = "regulator-fixed"; + regulator-name = "VCC_1V8_AUD"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + sgtl5000-sound { + compatible = "fsl,imx-audio-sgtl5000"; + model = "imx-sgtl5000"; + audio-cpu = <&sai2>; + audio-codec = <&sgtl5000_codec>; + }; +}; + +&i2c1 { + sgtl5000_codec: sgtl5000@a { + compatible = "fsl,sgtl5000"; + reg = <0x0a>; + + assigned-clocks = <&clk IMX8MP_CLK_CLKOUT1_SEL>; + assigned-clock-parents = <&clk IMX8MP_CLK_24M>; + assigned-clock-rates = <24000000>; + clocks = <&clk IMX8MP_CLK_CLKOUT1>; + clock-names = "mclk"; + + VDDA-supply = <®_vcc_3v3_audio>; + VDDD-supply = <®_vcc_1v8_audio>; + VDDIO-supply = <®_vcc_1v8_audio>; + }; +}; + +/* I2S-0 = sai2 */ +&sai2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sai2>; + + assigned-clocks = <&clk IMX8MP_CLK_SAI2>; + assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>; + assigned-clock-rates = <12288000>; + + fsl,sai-mclk-direction-output; + status = "okay"; }; &flexcan1 { @@ -49,4 +100,13 @@ pinctrl_smarc_gpio: smarcgpiosgrp { , /* GPIO12 */ ; /* GPIO13 */ }; + + pinctrl_sai2: sai2grp { + fsl,pins = < + MX8MP_IOMUXC_SAI2_TXFS__AUDIOMIX_SAI2_TX_SYNC 0xd6 + MX8MP_IOMUXC_SAI2_TXC__AUDIOMIX_SAI2_TX_BCLK 0xd6 + MX8MP_IOMUXC_SAI2_RXD0__AUDIOMIX_SAI2_RX_DATA00 0xd6 + MX8MP_IOMUXC_SAI2_TXD0__AUDIOMIX_SAI2_TX_DATA00 0xd6 + >; + }; };