From patchwork Thu Feb 23 01:47:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13149767 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7847CC636D6 for ; Thu, 23 Feb 2023 01:47:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232935AbjBWBrp (ORCPT ); Wed, 22 Feb 2023 20:47:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50352 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232580AbjBWBrn (ORCPT ); Wed, 22 Feb 2023 20:47:43 -0500 Received: from mail-lf1-x130.google.com (mail-lf1-x130.google.com [IPv6:2a00:1450:4864:20::130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 82F0D41B7C for ; Wed, 22 Feb 2023 17:47:42 -0800 (PST) Received: by mail-lf1-x130.google.com with SMTP id m6so12537367lfq.5 for ; Wed, 22 Feb 2023 17:47:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=mCGO18fFeWFx1/oqatAOPTvgztN8ex2StTWWkNQew7c=; b=UqcUrP62HrsiAt9Q6uCcF6e86j+YbcDvjBn5qnC2A5wInQidrtGebmp12w1PhJijsf eyyLLK+0Rm3o/ycFDsAVvXQrUhPkj2xMqrFkW7yEsYmVAlXyab1/4iezenzh/33xuY4f qO08D8OrbEZsTLr2Hi+HxZ++iooZdvz9tTCCMeCktzMRjEpCNl2lgAUFHcpQezwWShrh bFyLHOsPYMlgsJwEkMRMJKFpeZJSH9PBiPY4/O/dfUl66wOLOhAi0oLCpH6RUurVYfz0 LBcVg7pdRIZT6JXurlxjAukXhHn9BDVoNUhMytj/JFr2dKZn5z9f7LzE4iEBt8ElWAJ4 zC5w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mCGO18fFeWFx1/oqatAOPTvgztN8ex2StTWWkNQew7c=; b=OhfZWYBmVrACfg11iGTPqaxCqwcWxQaWi/AvlSrJe/x1UOFjKbIUsfU5TKZK/sYICt d0pgyFHXoKVOWZxU+A1MSlJ8TMgEVDWc0Fson1sLj4tGPwqptys9KTpVMkJu0Im3aZ7B 6zCx5T1qjTzypo8reK4u2nCCSA8kOU9fRTOJIPegtZ6WV3nUj6E/kFftCKggN1sjLLTF ltz4eD8k2Q+8zJCP3uXJyCVyz3wWirt6E/u6LW4h8Dp9nboEA0fB4daCPGjHbqrWCXoA TktK/UGHjkPnd6KAm+dv5upyL5M5mA/GsvBYmRApzmBGaPteFGTMJWlZqhpmerq/ZDhI wItw== X-Gm-Message-State: AO0yUKWiETiqHx8TFENPyDoTYK5sCEXs456UKnWmtNkMO24gBdZiTfcw rLdn9Q9RpiwmcuhHatcMAUndbA== X-Google-Smtp-Source: AK7set8xB6MQPyyJqTPpJqKVNCu8vdvqHdvsXstaNqRHFGhNsyhWgBlzm2zLSO/JTK2EEOF8sAaHlA== X-Received: by 2002:a05:6512:3988:b0:4a4:68b7:deb7 with SMTP id j8-20020a056512398800b004a468b7deb7mr4160498lfu.19.1677116860797; Wed, 22 Feb 2023 17:47:40 -0800 (PST) Received: from [192.168.1.101] (abxi151.neoplus.adsl.tpnet.pl. [83.9.2.151]) by smtp.gmail.com with ESMTPSA id 12-20020ac2482c000000b004dc807b904bsm427376lft.120.2023.02.22.17.47.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Feb 2023 17:47:40 -0800 (PST) From: Konrad Dybcio Date: Thu, 23 Feb 2023 02:47:37 +0100 Subject: [PATCH v2 1/6] drm/msm/a2xx: Include perf counter reg values in XML MIME-Version: 1.0 Message-Id: <20230223-topic-opp-v2-1-24ed24cd7358@linaro.org> References: <20230223-topic-opp-v2-0-24ed24cd7358@linaro.org> In-Reply-To: <20230223-topic-opp-v2-0-24ed24cd7358@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1677116858; l=830; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=mzjSUO+qHIiKaLiyXFVom/GoyNVpw37b+tvLzQHI5RY=; b=sOt90zAVghwEBEdFaBDhwOmr+WDEq6xWWtPbhadU8HLedLihLtGPgw3G+utNjj5nKzLKe9UXi7Sp /8dBYiuOABV7JJpxXdNZpynZqYX62ZFL3PLs9g7th7h4bt1MOJga X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This is a partial merge of [1], subject to be dropped if a header update is executed. [1] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21480/ Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/adreno/a2xx.xml.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/a2xx.xml.h b/drivers/gpu/drm/msm/adreno/a2xx.xml.h index afa6023346c4..b85fdc082bc1 100644 --- a/drivers/gpu/drm/msm/adreno/a2xx.xml.h +++ b/drivers/gpu/drm/msm/adreno/a2xx.xml.h @@ -1060,6 +1060,12 @@ enum a2xx_mh_perfcnt_select { AXI_TOTAL_READ_REQUEST_DATA_BEATS = 181, }; +enum perf_mode_cnt { + PERF_STATE_RESET = 0, + PERF_STATE_ENABLE = 1, + PERF_STATE_FREEZE = 2, +}; + enum adreno_mmu_clnt_beh { BEH_NEVR = 0, BEH_TRAN_RNG = 1, From patchwork Thu Feb 23 01:47:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13149766 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 933F2C64ED6 for ; Thu, 23 Feb 2023 01:47:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232944AbjBWBrq (ORCPT ); Wed, 22 Feb 2023 20:47:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50374 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232937AbjBWBrp (ORCPT ); Wed, 22 Feb 2023 20:47:45 -0500 Received: from mail-lf1-x132.google.com (mail-lf1-x132.google.com [IPv6:2a00:1450:4864:20::132]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F355B41B6E for ; Wed, 22 Feb 2023 17:47:43 -0800 (PST) Received: by mail-lf1-x132.google.com with SMTP id s20so12176116lfb.11 for ; Wed, 22 Feb 2023 17:47:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=0I63GzqZ4/pdwcdXOU5rzNuBienj4oVxRvi/wF6aWHM=; b=Lqbt+WCssCVhJH/OOOabLEzoesPyNKKHbilHUFk+4QO5irDF0xosnm+5q0Y4tMto1E uJhnTGKopIRN2Ph6fnS49cmDkbkb3AgUphEyv+3dM7lURxXyV2qJrpfEYQPfxduh0jxB Fykh/C/FTn1J2laX+JDUR9lBFFr3Et8H3GbZWsdPlZ04N91aRmEiiXac/qWmBHh7LG20 4QIOHPaK0xZm6s6h+7iPIdX+8LJnRlBeUYZijpY5sRSafPVvY3FJG09xGTPhcaAe+Z8L Ex6sLq4rWxVHudUa/P5/Fm7FC3sTBl5S8R88OoLXANZvD+sK4+UWj/lFEX+7OsgMm16j sCag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0I63GzqZ4/pdwcdXOU5rzNuBienj4oVxRvi/wF6aWHM=; b=a9MKdi0IPS4jqiyCzdXWMrfmChnmSVEdqAbt1Lpm0vmKU7w7EDN641NEqpQU0n2COy Yct1TkdLZNYDUpYuNvFGUl4SMUTbVuOIiXl3Ub9AFOo4pDqZN3YEu7v2B8lvoR2lq/zT Sp4uJ/OA+etPQRwqKGyG1bSGqAsQXRHhVb72pKeBMPRxZMqRXXyJpGhBavbxdPohpWHV 8FKLawonwFjBRh78vDCYw3ZquM4IvTmA4qMz7qc+LCXwReJSPgge1jZiQ7UU+Yg9HElK juL8lPVraLsit2BQZbMu11we0WBWFKZS3Pz4h4/J/40AAHven5pRtZM3KteuMXp29MVg SHuw== X-Gm-Message-State: AO0yUKVlhFEG1CYyau76Ihib7IgCGVyH73lz/H5EN1DLfgvGcKb3+8CV 222J5c9pNvdN1pP/8SCLEpsyBg== X-Google-Smtp-Source: AK7set+hNiP8e2YnQwhmrwZkk0874NqpqVAwu81d4anrdCgMrX0BBdy4BekWdcyZxCe3XneuqJ4OnQ== X-Received: by 2002:ac2:5a5c:0:b0:4d7:58c8:5f44 with SMTP id r28-20020ac25a5c000000b004d758c85f44mr3476080lfn.12.1677116862256; Wed, 22 Feb 2023 17:47:42 -0800 (PST) Received: from [192.168.1.101] (abxi151.neoplus.adsl.tpnet.pl. [83.9.2.151]) by smtp.gmail.com with ESMTPSA id 12-20020ac2482c000000b004dc807b904bsm427376lft.120.2023.02.22.17.47.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Feb 2023 17:47:41 -0800 (PST) From: Konrad Dybcio Date: Thu, 23 Feb 2023 02:47:38 +0100 Subject: [PATCH v2 2/6] drm/msm/adreno: Use OPP for every GPU generation MIME-Version: 1.0 Message-Id: <20230223-topic-opp-v2-2-24ed24cd7358@linaro.org> References: <20230223-topic-opp-v2-0-24ed24cd7358@linaro.org> In-Reply-To: <20230223-topic-opp-v2-0-24ed24cd7358@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1677116858; l=6235; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=ZLdJVtXa5OKKmfHA12Ep31JDGaPgYsonm/CsCSOeZZM=; b=j3U8ryJ7Pa3zdIXcfPRy23GXdpn9yPokiQ7mfYAzTieE3Gpo7ryz1533HQvPz+0QDeSF/Y9E8cMj Td95oUplAlRZddmwjbCPMx2UoOKLYhWDSbzDtFjUplLEpw4u/C5Q X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Some older GPUs (namely a2xx with no opp tables at all and a320 with downstream-remnants gpu pwrlevels) used not to have OPP tables. They both however had just one frequency defined, making it extremely easy to construct such an OPP table from within the driver if need be. Do so and switch all clk_set_rate calls on core_clk to their OPP counterparts. Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 99 +++++++++++++++------------------ drivers/gpu/drm/msm/msm_gpu.c | 4 +- drivers/gpu/drm/msm/msm_gpu_devfreq.c | 2 +- 3 files changed, 48 insertions(+), 57 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c index ce6b76c45b6f..8721e3d6231a 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -922,73 +922,48 @@ void adreno_wait_ring(struct msm_ringbuffer *ring, uint32_t ndwords) ring->id); } -/* Get legacy powerlevels from qcom,gpu-pwrlevels and populate the opp table */ -static int adreno_get_legacy_pwrlevels(struct device *dev) -{ - struct device_node *child, *node; - int ret; - - node = of_get_compatible_child(dev->of_node, "qcom,gpu-pwrlevels"); - if (!node) { - DRM_DEV_DEBUG(dev, "Could not find the GPU powerlevels\n"); - return -ENXIO; - } - - for_each_child_of_node(node, child) { - unsigned int val; - - ret = of_property_read_u32(child, "qcom,gpu-freq", &val); - if (ret) - continue; - - /* - * Skip the intentionally bogus clock value found at the bottom - * of most legacy frequency tables - */ - if (val != 27000000) - dev_pm_opp_add(dev, val, 0); - } - - of_node_put(node); - - return 0; -} - -static void adreno_get_pwrlevels(struct device *dev, +static int adreno_get_pwrlevels(struct device *dev, struct msm_gpu *gpu) { + struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); unsigned long freq = ULONG_MAX; struct dev_pm_opp *opp; int ret; gpu->fast_rate = 0; - /* You down with OPP? */ - if (!of_find_property(dev->of_node, "operating-points-v2", NULL)) - ret = adreno_get_legacy_pwrlevels(dev); - else { - ret = devm_pm_opp_of_add_table(dev); - if (ret) - DRM_DEV_ERROR(dev, "Unable to set the OPP table\n"); - } - - if (!ret) { - /* Find the fastest defined rate */ - opp = dev_pm_opp_find_freq_floor(dev, &freq); - if (!IS_ERR(opp)) { - gpu->fast_rate = freq; - dev_pm_opp_put(opp); + /* devm_pm_opp_of_add_table may error out but will still create an OPP table */ + ret = devm_pm_opp_of_add_table(dev); + if (ret == -ENODEV) { + /* Special cases for ancient hw with ancient DT bindings */ + if (adreno_is_a2xx(adreno_gpu)) { + dev_warn(dev, "Unable to find the OPP table. Falling back to 200 MHz.\n"); + dev_pm_opp_add(dev, 200000000, 0); + } else if (adreno_is_a320(adreno_gpu)) { + dev_warn(dev, "Unable to find the OPP table. Falling back to 450 MHz.\n"); + dev_pm_opp_add(dev, 450000000, 0); + } else { + DRM_DEV_ERROR(dev, "Unable to find the OPP table\n"); + return -ENODEV; } + } else if (ret) { + DRM_DEV_ERROR(dev, "Unable to set the OPP table\n"); + return ret; } - if (!gpu->fast_rate) { - dev_warn(dev, - "Could not find a clock rate. Using a reasonable default\n"); - /* Pick a suitably safe clock speed for any target */ - gpu->fast_rate = 200000000; + /* Find the fastest defined rate */ + opp = dev_pm_opp_find_freq_floor(dev, &freq); + + if (IS_ERR(opp)) + return PTR_ERR(opp); + else { + gpu->fast_rate = freq; + dev_pm_opp_put(opp); } DBG("fast_rate=%u, slow_rate=27000000", gpu->fast_rate); + + return 0; } int adreno_gpu_ocmem_init(struct device *dev, struct adreno_gpu *adreno_gpu, @@ -1046,6 +1021,20 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev, struct adreno_rev *rev = &config->rev; const char *gpu_name; u32 speedbin; + int ret; + + /* + * This can only be done before devm_pm_opp_of_add_table(), or + * dev_pm_opp_set_config() will WARN_ON() + */ + if (IS_ERR(devm_clk_get(dev, "core"))) { + /* + * If "core" is absent, go for the legacy clock name. + * If we got this far in probing, it's a given one of them exists. + */ + devm_pm_opp_set_clkname(dev, "core_clk"); + } else + devm_pm_opp_set_clkname(dev, "core"); adreno_gpu->funcs = funcs; adreno_gpu->info = adreno_info(config->rev); @@ -1070,7 +1059,9 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev, adreno_gpu_config.nr_rings = nr_rings; - adreno_get_pwrlevels(dev, gpu); + ret = adreno_get_pwrlevels(dev, gpu); + if (ret) + return ret; pm_runtime_set_autosuspend_delay(dev, adreno_gpu->info->inactive_period); diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c index 380249500325..cdcb00df3f25 100644 --- a/drivers/gpu/drm/msm/msm_gpu.c +++ b/drivers/gpu/drm/msm/msm_gpu.c @@ -59,7 +59,7 @@ static int disable_pwrrail(struct msm_gpu *gpu) static int enable_clk(struct msm_gpu *gpu) { if (gpu->core_clk && gpu->fast_rate) - clk_set_rate(gpu->core_clk, gpu->fast_rate); + dev_pm_opp_set_rate(&gpu->pdev->dev, gpu->fast_rate); /* Set the RBBM timer rate to 19.2Mhz */ if (gpu->rbbmtimer_clk) @@ -78,7 +78,7 @@ static int disable_clk(struct msm_gpu *gpu) * will be rounded down to zero anyway so it all works out. */ if (gpu->core_clk) - clk_set_rate(gpu->core_clk, 27000000); + dev_pm_opp_set_rate(&gpu->pdev->dev, 27000000); if (gpu->rbbmtimer_clk) clk_set_rate(gpu->rbbmtimer_clk, 0); diff --git a/drivers/gpu/drm/msm/msm_gpu_devfreq.c b/drivers/gpu/drm/msm/msm_gpu_devfreq.c index e27dbf12b5e8..ea70c1c32d94 100644 --- a/drivers/gpu/drm/msm/msm_gpu_devfreq.c +++ b/drivers/gpu/drm/msm/msm_gpu_devfreq.c @@ -48,7 +48,7 @@ static int msm_devfreq_target(struct device *dev, unsigned long *freq, gpu->funcs->gpu_set_freq(gpu, opp, df->suspended); mutex_unlock(&df->lock); } else { - clk_set_rate(gpu->core_clk, *freq); + dev_pm_opp_set_rate(dev, *freq); } dev_pm_opp_put(opp); From patchwork Thu Feb 23 01:47:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13149768 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 98AD4C64EC7 for ; Thu, 23 Feb 2023 01:47:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232978AbjBWBrr (ORCPT ); Wed, 22 Feb 2023 20:47:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50420 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232947AbjBWBrq (ORCPT ); Wed, 22 Feb 2023 20:47:46 -0500 Received: from mail-lf1-x12f.google.com (mail-lf1-x12f.google.com [IPv6:2a00:1450:4864:20::12f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0767B41B67 for ; Wed, 22 Feb 2023 17:47:45 -0800 (PST) Received: by mail-lf1-x12f.google.com with SMTP id bp25so12613602lfb.0 for ; Wed, 22 Feb 2023 17:47:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=E5+yg0/0krNLTPpeG4iJfNpIusLghNH594MfKs2+GeE=; b=VusN6O7fjZqkg7WocbO4LW1a6CgMRWyVk0/9MiIMeJM3pS/DJ0CZmV2ikyH9jMbKM+ M3rKWTiVqtzKfIN5yaFpFeFjp7htcoafd+H7ahCAxEGSB+R9Xtvwa4W30prplbmiIKO3 h8YfiW6WIPe229IijvvvnL8mmYhzWiYvybCCamaU8D0oUUwJCbTxVh+oQs+fmpLFUGNC m2h5eX4/N7BvcIZPdc1aqXIJB8jn0lAzxSP22PwAo6PoDay/LufuRsfNhkyKdHUNf5Cb 4imN4KAxjDVvNO8BhL9D88BKfecRKEEvDmg8U7qkEUafxeflOWPWGDT5tA4E9Nmbzfp/ x0Fw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=E5+yg0/0krNLTPpeG4iJfNpIusLghNH594MfKs2+GeE=; b=haLo1QMxxsZKnBWu/ev0782vZXl4xkkzepN82cbONVWQYZ/h2SXShGLhhwP9hFdQkx OJvhY5tG5pgjIUFEfMOB8a27kYl5DjpsdRcj+mYjIKwzOznLj5R89YWGv9rXcLC0MhI1 0pJKCoTT9wRyqqvZcU55wER8jC1tOPmc8iqfafezqJYE3t5Da1Y31y1v8SEVjnnRt3tW qsslSngRJvu+64fsp7uO/ZXBbQ4q8gqO+XHbVBExby838+IoblpgwBEDaFPBV5LoDbGm 1FpW3d+qrcyJNLBq40XlGRt0SnKmGHuEUUvgAPGLcVWL8DCgQ5xSH9uGRcwuTuf1NU9L BDAw== X-Gm-Message-State: AO0yUKW0tJNBaO+xC/dDWlHlyA8mDc4+x1njs1AMSPz6QQpnrx1m+CAh l+j75pyRh3s8JxjJfflpmVLOTA== X-Google-Smtp-Source: AK7set/jwh4+qXjurf2yt/eMc2UNv+XASCYrUdC1nJoIhQj9W7Cq93cKl0LD7sGMMsbR/itIq38QQA== X-Received: by 2002:ac2:5ecc:0:b0:4cc:725d:9d3d with SMTP id d12-20020ac25ecc000000b004cc725d9d3dmr3680183lfq.54.1677116863423; Wed, 22 Feb 2023 17:47:43 -0800 (PST) Received: from [192.168.1.101] (abxi151.neoplus.adsl.tpnet.pl. [83.9.2.151]) by smtp.gmail.com with ESMTPSA id 12-20020ac2482c000000b004dc807b904bsm427376lft.120.2023.02.22.17.47.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Feb 2023 17:47:43 -0800 (PST) From: Konrad Dybcio Date: Thu, 23 Feb 2023 02:47:39 +0100 Subject: [PATCH v2 3/6] drm/msm/a2xx: Implement .gpu_busy MIME-Version: 1.0 Message-Id: <20230223-topic-opp-v2-3-24ed24cd7358@linaro.org> References: <20230223-topic-opp-v2-0-24ed24cd7358@linaro.org> In-Reply-To: <20230223-topic-opp-v2-0-24ed24cd7358@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1677116858; l=2023; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=o2IJoNBHAOSR6oYp4+Uz08OuccC4IUsqkONjhNT3F0Q=; b=s5/hbhoiSbqwQp+Bkv9gVx0WwGsnEjR+kvSlH359RLCiLjLo6w9Ek4Y4RWaXdFQy9iukWvt19fpG zU+0c93AADckr0oItDowSnXRKpk58/ORvjCDnY3rxbK1odDVmjDT X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Implement gpu_busy based on the downstream msm-3.4 code [1]. This allows us to use devfreq on this old old old hardware! [1] https://github.com/LineageOS/android_kernel_sony_apq8064/blob/lineage-16.0/drivers/gpu/msm/adreno_a2xx.c#L1975 Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/adreno/a2xx_gpu.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/a2xx_gpu.c b/drivers/gpu/drm/msm/adreno/a2xx_gpu.c index c67089a7ebc1..6f9876b37db5 100644 --- a/drivers/gpu/drm/msm/adreno/a2xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a2xx_gpu.c @@ -481,6 +481,29 @@ a2xx_create_address_space(struct msm_gpu *gpu, struct platform_device *pdev) return aspace; } +/* While the precise size of this field is unknown, it holds at least these three values.. */ +static u64 a2xx_gpu_busy(struct msm_gpu *gpu, unsigned long *out_sample_rate) +{ + u64 busy_cycles; + + /* Freeze the counter */ + gpu_write(gpu, REG_A2XX_CP_PERFMON_CNTL, PERF_STATE_FREEZE); + + busy_cycles = gpu_read64(gpu, REG_A2XX_RBBM_PERFCOUNTER1_LO); + + /* Reset the counter */ + gpu_write(gpu, REG_A2XX_CP_PERFMON_CNTL, PERF_STATE_RESET); + + /* Re-enable the performance monitors */ + gpu_rmw(gpu, REG_A2XX_RBBM_PM_OVERRIDE2, BIT(6), BIT(6)); + gpu_write(gpu, REG_A2XX_RBBM_PERFCOUNTER1_SELECT, 1); + gpu_write(gpu, REG_A2XX_CP_PERFMON_CNTL, PERF_STATE_ENABLE); + + *out_sample_rate = clk_get_rate(gpu->core_clk); + + return busy_cycles; +} + static u32 a2xx_get_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) { ring->memptrs->rptr = gpu_read(gpu, REG_AXXX_CP_RB_RPTR); @@ -502,6 +525,7 @@ static const struct adreno_gpu_funcs funcs = { #if defined(CONFIG_DEBUG_FS) || defined(CONFIG_DEV_COREDUMP) .show = adreno_show, #endif + .gpu_busy = a2xx_gpu_busy, .gpu_state_get = a2xx_gpu_state_get, .gpu_state_put = adreno_gpu_state_put, .create_address_space = a2xx_create_address_space, From patchwork Thu Feb 23 01:47:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13149770 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 517E8C64EC7 for ; Thu, 23 Feb 2023 01:47:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233007AbjBWBrv (ORCPT ); Wed, 22 Feb 2023 20:47:51 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50512 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232983AbjBWBrs (ORCPT ); Wed, 22 Feb 2023 20:47:48 -0500 Received: from mail-lf1-x12e.google.com (mail-lf1-x12e.google.com [IPv6:2a00:1450:4864:20::12e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 31F0843443 for ; Wed, 22 Feb 2023 17:47:46 -0800 (PST) Received: by mail-lf1-x12e.google.com with SMTP id n2so9192306lfb.12 for ; Wed, 22 Feb 2023 17:47:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=4RozdFg8UcjNGaMEUfY94uV2Q1ptXwQxOYUwNdKHWzQ=; b=esohPNulw2M7Ju+p/HyTXssOZPF43TTgdrx9PSZfSpeex+8N4B7DBUkRzpDp48A09v DaOM/jOmfgSoxNXBbdwRIwrxK1fhe7sI1RtggfazHsUl/aTcPiOIcRn+4LB+HLLalwhJ +TnDmrtffCDZ/mpmathGjIFtgVSyJNkAtPnaiaQWRbQT6sj7UUdmPaBFD0M6XbR8I97l UQzEmubUTAq+cm1eN7YokQ8N29SudFC9aZvbaHcvB/aZBOu9KnN07fBLC5M2LLvkr3mT fDiC2g9CsNgFyndqQSsUr0JV4BZDOLKKHPxTMeswaq6N2Euw4K8xfPBNdYgc3LhKbE9S Faig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4RozdFg8UcjNGaMEUfY94uV2Q1ptXwQxOYUwNdKHWzQ=; b=x20xiMoaQgMk21KlDsVYtgCeT8cnPrNPIb0qaIx693Sg6X/SZhyclxyooLkOk3W7Le 9iu6TN2xFHqyWMoj+1eyVjGoJ8k7U2LU8tVc7ce3dq3W6YRJaHYvWA8VRqec1lABYDe4 mFqYKxoEUb2QPxbqtUNudLQUI1nZ/vfYZn5mrI0HjQ4RYOpOhKyg7c9mtZGgiAlSh6id qy+GzxNYMaXgGP5BEVesAoORNtRM5qUHoY0GeNy8LRXRWeio7nccl2MXNYOAk8hLAnCe 06BhM+6/fl76aV6o0cp1fKbJv+RPZM9msJ/7hAWVshp45CPxzm3uO42+J7N4BT1VEPtA OKkg== X-Gm-Message-State: AO0yUKWYYY68X8DUnjlfvtEGcouXmVdnl/RcYIKjuFwSyu7eDuBaMfPD b498I4BMHjyvGxz0JHNxfBL7vA== X-Google-Smtp-Source: AK7set/NOhyhF49utUZLVRvxPiTB2uoF1cCq+QQKx/9emXY264rqOyfCOP1exk5q0CITTox6BfZsqA== X-Received: by 2002:a19:f005:0:b0:4a4:68b9:19f6 with SMTP id p5-20020a19f005000000b004a468b919f6mr3708824lfc.30.1677116864589; Wed, 22 Feb 2023 17:47:44 -0800 (PST) Received: from [192.168.1.101] (abxi151.neoplus.adsl.tpnet.pl. [83.9.2.151]) by smtp.gmail.com with ESMTPSA id 12-20020ac2482c000000b004dc807b904bsm427376lft.120.2023.02.22.17.47.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Feb 2023 17:47:44 -0800 (PST) From: Konrad Dybcio Date: Thu, 23 Feb 2023 02:47:40 +0100 Subject: [PATCH v2 4/6] drm/msm/a3xx: Implement .gpu_busy MIME-Version: 1.0 Message-Id: <20230223-topic-opp-v2-4-24ed24cd7358@linaro.org> References: <20230223-topic-opp-v2-0-24ed24cd7358@linaro.org> In-Reply-To: <20230223-topic-opp-v2-0-24ed24cd7358@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1677116858; l=1452; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=sAA92dCqoQlGesDQKUB68UAlcg2YIqQbh8UmjiEN524=; b=GVnaZnlQ6N+BD1eAG7ueoV0GF0HZZ3QeXEdiAAHLSxSj/otEEt/esgibqfS+fVabGvCIunPtJz75 w8iUO2JPBBZO7i/A1THaoFJbtoSTtLJ5z0wq/ODIxwXqLY6lcU75 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for gpu_busy on a3xx, which is required for devfreq support. Tested-by: Dmitry Baryshkov #ifc6410 Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c index 948785ed07bb..c86b377f6f0d 100644 --- a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c @@ -477,6 +477,16 @@ static struct msm_gpu_state *a3xx_gpu_state_get(struct msm_gpu *gpu) return state; } +static u64 a3xx_gpu_busy(struct msm_gpu *gpu, unsigned long *out_sample_rate) +{ + u64 busy_cycles; + + busy_cycles = gpu_read64(gpu, REG_A3XX_RBBM_PERFCTR_RBBM_1_LO); + *out_sample_rate = clk_get_rate(gpu->core_clk); + + return busy_cycles; +} + static u32 a3xx_get_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) { ring->memptrs->rptr = gpu_read(gpu, REG_AXXX_CP_RB_RPTR); @@ -498,6 +508,7 @@ static const struct adreno_gpu_funcs funcs = { #if defined(CONFIG_DEBUG_FS) || defined(CONFIG_DEV_COREDUMP) .show = adreno_show, #endif + .gpu_busy = a3xx_gpu_busy, .gpu_state_get = a3xx_gpu_state_get, .gpu_state_put = adreno_gpu_state_put, .create_address_space = adreno_create_address_space, From patchwork Thu Feb 23 01:47:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13149769 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CD601C64ED6 for ; Thu, 23 Feb 2023 01:47:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232964AbjBWBru (ORCPT ); Wed, 22 Feb 2023 20:47:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50562 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232947AbjBWBrt (ORCPT ); Wed, 22 Feb 2023 20:47:49 -0500 Received: from mail-lf1-x132.google.com (mail-lf1-x132.google.com [IPv6:2a00:1450:4864:20::132]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6FB4D457CE for ; Wed, 22 Feb 2023 17:47:47 -0800 (PST) Received: by mail-lf1-x132.google.com with SMTP id n2so9192351lfb.12 for ; Wed, 22 Feb 2023 17:47:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=GGhJ8k8BvYcG4UvdUcw3fi971zbE82bjXqWQD3F+nXY=; b=ldmW/ilzYBZSCA++GxzPyyWkJ9St3Yw6f0acU3vMlovh8nGZ09axkbDopIWmHhy5r3 RKk+BcjWDQxjERBaHcat7fpz3LJGOOObvDIDk0MZuhT9fQhrNKcIOUJ7YqNe1DhsMtHD UEsQoAHfImfOpsgDVwB420ikxTcKMboeuC+1TOyiVcP1cjUJK4WQGj6QBFQXsyvORhhG OkuE3Xv1cU+UU9JiEEBxVqX2kQ+5BFKiY0XmeMPx5AS6ZVoVW3is9ZoxctlOPDFuBG4R WS8lBPianCAIhWBJuj7YyR9+Rm6l+U5D2DUx3IRJ1yhA9DEGXSnLzEzQRpbVqRIqzdZF MF6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=GGhJ8k8BvYcG4UvdUcw3fi971zbE82bjXqWQD3F+nXY=; b=xixhi9No+6U33peaTB88+HiJezk3HbzVd+BLESgjk0kpu71gSvKBCOaDM+ZNUuaYA+ 8u2VDT5IZqLHtjdgt14SFD5NKTreVqqx5B9DyhL1XE+CQMG5dZmGdHf51DRu1pQh7U3c S/mo4TE5c8KAhsFifkgXqrJI1539dLqRG/95AmxP3eKE3Ux/y7hv+4xfZ5B8h1g8Mydo OTdU5cS/ieriHXDDamlxBdhPR+qbM5piZTzjbVe6tZ4nwZ7zJ2XzMxtMnRuvgkjuufzc 2FrpehyQkjp93ApE+ciDO+dH6Rl3Qdz4QICWXs2zataK7PALLffyh4MQdA8g3YVLTnwW w24A== X-Gm-Message-State: AO0yUKXo8LTdAZJ8Qr4tv+sqeQHIcr0fsvt4cS/lCAB3PgOKCqnpUkfu bF73HB/8gX31022N85O+OlAQkQ== X-Google-Smtp-Source: AK7set9PMp+yF3wgjC3PGFWQ8f6vxlGN6VYMdTeVO7IMMHRkvT3q22dmsGb7RDmy4uqz1vm6Ewjb2g== X-Received: by 2002:ac2:5207:0:b0:4dc:8192:c5e6 with SMTP id a7-20020ac25207000000b004dc8192c5e6mr3568694lfl.13.1677116865722; Wed, 22 Feb 2023 17:47:45 -0800 (PST) Received: from [192.168.1.101] (abxi151.neoplus.adsl.tpnet.pl. [83.9.2.151]) by smtp.gmail.com with ESMTPSA id 12-20020ac2482c000000b004dc807b904bsm427376lft.120.2023.02.22.17.47.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Feb 2023 17:47:45 -0800 (PST) From: Konrad Dybcio Date: Thu, 23 Feb 2023 02:47:41 +0100 Subject: [PATCH v2 5/6] drm/msm/a4xx: Implement .gpu_busy MIME-Version: 1.0 Message-Id: <20230223-topic-opp-v2-5-24ed24cd7358@linaro.org> References: <20230223-topic-opp-v2-0-24ed24cd7358@linaro.org> In-Reply-To: <20230223-topic-opp-v2-0-24ed24cd7358@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1677116858; l=1379; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=Mfqjq6oPzn0mWycAv8UA9lcR+KDEDYvYmMvB7YZF6m4=; b=Mfz5NyNGrq9Nm2ebit78yYPih/DJD0y9rsEuSb/O6TQITG+HY8Lpy7U/ZcaAMxslu1ZDXovwWvec Sl2idkBSBQcCcNyqzRAVoMvNDIdkXp2SWe4SvswlugR1Av5gR6yI X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for gpu_busy on a4xx, which is required for devfreq support. Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c index 3e09d3a7a0ac..715436cb3996 100644 --- a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c @@ -611,6 +611,16 @@ static int a4xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value) return 0; } +static u64 a4xx_gpu_busy(struct msm_gpu *gpu, unsigned long *out_sample_rate) +{ + u64 busy_cycles; + + busy_cycles = gpu_read64(gpu, REG_A4XX_RBBM_PERFCTR_RBBM_1_LO); + *out_sample_rate = clk_get_rate(gpu->core_clk); + + return busy_cycles; +} + static u32 a4xx_get_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) { ring->memptrs->rptr = gpu_read(gpu, REG_A4XX_CP_RB_RPTR); @@ -632,6 +642,7 @@ static const struct adreno_gpu_funcs funcs = { #if defined(CONFIG_DEBUG_FS) || defined(CONFIG_DEV_COREDUMP) .show = adreno_show, #endif + .gpu_busy = a4xx_gpu_busy, .gpu_state_get = a4xx_gpu_state_get, .gpu_state_put = adreno_gpu_state_put, .create_address_space = adreno_create_address_space, From patchwork Thu Feb 23 01:47:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13149771 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C925FC64ED6 for ; Thu, 23 Feb 2023 01:47:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232989AbjBWBr5 (ORCPT ); Wed, 22 Feb 2023 20:47:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50644 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232999AbjBWBrt (ORCPT ); Wed, 22 Feb 2023 20:47:49 -0500 Received: from mail-lf1-x135.google.com (mail-lf1-x135.google.com [IPv6:2a00:1450:4864:20::135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 767DC10D7 for ; Wed, 22 Feb 2023 17:47:48 -0800 (PST) Received: by mail-lf1-x135.google.com with SMTP id n2so9192394lfb.12 for ; Wed, 22 Feb 2023 17:47:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Uw9ANW8A0HIEHlu0J95K8GI8spDLrbsMISUzwV0ijx4=; b=tQWLe5WcJzNbK/0p370q5JCC8xgYGmEwPZJ1u6Jeop0GH/tTM6fKYVde7vjXHCszdz f/ZjfII2Yl+byBaNLDjx0CQfwG3e0seCepo4C4GVKGCVRZmJByOi0FjsUQHZE8NTYyXD 6Ipy9iEz8c9OGNaIua1la3+dYcQjQ5wrpAkN9nkNKtGd37SwjHq0fGXCpH1cAOWMCyK7 LNNwXLk3mMsep1eDtljLQAr/JxPlaTqfaFeiZvMdLEPMmSU8T0ykV/iMy2Sar3KaGFNS k8eNDCmuGPhCtt3HlOSqjC+lTp8Wp2DJsdE/BzOuBJTjlKFf+1TDR2RwuybWldBf7YO7 u4tQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Uw9ANW8A0HIEHlu0J95K8GI8spDLrbsMISUzwV0ijx4=; b=F1S2nrPJvfBCrsqwsRbocZP+nwaBEBh3dd3C8AgnXcboNrnDwq0Gt9G0P55XMVz/tx Ofc8K/nxJpWRreFgqv83cZ+YklslEDer+mqdOlxX+auAtRGt7OsC1BoGc8FnRwP8ZHb0 xZMb3xNAwUNkgHD+Hm8zWY6IFcLcaDQsfO2diL1pghmSM60EXA0GHIY9yOV1egaEJEkH rBjCQ4lJNpHC1e4aYtjPd+Dcyi7J4GS8IX3iZ+fMfUaFKW+bUIbgZ7tfPBcFV7xhDdnN dTTuLpcXDWoQGCP2m/dhn3MtNjb1WbSDHq9HrEMf841hLKD/N2eAz9wgz6OmjKSzTcDe Y+ZA== X-Gm-Message-State: AO0yUKUnVYqXnvHJ9oXdLwSLEhMGXPodhH+3Y/42MH3sTTcSemb2QJ8y XiT+CpNhn9ao6c/P23Batg3bCQ== X-Google-Smtp-Source: AK7set9HAxRsGbwERh+lUn3YGqAoTzETv5bCEZ+5Z5csnzzygLG1C8GvwRh/vu7HzJtKMzBd/rQ6vQ== X-Received: by 2002:a19:f512:0:b0:4cb:c11:d01f with SMTP id j18-20020a19f512000000b004cb0c11d01fmr3528085lfb.22.1677116866864; Wed, 22 Feb 2023 17:47:46 -0800 (PST) Received: from [192.168.1.101] (abxi151.neoplus.adsl.tpnet.pl. [83.9.2.151]) by smtp.gmail.com with ESMTPSA id 12-20020ac2482c000000b004dc807b904bsm427376lft.120.2023.02.22.17.47.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Feb 2023 17:47:46 -0800 (PST) From: Konrad Dybcio Date: Thu, 23 Feb 2023 02:47:42 +0100 Subject: [PATCH v2 6/6] drm/msm/adreno: Enable optional icc voting from OPP tables MIME-Version: 1.0 Message-Id: <20230223-topic-opp-v2-6-24ed24cd7358@linaro.org> References: <20230223-topic-opp-v2-0-24ed24cd7358@linaro.org> In-Reply-To: <20230223-topic-opp-v2-0-24ed24cd7358@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1677116858; l=767; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=lx2DqRTcWzcl/VYcOjFYV+HDGYAZOMxix7RaJuIvTv8=; b=mYkZ7qwqRbSRNaoLVDbG+NeuUgSJomROk/h9vglxkqTqHBuqRkB9BIoLFrYD7vD+bXjLGT7PYIoJ MeljqooSASz7mlvRrVYqcvglbqNK7hJ+uUF4kGeKVT8KaExP5mtI X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the dev_pm_opp_of_find_icc_paths() call to let the OPP framework handle bus voting as part of power level setting. Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/adreno/adreno_device.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c index 36f062c7582f..5142a4c72cfc 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_device.c +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c @@ -548,6 +548,10 @@ static int adreno_bind(struct device *dev, struct device *master, void *data) return PTR_ERR(gpu); } + ret = dev_pm_opp_of_find_icc_paths(dev, NULL); + if (ret) + return ret; + return 0; }