From patchwork Fri Feb 24 10:58:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13151144 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 02A38C678DB for ; Fri, 24 Feb 2023 11:00:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230084AbjBXLAW (ORCPT ); Fri, 24 Feb 2023 06:00:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60276 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230177AbjBXK7u (ORCPT ); Fri, 24 Feb 2023 05:59:50 -0500 Received: from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com [IPv6:2607:f8b0:4864:20::1033]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CBE8F241ED for ; Fri, 24 Feb 2023 02:59:20 -0800 (PST) Received: by mail-pj1-x1033.google.com with SMTP id k21-20020a17090aaa1500b002376652e160so2339796pjq.0 for ; Fri, 24 Feb 2023 02:59:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=7g1uqAd+GBvLWxylp13ChAu3aZ2qmP9sP5D+Fm30PJ4=; b=xMS93kYtTEWQdbX6qfOwCbcRYIGnoaDf2QJDnzsBG1pI8dHP/gX61gX4fLgH/twQzJ /XYaG0UG2ZbcmamgvygW+VMhACiR0ijaXbGnqHdojoFsXmF1pUX+yOkQGUqG2hKUdOE1 Yluzn+n+d81WXnsnHRCJmIuo2lvf+6VzZzYvcRHDXhF9I7+gv7ARITZ57947CHWinHn7 fi2BhJDcGjuwrKoVxcrJ4r8zbaBTpKm83kP5a28aqeRygtjRVQzRssVxqNtrTnS7FjtS 5pclT3FRd82lh5EuexCw1XznkKdhrrd2yv1XHxfaeZ7RqTU/l7gDAaWGEnGhCmu64iOA us+A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7g1uqAd+GBvLWxylp13ChAu3aZ2qmP9sP5D+Fm30PJ4=; b=Vbn+gksmBSW922/fJRnhAKa1n0ZIwGalwMV6xHRreDJbJ5RtK5JfTg4pHs3pAVg1EQ dFuEWWakIsHgSzeHxBhChj72Xz8xun2XmXwmquLsveVeqrqcrLYpokp7BwNQpGhRDNF5 dld9glyTwEChRvjBgilUkPY5KjIHotOIY7T5zGByQ6+hlSkY70ZPBhXNfaxAxPDajASD UMqZDFe22Uh8Dynj0BDZq4MdfkOxStb5Y1lOyhCHvdCUSSXpPKmcr49/8+agKhcS07lz qSeA++Q+LA1ak0c14enpgUOFuqEzLhCYj0SKyWAJgR+xV3yETEYbs04CJJG3zRIh8My0 Q0JA== X-Gm-Message-State: AO0yUKVGv4Q32htb2MpPi7m4de3KhuS76wVMIwJF8QCCCVNnrbhX0z0V cGXeaT3lylKe2Q1Or/ZchDVb X-Google-Smtp-Source: AK7set+ZDd7rHtMLxF526vFXCKgB89SNppmXHQaAki0dC4fMRkmaETiCaGeFktgQlPL46hfmwQY7bw== X-Received: by 2002:a17:90a:188:b0:237:3dfb:9095 with SMTP id 8-20020a17090a018800b002373dfb9095mr9674382pjc.6.1677236360228; Fri, 24 Feb 2023 02:59:20 -0800 (PST) Received: from localhost.localdomain ([117.217.187.3]) by smtp.gmail.com with ESMTPSA id gd5-20020a17090b0fc500b00233cde36909sm1263853pjb.21.2023.02.24.02.59.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 02:59:19 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, lpieralisi@kernel.org, robh@kernel.org, kw@linux.com, krzysztof.kozlowski+dt@linaro.org, vkoul@kernel.org Cc: konrad.dybcio@linaro.org, bhelgaas@google.com, kishon@kernel.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v2 01/13] dt-bindings: PCI: qcom: Update maintainers entry Date: Fri, 24 Feb 2023 16:28:54 +0530 Message-Id: <20230224105906.16540-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> References: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Stan is no longer working with MMSOL and expressed his interest to not continue maintaining Qcom PCIe driver. Since I took over the driver maintainership, I'm stepping in to maintain the binding also. Acked-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam --- Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index a5859bb3dc28..a3639920fcbb 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -8,7 +8,7 @@ title: Qualcomm PCI express root complex maintainers: - Bjorn Andersson - - Stanimir Varbanov + - Manivannan Sadhasivam description: | Qualcomm PCIe root complex controller is based on the Synopsys DesignWare From patchwork Fri Feb 24 10:58:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13151145 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 41ACDC678DB for ; Fri, 24 Feb 2023 11:00:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230099AbjBXLAb (ORCPT ); Fri, 24 Feb 2023 06:00:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60360 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229794AbjBXK74 (ORCPT ); Fri, 24 Feb 2023 05:59:56 -0500 Received: from mail-pj1-x102d.google.com (mail-pj1-x102d.google.com [IPv6:2607:f8b0:4864:20::102d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A76DB5EEEE for ; Fri, 24 Feb 2023 02:59:25 -0800 (PST) Received: by mail-pj1-x102d.google.com with SMTP id x20-20020a17090a8a9400b00233ba727724so6000868pjn.1 for ; Fri, 24 Feb 2023 02:59:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=uGDet0K+1/m01Mue6GMZv5iNZBwdpYi4DRLEmHhKT40=; b=wzykzWTLm9WRroHFoG0Wi4/XZv56thmYBqfYcTMsjRvlgFIqS7YEcL35e6oZhoDeTX 3iZRGY2Qj1zBi0n4Ds3Q9wWRoRQCHAHJtnggV4VvKboWqiHGa0a7So9m9rN5Yl8p/evu cF9l87jWQ0FHeQFwLjYeevwF+dvbUSgO/jVW1rUrmvT3qcKt5ulkUyDD/+wNzPBc9mCb kqvPxj3z4FBMBgcsSp12n1L3AnTJlNbpS+tDJWKlIHsPxSVmjmOAlNW1/TWKObSDwMhg b3SbhF7WiUVvgYLj9kIwU+AkuSMLl9PT2tneUhCIC/v0JlFH5zOHDmeaSgPtKSEKfjI3 xnBQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=uGDet0K+1/m01Mue6GMZv5iNZBwdpYi4DRLEmHhKT40=; b=5meKkVZi1G3iif0f2HCyfC9HLnsxBtYTAoRFzKk7NGqq5yBLE19wiqtwSgFeIfEO82 CRsNOY9z4NRU1YXJzggrr0d+NPNLsC5x0Uluc3JN8GQIibR1WmaifE4dzHIrqTVgte8g PyUkBsE2P49yks7xQSIxQqQ09gncs6+C5gtR2+XBqdVDAtK4sYbTSVKo+B+f+31pLRK/ Onify3PP1aC9vXAw+CXo3D4PxKGigiPvKYy2hKzqx6F2cSpKiTFdUscTpRGqtFcJXd0z Znd645Z4jT9YtFUTB31GxUcApoMHj0wAyk9GxbwhVqR/9BBt77FDEk5EOQ9Vq/C0DD4U rLPw== X-Gm-Message-State: AO0yUKVujEYRm8ma8D2ssYjT6oHcafdz353snbW5ETB2gtrdBnaAY3Z2 8QKqwgJCMgnS9ybyq6xcq4xR X-Google-Smtp-Source: AK7set+6mGj4VAtYdGIkQ1vBWDtOV7gy94BYTfFVLAt8JxLm/NlVJr/LsvVWmNSRz2bjH20PvJiRDw== X-Received: by 2002:a17:90b:388a:b0:234:1645:5266 with SMTP id mu10-20020a17090b388a00b0023416455266mr17301662pjb.30.1677236364970; Fri, 24 Feb 2023 02:59:24 -0800 (PST) Received: from localhost.localdomain ([117.217.187.3]) by smtp.gmail.com with ESMTPSA id gd5-20020a17090b0fc500b00233cde36909sm1263853pjb.21.2023.02.24.02.59.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 02:59:24 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, lpieralisi@kernel.org, robh@kernel.org, kw@linux.com, krzysztof.kozlowski+dt@linaro.org, vkoul@kernel.org Cc: konrad.dybcio@linaro.org, bhelgaas@google.com, kishon@kernel.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v2 02/13] dt-bindings: PCI: qcom: Add iommu properties Date: Fri, 24 Feb 2023 16:28:55 +0530 Message-Id: <20230224105906.16540-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> References: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Most of the PCIe controllers require iommu support to function properly. So let's add them to the binding. Signed-off-by: Manivannan Sadhasivam --- Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index a3639920fcbb..f48d0792aa57 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -64,6 +64,11 @@ properties: dma-coherent: true + iommus: + maxItems: 1 + + iommu-map: true + interconnects: maxItems: 2 From patchwork Fri Feb 24 10:58:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13151146 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7CADBC678DB for ; Fri, 24 Feb 2023 11:00:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230114AbjBXLAe (ORCPT ); Fri, 24 Feb 2023 06:00:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34282 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229820AbjBXK76 (ORCPT ); Fri, 24 Feb 2023 05:59:58 -0500 Received: from mail-pj1-x1034.google.com (mail-pj1-x1034.google.com [IPv6:2607:f8b0:4864:20::1034]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 523683C798 for ; Fri, 24 Feb 2023 02:59:30 -0800 (PST) Received: by mail-pj1-x1034.google.com with SMTP id qa18-20020a17090b4fd200b0023750b675f5so2465175pjb.3 for ; Fri, 24 Feb 2023 02:59:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wzdP0f8Dd/LfcCPdQr780PzK2RvZAJKB5vPc2XD3ufA=; b=mByJV+JaU1+Ltx80aDVz38O8fe/liFVHft/qdrSEETLmITXc0LZv5kudxwrQJHEM4E 2RP0gsLabTBSZH79fsU3NEHMCeOW0Iqr1TcZhzUE9B7tGDss784ZxY3AotfpkL6jWX2/ 6HMJBJEt7J+vIZ5LMgqVreWGU2Lcz8u/UgO9U8zBTWamxRmKNBZJP6YfXSnA2eN4iPk/ X15O/ck2XYbJCcauOyeuXxchQlLYNaOq7J6UOFE9O5V7S0FVHzlkswu9pzD1R5IausqO 535j2BWGe7lKIRbK/nef5No9zFZ7ku4gO34mFvnolSNCGNgFpU9xfpODylons+mkw7YN tlQA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wzdP0f8Dd/LfcCPdQr780PzK2RvZAJKB5vPc2XD3ufA=; b=YybQhDjPgXZ0/p5Lcli/Mhd/ZXvZwZ8aExJ2RcEeadfm30BCoohmly8Wr+XLQv6L65 Wop+aQs9XvVfpXMJF26bfYkF8isJ9cLiJ8ZSiz994Jbk+BeY8sJlt9hRMd37a0nuSa8e ICFme0is7gqARg6yZY3i8v+lX3eCPMdugHbmeE+QlhWdSK5/YRD/RprwTGa3KfwDYsi6 P0YkvYPXQK5B0a3ve6qc/lK870dPIdsmfxuCRqfFjw2wF2P6NYxeOwJWmtIzUWkAbef4 u+h/BZipuh2OZ+RbVSOhoAt+4E47Ys1rbSNSw4O/nAKLeBiuxPQHGRaCGmWRMQMSL4uj 9Q5Q== X-Gm-Message-State: AO0yUKUe2FVUVuI1+tDA64U2zx9QlvWEheZ74/noFRV8W6iw0/hWOcVn vIAU1WJ66k27okGaMD7jHCym3opYwHytk7s= X-Google-Smtp-Source: AK7set/00/XkHimswh8A/lTlMaf9uljLO9Xk++JlggP7Y2nYgIaIkn/kcVov3dPdmMzyvCxW50D7Yg== X-Received: by 2002:a17:90b:4a4d:b0:234:148:4b27 with SMTP id lb13-20020a17090b4a4d00b0023401484b27mr18089652pjb.17.1677236369819; Fri, 24 Feb 2023 02:59:29 -0800 (PST) Received: from localhost.localdomain ([117.217.187.3]) by smtp.gmail.com with ESMTPSA id gd5-20020a17090b0fc500b00233cde36909sm1263853pjb.21.2023.02.24.02.59.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 02:59:29 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, lpieralisi@kernel.org, robh@kernel.org, kw@linux.com, krzysztof.kozlowski+dt@linaro.org, vkoul@kernel.org Cc: konrad.dybcio@linaro.org, bhelgaas@google.com, kishon@kernel.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v2 03/13] dt-bindings: PCI: qcom: Add SDX55 SoC Date: Fri, 24 Feb 2023 16:28:56 +0530 Message-Id: <20230224105906.16540-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> References: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add support for the PCIe controller on the Qcom SDX55 SoC to the binding. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam --- .../devicetree/bindings/pci/qcom,pcie.yaml | 28 +++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index f48d0792aa57..3bba1ef3cff5 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -30,6 +30,7 @@ properties: - qcom,pcie-sc8180x - qcom,pcie-sc8280xp - qcom,pcie-sdm845 + - qcom,pcie-sdx55 - qcom,pcie-sm8150 - qcom,pcie-sm8250 - qcom,pcie-sm8450-pcie0 @@ -199,6 +200,7 @@ allOf: - qcom,pcie-sc7280 - qcom,pcie-sc8180x - qcom,pcie-sc8280xp + - qcom,pcie-sdx55 - qcom,pcie-sm8250 - qcom,pcie-sm8450-pcie0 - qcom,pcie-sm8450-pcie1 @@ -646,6 +648,32 @@ allOf: items: - const: pci # PCIe core reset + - if: + properties: + compatible: + contains: + enum: + - qcom,pcie-sdx55 + then: + properties: + clocks: + minItems: 7 + maxItems: 7 + clock-names: + items: + - const: pipe # PIPE clock + - const: aux # Auxiliary clock + - const: cfg # Configuration clock + - const: bus_master # Master AXI clock + - const: bus_slave # Slave AXI clock + - const: slave_q2a # Slave Q2A clock + - const: sleep # PCIe Sleep clock + resets: + maxItems: 1 + reset-names: + items: + - const: pci # PCIe core reset + - if: properties: compatible: From patchwork Fri Feb 24 10:58:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13151147 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12B54C678DB for ; Fri, 24 Feb 2023 11:00:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230164AbjBXLAn (ORCPT ); Fri, 24 Feb 2023 06:00:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32798 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229829AbjBXLAB (ORCPT ); Fri, 24 Feb 2023 06:00:01 -0500 Received: from mail-pj1-x102a.google.com (mail-pj1-x102a.google.com [IPv6:2607:f8b0:4864:20::102a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D5C8C4C6F5 for ; Fri, 24 Feb 2023 02:59:34 -0800 (PST) Received: by mail-pj1-x102a.google.com with SMTP id qi12-20020a17090b274c00b002341621377cso2500458pjb.2 for ; Fri, 24 Feb 2023 02:59:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=VslRr6K7dtSVjJZa6fQapZMGTntHaQJdO/Shpvvg0kE=; b=MGOUmbwJgUA1fRVJZwgB9pWpXSaFDZdqmuK/QbXECACx5ema5PaJeJLtueCdGflZWD +iVRSxClMuj4nGtJLHvDdO6Q9QcpOyBQab03jB0Fi5EH6oBo+cTRex1svC3RQpI+FRtV BwH7n/u/g0zlgDqs4+hnb1sz43b7+alo7Vf5gHBXbYBFt16snBeALQccZPXSGxIN3P57 skmZO/QNwavAugcQZXxwYqr5tLJYtgeN6XJ+z9GhF8WX+UQlzPkAUzLzaXLM9qk3nTRx WeXHm0rRlwL93rLX51fJGDc1bj26EJS8vetwl82uGpYQh17dTbTGfQr59idAdiPKpg+d Jzfg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VslRr6K7dtSVjJZa6fQapZMGTntHaQJdO/Shpvvg0kE=; b=vkJ/O9glscTpkMmESKgHEt+QKIbMV3RWbukw+xpDhIOXrK24YPPLboAbKe7FM1GVtT iKV5f3o4rEMcACGXqGPTSEILVFhQmumKWxWxQcoGoRT39LCz2sPXEM0T7F6l2BS49J/2 HfGZiebpyXfr9yiv8xYbPhn0GOGwagLhGBVyAT7oBkhOfClWi9zI1y0SDFBUMVSPNSQW BdqCPo7V0YxjBei7J++RAmOUjvJYWFaRapqOdq/zxtOHyhYDfqlH7+dGwVJVBcpMimMu DH/isN4oLd0I+midYoiAdQum8YRyX0WEvf71/AP5kyFE57gxDBjraUgE2LrdOo/coCDh m82A== X-Gm-Message-State: AO0yUKXdnO9nTxwwBWKFSfBhfyBjC6gdfu3xXiHyyZpr81wrekBwsmQT 44K1aowm2g0fWKzWwd1sCX5l X-Google-Smtp-Source: AK7set+r4n315Ty6V+j5fxdDXOFOvEcth9W92yPHLkj3kMcik/XkG7t/jrX6t5of1AEnZduZqIlfgA== X-Received: by 2002:a17:90a:57:b0:237:161d:f5ac with SMTP id 23-20020a17090a005700b00237161df5acmr13869044pjb.36.1677236374349; Fri, 24 Feb 2023 02:59:34 -0800 (PST) Received: from localhost.localdomain ([117.217.187.3]) by smtp.gmail.com with ESMTPSA id gd5-20020a17090b0fc500b00233cde36909sm1263853pjb.21.2023.02.24.02.59.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 02:59:34 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, lpieralisi@kernel.org, robh@kernel.org, kw@linux.com, krzysztof.kozlowski+dt@linaro.org, vkoul@kernel.org Cc: konrad.dybcio@linaro.org, bhelgaas@google.com, kishon@kernel.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v2 04/13] dt-bindings: PCI: qcom-ep: Fix the unit address used in example Date: Fri, 24 Feb 2023 16:28:57 +0530 Message-Id: <20230224105906.16540-5-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> References: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Unit address of PCIe EP node should be 0x1c00000 as it has to match the first address specified in the reg property. Fixes: 31c9ef002580 ("dt-bindings: PCI: Add Qualcomm PCIe Endpoint controller") Reviewed-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam --- Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml index 8d7eb51edcb4..c1800e44f3da 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml @@ -164,7 +164,7 @@ examples: #include #include #include - pcie_ep: pcie-ep@40000000 { + pcie_ep: pcie-ep@1c00000 { compatible = "qcom,sdx55-pcie-ep"; reg = <0x01c00000 0x3000>, <0x40000000 0xf1d>, From patchwork Fri Feb 24 10:58:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13151148 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5075DC61DA3 for ; Fri, 24 Feb 2023 11:00:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229969AbjBXLAt (ORCPT ); Fri, 24 Feb 2023 06:00:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34340 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229884AbjBXLAD (ORCPT ); Fri, 24 Feb 2023 06:00:03 -0500 Received: from mail-pj1-x1036.google.com (mail-pj1-x1036.google.com [IPv6:2607:f8b0:4864:20::1036]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 83E8A26CD4 for ; Fri, 24 Feb 2023 02:59:39 -0800 (PST) Received: by mail-pj1-x1036.google.com with SMTP id oe18-20020a17090b395200b00236a0d55d3aso2290923pjb.3 for ; Fri, 24 Feb 2023 02:59:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HWzirrIvAlApajl/8IV1ns6ZR5N3zHdUYEWFW4EUTxg=; b=WgOeZtrMpNQF82N0RyIc81DA7VMhg2aTHO705wMUkzAOKMcpPDq4HnFy+6rJ79goQl XNaMXIDP0Dt9f9O4gKyK5whJQajwOWI4heuAtMtu0MHIFvQMjxIB6o2qm3iu0+P3NuoT iCr3q7PM0ssSOC1j7dlYZT5IeubFl+m/ew+OKFzWDK+N+5+c/EttEfavRQozx7z+Ur9s o06VmypjZOtiMx9hOaHGxCu4Bnk0vutR2HNR/3yC3dIjqNmDvjuYzTqGuRq5tsr6K5Js XHvbuWZQoS9UQRGDxo8tpJnceeWCyB59Cp/Qw874Yuxc4HwOeQ3MgLuw+FUmlSudVMNT AhQg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HWzirrIvAlApajl/8IV1ns6ZR5N3zHdUYEWFW4EUTxg=; b=GuVsU6OtF2+lt1KVT3xGjnVjunaXWffwvD59YYd7oxPLD9eP2m3O6NgTX8GyegxXdm QcpXxHw9Trm+V78nDTCFqONW4YXYd2SKxYA0SXAqUEizL+JXZoEK7SnbkmuM9Pws6K0V RBf7l/fvvlp5SmlXPlHinmY/4MsZik+OsBOS9a8+ek7eE/s/FhLBhttVfNTmv1lVK0TB jnYDgpt8VSKe1LuSYRTIfnN+5CWP42FghbS870B8HLehaXXjfCbVVkojneUphzecR/9n QOFRwxdMw55j/U+HXrEjftpU31oxbKrf9dRa1U2IRHNEYOX/5tdhQqMjtVqXQZerUtIK UT5w== X-Gm-Message-State: AO0yUKW6Me6HyBCY7S07rGtdEzj0aNyLOjLawjlNiwpSTrMBxW4Ngp3r 2Cne1KOS+9KpzwBhFtcUXFOJ X-Google-Smtp-Source: AK7set+l3dhsbG5Ta+Ua0gyUgpw/rOM23btJEBVdGna8A6wwbUpMKgPonBx504ritBoktuwXOwg9CQ== X-Received: by 2002:a17:90b:4d09:b0:233:b849:7e79 with SMTP id mw9-20020a17090b4d0900b00233b8497e79mr18207543pjb.4.1677236378979; Fri, 24 Feb 2023 02:59:38 -0800 (PST) Received: from localhost.localdomain ([117.217.187.3]) by smtp.gmail.com with ESMTPSA id gd5-20020a17090b0fc500b00233cde36909sm1263853pjb.21.2023.02.24.02.59.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 02:59:38 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, lpieralisi@kernel.org, robh@kernel.org, kw@linux.com, krzysztof.kozlowski+dt@linaro.org, vkoul@kernel.org Cc: konrad.dybcio@linaro.org, bhelgaas@google.com, kishon@kernel.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v2 05/13] ARM: dts: qcom: sdx55: Fix the unit address of PCIe EP node Date: Fri, 24 Feb 2023 16:28:58 +0530 Message-Id: <20230224105906.16540-6-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> References: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Unit address of PCIe EP node should be 0x1c00000 as it has to match the first address specified in the reg property. This also requires sorting the node in the ascending order. Fixes: e6b69813283f ("ARM: dts: qcom: sdx55: Add support for PCIe EP") Reviewed-by: Konrad Dybcio Signed-off-by: Manivannan Sadhasivam --- arch/arm/boot/dts/qcom-sdx55.dtsi | 78 +++++++++++++++---------------- 1 file changed, 39 insertions(+), 39 deletions(-) diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi index 93d71aff3fab..e84ca795cae6 100644 --- a/arch/arm/boot/dts/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi @@ -303,6 +303,45 @@ qpic_nand: nand-controller@1b30000 { status = "disabled"; }; + pcie_ep: pcie-ep@1c00000 { + compatible = "qcom,sdx55-pcie-ep"; + reg = <0x01c00000 0x3000>, + <0x40000000 0xf1d>, + <0x40000f20 0xc8>, + <0x40001000 0x1000>, + <0x40200000 0x100000>, + <0x01c03000 0x3000>; + reg-names = "parf", "dbi", "elbi", "atu", "addr_space", + "mmio"; + + qcom,perst-regs = <&tcsr 0xb258 0xb270>; + + clocks = <&gcc GCC_PCIE_AUX_CLK>, + <&gcc GCC_PCIE_CFG_AHB_CLK>, + <&gcc GCC_PCIE_MSTR_AXI_CLK>, + <&gcc GCC_PCIE_SLV_AXI_CLK>, + <&gcc GCC_PCIE_SLV_Q2A_AXI_CLK>, + <&gcc GCC_PCIE_SLEEP_CLK>, + <&gcc GCC_PCIE_0_CLKREF_CLK>; + clock-names = "aux", "cfg", "bus_master", "bus_slave", + "slave_q2a", "sleep", "ref"; + + interrupts = , + ; + interrupt-names = "global", "doorbell"; + reset-gpios = <&tlmm 57 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 53 GPIO_ACTIVE_LOW>; + resets = <&gcc GCC_PCIE_BCR>; + reset-names = "core"; + power-domains = <&gcc PCIE_GDSC>; + phys = <&pcie0_lane>; + phy-names = "pciephy"; + max-link-speed = <3>; + num-lanes = <2>; + + status = "disabled"; + }; + pcie0_phy: phy@1c07000 { compatible = "qcom,sdx55-qmp-pcie-phy"; reg = <0x01c07000 0x1c4>; @@ -400,45 +439,6 @@ sdhc_1: mmc@8804000 { status = "disabled"; }; - pcie_ep: pcie-ep@40000000 { - compatible = "qcom,sdx55-pcie-ep"; - reg = <0x01c00000 0x3000>, - <0x40000000 0xf1d>, - <0x40000f20 0xc8>, - <0x40001000 0x1000>, - <0x40200000 0x100000>, - <0x01c03000 0x3000>; - reg-names = "parf", "dbi", "elbi", "atu", "addr_space", - "mmio"; - - qcom,perst-regs = <&tcsr 0xb258 0xb270>; - - clocks = <&gcc GCC_PCIE_AUX_CLK>, - <&gcc GCC_PCIE_CFG_AHB_CLK>, - <&gcc GCC_PCIE_MSTR_AXI_CLK>, - <&gcc GCC_PCIE_SLV_AXI_CLK>, - <&gcc GCC_PCIE_SLV_Q2A_AXI_CLK>, - <&gcc GCC_PCIE_SLEEP_CLK>, - <&gcc GCC_PCIE_0_CLKREF_CLK>; - clock-names = "aux", "cfg", "bus_master", "bus_slave", - "slave_q2a", "sleep", "ref"; - - interrupts = , - ; - interrupt-names = "global", "doorbell"; - reset-gpios = <&tlmm 57 GPIO_ACTIVE_LOW>; - wake-gpios = <&tlmm 53 GPIO_ACTIVE_LOW>; - resets = <&gcc GCC_PCIE_BCR>; - reset-names = "core"; - power-domains = <&gcc PCIE_GDSC>; - phys = <&pcie0_lane>; - phy-names = "pciephy"; - max-link-speed = <3>; - num-lanes = <2>; - - status = "disabled"; - }; - remoteproc_mpss: remoteproc@4080000 { compatible = "qcom,sdx55-mpss-pas"; reg = <0x04080000 0x4040>; From patchwork Fri Feb 24 10:58:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13151149 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8BEA4C64ED8 for ; Fri, 24 Feb 2023 11:01:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230207AbjBXLBB (ORCPT ); Fri, 24 Feb 2023 06:01:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33116 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229683AbjBXLAI (ORCPT ); Fri, 24 Feb 2023 06:00:08 -0500 Received: from mail-pj1-x102f.google.com (mail-pj1-x102f.google.com [IPv6:2607:f8b0:4864:20::102f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9BEA51FFD for ; Fri, 24 Feb 2023 02:59:44 -0800 (PST) Received: by mail-pj1-x102f.google.com with SMTP id pt11so16731075pjb.1 for ; Fri, 24 Feb 2023 02:59:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0M8kYEAz7MzsWNWHJToSlMHPi/nWVr288+AKYIv+MWQ=; b=SL27Mr2ERpEciqBGkdCVkt8X3uoEG0B+m/CpRXwDKRLeVSi8sk3S2P5KtaSPjVoC+0 o+KprIlCXQT94+pAZnB6e9GBGvNpvrdGWLXqcfxnnkLazHHcy0x++Vx7DGjajdxMs3t0 fjt7MwkjsgmMa5XFOG0ioZzxPwtWQDwtk1Uh6YBYx9/kK7AZkBwx1/+ymDfzPKJzUuxT WlgXFYeB1Q5OXEWGpkEGwWc3TXWH2xJ7TrV8n0g7bzlFVgCtHsBu38/6/fO0xWStygvI qM1ewxil2Ns92lWC2IwWuYL/ZjF2+jBLxUgbJRWD4pOMSc13tyhFPcEg/VNrGtPaVmsP Ok5w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0M8kYEAz7MzsWNWHJToSlMHPi/nWVr288+AKYIv+MWQ=; b=6qGk/tT2Z5EWPspx6FxkPSFyfpkx33tD/CD8zyqhJ+Dqezfzu3uiwbmLMZlPFK0620 NcgKLwDuAkl0twRTJzVHpAFRn+9LUGxYRtS3uIoYE7uSzd/JjkS3kKZ11ZgG+8n5uXpb 9pyra1+0BU8cfDBFZgGEZA/5PqlW1TsF8p0RfniJRk1I6xL7neGWC6mIiEQw25xyeyt8 jl7qs/a5/gRELgICrqH37krbnChHUO3cbkW4CXHc0M3lwhCQIeLYbeisX734m81wmDbi X57MddngirVLSXMvn1m6gQ06VOWyXR0mwRN/4U6QEWVtsGeX1RWEr0+LSMja2gIEfK8s H1Yw== X-Gm-Message-State: AO0yUKVE9BuhDmQOpd1qHjuaMyCPEqRJNdN6GYQOQitAKDGJJjqfMVD7 ui9nmQaLmYhOen1YIeGwVt64 X-Google-Smtp-Source: AK7set8Wj3Cy0TsPu96DQreGVAx4H+6J+lMBG0tY6SEfeX2bTCwaDqD2bvaNTFiSdVOXF0boee/TiA== X-Received: by 2002:a17:90b:3a87:b0:230:c723:f37d with SMTP id om7-20020a17090b3a8700b00230c723f37dmr18680685pjb.40.1677236384121; Fri, 24 Feb 2023 02:59:44 -0800 (PST) Received: from localhost.localdomain ([117.217.187.3]) by smtp.gmail.com with ESMTPSA id gd5-20020a17090b0fc500b00233cde36909sm1263853pjb.21.2023.02.24.02.59.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 02:59:43 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, lpieralisi@kernel.org, robh@kernel.org, kw@linux.com, krzysztof.kozlowski+dt@linaro.org, vkoul@kernel.org Cc: konrad.dybcio@linaro.org, bhelgaas@google.com, kishon@kernel.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v2 06/13] ARM: dts: qcom: sdx55: Rename pcie0_{phy/lane} to pcie_{phy/lane} Date: Fri, 24 Feb 2023 16:28:59 +0530 Message-Id: <20230224105906.16540-7-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> References: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org There is only one PCIe PHY in this SoC, so there is no need to add an index to the suffix. This also matches the naming convention of the PCIe controller. Reviewed-by: Konrad Dybcio Signed-off-by: Manivannan Sadhasivam --- arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts | 2 +- arch/arm/boot/dts/qcom-sdx55.dtsi | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts b/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts index ac8b4626ae9a..b7ee0237608f 100644 --- a/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts +++ b/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts @@ -242,7 +242,7 @@ &ipa { memory-region = <&ipa_fw_mem>; }; -&pcie0_phy { +&pcie_phy { status = "okay"; vdda-phy-supply = <&vreg_l1e_bb_1p2>; diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi index e84ca795cae6..a1f4a7b0904a 100644 --- a/arch/arm/boot/dts/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi @@ -334,7 +334,7 @@ pcie_ep: pcie-ep@1c00000 { resets = <&gcc GCC_PCIE_BCR>; reset-names = "core"; power-domains = <&gcc PCIE_GDSC>; - phys = <&pcie0_lane>; + phys = <&pcie_lane>; phy-names = "pciephy"; max-link-speed = <3>; num-lanes = <2>; @@ -342,7 +342,7 @@ pcie_ep: pcie-ep@1c00000 { status = "disabled"; }; - pcie0_phy: phy@1c07000 { + pcie_phy: phy@1c07000 { compatible = "qcom,sdx55-qmp-pcie-phy"; reg = <0x01c07000 0x1c4>; #address-cells = <1>; @@ -362,7 +362,7 @@ pcie0_phy: phy@1c07000 { status = "disabled"; - pcie0_lane: lanes@1c06000 { + pcie_lane: lanes@1c06000 { reg = <0x01c06000 0x104>, /* tx0 */ <0x01c06200 0x328>, /* rx0 */ <0x01c07200 0x1e8>, /* pcs */ From patchwork Fri Feb 24 10:59:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13151150 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5EBEFC64ED8 for ; Fri, 24 Feb 2023 11:01:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230228AbjBXLBN (ORCPT ); Fri, 24 Feb 2023 06:01:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33292 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230006AbjBXLAP (ORCPT ); Fri, 24 Feb 2023 06:00:15 -0500 Received: from mail-pj1-x1029.google.com (mail-pj1-x1029.google.com [IPv6:2607:f8b0:4864:20::1029]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CE79961EF3 for ; Fri, 24 Feb 2023 02:59:48 -0800 (PST) Received: by mail-pj1-x1029.google.com with SMTP id u10so16085754pjc.5 for ; Fri, 24 Feb 2023 02:59:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=P6vfCv6t5vjN1sjFyDIdqOCzfNDFUx2i/y3YhWTxhes=; b=E3vLvIh2g9bUvobdpe4jNkgRfo+p7aptEfGDgt0/wn/CAJCarKma6PtJsZA88qWAAB I8UfGJ0IrDOw/kyOZMtcao3yCS1Y6GB9ty8RpX6fDTqYQsAV2QhlDpzxJGaFM3sqfIpU EktNzBNQhO4nWgXwPiH3p7CRIbCIqX/Zx46HNFKpYYG8C01Iute+Mgl0Jm0mSduTOr3z mzbGzsEVhJinNyGU/JZW8QBfog8oloLsk8NRCmuTQWfMV23qzBN8UOEU0g2c0SnNLFC2 1PUYL0VuaI/BsK3t17rp2UWkdBWRUZ2UvS/EEhuQPRfXqeANcuE6FYUqN0udSdZ8dzu3 KuEw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=P6vfCv6t5vjN1sjFyDIdqOCzfNDFUx2i/y3YhWTxhes=; b=Z5s0YYZK617KXtoeDpMVXxzDWfG2Vyd8gl/NmIiXe7rXAWIaTkr67pF+uTk2rdx5D8 lQuY9zO1HBAnW7+CYLMcAYNuW10X26eUX6Oi+cS9BymK9+MDF6QMYYHgXz1i83O+HdtR 5TY99R/DfpgI2IzgcWkHatfJizbwa5y2X5XBWmSRaVD43KQaY3HGkKf2256E6EJr8JW8 bugpHJqCnHic0lmkqeYZddQTjWCx1qlJDtgVrC+OQZsXsLfNaHlVChjSGX4YITLM8jsy XGmTWppz+cHBdZFx2Z8NrD37FWoASBMRKrdxBPjIY0FjDqJsJVo47qtQp8Kp46SlRj4u TbEw== X-Gm-Message-State: AO0yUKXLgtoD8wz66gonadUV2HmnrlGn0Hy0StOu7HDXABJmSdXU8Jg7 unf9xgGb4O+UbBBttBRDDjJs X-Google-Smtp-Source: AK7set8i0WA4JqJMrgHjV0wM4NunGTsxWfFyBZgCTAe9v84lZvvPQ4osQaGtgXPJsdj4Un0C+6sg9Q== X-Received: by 2002:a17:90b:38ca:b0:230:a82c:d6c4 with SMTP id nn10-20020a17090b38ca00b00230a82cd6c4mr16388555pjb.15.1677236388465; Fri, 24 Feb 2023 02:59:48 -0800 (PST) Received: from localhost.localdomain ([117.217.187.3]) by smtp.gmail.com with ESMTPSA id gd5-20020a17090b0fc500b00233cde36909sm1263853pjb.21.2023.02.24.02.59.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 02:59:48 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, lpieralisi@kernel.org, robh@kernel.org, kw@linux.com, krzysztof.kozlowski+dt@linaro.org, vkoul@kernel.org Cc: konrad.dybcio@linaro.org, bhelgaas@google.com, kishon@kernel.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v2 07/13] ARM: dts: qcom: sdx55: Add support for PCIe RC controller Date: Fri, 24 Feb 2023 16:29:00 +0530 Message-Id: <20230224105906.16540-8-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> References: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The PCIe controller in SDX55 can act as the RC controller also. Let's add support for it. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio --- arch/arm/boot/dts/qcom-sdx55.dtsi | 82 +++++++++++++++++++++++++++++++ 1 file changed, 82 insertions(+) diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi index a1f4a7b0904a..b411c4ae34c3 100644 --- a/arch/arm/boot/dts/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi @@ -303,6 +303,88 @@ qpic_nand: nand-controller@1b30000 { status = "disabled"; }; + pcie_rc: pcie@1c00000 { + compatible = "qcom,pcie-sdx55"; + reg = <0x01c00000 0x3000>, + <0x40000000 0xf1d>, + <0x40000f20 0xc8>, + <0x40001000 0x1000>, + <0x40100000 0x100000>; + reg-names = "parf", + "dbi", + "elbi", + "atu", + "config"; + device_type = "pci"; + linux,pci-domain = <0>; + bus-range = <0x00 0xff>; + num-lanes = <1>; + + #address-cells = <3>; + #size-cells = <2>; + + ranges = <0x01000000 0x0 0x40200000 0x40200000 0x0 0x100000>, + <0x02000000 0x0 0x40300000 0x40300000 0x0 0x3fd00000>; + + interrupts = , + , + , + , + , + , + , + ; + interrupt-names = "msi", + "msi2", + "msi3", + "msi4", + "msi5", + "msi6", + "msi7", + "msi8"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &intc 0 0 0 141 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ + <0 0 0 2 &intc 0 0 0 142 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ + <0 0 0 3 &intc 0 0 0 143 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ + <0 0 0 4 &intc 0 0 0 144 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ + + clocks = <&gcc GCC_PCIE_PIPE_CLK>, + <&gcc GCC_PCIE_AUX_CLK>, + <&gcc GCC_PCIE_CFG_AHB_CLK>, + <&gcc GCC_PCIE_MSTR_AXI_CLK>, + <&gcc GCC_PCIE_SLV_AXI_CLK>, + <&gcc GCC_PCIE_SLV_Q2A_AXI_CLK>, + <&gcc GCC_PCIE_SLEEP_CLK>; + clock-names = "pipe", + "aux", + "cfg", + "bus_master", + "bus_slave", + "slave_q2a", + "sleep"; + + assigned-clocks = <&gcc GCC_PCIE_AUX_CLK>; + assigned-clock-rates = <19200000>; + + iommus = <&apps_smmu 0x0200 0x0f>; + iommu-map = <0x0 &apps_smmu 0x0200 0x1>, + <0x100 &apps_smmu 0x0201 0x1>, + <0x200 &apps_smmu 0x0202 0x1>, + <0x300 &apps_smmu 0x0203 0x1>, + <0x400 &apps_smmu 0x0204 0x1>; + + resets = <&gcc GCC_PCIE_BCR>; + reset-names = "pci"; + + power-domains = <&gcc PCIE_GDSC>; + + phys = <&pcie_lane>; + phy-names = "pciephy"; + + status = "disabled"; + }; + pcie_ep: pcie-ep@1c00000 { compatible = "qcom,sdx55-pcie-ep"; reg = <0x01c00000 0x3000>, From patchwork Fri Feb 24 10:59:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13151151 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 981FFC6FA8E for ; Fri, 24 Feb 2023 11:01:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230238AbjBXLBP (ORCPT ); Fri, 24 Feb 2023 06:01:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33512 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230032AbjBXLAS (ORCPT ); Fri, 24 Feb 2023 06:00:18 -0500 Received: from mail-pj1-x1032.google.com (mail-pj1-x1032.google.com [IPv6:2607:f8b0:4864:20::1032]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 66E8263A2C for ; Fri, 24 Feb 2023 02:59:53 -0800 (PST) Received: by mail-pj1-x1032.google.com with SMTP id z20-20020a17090a8b9400b002372d7f823eso2463906pjn.4 for ; Fri, 24 Feb 2023 02:59:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xofzeZkvhksqMPAnkuhobq6bJN+LwPdywmpacr5C34Y=; b=bgyrhfTAmBvakCMxYfNhX+AmSzRAD2XV36FGGhVGNRWpChwP+kXgg1JXyysxFjz0/m uWPvQs9ZioXMchkG6Rabku0DGPo8zvZlBVIZnc9N9dhoq9HdmTD8rBUksEDkKlInG5La XBlvkRDARR0GkxWdFdKP1VV4C6Sy8UO/DOo75FcSvGrs4gEjUtxf5SW0Il0TCdo2f5Pt Ad8mTVVJJA+RG1L1ByUeds5ZwJgh123mANuou8Y/71VogivX+pqngBmd16fdkg8GBsvD y1ZNsVTIbzj7qGnJ4FDz0SKZtgmNvyHW95IYEAiMDMs60gIWRlP/Q8XS0iqo5t2gCgZ1 vj/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xofzeZkvhksqMPAnkuhobq6bJN+LwPdywmpacr5C34Y=; b=E/wZYenXniGISvvud9NFbckDJTX9D3FquyOe3cYZDgHtWQleLg4KWLeCfZP1N5yv1K Rf/gbi5r2ejAy7WOmjjGH/hc0UNvGh4qm2gbWSwhqNjg3N3MzK0RxSW4Ffk5x4cD822f ukHUfvE+UAGJt/hpGUnvgSDx4P6LraowoZWVhDdVaVTdzTr4/zP2QgO86otl1bYmDDlL 3zjOCXwhuLjQl+wAUNk78AXOWYybLrXBqIHDUtBE1fatg5Vlgw3+6NolIehRlTo3z8RP Om5GHaqH5EPrJU5uLJI+eguswd/IniiNrkzZJ5hDP4yB8Am2Ttj8DiH9wWOk5xmz2Fvi N4rg== X-Gm-Message-State: AO0yUKWWcEm7NpdY5uiJBe6PVDJUu3mgMV+P0cteE92HuOKLzIYpjr+1 +Je89Sip+A6MUFUBp+n4iboX X-Google-Smtp-Source: AK7set8VOGwZq+wLtaLaKo4UzZu8a/DJFEPGQ+qsSUZj5ZZZg1HsncU+ckHZEWO3OZyQHWyh/v/dgg== X-Received: by 2002:a17:90b:4f8f:b0:234:f4a:8985 with SMTP id qe15-20020a17090b4f8f00b002340f4a8985mr17114120pjb.15.1677236393048; Fri, 24 Feb 2023 02:59:53 -0800 (PST) Received: from localhost.localdomain ([117.217.187.3]) by smtp.gmail.com with ESMTPSA id gd5-20020a17090b0fc500b00233cde36909sm1263853pjb.21.2023.02.24.02.59.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 02:59:52 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, lpieralisi@kernel.org, robh@kernel.org, kw@linux.com, krzysztof.kozlowski+dt@linaro.org, vkoul@kernel.org Cc: konrad.dybcio@linaro.org, bhelgaas@google.com, kishon@kernel.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v2 08/13] ARM: dts: qcom: sdx55: List the property values vertically Date: Fri, 24 Feb 2023 16:29:01 +0530 Message-Id: <20230224105906.16540-9-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> References: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org To align with the rest of the devicetree files and the relative properties, let's list the values of properties such as {reg/clock/interrupt}-names vertically. Suggested-by: Konrad Dybcio Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio --- arch/arm/boot/dts/qcom-sdx55.dtsi | 23 ++++++++++++++++++----- 1 file changed, 18 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi index b411c4ae34c3..61fdd601fc26 100644 --- a/arch/arm/boot/dts/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi @@ -393,7 +393,11 @@ pcie_ep: pcie-ep@1c00000 { <0x40001000 0x1000>, <0x40200000 0x100000>, <0x01c03000 0x3000>; - reg-names = "parf", "dbi", "elbi", "atu", "addr_space", + reg-names = "parf", + "dbi", + "elbi", + "atu", + "addr_space", "mmio"; qcom,perst-regs = <&tcsr 0xb258 0xb270>; @@ -405,12 +409,18 @@ pcie_ep: pcie-ep@1c00000 { <&gcc GCC_PCIE_SLV_Q2A_AXI_CLK>, <&gcc GCC_PCIE_SLEEP_CLK>, <&gcc GCC_PCIE_0_CLKREF_CLK>; - clock-names = "aux", "cfg", "bus_master", "bus_slave", - "slave_q2a", "sleep", "ref"; + clock-names = "aux", + "cfg", + "bus_master", + "bus_slave", + "slave_q2a", + "sleep", + "ref"; interrupts = , ; - interrupt-names = "global", "doorbell"; + interrupt-names = "global", + "doorbell"; reset-gpios = <&tlmm 57 GPIO_ACTIVE_LOW>; wake-gpios = <&tlmm 53 GPIO_ACTIVE_LOW>; resets = <&gcc GCC_PCIE_BCR>; @@ -434,7 +444,10 @@ pcie_phy: phy@1c07000 { <&gcc GCC_PCIE_CFG_AHB_CLK>, <&gcc GCC_PCIE_0_CLKREF_CLK>, <&gcc GCC_PCIE_RCHNG_PHY_CLK>; - clock-names = "aux", "cfg_ahb", "ref", "refgen"; + clock-names = "aux", + "cfg_ahb", + "ref", + "refgen"; resets = <&gcc GCC_PCIE_PHY_BCR>; reset-names = "phy"; From patchwork Fri Feb 24 10:59:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13151152 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08F80C678DB for ; Fri, 24 Feb 2023 11:01:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230266AbjBXLBT (ORCPT ); Fri, 24 Feb 2023 06:01:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60226 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230077AbjBXLAV (ORCPT ); Fri, 24 Feb 2023 06:00:21 -0500 Received: from mail-pl1-x632.google.com (mail-pl1-x632.google.com [IPv6:2607:f8b0:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DB09163DD0 for ; Fri, 24 Feb 2023 02:59:57 -0800 (PST) Received: by mail-pl1-x632.google.com with SMTP id c1so16605237plg.4 for ; Fri, 24 Feb 2023 02:59:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=iP9zGqgMaCSpCYlPZyiAEXYd/RguuzuuCZizAwTQ5gg=; b=J290LwTpIgWswetXj0xEmhbl8yf4qKAssmLQNkDWICvPbVim82qGquoaVCSAX4w99P yMij3+sbJdSID+dtp/Xcig6h52J05UtJDHhnQxXSGRRnrl5TNLC+AVjYiMrLD+jKHJe6 vCE0LntanXhnMa2BBF3tzIykrPBVnk/e7DYyT3s3GDzoYP1YY1ceff5qV93YMpDPX8lT JqhXqsBpko7hwrWNoahh+zPKEN3F2QLQTFdvklHehV3SlZaO/kYQ0MisMKpEZ97JxseJ XKYP6vIxTc+emFFIIl3qZxd5Hvmn//9pKB0WWe1SA5WkQjpsxu02sUlTQ4BqdDkjWg1h jxvg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=iP9zGqgMaCSpCYlPZyiAEXYd/RguuzuuCZizAwTQ5gg=; b=uZ4GlJijCSKl2m325IxEHj+/vy803BJSQO/9tF9vHyTnI8NwLx87gv8kW7HPwNVzfe /1ff9cfTa5kr9rJ0A77achkNgVboSKUBpip/7s201ccHpUoosLw2938UxiN94uKwxdO2 GOLPmXNB6famT9Jr/08Ui8BdDlFWw78PlSNnjs9TqxXJy+pawqwEY9re/U/is9tcU8RT E3w7bUKnqAMHuqGgyjH7ZzJs/LhIuupqxhNMHRNqItUDmGYg0qKwFGX8F4vKwtWgwOqA 3H9LZ1R3GJNncR+y3fARULtpiggiBzTsn9TlXNEZQiyLxdzu3c2NnyUBtCy7DX4VLWLR uExA== X-Gm-Message-State: AO0yUKWLsKi/9vk8T4NTWG4fW/o+sHA+6849h0/CZ1ZS+t1TdHEO9BOw GYfRdRMP2b1f0SE5A5OunsZG X-Google-Smtp-Source: AK7set/al4LL68/GfHadFZcZNnVLYVICQzL/FWVfgZtw28RaSGQNf8PxY3SlrDb97iTb6gmZ2AdN9w== X-Received: by 2002:a17:90b:38ce:b0:232:d6d2:f847 with SMTP id nn14-20020a17090b38ce00b00232d6d2f847mr16452816pjb.17.1677236397300; Fri, 24 Feb 2023 02:59:57 -0800 (PST) Received: from localhost.localdomain ([117.217.187.3]) by smtp.gmail.com with ESMTPSA id gd5-20020a17090b0fc500b00233cde36909sm1263853pjb.21.2023.02.24.02.59.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 02:59:56 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, lpieralisi@kernel.org, robh@kernel.org, kw@linux.com, krzysztof.kozlowski+dt@linaro.org, vkoul@kernel.org Cc: konrad.dybcio@linaro.org, bhelgaas@google.com, kishon@kernel.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v2 09/13] ARM: dts: qcom: sdx55-t55: Enable PCIe RC support Date: Fri, 24 Feb 2023 16:29:02 +0530 Message-Id: <20230224105906.16540-10-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> References: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Enable PCIe RC support on Thundercomm T55 board. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio --- arch/arm/boot/dts/qcom-sdx55-t55.dts | 42 ++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/arch/arm/boot/dts/qcom-sdx55-t55.dts b/arch/arm/boot/dts/qcom-sdx55-t55.dts index 7ed8feb99afb..6339af791b0b 100644 --- a/arch/arm/boot/dts/qcom-sdx55-t55.dts +++ b/arch/arm/boot/dts/qcom-sdx55-t55.dts @@ -242,6 +242,23 @@ &ipa { memory-region = <&ipa_fw_mem>; }; +&pcie_phy { + vdda-phy-supply = <&vreg_l1e_bb_1p2>; + vdda-pll-supply = <&vreg_l4e_bb_0p875>; + + status = "okay"; +}; + +&pcie_rc { + perst-gpios = <&tlmm 57 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 53 GPIO_ACTIVE_HIGH>; + + pinctrl-0 = <&pcie_default>; + pinctrl-names = "default"; + + status = "okay"; +}; + &qpic_bam { status = "ok"; }; @@ -265,6 +282,31 @@ &remoteproc_mpss { memory-region = <&mpss_adsp_mem>; }; +&tlmm { + pcie_default: pcie-default-state { + clkreq-pins { + pins = "gpio56"; + function = "pcie_clkreq"; + drive-strength = <2>; + bias-pull-up; + }; + + perst-pins { + pins = "gpio57"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + wake-pins { + pins = "gpio53"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; +}; + &usb_hsphy { status = "okay"; vdda-pll-supply = <&vreg_l4e_bb_0p875>; From patchwork Fri Feb 24 10:59:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13151153 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 25965C6FD18 for ; Fri, 24 Feb 2023 11:01:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230270AbjBXLBU (ORCPT ); Fri, 24 Feb 2023 06:01:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60808 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230089AbjBXLAX (ORCPT ); Fri, 24 Feb 2023 06:00:23 -0500 Received: from mail-pl1-x636.google.com (mail-pl1-x636.google.com [IPv6:2607:f8b0:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4DB6560D61 for ; Fri, 24 Feb 2023 03:00:02 -0800 (PST) Received: by mail-pl1-x636.google.com with SMTP id u14so12438462ple.7 for ; Fri, 24 Feb 2023 03:00:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Iy/081Gnr6V+cD2T3z4UyrGlDr2ZO96fWTmGEselzPk=; b=omzwojmBfXLBwxx4m/2TDvoMwMKtFdapI6Cq/+qHa+SFyKZbOknaqo92wLMxB7CSB1 6EpzY0PP6Cf8SrNlU+kNAVv+huuFoTRF6xgxnT6Ac4NgsqaKsVyWpov8o2cJjw0CJKy1 LVXXDY2QcSTlOjhmRx+TBomTcxcw+DNlCn2krY1ACefjvd7dtY7QJC06IR+hGu94glFD SlckOCApaR6D6BBYs6A4jAvYylEiBRnig3pxU4JbKdEyWg2Dr5EUjBfS3V4ULT0NSQIG kcnvoyHNrCoQymPVst8Pb68g7r4y1szcLGmPf2ovZ0BXaOXSww2QGeZtMlHMtRDEjjUQ 9/1w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Iy/081Gnr6V+cD2T3z4UyrGlDr2ZO96fWTmGEselzPk=; b=RmkOcWPgRUHLaXmveQAEuA8PkSBqMs81010vI3TlhVDrkvHNBxTDQdQx955LCRqNTP gX6GbLQDP8JVjo7m4T3qYWUX55ziLHjX4zOuD0R21xVGVbIs23sGEO2uz/P7ilM1+85t ZIrxTQdNPqcaRk/xDMatRXoRs7p5qh8bRBxHQ5eeMJ8KdYccJ2E1ZHjLf7r9jInJs2Xo 12S2duZ1gj7ie9xr+vcD1Bzy2SzE4IPHbNt8hjuH1cWWEn7yjoN+Eb14Ckqr44rh1nhy znZU3VTxJzGpqXiDXyzTKMXS/cF+7X1yTgJo9r2rFblYFxwfHx/b4R9NfjgK9FLwRvdm Q8tw== X-Gm-Message-State: AO0yUKUelTJR57jTczvBcwj472ypGe8vktUcRWGTxlV3KrKPwMs7NMQk PjV0mnHEvHuV78K5BLyDQKW1 X-Google-Smtp-Source: AK7set8CvCsU4TU+GLe0XMihMpYoLb9sQ6/0LE28lYdVX7+x0QvO0XegHlZ+ZofKIi5yIiueZMEh4Q== X-Received: by 2002:a17:90b:1bc3:b0:237:8338:ef4c with SMTP id oa3-20020a17090b1bc300b002378338ef4cmr3152906pjb.9.1677236401754; Fri, 24 Feb 2023 03:00:01 -0800 (PST) Received: from localhost.localdomain ([117.217.187.3]) by smtp.gmail.com with ESMTPSA id gd5-20020a17090b0fc500b00233cde36909sm1263853pjb.21.2023.02.24.02.59.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 03:00:01 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, lpieralisi@kernel.org, robh@kernel.org, kw@linux.com, krzysztof.kozlowski+dt@linaro.org, vkoul@kernel.org Cc: konrad.dybcio@linaro.org, bhelgaas@google.com, kishon@kernel.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v2 10/13] ARM: dts: qcom: sdx55-t55: Move "status" property down Date: Fri, 24 Feb 2023 16:29:03 +0530 Message-Id: <20230224105906.16540-11-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> References: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org To align with rest of the devicetree files, let's move the "status" property down Suggested-by: Konrad Dybcio Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio --- arch/arm/boot/dts/qcom-sdx55-t55.dts | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/qcom-sdx55-t55.dts b/arch/arm/boot/dts/qcom-sdx55-t55.dts index 6339af791b0b..67e366700105 100644 --- a/arch/arm/boot/dts/qcom-sdx55-t55.dts +++ b/arch/arm/boot/dts/qcom-sdx55-t55.dts @@ -237,9 +237,9 @@ &blsp1_uart3 { }; &ipa { - status = "okay"; - memory-region = <&ipa_fw_mem>; + + status = "okay"; }; &pcie_phy { @@ -278,8 +278,9 @@ nand@0 { }; &remoteproc_mpss { - status = "okay"; memory-region = <&mpss_adsp_mem>; + + status = "okay"; }; &tlmm { @@ -308,16 +309,18 @@ wake-pins { }; &usb_hsphy { - status = "okay"; vdda-pll-supply = <&vreg_l4e_bb_0p875>; vdda33-supply = <&vreg_l10e_3p1>; vdda18-supply = <&vreg_l5e_bb_1p7>; + + status = "okay"; }; &usb_qmpphy { - status = "okay"; vdda-phy-supply = <&vreg_l4e_bb_0p875>; vdda-pll-supply = <&vreg_l1e_bb_1p2>; + + status = "okay"; }; &usb { From patchwork Fri Feb 24 10:59:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13151154 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D7751C6FA8E for ; Fri, 24 Feb 2023 11:01:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230295AbjBXLBX (ORCPT ); Fri, 24 Feb 2023 06:01:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60310 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229750AbjBXLA3 (ORCPT ); Fri, 24 Feb 2023 06:00:29 -0500 Received: from mail-pl1-x635.google.com (mail-pl1-x635.google.com [IPv6:2607:f8b0:4864:20::635]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8BFB863DF8 for ; Fri, 24 Feb 2023 03:00:07 -0800 (PST) Received: by mail-pl1-x635.google.com with SMTP id h14so16494607plf.10 for ; Fri, 24 Feb 2023 03:00:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=UXASpO0hsEy3ilJiBaB6wUQHYL6reFOimLPyPRNZ9VA=; b=BpOFhaz9H99S6MGDhrpiS4mIXldxwgZ9RcN0sHmDUvXIDWEWoac4b6wXbhweYUaHKp jaGCWVJfI+iV5Hv43g0EALXnjJ67Idu/DOVkPUCU4sGlEUFgyFYYg8Ixe6ADpJX8t5kN GIj3icM4iIgNxLHooEnVn25dx4N+h+ba0bhPtAxAh9PzENGSuNxbM85bqf3ViOUGC/88 i3UWz76nsnKR+NUmjMmoxL9Tqsib+ijb1tpzlyHbaWtImG94HaPesJ6O/hrP6cQKY6u3 aKeQ0v7DRz9AXV6oDbaiQ4vU1nCwNvwuR4luk5ZuKK3eooOJM3xsVny3c1xXtV9/RaXn Epmw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=UXASpO0hsEy3ilJiBaB6wUQHYL6reFOimLPyPRNZ9VA=; b=qgOXCZwRlxUo4LoKeVtu/95Rtga4pjGFs85XSWbd6fk3I4+f9xhGbEq5G1BnvU5xHG IRF0NmEPxgVD/oJ95LjwPvpUfOvtZj4sukFkOiKvjmygJkTqiAqRLP+ZA0m8eqiBLjjO 8d7pZRJDIqvHjwvPfqAdbRv3jnmkSwN0vaAY12ifElg90q4N8bHI9OrCpwkX9lSHX5VM KQirBkgoYZ3o/im/jR3DdDNhzIPEs0esLgQnSxxcX2JZp6E7SHyuCyjull+U24l/ZC2O XJfxT7H/eQiS/Q5nKxjeNCxx9tvLCUW4u3SARqaWJZx9hVwIndvnOewqR2IBQvXm6Feg z4Jw== X-Gm-Message-State: AO0yUKVfFF5zbwNCfiioEE8AVgOB5eACubNJb2Y1ybKFunHkXJZgJnpu B3afPL68RDSAuAsdG6ZplQPa X-Google-Smtp-Source: AK7set9bROFhUr2Oys35//JQ8Y2QL8MCdE/tDMeguFhpo10KFDG4z+Za5lXd/SJPGoz8zJg3YT6tOw== X-Received: by 2002:a17:90b:1806:b0:234:a9df:db96 with SMTP id lw6-20020a17090b180600b00234a9dfdb96mr17825389pjb.33.1677236406995; Fri, 24 Feb 2023 03:00:06 -0800 (PST) Received: from localhost.localdomain ([117.217.187.3]) by smtp.gmail.com with ESMTPSA id gd5-20020a17090b0fc500b00233cde36909sm1263853pjb.21.2023.02.24.03.00.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 03:00:06 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, lpieralisi@kernel.org, robh@kernel.org, kw@linux.com, krzysztof.kozlowski+dt@linaro.org, vkoul@kernel.org Cc: konrad.dybcio@linaro.org, bhelgaas@google.com, kishon@kernel.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v2 11/13] phy: qcom-qmp-pcie: Split out EP related init sequence for SDX55 Date: Fri, 24 Feb 2023 16:29:04 +0530 Message-Id: <20230224105906.16540-12-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> References: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org In preparation for adding RC support, let's split out the EP related init sequence so that the common sequence could be reused by RC as well. Signed-off-by: Manivannan Sadhasivam --- drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 42 ++++++++++++++++-------- 1 file changed, 28 insertions(+), 14 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c index 1b136a87053f..f526f73f76ef 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c @@ -1122,10 +1122,25 @@ static const struct qmp_phy_init_tbl sm8250_qmp_gen3x2_pcie_pcs_misc_tbl[] = { }; static const struct qmp_phy_init_tbl sdx55_qmp_pcie_serdes_tbl[] = { - QMP_PHY_INIT_CFG(QSERDES_V4_COM_BG_TIMER, 0x02), QMP_PHY_INIT_CFG(QSERDES_V4_COM_BIAS_EN_CLKBUFLR_EN, 0x18), - QMP_PHY_INIT_CFG(QSERDES_V4_COM_SYS_CLK_CTRL, 0x07), QMP_PHY_INIT_CFG(QSERDES_V4_COM_PLL_IVCO, 0x0f), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_LOCK_CMP_EN, 0x46), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_LOCK_CMP_CFG, 0x04), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_VCO_TUNE_MAP, 0x02), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_HSCLK_SEL, 0x12), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_HSCLK_HS_SWITCH_SEL, 0x00), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_CORECLK_DIV_MODE0, 0x05), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_CORECLK_DIV_MODE1, 0x04), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_CMN_MISC1, 0x88), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_CMN_MISC2, 0x03), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_CMN_MODE, 0x17), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_VCO_DC_LEVEL_CTRL, 0x0b), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_BIN_VCOCAL_HSCLK_SEL, 0x22), +}; + +static const struct qmp_phy_init_tbl sdx55_qmp_pcie_ep_serdes_tbl[] = { + QMP_PHY_INIT_CFG(QSERDES_V4_COM_BG_TIMER, 0x02), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_SYS_CLK_CTRL, 0x07), QMP_PHY_INIT_CFG(QSERDES_V4_COM_CP_CTRL_MODE0, 0x0a), QMP_PHY_INIT_CFG(QSERDES_V4_COM_CP_CTRL_MODE1, 0x0a), QMP_PHY_INIT_CFG(QSERDES_V4_COM_PLL_RCTRL_MODE0, 0x19), @@ -1133,8 +1148,6 @@ static const struct qmp_phy_init_tbl sdx55_qmp_pcie_serdes_tbl[] = { QMP_PHY_INIT_CFG(QSERDES_V4_COM_PLL_CCTRL_MODE0, 0x03), QMP_PHY_INIT_CFG(QSERDES_V4_COM_PLL_CCTRL_MODE1, 0x03), QMP_PHY_INIT_CFG(QSERDES_V4_COM_SYSCLK_EN_SEL, 0x00), - QMP_PHY_INIT_CFG(QSERDES_V4_COM_LOCK_CMP_EN, 0x46), - QMP_PHY_INIT_CFG(QSERDES_V4_COM_LOCK_CMP_CFG, 0x04), QMP_PHY_INIT_CFG(QSERDES_V4_COM_LOCK_CMP1_MODE0, 0x7f), QMP_PHY_INIT_CFG(QSERDES_V4_COM_LOCK_CMP2_MODE0, 0x02), QMP_PHY_INIT_CFG(QSERDES_V4_COM_LOCK_CMP1_MODE1, 0xff), @@ -1146,21 +1159,11 @@ static const struct qmp_phy_init_tbl sdx55_qmp_pcie_serdes_tbl[] = { QMP_PHY_INIT_CFG(QSERDES_V4_COM_INTEGLOOP_GAIN1_MODE0, 0x01), QMP_PHY_INIT_CFG(QSERDES_V4_COM_INTEGLOOP_GAIN0_MODE1, 0xfb), QMP_PHY_INIT_CFG(QSERDES_V4_COM_INTEGLOOP_GAIN1_MODE1, 0x01), - QMP_PHY_INIT_CFG(QSERDES_V4_COM_VCO_TUNE_MAP, 0x02), - QMP_PHY_INIT_CFG(QSERDES_V4_COM_HSCLK_SEL, 0x12), - QMP_PHY_INIT_CFG(QSERDES_V4_COM_HSCLK_HS_SWITCH_SEL, 0x00), - QMP_PHY_INIT_CFG(QSERDES_V4_COM_CORECLK_DIV_MODE0, 0x05), - QMP_PHY_INIT_CFG(QSERDES_V4_COM_CORECLK_DIV_MODE1, 0x04), QMP_PHY_INIT_CFG(QSERDES_V4_COM_CMN_CONFIG, 0x04), - QMP_PHY_INIT_CFG(QSERDES_V4_COM_CMN_MISC1, 0x88), - QMP_PHY_INIT_CFG(QSERDES_V4_COM_CMN_MISC2, 0x03), - QMP_PHY_INIT_CFG(QSERDES_V4_COM_CMN_MODE, 0x17), - QMP_PHY_INIT_CFG(QSERDES_V4_COM_VCO_DC_LEVEL_CTRL, 0x0b), QMP_PHY_INIT_CFG(QSERDES_V4_COM_BIN_VCOCAL_CMP_CODE1_MODE0, 0x56), QMP_PHY_INIT_CFG(QSERDES_V4_COM_BIN_VCOCAL_CMP_CODE2_MODE0, 0x1d), QMP_PHY_INIT_CFG(QSERDES_V4_COM_BIN_VCOCAL_CMP_CODE1_MODE1, 0x4b), QMP_PHY_INIT_CFG(QSERDES_V4_COM_BIN_VCOCAL_CMP_CODE2_MODE1, 0x1f), - QMP_PHY_INIT_CFG(QSERDES_V4_COM_BIN_VCOCAL_HSCLK_SEL, 0x22), }; static const struct qmp_phy_init_tbl sdx55_qmp_pcie_tx_tbl[] = { @@ -1212,6 +1215,9 @@ static const struct qmp_phy_init_tbl sdx55_qmp_pcie_pcs_misc_tbl[] = { QMP_PHY_INIT_CFG(QPHY_V4_20_PCS_PCIE_G4_RXEQEVAL_TIME, 0x13), QMP_PHY_INIT_CFG(QPHY_V4_20_PCS_PCIE_G4_EQ_CONFIG2, 0x01), QMP_PHY_INIT_CFG(QPHY_V4_20_PCS_PCIE_G4_EQ_CONFIG5, 0x02), +}; + +static const struct qmp_phy_init_tbl sdx55_qmp_pcie_ep_pcs_misc_tbl[] = { QMP_PHY_INIT_CFG(QPHY_V4_20_PCS_LANE1_INSIG_SW_CTRL2, 0x00), QMP_PHY_INIT_CFG(QPHY_V4_20_PCS_LANE1_INSIG_MX_CTRL2, 0x00), }; @@ -2003,6 +2009,14 @@ static const struct qmp_phy_cfg sdx55_qmp_pciephy_cfg = { .pcs_misc = sdx55_qmp_pcie_pcs_misc_tbl, .pcs_misc_num = ARRAY_SIZE(sdx55_qmp_pcie_pcs_misc_tbl), }, + + .tbls_ep = &(const struct qmp_phy_cfg_tbls) { + .serdes = sdx55_qmp_pcie_ep_serdes_tbl, + .serdes_num = ARRAY_SIZE(sdx55_qmp_pcie_ep_serdes_tbl), + .pcs_misc = sdx55_qmp_pcie_ep_pcs_misc_tbl, + .pcs_misc_num = ARRAY_SIZE(sdx55_qmp_pcie_ep_pcs_misc_tbl), + }, + .clk_list = sdm845_pciephy_clk_l, .num_clks = ARRAY_SIZE(sdm845_pciephy_clk_l), .reset_list = sdm845_pciephy_reset_l, From patchwork Fri Feb 24 10:59:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13151155 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 81429C64ED8 for ; Fri, 24 Feb 2023 11:01:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229713AbjBXLBZ (ORCPT ); Fri, 24 Feb 2023 06:01:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34240 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229767AbjBXLAb (ORCPT ); Fri, 24 Feb 2023 06:00:31 -0500 Received: from mail-pl1-x633.google.com (mail-pl1-x633.google.com [IPv6:2607:f8b0:4864:20::633]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2981964D42 for ; Fri, 24 Feb 2023 03:00:12 -0800 (PST) Received: by mail-pl1-x633.google.com with SMTP id bh1so16361605plb.11 for ; Fri, 24 Feb 2023 03:00:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=RqG9xtTBiKFFqs7nudeShHVEmZgSa7/qeDhwUVoJ0gI=; b=G17M3oBHmV1rKnXNh1qHs8TV9ZpAIJko2IX49Vd+g7LzLTJ7J29aWSKgIGFLJNfkXa z2J7OxDTIAOohyEkMB5yoq1pCXjGEkvok/8Nyov5BaZ8YPSdoEecZwNJ72edVHIXcCD8 NwtowiHV6RL/DILAYI/vRlDaWPAn5mQvxosGSHcaaxmNpiwjFrfcIoJRrtPRColtdjZo yJRziDEWYWd1E99c9gqQoYDEV2s8EgL1dUYgfyOdQd6OiXx843L3SJBVCCHKECPHG+5r I/xBedgx7KJUfBxt7S751k773L1TzebuwGza831nxZK80Tx6tgOr0C+wqYhhK82mZJ62 jobg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RqG9xtTBiKFFqs7nudeShHVEmZgSa7/qeDhwUVoJ0gI=; b=NIx4lX6mpesa2mF+Wd6W4cpFxfipkxqtUUIQ9LSji/I0xlOc8oNvzQCiI5QdLTzsa5 2In7RvRXF1UYyA68SAQAfgVkQGNDF3WD6kMnpdC8/+j/wvSLVqJg7SInObcekRimP/1+ UIQXIfD+PlwBW6qeb0/T6hDg2aFF7hJyjGhwcV7+Fr+Hf/CUVNzOaYsF5uvQyXiB1YoJ pQ717FF4jxG99y+dKq0nQCRdmA5c4K5rnni2YGBig2XSYOIYt8UxIjyAESdonRRI+nrZ ZulbHx9icGmIx2UPfTCabMdLTxQCiphjwKe7NRnYpJ8+3D8mhCIW/Qp+5/8FzEa+6k2R O2PQ== X-Gm-Message-State: AO0yUKWM2esM2wvKGO2ZtAE4CJBnXpgp8/2ps++RgUO5S9nY1HjrBU/D VCrkNP8XWyHDiX0UflKN19NZ X-Google-Smtp-Source: AK7set/GcI5Lvkq8vhTZkhFb6L2nifAbi+0abKZb11cags3acUu0zOUkuj9IRQqsGw9+pdYvuZAa5Q== X-Received: by 2002:a17:90b:38ce:b0:236:704d:ab8c with SMTP id nn14-20020a17090b38ce00b00236704dab8cmr16684270pjb.26.1677236411808; Fri, 24 Feb 2023 03:00:11 -0800 (PST) Received: from localhost.localdomain ([117.217.187.3]) by smtp.gmail.com with ESMTPSA id gd5-20020a17090b0fc500b00233cde36909sm1263853pjb.21.2023.02.24.03.00.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 03:00:11 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, lpieralisi@kernel.org, robh@kernel.org, kw@linux.com, krzysztof.kozlowski+dt@linaro.org, vkoul@kernel.org Cc: konrad.dybcio@linaro.org, bhelgaas@google.com, kishon@kernel.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v2 12/13] phy: qcom-qmp-pcie: Add RC init sequence for SDX55 Date: Fri, 24 Feb 2023 16:29:05 +0530 Message-Id: <20230224105906.16540-13-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> References: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add PCIe RC init sequence making use of the common init sequence. The RC mode additionally requires REFCLK_DRV_DSBL bit to set during powerup and powerdown. Signed-off-by: Manivannan Sadhasivam --- drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 49 ++++++++++++++++++- .../qualcomm/phy-qcom-qmp-pcs-pcie-v4_20.h | 2 + 2 files changed, 50 insertions(+), 1 deletion(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c index f526f73f76ef..9d92facd47a6 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c @@ -1138,6 +1138,41 @@ static const struct qmp_phy_init_tbl sdx55_qmp_pcie_serdes_tbl[] = { QMP_PHY_INIT_CFG(QSERDES_V4_COM_BIN_VCOCAL_HSCLK_SEL, 0x22), }; +static const struct qmp_phy_init_tbl sdx55_qmp_pcie_rc_serdes_tbl[] = { + QMP_PHY_INIT_CFG(QSERDES_V4_COM_SSC_EN_CENTER, 0x01), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_SSC_PER1, 0x31), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_SSC_PER2, 0x01), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_SSC_STEP_SIZE1_MODE0, 0xce), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_SSC_STEP_SIZE2_MODE0, 0x0b), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_SSC_STEP_SIZE1_MODE1, 0x97), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_SSC_STEP_SIZE2_MODE1, 0x0c), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_CLK_ENABLE1, 0x90), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_CLK_EP_DIV_MODE0, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_CLK_EP_DIV_MODE1, 0x10), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_CP_CTRL_MODE0, 0x06), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_CP_CTRL_MODE1, 0x06), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_PLL_RCTRL_MODE0, 0x16), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_PLL_RCTRL_MODE1, 0x16), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_PLL_CCTRL_MODE0, 0x36), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_PLL_CCTRL_MODE1, 0x36), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_SYSCLK_EN_SEL, 0x08), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_LOCK_CMP1_MODE0, 0x04), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_LOCK_CMP2_MODE0, 0x0d), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_LOCK_CMP1_MODE1, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_LOCK_CMP2_MODE1, 0x1a), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_DEC_START_MODE0, 0xc3), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_DEC_START_MODE1, 0xd0), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_DIV_FRAC_START3_MODE0, 0x05), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_DIV_FRAC_START1_MODE1, 0x55), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_DIV_FRAC_START2_MODE1, 0x55), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_DIV_FRAC_START3_MODE1, 0x05), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_CLK_SELECT, 0x34), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_BIN_VCOCAL_CMP_CODE1_MODE0, 0xca), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_BIN_VCOCAL_CMP_CODE2_MODE0, 0x1e), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_BIN_VCOCAL_CMP_CODE1_MODE1, 0xd8), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_BIN_VCOCAL_CMP_CODE2_MODE1, 0x20), +}; + static const struct qmp_phy_init_tbl sdx55_qmp_pcie_ep_serdes_tbl[] = { QMP_PHY_INIT_CFG(QSERDES_V4_COM_BG_TIMER, 0x02), QMP_PHY_INIT_CFG(QSERDES_V4_COM_SYS_CLK_CTRL, 0x07), @@ -1217,6 +1252,11 @@ static const struct qmp_phy_init_tbl sdx55_qmp_pcie_pcs_misc_tbl[] = { QMP_PHY_INIT_CFG(QPHY_V4_20_PCS_PCIE_G4_EQ_CONFIG5, 0x02), }; +static const struct qmp_phy_init_tbl sdx55_qmp_pcie_rc_pcs_misc_tbl[] = { + QMP_PHY_INIT_CFG(QPHY_V4_20_PCS_PCIE_ENDPOINT_REFCLK_DRIVE, 0xc1), + QMP_PHY_INIT_CFG(QPHY_V4_20_PCS_PCIE_OSC_DTCT_ACTIONS, 0x00), +}; + static const struct qmp_phy_init_tbl sdx55_qmp_pcie_ep_pcs_misc_tbl[] = { QMP_PHY_INIT_CFG(QPHY_V4_20_PCS_LANE1_INSIG_SW_CTRL2, 0x00), QMP_PHY_INIT_CFG(QPHY_V4_20_PCS_LANE1_INSIG_MX_CTRL2, 0x00), @@ -2010,6 +2050,13 @@ static const struct qmp_phy_cfg sdx55_qmp_pciephy_cfg = { .pcs_misc_num = ARRAY_SIZE(sdx55_qmp_pcie_pcs_misc_tbl), }, + .tbls_rc = &(const struct qmp_phy_cfg_tbls) { + .serdes = sdx55_qmp_pcie_rc_serdes_tbl, + .serdes_num = ARRAY_SIZE(sdx55_qmp_pcie_rc_serdes_tbl), + .pcs_misc = sdx55_qmp_pcie_rc_pcs_misc_tbl, + .pcs_misc_num = ARRAY_SIZE(sdx55_qmp_pcie_rc_pcs_misc_tbl), + }, + .tbls_ep = &(const struct qmp_phy_cfg_tbls) { .serdes = sdx55_qmp_pcie_ep_serdes_tbl, .serdes_num = ARRAY_SIZE(sdx55_qmp_pcie_ep_serdes_tbl), @@ -2025,7 +2072,7 @@ static const struct qmp_phy_cfg sdx55_qmp_pciephy_cfg = { .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), .regs = sm8250_pcie_regs_layout, - .pwrdn_ctrl = SW_PWRDN, + .pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL, .phy_status = PHYSTATUS_4_20, }; diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v4_20.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v4_20.h index af273602998e..ac872a9eff9a 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v4_20.h +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v4_20.h @@ -6,6 +6,8 @@ #ifndef QCOM_PHY_QMP_PCS_PCIE_V4_20_H_ #define QCOM_PHY_QMP_PCS_PCIE_V4_20_H_ +#define QPHY_V4_20_PCS_PCIE_ENDPOINT_REFCLK_DRIVE 0x01c +#define QPHY_V4_20_PCS_PCIE_OSC_DTCT_ACTIONS 0x090 #define QPHY_V4_20_PCS_PCIE_EQ_CONFIG1 0x0a0 #define QPHY_V4_20_PCS_PCIE_G3_RXEQEVAL_TIME 0x0f0 #define QPHY_V4_20_PCS_PCIE_G4_RXEQEVAL_TIME 0x0f4 From patchwork Fri Feb 24 10:59:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13151156 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A7362C6FA8E for ; Fri, 24 Feb 2023 11:02:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230348AbjBXLCG (ORCPT ); Fri, 24 Feb 2023 06:02:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32936 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229906AbjBXLAz (ORCPT ); Fri, 24 Feb 2023 06:00:55 -0500 Received: from mail-pj1-x1034.google.com (mail-pj1-x1034.google.com [IPv6:2607:f8b0:4864:20::1034]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 107F966978 for ; Fri, 24 Feb 2023 03:00:17 -0800 (PST) Received: by mail-pj1-x1034.google.com with SMTP id oe18-20020a17090b395200b00236a0d55d3aso2292835pjb.3 for ; Fri, 24 Feb 2023 03:00:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=GDe2OfCLNRaJ6CRURKr3KlmzCsataxU7y19XTJRsk+A=; b=fAJqvN5f5O1suKMbMKyZTKUOuQWDy9CpZJalOaBD5HtdbClkBc2Y3mQktVEXsKIkyM jqwulwTPo0TCvEOim7vshccXaA0Rf0Y9DXxoEyVsK6j4qZBAOBZHZiAZh0/FPdl8b/6t 99/G0hP6iYZ4siN6USBnUOzHhXy1eq6v4rBhHz+L1jWHVYaknjNut3fHZGmnF4uuf8bR wpflaqZ3v5/cyV78xkdj4tw+GViopd/zJBAxU8ZdPbKO62vSoEb1Mc10BxaZZnmVKbUe 7pNqc3ZJQdBJVjmXt29Ew9KoAUfYslHbLyuSOn82oi52m3xc0zy0oxh6RKvsx+uXM0Us l8lg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=GDe2OfCLNRaJ6CRURKr3KlmzCsataxU7y19XTJRsk+A=; b=oLihPTGe+bd/dYBA1/EOwlJFR6pgUZXlL8s8h+qfvssuMtVCT0spb4hk6Pz61DUQN5 goilteFoGw5E9ySR6thvjc7klCGRd45cnh6H1qa5pReF9nEK+C/aqK32fTZ4ShxEdY7f RGJRtBxgue5VvWiEgIVRzYrkatwjX1VQTjxQivAHuWBNAc1Biv/NmTskumcAYbn8N0oJ Udbk6GsSKQvqPopYv+6g8ErvZV9QPEp9ZnVr/aqN9iJA43d8rwGEQrJ/cGbehTXu4vAu wtGI9rlPdvhQlWgO04IPc9xBbBIwL3KkteFTrzPhOGIQFcVQNb2xom35JbvYmeXKUBGo TaCw== X-Gm-Message-State: AO0yUKWTUhwR7M58pFiJQXbBJkBdMeEVgyQ7VVKwt8duqr+O7BwQK/Dx lnbNeiREvEw6TS5G2u2oaJa9 X-Google-Smtp-Source: AK7set96B4clo9yI/CAFFJdJQ32pbl2Rs/s9/H+2kiiR3ogiFM6+s9/K/NGi2RuWUQxR38KPnofOuA== X-Received: by 2002:a17:90b:4a4d:b0:231:284:ea4d with SMTP id lb13-20020a17090b4a4d00b002310284ea4dmr17736121pjb.22.1677236416420; Fri, 24 Feb 2023 03:00:16 -0800 (PST) Received: from localhost.localdomain ([117.217.187.3]) by smtp.gmail.com with ESMTPSA id gd5-20020a17090b0fc500b00233cde36909sm1263853pjb.21.2023.02.24.03.00.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 03:00:16 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, lpieralisi@kernel.org, robh@kernel.org, kw@linux.com, krzysztof.kozlowski+dt@linaro.org, vkoul@kernel.org Cc: konrad.dybcio@linaro.org, bhelgaas@google.com, kishon@kernel.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v2 13/13] PCI: qcom: Add support for SDX55 SoC Date: Fri, 24 Feb 2023 16:29:06 +0530 Message-Id: <20230224105906.16540-14-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> References: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add support for SDX55 SoC reusing the 1.9.0 config. The PCIe controller is of version 1.10.0 but it is compatible with the 1.9.0 config. This SoC also requires "sleep" clock which is added as an optional clock in the driver, since it is not required on other SoCs. Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index 77e5dc7b88ad..659df73114dd 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -182,7 +182,7 @@ struct qcom_pcie_resources_2_3_3 { /* 6 clocks typically, 7 for sm8250 */ struct qcom_pcie_resources_2_7_0 { - struct clk_bulk_data clks[12]; + struct clk_bulk_data clks[13]; int num_clks; struct regulator_bulk_data supplies[2]; struct reset_control *pci_reset; @@ -1208,6 +1208,7 @@ static int qcom_pcie_get_resources_2_7_0(struct qcom_pcie *pcie) res->clks[idx++].id = "noc_aggr_4"; res->clks[idx++].id = "noc_aggr_south_sf"; res->clks[idx++].id = "cnoc_qx"; + res->clks[idx++].id = "sleep"; num_opt_clks = idx - num_clks; res->num_clks = idx; @@ -1824,6 +1825,7 @@ static const struct of_device_id qcom_pcie_match[] = { { .compatible = "qcom,pcie-sc8180x", .data = &cfg_1_9_0 }, { .compatible = "qcom,pcie-sc8280xp", .data = &cfg_1_9_0 }, { .compatible = "qcom,pcie-sdm845", .data = &cfg_2_7_0 }, + { .compatible = "qcom,pcie-sdx55", .data = &cfg_1_9_0 }, { .compatible = "qcom,pcie-sm8150", .data = &cfg_1_9_0 }, { .compatible = "qcom,pcie-sm8250", .data = &cfg_1_9_0 }, { .compatible = "qcom,pcie-sm8450-pcie0", .data = &cfg_1_9_0 },