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[46.204.108.92]) by smtp.gmail.com with ESMTPSA id a25-20020a05651c031900b00295a8d1ecc7sm50489ljp.18.2023.02.24.03.35.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 03:35:11 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 4ca96701-b437-11ed-88bb-e56d68cac8db DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LEV0XXkwftLh/YYhu2PWBtw6xma6pefn5J7iR2uA1b8=; b=L3mCGaEwgUnEZk8uJDMAAGvHR0buasQ8IhDhO15TIhAmXamcOJV1NS2r9Zk6dO4XT2 Oq4KS5euJxgy/5Tx4G0ojC4iNMUWGbsczmHfURnPCFpt5HoNV4FQGf8tVtqsphK2Tgvd SmrCr3pkR+SgHdSDq8GzYEKqiKMhs7/Fm80v56SdOpxB02rGtbYkHeqcW29yOBZAxbam k5I+G3/3n7KEgtLDeKTwCPQv+URHCgzU//eqbbfyH/oztfsiz12ONrftYxpR7urg/wSC eaT3+GejRSw7IBaSaOhELaiF9rL1mxTqC8dVpb+ok0GtYXT7klBA1NTEpnRBi7My/70u l1HQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LEV0XXkwftLh/YYhu2PWBtw6xma6pefn5J7iR2uA1b8=; b=a1oDHuTjNaD3tXi+hgPhL1j0HpZFtPekojYA/G2/+SyS9MkpEQKdJ9l680sCRayGcf Az78IZY334bCeCM6zz4wtzPEaflniZfGwYHOGvAywfM8HC/5h1dohC5y1agqXv/nb7ov DHSNhz/7D9PGYRLckr+j1ZfSOHlDCKgXClIylqfJ6hpn8pPr/eHHWwBz0qus4C53X3fH MXTaXx45/UzahPXYtZfx+Jn2L0btm56f0ZrW2Jg5xXDxR86B7h76/whetCsDKYuJrowD OjhUW13sNS9+sbo9wmmg2Is2OqZ+A5uCHuGlqqczwWe8xPbLpoN6YYASetiubE3KRyfH JMKw== X-Gm-Message-State: AO0yUKWmODUfkcYxoGmJrSniJogHnflkLV3pkUqMglhfAum+czxTFJTJ 7JF1dgOpcBPy99z5LGpM3EyBRiCXBdE= X-Google-Smtp-Source: AK7set+4UsiLENwc9Yu3xAUF6hHU3jFibegHt+1QqE3NwHASdq0D9Wrbl2xtm0BO70wAZ2lAdhQRvw== X-Received: by 2002:a05:651c:a0e:b0:293:4cfe:ad31 with SMTP id k14-20020a05651c0a0e00b002934cfead31mr9704967ljq.14.1677238511687; Fri, 24 Feb 2023 03:35:11 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Julien Grall , Jan Beulich , Andrew Cooper , Stefano Stabellini , Gianluca Guida , Oleksii Kurochko , Bob Eshleman , Alistair Francis , Connor Davis Subject: [PATCH v4 1/5] xen/riscv: introduce decode_cause() stuff Date: Fri, 24 Feb 2023 13:35:01 +0200 Message-Id: <397e6741438a8b125dc53945a74a58246fac4faf.1677237653.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: References: MIME-Version: 1.0 The patch introduces stuff needed to decode a reason of an exception. Signed-off-by: Oleksii Kurochko --- Changes in V4: - fix string in decode_reserved_interrupt_cause() --- Changes in V3: - Nothing changed --- Changes in V2: - Make decode_trap_cause() more optimization friendly. - Merge the pathc which introduces do_unexpected_trap() to the current one. --- xen/arch/riscv/traps.c | 87 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 86 insertions(+), 1 deletion(-) diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index ccd3593f5a..29b1a0dfae 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -4,10 +4,95 @@ * * RISC-V Trap handlers */ + +#include +#include + +#include +#include #include #include -void do_trap(struct cpu_user_regs *cpu_regs) +static const char *decode_trap_cause(unsigned long cause) +{ + static const char *const trap_causes[] = { + [CAUSE_MISALIGNED_FETCH] = "Instruction Address Misaligned", + [CAUSE_FETCH_ACCESS] = "Instruction Access Fault", + [CAUSE_ILLEGAL_INSTRUCTION] = "Illegal Instruction", + [CAUSE_BREAKPOINT] = "Breakpoint", + [CAUSE_MISALIGNED_LOAD] = "Load Address Misaligned", + [CAUSE_LOAD_ACCESS] = "Load Access Fault", + [CAUSE_MISALIGNED_STORE] = "Store/AMO Address Misaligned", + [CAUSE_STORE_ACCESS] = "Store/AMO Access Fault", + [CAUSE_USER_ECALL] = "Environment Call from U-Mode", + [CAUSE_SUPERVISOR_ECALL] = "Environment Call from S-Mode", + [CAUSE_MACHINE_ECALL] = "Environment Call from M-Mode", + [CAUSE_FETCH_PAGE_FAULT] = "Instruction Page Fault", + [CAUSE_LOAD_PAGE_FAULT] = "Load Page Fault", + [CAUSE_STORE_PAGE_FAULT] = "Store/AMO Page Fault", + [CAUSE_FETCH_GUEST_PAGE_FAULT] = "Instruction Guest Page Fault", + [CAUSE_LOAD_GUEST_PAGE_FAULT] = "Load Guest Page Fault", + [CAUSE_VIRTUAL_INST_FAULT] = "Virtualized Instruction Fault", + [CAUSE_STORE_GUEST_PAGE_FAULT] = "Guest Store/AMO Page Fault", + }; + + if ( cause < ARRAY_SIZE(trap_causes) && trap_causes[cause] ) + return trap_causes[cause]; + return "UNKNOWN"; +} + +const char *decode_reserved_interrupt_cause(unsigned long irq_cause) +{ + switch ( irq_cause ) + { + case IRQ_M_SOFT: + return "M-mode Software Interrupt"; + case IRQ_M_TIMER: + return "M-mode TIMER Interrupt"; + case IRQ_M_EXT: + return "M-mode External Interrupt"; + default: + return "UNKNOWN IRQ type"; + } +} + +const char *decode_interrupt_cause(unsigned long cause) +{ + unsigned long irq_cause = cause & ~CAUSE_IRQ_FLAG; + + switch ( irq_cause ) + { + case IRQ_S_SOFT: + return "Supervisor Software Interrupt"; + case IRQ_S_TIMER: + return "Supervisor Timer Interrupt"; + case IRQ_S_EXT: + return "Supervisor External Interrupt"; + default: + return decode_reserved_interrupt_cause(irq_cause); + } +} + +const char *decode_cause(unsigned long cause) +{ + if ( cause & CAUSE_IRQ_FLAG ) + return decode_interrupt_cause(cause); + + return decode_trap_cause(cause); +} + +static void do_unexpected_trap(const struct cpu_user_regs *regs) { + unsigned long cause = csr_read(CSR_SCAUSE); + + early_printk("Unhandled exception: "); + early_printk(decode_cause(cause)); + early_printk("\n"); + die(); } + +void do_trap(struct cpu_user_regs *cpu_regs) +{ + do_unexpected_trap(cpu_regs); +} From patchwork Fri Feb 24 11:35:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleksii Kurochko X-Patchwork-Id: 13151194 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A1155C64ED8 for ; Fri, 24 Feb 2023 11:35:23 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.500950.772538 (Exim 4.92) (envelope-from ) id 1pVWM8-0007yh-2M; Fri, 24 Feb 2023 11:35:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 500950.772538; Fri, 24 Feb 2023 11:35:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pVWM7-0007ya-VH; Fri, 24 Feb 2023 11:35:15 +0000 Received: by outflank-mailman (input) for mailman id 500950; Fri, 24 Feb 2023 11:35:14 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pVWM6-0007Ri-67 for xen-devel@lists.xenproject.org; Fri, 24 Feb 2023 11:35:14 +0000 Received: from mail-lj1-x229.google.com (mail-lj1-x229.google.com [2a00:1450:4864:20::229]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 4d9edc5d-b437-11ed-88bb-e56d68cac8db; Fri, 24 Feb 2023 12:35:13 +0100 (CET) Received: by mail-lj1-x229.google.com with SMTP id h3so7820599lja.12 for ; Fri, 24 Feb 2023 03:35:13 -0800 (PST) Received: from 34-6F-24-FC-D2-65.. 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void handle_trap(void); +void trap_init(void); #endif /* __ASSEMBLY__ */ diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index d09ffe1454..c8513ca4f8 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -1,7 +1,9 @@ #include #include +#include #include +#include /* Xen stack for bringing up the first CPU. */ unsigned char __initdata cpu0_boot_stack[STACK_SIZE] @@ -11,6 +13,8 @@ void __init noreturn start_xen(void) { early_printk("Hello from C env\n"); + trap_init(); + for ( ;; ) asm volatile ("wfi"); diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index 29b1a0dfae..ad7311f269 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -13,6 +13,13 @@ #include #include +void trap_init(void) +{ + unsigned long addr = (unsigned long)&handle_trap; + + csr_write(CSR_STVEC, addr); +} + static const char *decode_trap_cause(unsigned long cause) { static const char *const trap_causes[] = { From patchwork Fri Feb 24 11:35:03 2023 Content-Type: text/plain; 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[46.204.108.92]) by smtp.gmail.com with ESMTPSA id a25-20020a05651c031900b00295a8d1ecc7sm50489ljp.18.2023.02.24.03.35.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 03:35:14 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 4e97e729-b437-11ed-a82a-c9ca1d2f71af DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=51X9MeY84AeI86UksVCXFvV/ywJXDcqY/IRT+9++n+0=; b=Cm3iRbMNcUp94s2Ne+koA/IZarQkv+AuXuJQGinD3yoETGZxCS5ZTTBkWfUwQbTUDV +U0Omhk1NpXJlMZgGbmGgEktbRg0ISL7W5jRcyHCXR+DxUnpIsiYymmRqxahcTTF6xJt LzPoaiP69oL2FQmuu4J/Kcai1W8LGjDvFtxXHI3kZ3SRppYbcArl//S6cJElWlfbiwxS O83FiFSbyyzpAUmZhEfKcj4b9ycFlTQN98CdpLGO4JUKGg6BtqmRSET2Ysy04TS6s3Rf FZriy3YtvdXg/uWv6aX3M0cOP0gscdZlcDEQef+NAfpyO2VkLqZxkY5bY8FRE5OJQn/o mRPw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=51X9MeY84AeI86UksVCXFvV/ywJXDcqY/IRT+9++n+0=; b=ObOGbBgfFxVdrRTNSfXbz7xfaJams4uxJe1M5xmMA/jfnRaFVZx1FtFhusBIWDpGOx ALU44CYodzCes7xW+FdZMIv9GsoYu0t2Sd5SG7TRPhyvH96TVBasBJm8pUnwAdhr/sRx 7Ts4e9rhf2NKk0s2+KF4OTAD7u1ENTylu9GFsFJI9kPOqjz/7/7aROr78GY2+uh2dad5 r/HXfwwtGlVCy7DgG2O7fQ7XHOG3T9QDJUtnbHrXh1aNRJJjlId5W0G8gSM2uqIrOLVq RsZcQ1LMLWvMp7kLipGrbh331E78JaVH9hSbe0HIaKVVHwf1ci+StJ0jEh5xrtDPRrAF skew== X-Gm-Message-State: AO0yUKWzXP0zcYRN6knVS7eaYjy5IKJ3EClH5odZU9nwnEs4XOgCoPHB ZoPfl2Eg8HuTvOPyL0PP6zAwpPX+Xyg= X-Google-Smtp-Source: AK7set+oZ+AFDYIcbDmMMFFIbxZwMRNFhQH6aO+qx8QQaR//6vlQ2TEWysdF5xvyqn4sb4oxguCajg== X-Received: by 2002:ac2:5927:0:b0:4dd:9a38:fcc with SMTP id v7-20020ac25927000000b004dd9a380fccmr3430648lfi.63.1677238514815; Fri, 24 Feb 2023 03:35:14 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Julien Grall , Jan Beulich , Andrew Cooper , Stefano Stabellini , Gianluca Guida , Oleksii Kurochko , Bob Eshleman , Alistair Francis , Connor Davis Subject: [PATCH v4 3/5] xen/riscv: introduce an implementation of macros from Date: Fri, 24 Feb 2023 13:35:03 +0200 Message-Id: X-Mailer: git-send-email 2.39.0 In-Reply-To: References: MIME-Version: 1.0 The patch introduces macros: BUG(), WARN(), run_in_exception(), assert_failed. The implementation uses "ebreak" instruction in combination with diffrent bug frame tables (for each type) which contains useful information. Signed-off-by: Oleksii Kurochko --- Changes in V4: - Updates in RISC-V's : * Add explanatory comment about why there is only defined for 32-bits length instructions and 16/32-bits BUG_INSN_{16,32}. * Change 'unsigned long' to 'unsigned int' inside GET_INSN_LENGTH(). * Update declaration of is_valid_bugaddr(): switch return type from int to bool and the argument from 'unsigned int' to 'vaddr'. - Updates in RISC-V's traps.c: * replace /xen and /asm includes * update definition of is_valid_bugaddr():switch return type from int to bool and the argument from 'unsigned int' to 'vaddr'. Code style inside function was updated too. * do_bug_frame() refactoring: * local variables start and bug became 'const struct bug_frame' * bug_frames[] array became 'static const struct bug_frame[] = ...' * remove all casts * remove unneeded comments and add an explanatory comment that the do_bug_frame() will be switched to a generic one. * do_trap() refactoring: * read 16-bits value instead of 32-bits as compressed instruction can be used and it might happen than only 16-bits may be accessible. * code style updates * re-use instr variable instead of re-reading instruction. - Updates in setup.c: * add blank line between xen/ and asm/ includes. --- Changes in V3: - Rebase the patch "xen/riscv: introduce an implementation of macros from " on top of patch series [introduce generic implementation of macros from bug.h] --- Changes in V2: - Remove __ in define namings - Update run_in_exception_handler() with register void *fn_ asm(__stringify(BUG_FN_REG)) = (fn); - Remove bug_instr_t type and change it's usage to uint32_t --- xen/arch/riscv/include/asm/bug.h | 48 ++++++++++ xen/arch/riscv/include/asm/processor.h | 2 + xen/arch/riscv/setup.c | 1 + xen/arch/riscv/traps.c | 125 +++++++++++++++++++++++++ xen/arch/riscv/xen.lds.S | 10 ++ 5 files changed, 186 insertions(+) create mode 100644 xen/arch/riscv/include/asm/bug.h diff --git a/xen/arch/riscv/include/asm/bug.h b/xen/arch/riscv/include/asm/bug.h new file mode 100644 index 0000000000..67ade6f895 --- /dev/null +++ b/xen/arch/riscv/include/asm/bug.h @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2012 Regents of the University of California + * Copyright (C) 2021-2023 Vates + * + */ +#ifndef _ASM_RISCV_BUG_H +#define _ASM_RISCV_BUG_H + +#include + +#ifndef __ASSEMBLY__ + +#define BUG_INSTR "ebreak" + +/* + * The base instruction set has a fixed length of 32-bit naturally aligned + * instructions. + * + * There are extensions of variable length ( where each instruction can be + * any number of 16-bit parcels in length ) but they aren't used in Xen + * and Linux kernel ( where these definitions were taken from ). + * + * Compressed ISA is used now where the instruction length is 16 bit and + * 'ebreak' instruction, in this case, can be either 16 or 32 bit ( + * depending on if compressed ISA is used or not ) + */ +#define INSN_LENGTH_MASK _UL(0x3) +#define INSN_LENGTH_32 _UL(0x3) + +#define BUG_INSN_32 _UL(0x00100073) /* ebreak */ +#define BUG_INSN_16 _UL(0x9002) /* c.ebreak */ +#define COMPRESSED_INSN_MASK _UL(0xffff) + +#define GET_INSN_LENGTH(insn) \ +({ \ + unsigned int len; \ + len = ((insn & INSN_LENGTH_MASK) == INSN_LENGTH_32) ? \ + 4UL : 2UL; \ + len; \ +}) + +/* These are defined by the architecture */ +bool is_valid_bugaddr(vaddr_t addr); + +#endif /* !__ASSEMBLY__ */ + +#endif /* _ASM_RISCV_BUG_H */ diff --git a/xen/arch/riscv/include/asm/processor.h b/xen/arch/riscv/include/asm/processor.h index a71448e02e..ef23d9589e 100644 --- a/xen/arch/riscv/include/asm/processor.h +++ b/xen/arch/riscv/include/asm/processor.h @@ -69,6 +69,8 @@ static inline void die(void) wfi(); } +void show_execution_state(const struct cpu_user_regs *regs); + #endif /* __ASSEMBLY__ */ #endif /* _ASM_RISCV_PROCESSOR_H */ diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index c8513ca4f8..73b9a82883 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -1,3 +1,4 @@ +#include #include #include diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index ad7311f269..d87a9cfd2c 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -5,6 +5,7 @@ * RISC-V Trap handlers */ +#include #include #include @@ -99,7 +100,131 @@ static void do_unexpected_trap(const struct cpu_user_regs *regs) die(); } +void show_execution_state(const struct cpu_user_regs *regs) +{ + early_printk("implement show_execution_state(regs)\n"); +} + +/* + * TODO: change early_printk's function to early_printk with format + * when s(n)printf() will be added. + * + * Probably the TODO won't be needed as generic do_bug_frame() (at + * least, for ARM and RISC-V) has been introduced and current + * implementation will be replaced with generic one when panic(), + * printk() and find_text_region() (virtual memory?) will be + * ready/merged + */ +int do_bug_frame(const struct cpu_user_regs *regs, vaddr_t pc) +{ + const struct bug_frame *start, *end; + const struct bug_frame *bug = NULL; + unsigned int id = 0; + const char *filename, *predicate; + int lineno; + + static const struct bug_frame* bug_frames[] = { + &__start_bug_frames[0], + &__stop_bug_frames_0[0], + &__stop_bug_frames_1[0], + &__stop_bug_frames_2[0], + &__stop_bug_frames_3[0], + }; + + for ( id = 0; id < BUGFRAME_NR; id++ ) + { + start = bug_frames[id]; + end = bug_frames[id + 1]; + + while ( start != end ) + { + if ( (vaddr_t)bug_loc(start) == pc ) + { + bug = start; + goto found; + } + + start++; + } + } + + found: + if ( bug == NULL ) + return -ENOENT; + + if ( id == BUGFRAME_run_fn ) + { + void (*fn)(const struct cpu_user_regs *) = bug_ptr(bug); + + fn(regs); + + goto end; + } + + /* WARN, BUG or ASSERT: decode the filename pointer and line number. */ + filename = bug_ptr(bug); + lineno = bug_line(bug); + + switch ( id ) + { + case BUGFRAME_warn: + early_printk("Xen WARN at "); + early_printk(filename); + early_printk("\n"); + + show_execution_state(regs); + + goto end; + + case BUGFRAME_bug: + early_printk("Xen BUG at "); + early_printk(filename); + early_printk("\n"); + + show_execution_state(regs); + early_printk("change wait_for_interrupt to panic() when common is available\n"); + die(); + + case BUGFRAME_assert: + /* ASSERT: decode the predicate string pointer. */ + predicate = bug_msg(bug); + + early_printk("Assertion \'"); + early_printk(predicate); + early_printk("\' failed at "); + early_printk(filename); + early_printk("\n"); + + show_execution_state(regs); + early_printk("change wait_for_interrupt to panic() when common is available\n"); + die(); + } + + return -EINVAL; + + end: + return 0; +} + +bool is_valid_bugaddr(vaddr_t insn) +{ + if ( (insn & INSN_LENGTH_MASK) == INSN_LENGTH_32 ) + return ( insn == BUG_INSN_32 ); + else + return ( (insn & COMPRESSED_INSN_MASK) == BUG_INSN_16 ); +} + void do_trap(struct cpu_user_regs *cpu_regs) { + register_t pc = cpu_regs->sepc; + uint16_t instr = *(uint16_t *)pc; + + if ( is_valid_bugaddr(instr) ) { + if ( !do_bug_frame(cpu_regs, cpu_regs->sepc) ) { + cpu_regs->sepc += GET_INSN_LENGTH(instr); + return; + } + } + do_unexpected_trap(cpu_regs); } diff --git a/xen/arch/riscv/xen.lds.S b/xen/arch/riscv/xen.lds.S index ca57cce75c..139e2d04cb 100644 --- a/xen/arch/riscv/xen.lds.S +++ b/xen/arch/riscv/xen.lds.S @@ -39,6 +39,16 @@ SECTIONS . = ALIGN(PAGE_SIZE); .rodata : { _srodata = .; /* Read-only data */ + /* Bug frames table */ + __start_bug_frames = .; + *(.bug_frames.0) + __stop_bug_frames_0 = .; + *(.bug_frames.1) + __stop_bug_frames_1 = .; + *(.bug_frames.2) + __stop_bug_frames_2 = .; + *(.bug_frames.3) + __stop_bug_frames_3 = .; *(.rodata) *(.rodata.*) *(.data.rel.ro) From patchwork Fri Feb 24 11:35:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleksii Kurochko X-Patchwork-Id: 13151195 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5016BC61DA4 for ; Fri, 24 Feb 2023 11:35:25 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.500951.772547 (Exim 4.92) (envelope-from ) id 1pVWMB-0008IN-A9; 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[46.204.108.92]) by smtp.gmail.com with ESMTPSA id a25-20020a05651c031900b00295a8d1ecc7sm50489ljp.18.2023.02.24.03.35.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 03:35:17 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5052f9a5-b437-11ed-88bb-e56d68cac8db DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=GhDjXc5QZ2qmKSV3xte4Vj9qFfnQzX3JEEqYRrvMiGo=; b=jXp3wZzXEtg1G0jPWq0OaoCQsDDxu+oWJIrpVKHkdyNfyKQwyYUBhjo8mGVi4yq3Qi ay1HcLtoWDgFrlVqzdFur6lNd3yAv4EE/q3JTVo0BzUNoTcW8uC/wck3ICPuitsWK12T AjmzVlfos9Hhj0DiPc4Ny6WR4ZZle5wD7sKV3OhFXoB6vhZFB+Ch+7rpnyqafKKDpKzY j4UJ9U94A4tZE0WRphuo885YeCuRVmpsZGl4pdCgltluhNvKsZNECbCUqyiXvU+4yvWu 6EZZp3DnTT1T0P2DSEQr2J6jB5266qQY56znJ4Ou610GopbmZ1d5rbKyoxaVSsUAUcnP VQKw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=GhDjXc5QZ2qmKSV3xte4Vj9qFfnQzX3JEEqYRrvMiGo=; b=iYA5/myFtR1hRT5cPeNEo9VQgLR7y/u7o3952LFozSB3JcCZp20STSeeuYge6Lj05u xAGTdiV4uvgHc9+eyYSnwCMOzibijpFTJD0jS2yldZgUqQOl+XUyQrJG3jwWreLooo/s X2o1I4momDHD/P3z9eBxLH1egAj7ZUm2hve1pFxonBDTFz/JDmV+FbQfjiSdJitKxwlg 8f1XhXpIS9UAw3oV4FGIucUZCNKP0HzocehyPMOYjaHji0UmApWamcyBakbZxoeNLTDd I/TJgrh1ZSMXiePxGkxmLD/21Hdxoi4L6auki3Eva0bP2wHArSVXdXd9/4C++uQmt8nd RZlA== X-Gm-Message-State: AO0yUKUT2Q35f3ZcOac1lMMaT+aeyGKhIeXubLrXAu3Dj/rUHJgh9ndM 3kbXgG07lXcwYR1l5Er0s6Ors0xp62c= X-Google-Smtp-Source: AK7set+kCZYjX00+I0jYPqCcg9yoYxAzqNu5KXS1Wd2yZGjwj9ZtrcYK/48pkTgsXOl5R1e04CnJTA== X-Received: by 2002:a05:651c:b06:b0:295:733a:3463 with SMTP id b6-20020a05651c0b0600b00295733a3463mr7754865ljr.29.1677238517834; Fri, 24 Feb 2023 03:35:17 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Julien Grall , Jan Beulich , Andrew Cooper , Stefano Stabellini , Gianluca Guida , Oleksii Kurochko , Doug Goldstein , Alistair Francis Subject: [PATCH v4 5/5] automation: modify RISC-V smoke test Date: Fri, 24 Feb 2023 13:35:05 +0200 Message-Id: <8a34b2b5ea5a948cdd4c608834f22c14ebe7ca6d.1677237653.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: References: MIME-Version: 1.0 The patch modifies the grep pattern to reflect the usage of WARN. Signed-off-by: Oleksii Kurochko Reviewed-by: Alistair Francis Acked-by: Stefano Stabellini --- Changes in V4: - Add Reviewed-by: Alistair Francis and Acked-by: Stefano Stabellini --- Changes in V3: - Update commit message --- Changes in V2: - Leave only the latest "grep ..." --- automation/scripts/qemu-smoke-riscv64.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/automation/scripts/qemu-smoke-riscv64.sh b/automation/scripts/qemu-smoke-riscv64.sh index e0f06360bc..02fc66be03 100755 --- a/automation/scripts/qemu-smoke-riscv64.sh +++ b/automation/scripts/qemu-smoke-riscv64.sh @@ -16,5 +16,5 @@ qemu-system-riscv64 \ |& tee smoke.serial set -e -(grep -q "Hello from C env" smoke.serial) || exit 1 +(grep -q "WARN is most likely working" smoke.serial) || exit 1 exit 0