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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id t5-20020adff605000000b002c71dd1109fsm1966808wrp.47.2023.02.24.07.46.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 07:46:04 -0800 (PST) From: Andrew Jones To: linux-riscv@lists.infradead.org Cc: 'Paul Walmsley ' , 'Jisheng Zhang ' , 'Palmer Dabbelt ' , 'Heiko Stuebner ' , 'Conor Dooley ' , 'Albert Ou ' Subject: [PATCH v2 1/6] riscv: Clarify RISCV_ALTERNATIVE help text Date: Fri, 24 Feb 2023 16:45:56 +0100 Message-Id: <20230224154601.88163-2-ajones@ventanamicro.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230224154601.88163-1-ajones@ventanamicro.com> References: <20230224154601.88163-1-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230224_074610_863561_D4D75CCA X-CRM114-Status: GOOD ( 10.48 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Clarify RISCV_ALTERNATIVE's help text by pointing out that code patching is not only done at boot time, but also module load time. Also point out that this is the minimal possible overhead. Signed-off-by: Andrew Jones --- arch/riscv/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 81eb031887d2..eb087e17c91b 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -380,8 +380,8 @@ config RISCV_ALTERNATIVE help This Kconfig allows the kernel to automatically patch the errata required by the execution platform at run time. The - code patching is performed once in the boot stages. It means - that the overhead from this mechanism is just taken once. + code patching overhead is minimal, as it's only done once + at boot and once on each module load. config RISCV_ALTERNATIVE_EARLY bool From patchwork Fri Feb 24 15:45:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13151448 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CCE89C61DA4 for ; Fri, 24 Feb 2023 15:46:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=5Gda6d0KsQ9gxdJCxQKJWhJISmpTOLQ+O5obFbch0ME=; b=WU5TQjPd46UkpS sVi+D2ANO9bNWTCNNXI9sMGwWkwu3ntk3zJ59LakV+m9KNDEEv7dDUqRj30c6oVy4wzV/TpXz2kcs vGGmV/jAU8OO99S9yO5nvqOU6zfNRugL+wAqRPpt/qNk6g+71/av6Yuv7fOT9n+ciFir18ODhwClz MSTWFDEP2nrUWjPneRYw9MMYlR7m/E9aHbGo1hhVumRn5CA2hMBh6fPO8Fuq9Hmr3YRjmVYFb2gbU IDxf+UMymuwzpTY9J0LDT0vlpjN86i74BeFxyqpJDHQhPvpJgH1NEONrqJEGpG3OqL1ncimOAYqst L7QDl1wPqOadhAgcHpcQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pVaGy-0030be-B5; Fri, 24 Feb 2023 15:46:12 +0000 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pVaGv-0030a1-9Z for linux-riscv@lists.infradead.org; Fri, 24 Feb 2023 15:46:10 +0000 Received: by mail-wr1-x42c.google.com with SMTP id j2so14185065wrh.9 for ; Fri, 24 Feb 2023 07:46:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=pGbYsJ7D0VVgip5QYpKcTxXrep0iIVqF+e55j64Dw9E=; b=aTTd/R2RL2oA04nfD/jdxo5g7RvLD61XMDRh7gUDRW2eHBnFG6O25luyjWUl0Ch+ux XPCrdtfIhpBSz5/V4r8lodVGKWWfnpcZzd5c2RylEm7VHxqzhMQJlcbGlW1zIo/bUW7s XKJ9cijoWuNx+XcLXymsT0iNBOGiZU8IM5mJvVdu+5A9i0TyiueBvmNVuHPhpI0CFIUe M+J/I3KeaKRaude2Kn++yxVOK7RSfYxPLIGpStU5/RjK04jT+QdIcZpLzo9kw+9pKW4g fXdgU9RhfG845myjk9LZ8iIamfedqJvf+0o8ggAQeAHXSsl/qnpgvNiFiAoPz78Yetn+ 49ZQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pGbYsJ7D0VVgip5QYpKcTxXrep0iIVqF+e55j64Dw9E=; b=VIyMDLwE2zYyYVyh4y6+oTwVWNYeZtI5eHjM9xKRuaVOj7UXWbKr84qYG4Hhuzzkzo IQyfofRvClDAqavKiiJBmTKJTn3cBX6sITot0lS5NqZdcHqyYj2S8CmItJ4vpeZFPI55 0dMezuPtRIQyQgbg4sSdqTl1W+HyTanEVEdNwZ+aFckU5eyO2uLCrztpA7DVVrwI1o4G vQSPzOdp/7l5gqjnsIEVKIc5a3vPsLUgGb9GVMGQlwE228oMlnf59NIvpG+LC3kFUnCi bRIoiyaqjLrmsDD9tZeUSWagJCP9SReYSmerop84jqzmjqWktDXN4y36NLBn3ngcI6ds RY9w== X-Gm-Message-State: AO0yUKXanMYVc3FUIdhUYvPn1F93dQPAxyLE3MlfzDsvcXv/W3g6Smu8 JjDERQktw9KXxSdR3JP2+zhxigieemLCfPG6 X-Google-Smtp-Source: AK7set+FhKTTfQ5xvzxi/YoISfCu1v5v85pkr5VHbFHuQl2mIFCxFnIB/RHqj73g2R77Iu0vhkp5dg== X-Received: by 2002:a5d:58f5:0:b0:2c3:f8b8:87 with SMTP id f21-20020a5d58f5000000b002c3f8b80087mr13010768wrd.25.1677253565981; Fri, 24 Feb 2023 07:46:05 -0800 (PST) Received: from localhost (2001-1ae9-1c2-4c00-20f-c6b4-1e57-7965.ip6.tmcz.cz. [2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id l11-20020adff48b000000b002c592535839sm13414793wro.17.2023.02.24.07.46.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 07:46:05 -0800 (PST) From: Andrew Jones To: linux-riscv@lists.infradead.org Cc: 'Paul Walmsley ' , 'Jisheng Zhang ' , 'Palmer Dabbelt ' , 'Heiko Stuebner ' , 'Conor Dooley ' , 'Albert Ou ' , Heiko Stuebner Subject: [PATCH v2 2/6] riscv: Rename Kconfig.erratas to Kconfig.errata Date: Fri, 24 Feb 2023 16:45:57 +0100 Message-Id: <20230224154601.88163-3-ajones@ventanamicro.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230224154601.88163-1-ajones@ventanamicro.com> References: <20230224154601.88163-1-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230224_074609_350202_C3C148BD X-CRM114-Status: UNSURE ( 7.35 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Errata is already plural for erratum. Rename it to make the grammar gooder. Signed-off-by: Andrew Jones Reviewed-by: Conor Dooley Reviewed-by: Heiko Stuebner --- arch/riscv/Kconfig | 2 +- arch/riscv/{Kconfig.erratas => Kconfig.errata} | 0 2 files changed, 1 insertion(+), 1 deletion(-) rename arch/riscv/{Kconfig.erratas => Kconfig.errata} (100%) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index eb087e17c91b..80bc960706e3 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -246,7 +246,7 @@ config AS_HAS_INSN def_bool $(as-instr,.insn r 51$(comma) 0$(comma) 0$(comma) t0$(comma) t0$(comma) zero) source "arch/riscv/Kconfig.socs" -source "arch/riscv/Kconfig.erratas" +source "arch/riscv/Kconfig.errata" menu "Platform type" diff --git a/arch/riscv/Kconfig.erratas b/arch/riscv/Kconfig.errata similarity index 100% rename from arch/riscv/Kconfig.erratas rename to arch/riscv/Kconfig.errata From patchwork Fri Feb 24 15:45:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13151445 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8BA27C678D5 for ; Fri, 24 Feb 2023 15:46:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=XDsTgCtttmg49I+B93yscgx6LY7ztGRECQcFoSga8Co=; b=mVK5tR6yTtgny9 4gSPHAmIjIsYdqSkCC+uFiDqjh8TcuxBO5Pi6vhNY1ZjpuyrcWkFWePb4W5IKLsyXoH/DH6e9eqOf E14yqL+p6OKyxUjW5zE57Joo8BJE5uvtwdsQpY01RKeiZYk75ndS3vh/WuWbOfy2QqS4XVwYj4oIo LQczk8a4d1RUp126xOa/sBIVEp0wtY94hwN7Koyjhj3Qx6B/Dusrkp0ovPmU0IOCJpxEfwoqqLQLS S5Blpg2gBDwEb7NMSqeC+iucqDTEFIkaZPibujLLcRuBGiNz0VwuNn7GsVhQuiTfg3d4BWDfcedwJ A6itjlzkvMvxX8YKv2eQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pVaH3-0030dH-MI; Fri, 24 Feb 2023 15:46:17 +0000 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pVaGx-0030aD-3o for linux-riscv@lists.infradead.org; Fri, 24 Feb 2023 15:46:12 +0000 Received: by mail-wm1-x330.google.com with SMTP id az36so2112403wmb.1 for ; Fri, 24 Feb 2023 07:46:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=c8mSm1K1TPXfzAEsHWNA1iVbQxPviotFqESjhcwbXD4=; b=OikGxbxFCpJHKLIP/j1zgCHpWrgVLC002eDKqk+B/ZCZmgug275aX8TodPCRCp29Sz hp/WOca6SvgeTxsCGPK9o47YToz8dZ2JJSKqECVOp+BtOl8xzRg7933FSJWCiHNjxZfF nWlSs4yRTxA5ciMoPWdw4gkYlAjkYDJJL7MWBoh5UDm2Au2Y0JWq3ELPuLWnUxk6tTPw Oo08CjOlepENhvzxsH0231idRUh80Af7oSoEmuYTaEqH3vOjVp12EmG32SPzL55kF68z Zt9SHWNbcBricE+mDvN2lQSFzfoPjwuhAPQCHK+JgF1XVURDitUwcZhwMIioxrLcbniC pU/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=c8mSm1K1TPXfzAEsHWNA1iVbQxPviotFqESjhcwbXD4=; b=p1SN26rZk7TgJV0QCfOiR96PcG6YoKyDcH546ckobECJrD2wi+WgI2u4lTuNRImrI9 X4BiQdt5GIt2IoDbhAHBMu6cYxiFbHK5M2nnC0bGWtcTmHHgbtE2FaDAty4Zyjw0x+fw j9/gHc2TtQIusKSxVF8N8U97LN7OJFRWpq+XMtA1oZVrBLFzsnzxIJhW6DUwzok62iTN 0odIW6kB4HstkjoI7SX7kQl4+OCJgP3MMVBhYSpJCtttT8LevCng9tRKgpP6pqwVGh7/ 79gXMyKqim+u7/LWZb31982yu0bvVXHRT5v52pTTY7I1umgYqtdOmbnNZm4+BqJz3hlL 0Cmg== X-Gm-Message-State: AO0yUKUC/j3Afsou4GA/K4PTuyJn6pZwH4nHqs10Hb9NUczFZEpChrh0 EnjTuMDtyct187UUKJoVjQDb5Zm/l163ImXf X-Google-Smtp-Source: AK7set/2F10fpE1Gnav2X0NXTG+NhwIWweza8exgxsVxX7zMf9guB+iasNkg165HJZsYlF6NgjNuEQ== X-Received: by 2002:a05:600c:4d26:b0:3ea:e4bb:33ef with SMTP id u38-20020a05600c4d2600b003eae4bb33efmr3381951wmp.9.1677253567273; Fri, 24 Feb 2023 07:46:07 -0800 (PST) Received: from localhost (2001-1ae9-1c2-4c00-20f-c6b4-1e57-7965.ip6.tmcz.cz. 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X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org A define and a struct were introduced with commit 6f4eea90465a ("riscv: Introduce alternative mechanism to apply errata solution"), which introduced alternatives to RISC-V. The define is used for an arbitrary string length, specific to sifive errata, so just use the number directly there instead. The struct has never been used, so remove it. Signed-off-by: Andrew Jones Reviewed-by: Conor Dooley Reviewed-by: Heiko Stuebner --- arch/riscv/errata/sifive/errata.c | 2 +- arch/riscv/include/asm/alternative.h | 7 ------- 2 files changed, 1 insertion(+), 8 deletions(-) diff --git a/arch/riscv/errata/sifive/errata.c b/arch/riscv/errata/sifive/errata.c index da55cb247e89..69dfb38e4f06 100644 --- a/arch/riscv/errata/sifive/errata.c +++ b/arch/riscv/errata/sifive/errata.c @@ -14,7 +14,7 @@ #include struct errata_info_t { - char name[ERRATA_STRING_LENGTH_MAX]; + char name[32]; bool (*check_func)(unsigned long arch_id, unsigned long impid); }; diff --git a/arch/riscv/include/asm/alternative.h b/arch/riscv/include/asm/alternative.h index b8648d4f2ac1..3beef400a971 100644 --- a/arch/riscv/include/asm/alternative.h +++ b/arch/riscv/include/asm/alternative.h @@ -6,8 +6,6 @@ #ifndef __ASM_ALTERNATIVE_H #define __ASM_ALTERNATIVE_H -#define ERRATA_STRING_LENGTH_MAX 32 - #include #ifndef __ASSEMBLY__ @@ -43,11 +41,6 @@ struct alt_entry { u32 errata_id; /* The errata id */ }; -struct errata_checkfunc_id { - unsigned long vendor_id; - bool (*func)(struct alt_entry *alt); -}; - void sifive_errata_patch_func(struct alt_entry *begin, struct alt_entry *end, unsigned long archid, unsigned long impid, unsigned int stage); From patchwork Fri Feb 24 15:45:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13151446 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ADF6AC61DA3 for ; Fri, 24 Feb 2023 15:46:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=KYzV5CLkQT+1CYevyYh+X7BOvuFi6GC5YZjqQzEKFN0=; b=ks4brhTg7QF7yK XNO0ES9+GnaKSG3iimlpN7SzxpuFQRiTi/zaNq1F/2fM3ZNVwfBtLGIh7gDB58yrjaR8eG0nq/wpl 6q1WZDTIFZN/tnBvx7OTawqmyJTvnRihqw77m82ZZqi+AP7MMtpMw3cct0O/aJaBq0ZWqMdig0o1l qNCywEc9Cd9wjhZbc3k/1ZlwOaDnMqwv/rnQyKRSNjGs85Zvds9D5FsfB/sIxmQriWN7OVoge51My QNxa70v29fTJf/fREuYefz6ZXQAQLABl69n2ZdjO5VPT9V5TtwcOf4Nmyg1g/MVZiJ2x5xI0CIQuM Qv3ByWOp+Bnt9bHxUQig==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pVaH5-0030e6-RW; Fri, 24 Feb 2023 15:46:19 +0000 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pVaGy-0030ac-Gs for linux-riscv@lists.infradead.org; Fri, 24 Feb 2023 15:46:14 +0000 Received: by mail-wr1-x42d.google.com with SMTP id bw19so3732050wrb.13 for ; Fri, 24 Feb 2023 07:46:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ejyNeOC7YFM4qsKIRZ5/72227f9bU8HqJzgjXmeLkEQ=; b=YBBSiC2jb2gtt9Iwfku0+RwYA6R1GkfbiOsba5lUiUMIk3EaWijNrhHvl2x0h1X2QY erlzirRavVmxe/hhctd8IFn2vdggKSEbVZUhGyjNzeInWCgh2lpcv+V2kka8A2pkTHQD jTOukPmaUYfx+IplkaaUy0pdzAb6leX4rS66gHvsjWgjulW8VnxOjzUAYtfIVx3pyNWv mUUUpDbtJ5q0Hrn5aStLFOO3d5eOZtAhedVQP+aCd/Pd5ZCAa8oihTY3I+nE1g8xzDeW uF44AdTLKFzBlHC+6TQEAGnf9Ul/bdO05TGTySgH40t4F6h9e0n6VCZ51GeN7dM2/tpR Ejlw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ejyNeOC7YFM4qsKIRZ5/72227f9bU8HqJzgjXmeLkEQ=; b=nCyWSX/HRv0f4K7gL4PtSJyl8ix23XuakW+EgOCSpjh5KLNwe6lb6B1AbYxhJMQjGe smFThv/MetU6crhemOLXCFfF1h8eSWWMLT3iW+epEjcasvCtdlipUnRX/5JMLRkFLYtk 5yAH0tfQJiUy3ISkZUHYZQuyUG4swVe6qXOENtjfadArBnAs0Tjkz+8f3aCvJO5TD1kz 1c8iBc1YtP4PFry5WBYKOC66oua/hRfgmi3wqQhsNofjbY/kZynjDmbve1/FATSpiSW7 gn0wD9CrU+/DWOflOua0hgJ+BN+CrMq12+nRvwnarC1OTHOp468zgy8V2I7FbEwBob5r qXtA== X-Gm-Message-State: AO0yUKW8Uwdg2TAyCUFT4drZ/GHoADRiTv/Vr8OMuHwZ6dji16XbJ8OA 1Xp8DDIjeUzFTGNbhfLXMpHnHNM1nynN7rz3 X-Google-Smtp-Source: AK7set+9bFIX8ZlFMAHdK/erszdS3TEpNixu7NBf9N8U/fq1at9FUPjUXIjgZlscSQZVNOOWsRudFg== X-Received: by 2002:a5d:5383:0:b0:2c7:169b:c57d with SMTP id d3-20020a5d5383000000b002c7169bc57dmr4399933wrv.18.1677253568527; Fri, 24 Feb 2023 07:46:08 -0800 (PST) Received: from localhost (2001-1ae9-1c2-4c00-20f-c6b4-1e57-7965.ip6.tmcz.cz. [2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id k24-20020a05600c0b5800b003dc4fd6e624sm3163354wmr.19.2023.02.24.07.46.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 07:46:08 -0800 (PST) From: Andrew Jones To: linux-riscv@lists.infradead.org Cc: 'Paul Walmsley ' , 'Jisheng Zhang ' , 'Palmer Dabbelt ' , 'Heiko Stuebner ' , 'Conor Dooley ' , 'Albert Ou ' , Heiko Stuebner Subject: [PATCH v2 4/6] riscv: alternatives: Rename errata_id to patch_id Date: Fri, 24 Feb 2023 16:45:59 +0100 Message-Id: <20230224154601.88163-5-ajones@ventanamicro.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230224154601.88163-1-ajones@ventanamicro.com> References: <20230224154601.88163-1-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230224_074612_593302_F3F72A7A X-CRM114-Status: GOOD ( 17.23 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Alternatives are used for both errata and cpufeatures. Use a more generic name, 'patch_id', as in "ID of code patching site", to avoid confusion when alternatives are used for cpufeatures. Signed-off-by: Andrew Jones Reviewed-by: Conor Dooley Reviewed-by: Heiko Stuebner --- arch/riscv/Kconfig | 6 +- arch/riscv/errata/sifive/errata.c | 6 +- arch/riscv/errata/thead/errata.c | 4 +- arch/riscv/include/asm/alternative-macros.h | 72 ++++++++++----------- arch/riscv/include/asm/alternative.h | 4 +- arch/riscv/kernel/cpufeature.c | 6 +- 6 files changed, 49 insertions(+), 49 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 80bc960706e3..aa951fe2bc56 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -379,9 +379,9 @@ config RISCV_ALTERNATIVE depends on !XIP_KERNEL help This Kconfig allows the kernel to automatically patch the - errata required by the execution platform at run time. The - code patching overhead is minimal, as it's only done once - at boot and once on each module load. + erratum or cpufeature required by the execution platform at run + time. The code patching overhead is minimal, as it's only done + once at boot and once on each module load. config RISCV_ALTERNATIVE_EARLY bool diff --git a/arch/riscv/errata/sifive/errata.c b/arch/riscv/errata/sifive/errata.c index 69dfb38e4f06..7fa7b8b6a811 100644 --- a/arch/riscv/errata/sifive/errata.c +++ b/arch/riscv/errata/sifive/errata.c @@ -101,12 +101,12 @@ void __init_or_module sifive_errata_patch_func(struct alt_entry *begin, for (alt = begin; alt < end; alt++) { if (alt->vendor_id != SIFIVE_VENDOR_ID) continue; - if (alt->errata_id >= ERRATA_SIFIVE_NUMBER) { - WARN(1, "This errata id:%d is not in kernel errata list", alt->errata_id); + if (alt->patch_id >= ERRATA_SIFIVE_NUMBER) { + WARN(1, "This errata id:%d is not in kernel errata list", alt->patch_id); continue; } - tmp = (1U << alt->errata_id); + tmp = (1U << alt->patch_id); if (cpu_req_errata & tmp) { mutex_lock(&text_mutex); patch_text_nosync(ALT_OLD_PTR(alt), ALT_ALT_PTR(alt), diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c index 3b96a06d3c54..7e8d50ebb71a 100644 --- a/arch/riscv/errata/thead/errata.c +++ b/arch/riscv/errata/thead/errata.c @@ -93,10 +93,10 @@ void __init_or_module thead_errata_patch_func(struct alt_entry *begin, struct al for (alt = begin; alt < end; alt++) { if (alt->vendor_id != THEAD_VENDOR_ID) continue; - if (alt->errata_id >= ERRATA_THEAD_NUMBER) + if (alt->patch_id >= ERRATA_THEAD_NUMBER) continue; - tmp = (1U << alt->errata_id); + tmp = (1U << alt->patch_id); if (cpu_req_errata & tmp) { oldptr = ALT_OLD_PTR(alt); altptr = ALT_ALT_PTR(alt); diff --git a/arch/riscv/include/asm/alternative-macros.h b/arch/riscv/include/asm/alternative-macros.h index 51c6867e02f3..993a44a8fdac 100644 --- a/arch/riscv/include/asm/alternative-macros.h +++ b/arch/riscv/include/asm/alternative-macros.h @@ -6,18 +6,18 @@ #ifdef __ASSEMBLY__ -.macro ALT_ENTRY oldptr newptr vendor_id errata_id new_len +.macro ALT_ENTRY oldptr newptr vendor_id patch_id new_len .4byte \oldptr - . .4byte \newptr - . .2byte \vendor_id .2byte \new_len - .4byte \errata_id + .4byte \patch_id .endm -.macro ALT_NEW_CONTENT vendor_id, errata_id, enable = 1, new_c : vararg +.macro ALT_NEW_CONTENT vendor_id, patch_id, enable = 1, new_c : vararg .if \enable .pushsection .alternative, "a" - ALT_ENTRY 886b, 888f, \vendor_id, \errata_id, 889f - 888f + ALT_ENTRY 886b, 888f, \vendor_id, \patch_id, 889f - 888f .popsection .subsection 1 888 : @@ -33,7 +33,7 @@ .endif .endm -.macro ALTERNATIVE_CFG old_c, new_c, vendor_id, errata_id, enable +.macro ALTERNATIVE_CFG old_c, new_c, vendor_id, patch_id, enable 886 : .option push .option norvc @@ -41,13 +41,13 @@ \old_c .option pop 887 : - ALT_NEW_CONTENT \vendor_id, \errata_id, \enable, \new_c + ALT_NEW_CONTENT \vendor_id, \patch_id, \enable, \new_c .endm -.macro ALTERNATIVE_CFG_2 old_c, new_c_1, vendor_id_1, errata_id_1, enable_1, \ - new_c_2, vendor_id_2, errata_id_2, enable_2 - ALTERNATIVE_CFG "\old_c", "\new_c_1", \vendor_id_1, \errata_id_1, \enable_1 - ALT_NEW_CONTENT \vendor_id_2, \errata_id_2, \enable_2, \new_c_2 +.macro ALTERNATIVE_CFG_2 old_c, new_c_1, vendor_id_1, patch_id_1, enable_1, \ + new_c_2, vendor_id_2, patch_id_2, enable_2 + ALTERNATIVE_CFG "\old_c", "\new_c_1", \vendor_id_1, \patch_id_1, \enable_1 + ALT_NEW_CONTENT \vendor_id_2, \patch_id_2, \enable_2, \new_c_2 .endm #define __ALTERNATIVE_CFG(...) ALTERNATIVE_CFG __VA_ARGS__ @@ -58,17 +58,17 @@ #include #include -#define ALT_ENTRY(oldptr, newptr, vendor_id, errata_id, newlen) \ +#define ALT_ENTRY(oldptr, newptr, vendor_id, patch_id, newlen) \ ".4byte ((" oldptr ") - .) \n" \ ".4byte ((" newptr ") - .) \n" \ ".2byte " vendor_id "\n" \ ".2byte " newlen "\n" \ - ".4byte " errata_id "\n" + ".4byte " patch_id "\n" -#define ALT_NEW_CONTENT(vendor_id, errata_id, enable, new_c) \ +#define ALT_NEW_CONTENT(vendor_id, patch_id, enable, new_c) \ ".if " __stringify(enable) " == 1\n" \ ".pushsection .alternative, \"a\"\n" \ - ALT_ENTRY("886b", "888f", __stringify(vendor_id), __stringify(errata_id), "889f - 888f") \ + ALT_ENTRY("886b", "888f", __stringify(vendor_id), __stringify(patch_id), "889f - 888f") \ ".popsection\n" \ ".subsection 1\n" \ "888 :\n" \ @@ -83,7 +83,7 @@ ".previous\n" \ ".endif\n" -#define __ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, enable) \ +#define __ALTERNATIVE_CFG(old_c, new_c, vendor_id, patch_id, enable) \ "886 :\n" \ ".option push\n" \ ".option norvc\n" \ @@ -91,22 +91,22 @@ old_c "\n" \ ".option pop\n" \ "887 :\n" \ - ALT_NEW_CONTENT(vendor_id, errata_id, enable, new_c) + ALT_NEW_CONTENT(vendor_id, patch_id, enable, new_c) -#define __ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1, enable_1, \ - new_c_2, vendor_id_2, errata_id_2, enable_2) \ - __ALTERNATIVE_CFG(old_c, new_c_1, vendor_id_1, errata_id_1, enable_1) \ - ALT_NEW_CONTENT(vendor_id_2, errata_id_2, enable_2, new_c_2) +#define __ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, patch_id_1, enable_1, \ + new_c_2, vendor_id_2, patch_id_2, enable_2) \ + __ALTERNATIVE_CFG(old_c, new_c_1, vendor_id_1, patch_id_1, enable_1) \ + ALT_NEW_CONTENT(vendor_id_2, patch_id_2, enable_2, new_c_2) #endif /* __ASSEMBLY__ */ -#define _ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, CONFIG_k) \ - __ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, IS_ENABLED(CONFIG_k)) +#define _ALTERNATIVE_CFG(old_c, new_c, vendor_id, patch_id, CONFIG_k) \ + __ALTERNATIVE_CFG(old_c, new_c, vendor_id, patch_id, IS_ENABLED(CONFIG_k)) -#define _ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1, CONFIG_k_1, \ - new_c_2, vendor_id_2, errata_id_2, CONFIG_k_2) \ - __ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1, IS_ENABLED(CONFIG_k_1), \ - new_c_2, vendor_id_2, errata_id_2, IS_ENABLED(CONFIG_k_2)) +#define _ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, patch_id_1, CONFIG_k_1, \ + new_c_2, vendor_id_2, patch_id_2, CONFIG_k_2) \ + __ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, patch_id_1, IS_ENABLED(CONFIG_k_1), \ + new_c_2, vendor_id_2, patch_id_2, IS_ENABLED(CONFIG_k_2)) #else /* CONFIG_RISCV_ALTERNATIVE */ #ifdef __ASSEMBLY__ @@ -137,19 +137,19 @@ /* * Usage: - * ALTERNATIVE(old_content, new_content, vendor_id, errata_id, CONFIG_k) + * ALTERNATIVE(old_content, new_content, vendor_id, patch_id, CONFIG_k) * in the assembly code. Otherwise, - * asm(ALTERNATIVE(old_content, new_content, vendor_id, errata_id, CONFIG_k)); + * asm(ALTERNATIVE(old_content, new_content, vendor_id, patch_id, CONFIG_k)); * * old_content: The old content which is probably replaced with new content. * new_content: The new content. * vendor_id: The CPU vendor ID. - * errata_id: The errata ID. - * CONFIG_k: The Kconfig of this errata. When Kconfig is disabled, the old + * patch_id: The patch ID (erratum ID or cpufeature ID). + * CONFIG_k: The Kconfig of this patch ID. When Kconfig is disabled, the old * content will alwyas be executed. */ -#define ALTERNATIVE(old_content, new_content, vendor_id, errata_id, CONFIG_k) \ - _ALTERNATIVE_CFG(old_content, new_content, vendor_id, errata_id, CONFIG_k) +#define ALTERNATIVE(old_content, new_content, vendor_id, patch_id, CONFIG_k) \ + _ALTERNATIVE_CFG(old_content, new_content, vendor_id, patch_id, CONFIG_k) /* * A vendor wants to replace an old_content, but another vendor has used @@ -158,9 +158,9 @@ * on the following sample code and then replace ALTERNATIVE() with * ALTERNATIVE_2() to append its customized content. */ -#define ALTERNATIVE_2(old_content, new_content_1, vendor_id_1, errata_id_1, CONFIG_k_1, \ - new_content_2, vendor_id_2, errata_id_2, CONFIG_k_2) \ - _ALTERNATIVE_CFG_2(old_content, new_content_1, vendor_id_1, errata_id_1, CONFIG_k_1, \ - new_content_2, vendor_id_2, errata_id_2, CONFIG_k_2) +#define ALTERNATIVE_2(old_content, new_content_1, vendor_id_1, patch_id_1, CONFIG_k_1, \ + new_content_2, vendor_id_2, patch_id_2, CONFIG_k_2) \ + _ALTERNATIVE_CFG_2(old_content, new_content_1, vendor_id_1, patch_id_1, CONFIG_k_1, \ + new_content_2, vendor_id_2, patch_id_2, CONFIG_k_2) #endif diff --git a/arch/riscv/include/asm/alternative.h b/arch/riscv/include/asm/alternative.h index 3beef400a971..c8dea9e94310 100644 --- a/arch/riscv/include/asm/alternative.h +++ b/arch/riscv/include/asm/alternative.h @@ -36,9 +36,9 @@ void riscv_alternative_fix_offsets(void *alt_ptr, unsigned int len, struct alt_entry { s32 old_offset; /* offset relative to original instruction or data */ s32 alt_offset; /* offset relative to replacement instruction or data */ - u16 vendor_id; /* cpu vendor id */ + u16 vendor_id; /* CPU vendor ID */ u16 alt_len; /* The replacement size */ - u32 errata_id; /* The errata id */ + u32 patch_id; /* The patch ID (erratum ID or cpufeature ID) */ }; void sifive_errata_patch_func(struct alt_entry *begin, struct alt_entry *end, diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 59d58ee0f68d..059db20b28ca 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -282,13 +282,13 @@ void __init_or_module riscv_cpufeature_patch_func(struct alt_entry *begin, for (alt = begin; alt < end; alt++) { if (alt->vendor_id != 0) continue; - if (alt->errata_id >= RISCV_ISA_EXT_MAX) { + if (alt->patch_id >= RISCV_ISA_EXT_MAX) { WARN(1, "This extension id:%d is not in ISA extension list", - alt->errata_id); + alt->patch_id); continue; } - if (!__riscv_isa_extension_available(NULL, alt->errata_id)) + if (!__riscv_isa_extension_available(NULL, alt->patch_id)) continue; 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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id p14-20020a5d4e0e000000b002c5a790e959sm15887620wrt.19.2023.02.24.07.46.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 07:46:09 -0800 (PST) From: Andrew Jones To: linux-riscv@lists.infradead.org Cc: 'Paul Walmsley ' , 'Jisheng Zhang ' , 'Palmer Dabbelt ' , 'Heiko Stuebner ' , 'Conor Dooley ' , 'Albert Ou ' , Heiko Stuebner Subject: [PATCH v2 5/6] riscv: lib: Include hwcap.h directly Date: Fri, 24 Feb 2023 16:46:00 +0100 Message-Id: <20230224154601.88163-6-ajones@ventanamicro.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230224154601.88163-1-ajones@ventanamicro.com> References: <20230224154601.88163-1-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230224_074613_300419_D1D45B1F X-CRM114-Status: UNSURE ( 8.81 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org When using alternatives for cpufeatures we should include hwcap.h directly, rather than through errata_list.h. Opportunistically drop an unused include too. Signed-off-by: Andrew Jones Reviewed-by: Conor Dooley Reviewed-by: Heiko Stuebner --- arch/riscv/lib/strcmp.S | 3 +-- arch/riscv/lib/strlen.S | 3 +-- arch/riscv/lib/strncmp.S | 3 +-- 3 files changed, 3 insertions(+), 6 deletions(-) diff --git a/arch/riscv/lib/strcmp.S b/arch/riscv/lib/strcmp.S index 986ab23fe787..4f9b80dfb5db 100644 --- a/arch/riscv/lib/strcmp.S +++ b/arch/riscv/lib/strcmp.S @@ -2,9 +2,8 @@ #include #include -#include #include -#include +#include /* int strcmp(const char *cs, const char *ct) */ SYM_FUNC_START(strcmp) diff --git a/arch/riscv/lib/strlen.S b/arch/riscv/lib/strlen.S index 8345ceeee3f6..ed78449f2e05 100644 --- a/arch/riscv/lib/strlen.S +++ b/arch/riscv/lib/strlen.S @@ -2,9 +2,8 @@ #include #include -#include #include -#include +#include /* int strlen(const char *s) */ SYM_FUNC_START(strlen) diff --git a/arch/riscv/lib/strncmp.S b/arch/riscv/lib/strncmp.S index ee49595075be..e4e97d9b4e4e 100644 --- a/arch/riscv/lib/strncmp.S +++ b/arch/riscv/lib/strncmp.S @@ -2,9 +2,8 @@ #include #include -#include #include -#include +#include /* int strncmp(const char *cs, const char *ct, size_t count) */ SYM_FUNC_START(strncmp) From patchwork Fri Feb 24 15:46:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13151444 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 76675C6FA99 for ; Fri, 24 Feb 2023 15:46:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=vQd+10br6/V/PDJ6EhjPFhsn4cc+CzSHbhJ4iIiLT2U=; b=pHGm1UfumKHUZf 3z7US5tB0xdana0dylT/sOJrXNkfOj/x0hqW/HB2LCdKAksCPV2C5HkGm3daaGTx4xuZlQ1dnkhlY CPcRZ6Bstg8G33d2otF0Ffnpn1879WW8TjxdWpM7GWmrVEifKS8dlUzYjxY9O5Go7MaLXcclguf5t nVqnhYF53TNj04g5vAn4U0aX9OnxLuVmTKXDmpWRDgu0v3HIZ/DRopTp+P36r5rHkJf0tcG4rPN+k MuH7pI1EH2baQEcKdj/8kMfcyD/Pw080ums4xOrdq55pIQAODKZa7UPSmQ1gjj7cAdSMJPCo9D7c7 GIED+fBYwJmHDRcXvRNw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pVaH4-0030dm-O7; Fri, 24 Feb 2023 15:46:18 +0000 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pVaGy-0030bU-KQ for linux-riscv@lists.infradead.org; Fri, 24 Feb 2023 15:46:13 +0000 Received: by mail-wm1-x330.google.com with SMTP id ay29-20020a05600c1e1d00b003e9f4c2b623so2457264wmb.3 for ; Fri, 24 Feb 2023 07:46:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xo+EVv3XgUTIIi+/6+ttXrZNhwVtRPj9hfyuzLntRpg=; b=BlvNIrd+NK3X/O7djU/e+reAqeQ1TbZeGjnDUbarCo3tgR/wdG+BRlSQfH9sP8F0IY ToOklkNZ88vWDVHmFh0Yhz8r4M2GkwQudrsCJtM53/Bb5XO4IOr5vfr8kUd7tVnWllPj chYH0B4691aXg8A8h2xKzKFMvjqSpJlLIQhQTiKrNBFuwh0ybIAHmqblYY/bLNyEIq8w R+IYTipbmeDmZQ86gysHLMfDFb00H0cJfAoI8W7Ib6q7dicm1frdfn3cz71An1pZ25Xa TnuJ8ZeeBuEA5BKn0AO5tmIITu+/cCLAGbSKUhchnlDXIKM8BUXAb5uL2L7wlaaX6ABe 17sw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xo+EVv3XgUTIIi+/6+ttXrZNhwVtRPj9hfyuzLntRpg=; b=FfqF+A9bHi23XRsUV1vTcFwhE+oVMW4KFTl0WR0bZs6J88O2dg8Ha/F7YhFY3HF45P 5mhYc3Rq7BWGmfvuzM0Lt9L40NXU04vURTeoSymYZlU+7CM569J82ui/HycxdMd6fFOj eb3dHlBwwk6D8+mjOzTQehkDyLrRL/kAz0qB3gaT+3pPBy5G8d8BId/xc+plQSbLdVVY EeJsor2OX3Irtvg0CGvAr280sZqfwiaJ/lObnWQeHp+XSfa6px5s04lq3FMeDnbDlXcS JyeQcr/gpZTZaEREt4xfMYXRbTCamsjHh13TikBU6ZZtnrcIpKrXcZHl+XGv3m2HP+X0 QgMA== X-Gm-Message-State: AO0yUKVAHO4gmerD/9gLzH3JsG5RjAgqUT0kggpf8tYVQII9qXwp7OpW h0LPIpDcL8BHMDeQXH6Q4CzDOCF9Nn4JVcNW X-Google-Smtp-Source: AK7set8GAoA4nmCfxT1zlQElJnV5PWOWUZwedMvETDBWAhMtp/moQqlJaAMnP+gMM85uG2+0edOxjA== X-Received: by 2002:a05:600c:3417:b0:3ea:c100:e974 with SMTP id y23-20020a05600c341700b003eac100e974mr4120986wmp.26.1677253571284; Fri, 24 Feb 2023 07:46:11 -0800 (PST) Received: from localhost (2001-1ae9-1c2-4c00-20f-c6b4-1e57-7965.ip6.tmcz.cz. [2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id r1-20020adfdc81000000b002c5503a8d21sm11250427wrj.70.2023.02.24.07.46.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 07:46:11 -0800 (PST) From: Andrew Jones To: linux-riscv@lists.infradead.org Cc: 'Paul Walmsley ' , 'Jisheng Zhang ' , 'Palmer Dabbelt ' , 'Heiko Stuebner ' , 'Conor Dooley ' , 'Albert Ou ' , Heiko Stuebner Subject: [PATCH v2 6/6] riscv: cpufeature: Drop errata_list.h and other unused includes Date: Fri, 24 Feb 2023 16:46:01 +0100 Message-Id: <20230224154601.88163-7-ajones@ventanamicro.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230224154601.88163-1-ajones@ventanamicro.com> References: <20230224154601.88163-1-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230224_074612_690132_E5DB196D X-CRM114-Status: UNSURE ( 7.03 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Drop errata_list.h, since cpufeature.c includes hwcap.h directly to get cpufeature IDs. And, while there, prune the rest of the unused includes too. Signed-off-by: Andrew Jones Reviewed-by: Conor Dooley Reviewed-by: Heiko Stuebner --- arch/riscv/kernel/cpufeature.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 059db20b28ca..6569d963fc7d 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -8,20 +8,15 @@ #include #include -#include #include #include #include #include #include #include -#include #include #include -#include #include -#include -#include #define NUM_ALPHA_EXTS ('z' - 'a' + 1)