From patchwork Thu Mar 2 09:12:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13156857 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7DBBCC6FA8E for ; Thu, 2 Mar 2023 09:13:29 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pXezJ-0003oO-Hp; Thu, 02 Mar 2023 04:12:33 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pXezI-0003nv-Ar for qemu-devel@nongnu.org; Thu, 02 Mar 2023 04:12:32 -0500 Received: from mail-pl1-x632.google.com ([2607:f8b0:4864:20::632]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pXezG-0004f0-KR for qemu-devel@nongnu.org; Thu, 02 Mar 2023 04:12:31 -0500 Received: by mail-pl1-x632.google.com with SMTP id i10so16853186plr.9 for ; Thu, 02 Mar 2023 01:12:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=htx3L8ZbFkDG8vcCbUENB0v9bNbIA+8lPNiDX6BMsUg=; b=L6sTebMmYTUfotey2/8yasV2QFgl0eTwM2183ddq/MF0awEhL1ksIQOvBPZGv62TIa A+z6epCMdCN3aInfHbNNGBHo41of278kbKfS6eeWTt3KDHswVxoTov//jjiebrep7+OB mHdbQv3hI4l7LgeKj6KJq6mEMyQ1UXSF7tfjd9xN/Ra0LCeCUyQVnX6I5/KDXDF9cjsX /KKFoKI+wvYdrD2NqwGLOyfCXZq6kbcrYTvy7AgpakmUpwelikep9C9JIQN73coJL8Me DoryBvOwadypYEE88qG9u5bT1hEILhfQsJLBflby9/w2hzg7O5MZcMTF8XwrgGHv1KPd T5Wg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=htx3L8ZbFkDG8vcCbUENB0v9bNbIA+8lPNiDX6BMsUg=; b=l3JkTcCZGmEJiJtx4gzlGUDtcwNxHZiYgXV90Sr+8TvEaQYcg5nmTVUlFW05TC/VRU YFrtIL2TIhQNU1GcvMqrTk8n5Ba1MvAFHHo8fTZ6h8tHFkjDgYyDJ8e/Z4c2D82+VTQD g215kdZJk20NQzaYlgkqDMxbHe5bgFk6QgG2BDiE1OA2JSYw5prShT7jrIWvfbREHmzz um/sH42jonmcpEfTIKr3oWQZi0QCP2aFWstOJZSMBl7Gue24uroykbyDCqvIpCJADOPv rEtSi+pyzEuMud2YVKs4aQOoAlkE7xyfZf/gL3R7GYha0LkXwxv3I7FxOlKIcZrBGfgG KkXA== X-Gm-Message-State: AO0yUKWNTJZHuzGFfE/Lc/fVdj7bJiNH1PBHhjqBYF307BGuJXCr4ZDR 13gWm72l61tPFf6Z8GEDDxxjYg== X-Google-Smtp-Source: AK7set/E/tUUUqo4m7aHt2ksKjq/z/V7sbCQz7zdjdIjp7ufdjVBVO8eE5vA1pSK85JeSEPWqiIDfg== X-Received: by 2002:a17:902:dac8:b0:19b:110d:28dc with SMTP id q8-20020a170902dac800b0019b110d28dcmr11978626plx.19.1677748349247; Thu, 02 Mar 2023 01:12:29 -0800 (PST) Received: from localhost.localdomain ([49.206.14.226]) by smtp.gmail.com with ESMTPSA id iz12-20020a170902ef8c00b0019945535973sm9850692plb.63.2023.03.02.01.12.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Mar 2023 01:12:28 -0800 (PST) From: Sunil V L To: qemu-riscv@nongnu.org, qemu-devel@nongnu.org Cc: Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Andrew Jones , Anup Patel , Atish Kumar Patra , Igor Mammedov , Sunil V L , Bin Meng Subject: [PATCH V5 1/8] hw/riscv/virt: Add OEM_ID and OEM_TABLE_ID fields Date: Thu, 2 Mar 2023 14:42:05 +0530 Message-Id: <20230302091212.999767-2-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230302091212.999767-1-sunilvl@ventanamicro.com> References: <20230302091212.999767-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::632; envelope-from=sunilvl@ventanamicro.com; helo=mail-pl1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org ACPI needs OEM_ID and OEM_TABLE_ID for the machine. Add these fields in the RISCVVirtState structure and initialize with default values. Signed-off-by: Sunil V L Reviewed-by: Bin Meng Acked-by: Alistair Francis Reviewed-by: Andrew Jones --- hw/riscv/virt.c | 5 +++++ include/hw/riscv/virt.h | 2 ++ 2 files changed, 7 insertions(+) diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 86c4adc0c9..1621278eb8 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -49,6 +49,7 @@ #include "hw/pci/pci.h" #include "hw/pci-host/gpex.h" #include "hw/display/ramfb.h" +#include "hw/acpi/aml-build.h" /* * The virt machine physical address space used by some of the devices @@ -1513,6 +1514,10 @@ static void virt_machine_init(MachineState *machine) static void virt_machine_instance_init(Object *obj) { + RISCVVirtState *s = RISCV_VIRT_MACHINE(obj); + + s->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6); + s->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8); } static char *virt_get_aia_guests(Object *obj, Error **errp) diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index b3d26135c0..6c7885bf89 100644 --- a/include/hw/riscv/virt.h +++ b/include/hw/riscv/virt.h @@ -56,6 +56,8 @@ struct RISCVVirtState { bool have_aclint; RISCVVirtAIAType aia_type; int aia_guests; + char *oem_id; + char *oem_table_id; }; enum { From patchwork Thu Mar 2 09:12:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13156858 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A72AAC678D4 for ; Thu, 2 Mar 2023 09:13:33 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pXezN-0003pg-51; Thu, 02 Mar 2023 04:12:37 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pXezL-0003pL-H5 for qemu-devel@nongnu.org; Thu, 02 Mar 2023 04:12:35 -0500 Received: from mail-pj1-x1034.google.com ([2607:f8b0:4864:20::1034]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pXezJ-0004RT-OA for qemu-devel@nongnu.org; Thu, 02 Mar 2023 04:12:35 -0500 Received: by mail-pj1-x1034.google.com with SMTP id x34so16221643pjj.0 for ; Thu, 02 Mar 2023 01:12:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=EoMLEEBeALy5RqHQol1x3kgq/xhZyhIr706Dydz1mcg=; b=bclyfFwvsYpJwq1IZXJYB1f9jfM4Pn+NW6Vn3zK3ZKvPpoqAGdUcCGNKIgkaEKbym9 MDB9j/t+U1cjrakB2kx+DDysmyw3eJJxhJp6q+sn7IelMOZd56oGxKdUKQPSXyDoL47J nFeFzGwWShmqQkpvUmgKrqGQYwkFoIiwJquJYLMS0vnVTPNLI4uhnwykWbDJqnvRmnmB gPSqdrpCc3H3CpK/VYPp58nyL3HkIvZtyqkkVnsn+pjFBG6FbhTkUdCTt0vM3Of0KCCu phi/WkEprtcN94k3bkOdfRs8m3anBmmJCozDK4vhst6m4gHAxH7S+l++smlA1KHD7js0 rJkA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EoMLEEBeALy5RqHQol1x3kgq/xhZyhIr706Dydz1mcg=; b=CliAfttmVlPE3PaZMmtM0NxD+MEk4vmJmYGRWJ2maaLfIZoJRo/qiIh2g5hXhLrjCl qkO9JkdYj8lsTCTZT7D7Irf/re2PZrD13V+MXHzuxvmWDgJlcM4vjVzJezSRXacA1Nuj Mk3+u7bQzz25l13U0Sb/GUJW/9JO/jXje2jeMnCRyKYgzrh8NWpJ17Ib1Ibbq5t/W+Ch Uz/iGpT+ZxY0lC4BQtoX45mRtK4BNhfYj4zN7QtVo2bPlH/U+yq7OTcV43+ubbrET1z/ JSMz4VBDbBK0V6LMlx+L840NQ2xAHc/R/LzAldltPhmJK5CIwGwN1nmG0M59HwxE6yYm sUGA== X-Gm-Message-State: AO0yUKWRmb4W+6USDWKbxBLHfUe2UgKZKy6eGW0hHIILSe65AE+7bpm7 DL62WZSiGCkMafrFpMjVLH8RoQ== X-Google-Smtp-Source: AK7set8G5aOiRnsTdEV3JQnWFsTdhm8E7hOivZ+Tbc3ZHU25TMyfb/iaS1DiBov1bNhW3YUKjngAlA== X-Received: by 2002:a17:90a:1d1:b0:230:a1ce:f673 with SMTP id 17-20020a17090a01d100b00230a1cef673mr11378681pjd.4.1677748352977; Thu, 02 Mar 2023 01:12:32 -0800 (PST) Received: from localhost.localdomain ([49.206.14.226]) by smtp.gmail.com with ESMTPSA id iz12-20020a170902ef8c00b0019945535973sm9850692plb.63.2023.03.02.01.12.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Mar 2023 01:12:32 -0800 (PST) From: Sunil V L To: qemu-riscv@nongnu.org, qemu-devel@nongnu.org Cc: Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Andrew Jones , Anup Patel , Atish Kumar Patra , Igor Mammedov , Sunil V L Subject: [PATCH V5 2/8] hw/riscv/virt: Add a switch to disable ACPI Date: Thu, 2 Mar 2023 14:42:06 +0530 Message-Id: <20230302091212.999767-3-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230302091212.999767-1-sunilvl@ventanamicro.com> References: <20230302091212.999767-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1034; envelope-from=sunilvl@ventanamicro.com; helo=mail-pj1-x1034.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org ACPI will be enabled by default. Add a switch to turn off for testing and debug purposes. Signed-off-by: Sunil V L Reviewed-by: Andrew Jones --- hw/riscv/virt.c | 29 +++++++++++++++++++++++++++++ include/hw/riscv/virt.h | 2 ++ 2 files changed, 31 insertions(+) diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 1621278eb8..8df37cf3d6 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -50,6 +50,7 @@ #include "hw/pci-host/gpex.h" #include "hw/display/ramfb.h" #include "hw/acpi/aml-build.h" +#include "qapi/qapi-visit-common.h" /* * The virt machine physical address space used by some of the devices @@ -1518,6 +1519,7 @@ static void virt_machine_instance_init(Object *obj) s->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6); s->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8); + s->acpi = ON_OFF_AUTO_AUTO; } static char *virt_get_aia_guests(Object *obj, Error **errp) @@ -1592,6 +1594,28 @@ static void virt_set_aclint(Object *obj, bool value, Error **errp) s->have_aclint = value; } +bool virt_is_acpi_enabled(RISCVVirtState *s) +{ + return s->acpi != ON_OFF_AUTO_OFF; +} + +static void virt_get_acpi(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + RISCVVirtState *s = RISCV_VIRT_MACHINE(obj); + OnOffAuto acpi = s->acpi; + + visit_type_OnOffAuto(v, name, &acpi, errp); +} + +static void virt_set_acpi(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + RISCVVirtState *s = RISCV_VIRT_MACHINE(obj); + + visit_type_OnOffAuto(v, name, &s->acpi, errp); +} + static HotplugHandler *virt_machine_get_hotplug_handler(MachineState *machine, DeviceState *dev) { @@ -1663,6 +1687,11 @@ static void virt_machine_class_init(ObjectClass *oc, void *data) sprintf(str, "Set number of guest MMIO pages for AIA IMSIC. Valid value " "should be between 0 and %d.", VIRT_IRQCHIP_MAX_GUESTS); object_class_property_set_description(oc, "aia-guests", str); + object_class_property_add(oc, "acpi", "OnOffAuto", + virt_get_acpi, virt_set_acpi, + NULL, NULL); + object_class_property_set_description(oc, "acpi", + "Enable ACPI"); } static const TypeInfo virt_machine_typeinfo = { diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index 6c7885bf89..62efebaa32 100644 --- a/include/hw/riscv/virt.h +++ b/include/hw/riscv/virt.h @@ -58,6 +58,7 @@ struct RISCVVirtState { int aia_guests; char *oem_id; char *oem_table_id; + OnOffAuto acpi; }; enum { @@ -123,4 +124,5 @@ enum { #define FDT_APLIC_INT_MAP_WIDTH (FDT_PCI_ADDR_CELLS + FDT_PCI_INT_CELLS + \ 1 + FDT_APLIC_INT_CELLS) +bool virt_is_acpi_enabled(RISCVVirtState *s); #endif From patchwork Thu Mar 2 09:12:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13156856 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E8BDAC7EE30 for ; Thu, 2 Mar 2023 09:12:57 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pXezQ-0003tg-PI; Thu, 02 Mar 2023 04:12:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pXezP-0003tN-P0 for qemu-devel@nongnu.org; Thu, 02 Mar 2023 04:12:39 -0500 Received: from mail-pl1-x636.google.com ([2607:f8b0:4864:20::636]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pXezO-000570-6o for qemu-devel@nongnu.org; Thu, 02 Mar 2023 04:12:39 -0500 Received: by mail-pl1-x636.google.com with SMTP id u5so13465720plq.7 for ; Thu, 02 Mar 2023 01:12:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Gq6R8bMKD8VginRzcmkhaOc5Trofmeu2n8wOI0BvFnc=; b=gsdiGhQat5spgo9v9tXmUzlTjp5tqAEhw6hPLwwL6B5fh87q6nyjxRxovWqleUyG2V T+Kqt/mvqcMIayoyUQol6nVD7HVoEh91qPjSu4K467WX6Mrqg/zA2DqAWP0mteKO1tUz 8Ma2yREDGXI9exyXmuOYtMUvl8R2UrRINeGq9Rx5N0pf+mOEArmgH9pS4JZ10zC66AAQ nXWkiEbbjIgJNxcG/tPzMHCp8tRG6s7kWaHZeMnJkfygK2Wl3lyE0J16fColZZ+kW/T+ BzlYz1v8SO9ZsHHpNnG/5qXY1y6sU/y1aSfL8U9utsiX5KS5eBl/VVoMFjQuMO2aMhu4 7zgQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Gq6R8bMKD8VginRzcmkhaOc5Trofmeu2n8wOI0BvFnc=; b=niaRM2UB+PtIsyLPwhTE2e1sCnFOZDCEm/PtTpqLEpZYWnraIDwswW5inc9ec81dLw qHfM9P5EXb2B+T2A0iPJaNUNv7UqXEBY/HcGkakXXmqeSg1NjEIwm5+pqAdwG+caK+y/ Zk5R0ML28F7eR7IV/PnUf6wK2Tg4qJddmf7+LJc6kn9uwE5rNAkdfXfajYzlpmyHECdK 7UpPbFFn9ga/jYejl+zM11wB9tyazULj3824++15ucP/IGD4VCNfbbrGrZiQ+jUtrDAr YqOI3TfiD7+ev10FHRlTWmqWhSHfgOoXIskW3owq2Wcqtsx+6Pr900P87FlVtTf6eSx/ ZQHg== X-Gm-Message-State: AO0yUKWjvKXvf+q07VbeGSNrl9dZtV5d/loJ0QZi1/GEGDy6mQvPYA3n liI4tOx/xhw5c7TAOhpBpwwtQw== X-Google-Smtp-Source: AK7set8C3eHW+tX4WgxvhHlguNfTEBzz516Ts2DIjQ4is3lsKDzqpJi8Iaot/qZlUxJUh6TGA+lp1g== X-Received: by 2002:a17:902:ea04:b0:19c:c8c8:b544 with SMTP id s4-20020a170902ea0400b0019cc8c8b544mr12430486plg.64.1677748356873; Thu, 02 Mar 2023 01:12:36 -0800 (PST) Received: from localhost.localdomain ([49.206.14.226]) by smtp.gmail.com with ESMTPSA id iz12-20020a170902ef8c00b0019945535973sm9850692plb.63.2023.03.02.01.12.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Mar 2023 01:12:36 -0800 (PST) From: Sunil V L To: qemu-riscv@nongnu.org, qemu-devel@nongnu.org Cc: Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Andrew Jones , Anup Patel , Atish Kumar Patra , Igor Mammedov , Sunil V L , Bin Meng Subject: [PATCH V5 3/8] hw/riscv/virt: Add memmap pointer to RiscVVirtState Date: Thu, 2 Mar 2023 14:42:07 +0530 Message-Id: <20230302091212.999767-4-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230302091212.999767-1-sunilvl@ventanamicro.com> References: <20230302091212.999767-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::636; envelope-from=sunilvl@ventanamicro.com; helo=mail-pl1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org memmap needs to be exported outside of virt.c so that modules like acpi can use it. Hence, add a pointer field in RiscVVirtState structure and initialize it with the memorymap. Signed-off-by: Sunil V L Reviewed-by: Bin Meng Acked-by: Alistair Francis Reviewed-by: Andrew Jones --- hw/riscv/virt.c | 2 ++ include/hw/riscv/virt.h | 1 + 2 files changed, 3 insertions(+) diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 8df37cf3d6..9b85d5b747 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -1451,6 +1451,8 @@ static void virt_machine_init(MachineState *machine) ROUND_UP(virt_high_pcie_memmap.base, virt_high_pcie_memmap.size); } + s->memmap = virt_memmap; + /* register system main memory (actual RAM) */ memory_region_add_subregion(system_memory, memmap[VIRT_DRAM].base, machine->ram); diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index 62efebaa32..379501edcc 100644 --- a/include/hw/riscv/virt.h +++ b/include/hw/riscv/virt.h @@ -59,6 +59,7 @@ struct RISCVVirtState { char *oem_id; char *oem_table_id; OnOffAuto acpi; + const MemMapEntry *memmap; }; enum { From patchwork Thu Mar 2 09:12:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13156865 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E6B6DC678D4 for ; Thu, 2 Mar 2023 09:15:13 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pXezV-0003wV-Su; Thu, 02 Mar 2023 04:12:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pXezU-0003vx-BG for qemu-devel@nongnu.org; Thu, 02 Mar 2023 04:12:44 -0500 Received: from mail-pj1-x1032.google.com ([2607:f8b0:4864:20::1032]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pXezR-0005QD-Vv for qemu-devel@nongnu.org; Thu, 02 Mar 2023 04:12:44 -0500 Received: by mail-pj1-x1032.google.com with SMTP id oj5so12207748pjb.5 for ; Thu, 02 Mar 2023 01:12:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6f30AS3HlWfGLV6BxgkX21sGUR4DNiVXh/nZk1Ndkr0=; b=nTePn7kBgBVs1+zWFcc/DfMxkBkyTXlj0AFnTQ5QgJL3IEo+LSxpG6SV7l/TKvM0mI /bZogOlHL6RMzyF1Hy031SpoPG7cJY5vsCo+R03tsuTc1ivRsaXiymRsjGNCXZKjIom6 UBTpWIriOTbT4ZAMyQYxBWi8rrf7HtAmQuu84bUjQouJrMrpafnQGTYC2dBT/q6u2f8h xgsJwMVc6HksM6VDyjPezgEy9NR8sqKJMEPnOzTWSwtLp9+ITuzvbuNYDz6ngk/lVCzy iXniBxmTzEjQl3UL5/tuCVbg6qaKWLRFYK82S3oRUvEzF6kYCjEVji78FzZ/M13cP/96 RhGA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6f30AS3HlWfGLV6BxgkX21sGUR4DNiVXh/nZk1Ndkr0=; b=sTC4vvcnSPhzUPXezAbTSjqmfZLWCX3WP62Plx29/iL5fDhPpo58h8Nv+6uFjX+v2o SWcavGYwHX+/gE7U+dSREaahAOwH398+VHKjaKiwVBT5EkekYn2rrdgUDNwV3sbRE/0w sKE5dPd/XeOGOv2aM/Zkz3FaIS8tE1g9AcqY5f8AwBLsKQQDCXI/29S7aaFDmlGE7SzR ECPuUIGtoyPoZ4tWgD31zDO0zbxtO0+EHvoV/JU+xdLwfkJQ8pEmqBGMaxwKfH7AV0uL L09ejh8f/1wa+Y0M7VSOtxio0aiZoQi7/G4xn40CMHZ+SUAP90aUDtBlN2/jG9Oxhxee wwBw== X-Gm-Message-State: AO0yUKXVARAGfBtTis6LO9JaTaQbkoKriQSmkIlAKd9UpN1ySPaIU4i0 VKo1OdrVf9qk7CFPd5P13tRmSQ== X-Google-Smtp-Source: AK7set/iHCaAFWT2kPSVxw0P8d0E0z4QhvKHxgWiu2J1+nnzltL/4gFJT/oZ+5MycGR6GTTSkzxjig== X-Received: by 2002:a17:903:1103:b0:19e:8075:5545 with SMTP id n3-20020a170903110300b0019e80755545mr49752plh.54.1677748360646; Thu, 02 Mar 2023 01:12:40 -0800 (PST) Received: from localhost.localdomain ([49.206.14.226]) by smtp.gmail.com with ESMTPSA id iz12-20020a170902ef8c00b0019945535973sm9850692plb.63.2023.03.02.01.12.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Mar 2023 01:12:40 -0800 (PST) From: Sunil V L To: qemu-riscv@nongnu.org, qemu-devel@nongnu.org Cc: Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Andrew Jones , Anup Patel , Atish Kumar Patra , Igor Mammedov , Sunil V L Subject: [PATCH V5 4/8] hw/riscv/virt: Enable basic ACPI infrastructure Date: Thu, 2 Mar 2023 14:42:08 +0530 Message-Id: <20230302091212.999767-5-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230302091212.999767-1-sunilvl@ventanamicro.com> References: <20230302091212.999767-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=sunilvl@ventanamicro.com; helo=mail-pj1-x1032.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add basic ACPI infrastructure for RISC-V with below tables. 1) DSDT with below basic objects - CPUs - fw_cfg 2) FADT revision 6 with HW_REDUCED flag 3) XSDT 4) RSDP Add this functionality in a new file virt-acpi-build.c and enable building this infrastructure. Signed-off-by: Sunil V L Reviewed-by: Andrew Jones --- hw/riscv/Kconfig | 1 + hw/riscv/meson.build | 1 + hw/riscv/virt-acpi-build.c | 304 +++++++++++++++++++++++++++++++++++++ include/hw/riscv/virt.h | 1 + 4 files changed, 307 insertions(+) create mode 100644 hw/riscv/virt-acpi-build.c diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig index 4550b3b938..6528ebfa3a 100644 --- a/hw/riscv/Kconfig +++ b/hw/riscv/Kconfig @@ -44,6 +44,7 @@ config RISCV_VIRT select VIRTIO_MMIO select FW_CFG_DMA select PLATFORM_BUS + select ACPI config SHAKTI_C bool diff --git a/hw/riscv/meson.build b/hw/riscv/meson.build index ab6cae57ea..2f7ee81be3 100644 --- a/hw/riscv/meson.build +++ b/hw/riscv/meson.build @@ -9,5 +9,6 @@ riscv_ss.add(when: 'CONFIG_SIFIVE_E', if_true: files('sifive_e.c')) riscv_ss.add(when: 'CONFIG_SIFIVE_U', if_true: files('sifive_u.c')) riscv_ss.add(when: 'CONFIG_SPIKE', if_true: files('spike.c')) riscv_ss.add(when: 'CONFIG_MICROCHIP_PFSOC', if_true: files('microchip_pfsoc.c')) +riscv_ss.add(when: 'CONFIG_ACPI', if_true: files('virt-acpi-build.c')) hw_arch += {'riscv': riscv_ss} diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c new file mode 100644 index 0000000000..d6947fdc74 --- /dev/null +++ b/hw/riscv/virt-acpi-build.c @@ -0,0 +1,304 @@ +/* + * Support for generating ACPI tables and passing them to Guests + * + * RISC-V virt ACPI generation + * + * Copyright (C) 2008-2010 Kevin O'Connor + * Copyright (C) 2006 Fabrice Bellard + * Copyright (C) 2013 Red Hat Inc + * Copyright (c) 2015 HUAWEI TECHNOLOGIES CO.,LTD. + * Copyright (C) 2021-2023 Ventana Micro Systems Inc + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, see . + */ + +#include "qemu/osdep.h" +#include "hw/acpi/acpi-defs.h" +#include "hw/acpi/acpi.h" +#include "hw/acpi/aml-build.h" +#include "hw/acpi/utils.h" +#include "qapi/error.h" +#include "sysemu/reset.h" +#include "migration/vmstate.h" +#include "hw/riscv/virt.h" + +#define ACPI_BUILD_TABLE_SIZE 0x20000 + +typedef struct AcpiBuildState { + /* Copy of table in RAM (for patching) */ + MemoryRegion *table_mr; + MemoryRegion *rsdp_mr; + MemoryRegion *linker_mr; + /* Is table patched? */ + bool patched; +} AcpiBuildState; + +static void acpi_align_size(GArray *blob, unsigned align) +{ + /* + * Align size to multiple of given size. This reduces the chance + * we need to change size in the future (breaking cross version migration). + */ + g_array_set_size(blob, ROUND_UP(acpi_data_len(blob), align)); +} + +static void riscv_acpi_madt_add_rintc(uint32_t uid, + const CPUArchIdList *arch_ids, + GArray *entry) +{ + uint64_t hart_id = arch_ids->cpus[uid].arch_id; + + build_append_int_noprefix(entry, 0x18, 1); /* Type */ + build_append_int_noprefix(entry, 20, 1); /* Length */ + build_append_int_noprefix(entry, 1, 1); /* Version */ + build_append_int_noprefix(entry, 0, 1); /* Reserved */ + build_append_int_noprefix(entry, 0x1, 4); /* Flags */ + build_append_int_noprefix(entry, hart_id, 8); /* Hart ID */ + build_append_int_noprefix(entry, uid, 4); /* ACPI Processor UID */ +} + +static void acpi_dsdt_add_cpus(Aml *scope, RISCVVirtState *s) +{ + MachineClass *mc = MACHINE_GET_CLASS(s); + MachineState *ms = MACHINE(s); + const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(ms); + + for (int i = 0; i < arch_ids->len; i++) { + Aml *dev; + GArray *madt_buf = g_array_new(0, 1, 1); + + dev = aml_device("C%.03X", i); + aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0007"))); + aml_append(dev, aml_name_decl("_UID", + aml_int(arch_ids->cpus[i].arch_id))); + + /* build _MAT object */ + riscv_acpi_madt_add_rintc(i, arch_ids, madt_buf); + aml_append(dev, aml_name_decl("_MAT", + aml_buffer(madt_buf->len, + (uint8_t *)madt_buf->data))); + g_array_free(madt_buf, true); + + aml_append(scope, dev); + } +} + +static void acpi_dsdt_add_fw_cfg(Aml *scope, const MemMapEntry *fw_cfg_memmap) +{ + Aml *dev = aml_device("FWCF"); + aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0002"))); + + /* device present, functioning, decoding, not shown in UI */ + aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); + aml_append(dev, aml_name_decl("_CCA", aml_int(1))); + + Aml *crs = aml_resource_template(); + aml_append(crs, aml_memory32_fixed(fw_cfg_memmap->base, + fw_cfg_memmap->size, AML_READ_WRITE)); + aml_append(dev, aml_name_decl("_CRS", crs)); + aml_append(scope, dev); +} + +/* FADT */ +static void build_fadt_rev6(GArray *table_data, + BIOSLinker *linker, + RISCVVirtState *s, + unsigned dsdt_tbl_offset) +{ + AcpiFadtData fadt = { + .rev = 6, + .minor_ver = 5, + .flags = 1 << ACPI_FADT_F_HW_REDUCED_ACPI, + .xdsdt_tbl_offset = &dsdt_tbl_offset, + }; + + build_fadt(table_data, linker, &fadt, s->oem_id, s->oem_table_id); +} + +/* DSDT */ +static void build_dsdt(GArray *table_data, + BIOSLinker *linker, + RISCVVirtState *s) +{ + Aml *scope, *dsdt; + const MemMapEntry *memmap = s->memmap; + AcpiTable table = { .sig = "DSDT", .rev = 2, .oem_id = s->oem_id, + .oem_table_id = s->oem_table_id }; + + + acpi_table_begin(&table, table_data); + dsdt = init_aml_allocator(); + + /* + * When booting the VM with UEFI, UEFI takes ownership of the RTC hardware. + * While UEFI can use libfdt to disable the RTC device node in the DTB that + * it passes to the OS, it cannot modify AML. Therefore, we won't generate + * the RTC ACPI device at all when using UEFI. + */ + scope = aml_scope("\\_SB"); + acpi_dsdt_add_cpus(scope, s); + + acpi_dsdt_add_fw_cfg(scope, &memmap[VIRT_FW_CFG]); + + aml_append(dsdt, scope); + + /* copy AML table into ACPI tables blob and patch header there */ + g_array_append_vals(table_data, dsdt->buf->data, dsdt->buf->len); + + acpi_table_end(linker, &table); + free_aml_allocator(); +} + +static void virt_acpi_build(RISCVVirtState *s, AcpiBuildTables *tables) +{ + GArray *table_offsets; + unsigned dsdt, xsdt; + GArray *tables_blob = tables->table_data; + + table_offsets = g_array_new(false, true, + sizeof(uint32_t)); + + bios_linker_loader_alloc(tables->linker, + ACPI_BUILD_TABLE_FILE, tables_blob, + 64, false); + + /* DSDT is pointed to by FADT */ + dsdt = tables_blob->len; + build_dsdt(tables_blob, tables->linker, s); + + /* FADT and others pointed to by XSDT */ + acpi_add_table(table_offsets, tables_blob); + build_fadt_rev6(tables_blob, tables->linker, s, dsdt); + + /* XSDT is pointed to by RSDP */ + xsdt = tables_blob->len; + build_xsdt(tables_blob, tables->linker, table_offsets, s->oem_id, + s->oem_table_id); + + /* RSDP is in FSEG memory, so allocate it separately */ + { + AcpiRsdpData rsdp_data = { + .revision = 2, + .oem_id = s->oem_id, + .xsdt_tbl_offset = &xsdt, + .rsdt_tbl_offset = NULL, + }; + build_rsdp(tables->rsdp, tables->linker, &rsdp_data); + } + + /* + * The align size is 128, warn if 64k is not enough therefore + * the align size could be resized. + */ + if (tables_blob->len > ACPI_BUILD_TABLE_SIZE / 2) { + warn_report("ACPI table size %u exceeds %d bytes," + " migration may not work", + tables_blob->len, ACPI_BUILD_TABLE_SIZE / 2); + error_printf("Try removing some objects."); + } + + acpi_align_size(tables_blob, ACPI_BUILD_TABLE_SIZE); + + /* Clean up memory that's no longer used */ + g_array_free(table_offsets, true); +} + +static void acpi_ram_update(MemoryRegion *mr, GArray *data) +{ + uint32_t size = acpi_data_len(data); + + /* + * Make sure RAM size is correct - in case it got changed + * e.g. by migration + */ + memory_region_ram_resize(mr, size, &error_abort); + + memcpy(memory_region_get_ram_ptr(mr), data->data, size); + memory_region_set_dirty(mr, 0, size); +} + +static void virt_acpi_build_update(void *build_opaque) +{ + AcpiBuildState *build_state = build_opaque; + AcpiBuildTables tables; + + /* No state to update or already patched? Nothing to do. */ + if (!build_state || build_state->patched) { + return; + } + + build_state->patched = true; + + acpi_build_tables_init(&tables); + + virt_acpi_build(RISCV_VIRT_MACHINE(qdev_get_machine()), &tables); + + acpi_ram_update(build_state->table_mr, tables.table_data); + acpi_ram_update(build_state->rsdp_mr, tables.rsdp); + acpi_ram_update(build_state->linker_mr, tables.linker->cmd_blob); + + acpi_build_tables_cleanup(&tables, true); +} + +static void virt_acpi_build_reset(void *build_opaque) +{ + AcpiBuildState *build_state = build_opaque; + build_state->patched = false; +} + +static const VMStateDescription vmstate_virt_acpi_build = { + .name = "virt_acpi_build", + .version_id = 1, + .minimum_version_id = 1, + .fields = (VMStateField[]) { + VMSTATE_BOOL(patched, AcpiBuildState), + VMSTATE_END_OF_LIST() + }, +}; + +void virt_acpi_setup(RISCVVirtState *s) +{ + AcpiBuildTables tables; + AcpiBuildState *build_state; + + build_state = g_malloc0(sizeof *build_state); + + acpi_build_tables_init(&tables); + virt_acpi_build(s, &tables); + + /* Now expose it all to Guest */ + build_state->table_mr = acpi_add_rom_blob(virt_acpi_build_update, + build_state, tables.table_data, + ACPI_BUILD_TABLE_FILE); + assert(build_state->table_mr != NULL); + + build_state->linker_mr = acpi_add_rom_blob(virt_acpi_build_update, + build_state, + tables.linker->cmd_blob, + ACPI_BUILD_LOADER_FILE); + + build_state->rsdp_mr = acpi_add_rom_blob(virt_acpi_build_update, + build_state, tables.rsdp, + ACPI_BUILD_RSDP_FILE); + + qemu_register_reset(virt_acpi_build_reset, build_state); + virt_acpi_build_reset(build_state); + vmstate_register(NULL, 0, &vmstate_virt_acpi_build, build_state); + + /* + * Clean up tables but don't free the memory: we track it + * in build_state. + */ + acpi_build_tables_cleanup(&tables, false); +} diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index 379501edcc..e5c474b26e 100644 --- a/include/hw/riscv/virt.h +++ b/include/hw/riscv/virt.h @@ -126,4 +126,5 @@ enum { 1 + FDT_APLIC_INT_CELLS) bool virt_is_acpi_enabled(RISCVVirtState *s); +void virt_acpi_setup(RISCVVirtState *vms); #endif From patchwork Thu Mar 2 09:12:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13156860 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F0017C678D4 for ; Thu, 2 Mar 2023 09:13:48 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pXezZ-0003zl-E5; Thu, 02 Mar 2023 04:12:49 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pXezX-0003yi-2A for qemu-devel@nongnu.org; Thu, 02 Mar 2023 04:12:47 -0500 Received: from mail-pj1-x1032.google.com ([2607:f8b0:4864:20::1032]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pXezV-0005QD-B8 for qemu-devel@nongnu.org; Thu, 02 Mar 2023 04:12:46 -0500 Received: by mail-pj1-x1032.google.com with SMTP id oj5so12207870pjb.5 for ; Thu, 02 Mar 2023 01:12:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=2k4EXZKfQUKA+NFhqy+UgqQ7W6/Y203zszftUQA0Hjw=; b=h87oX/ekfJ9iK/ipdQy9zc7uFxS5dRBSQxs0Wq2nnyob295Ujz1fF68NnXfc30Q2XW e4UKDjBeGNjVBAXLH0SH66tja4uvzN/pqNePHffOMkSa/atk9MiyItRp9oU/VhxrxULb z5PoBlFPld39Gadt7uvPlu0q6DDmzGUV0sORpFfrRf97OjYb9kgVdwgLMl+hCnoA00eO b6t5I3WoIQPtP9AnKon2ppUr0p06O2vqk72GjSPyNE4ms1eHz0WYAbDhB7s0wrTN65EK C87acKkw024Oo3duSiCEJ5c/oGLIS71dWNZ1NLHNABANmCwYpQtBk98GLe8CWDSubznm K+Ag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2k4EXZKfQUKA+NFhqy+UgqQ7W6/Y203zszftUQA0Hjw=; b=YG2HMx37fdDZ5N/5qZG+p3KdTVzkrZjbWXTjwzq+o81aE93SlSn3Q5JoiedY0GT6P4 RufWW/MbhyIErTKlktdjjZLdmK83cK4VmL/rbO8/Ctv/6RzIsvoxSYJ+n6fP8iAOaU0c aiO3hsQdUgDVg0MK6+sm2FICBqlTZ1MH4AeE/E7fDBqubLtnvKH8OgJ2jSrG+MDVV4/f EVWamGAsFzO2UhGC5l9teT7+z+OVDeqSoEBUNAKLrbeROsWMHdveffw02ib2IDBmLvdm E2h5n7QSwKn1v5d2ZBKNcuV++Dtttj9WQ0BF4fEEz9Sfw3YRZPRr8r/t7CDxN9yjUQ5c eerg== X-Gm-Message-State: AO0yUKVjPd3V47hbUzGUH7yW1DxSCQ9uWu91OJIkOLwWm+tZskMAMNSq l/JGZhTgvsolQWCcU7CuSm30PdjKPkBwP22n X-Google-Smtp-Source: AK7set8qy+aF7qVMAMUuqo+AMtp/+n4JB6S1Ncue+t4lBKAPSmvBkZhpNuMHEe+cHU44PvqYgbWX2w== X-Received: by 2002:a17:90b:350c:b0:22b:f622:56ae with SMTP id ls12-20020a17090b350c00b0022bf62256aemr10625486pjb.23.1677748364435; Thu, 02 Mar 2023 01:12:44 -0800 (PST) Received: from localhost.localdomain ([49.206.14.226]) by smtp.gmail.com with ESMTPSA id iz12-20020a170902ef8c00b0019945535973sm9850692plb.63.2023.03.02.01.12.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Mar 2023 01:12:44 -0800 (PST) From: Sunil V L To: qemu-riscv@nongnu.org, qemu-devel@nongnu.org Cc: Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Andrew Jones , Anup Patel , Atish Kumar Patra , Igor Mammedov , Sunil V L Subject: [PATCH V5 5/8] hw/riscv/virt: virt-acpi-build.c: Add RINTC in MADT Date: Thu, 2 Mar 2023 14:42:09 +0530 Message-Id: <20230302091212.999767-6-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230302091212.999767-1-sunilvl@ventanamicro.com> References: <20230302091212.999767-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=sunilvl@ventanamicro.com; helo=mail-pj1-x1032.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add Multiple APIC Description Table (MADT) with the RINTC structure for each cpu. Signed-off-by: Sunil V L Acked-by: Alistair Francis Reviewed-by: Andrew Jones --- hw/riscv/virt-acpi-build.c | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c index d6947fdc74..026d1eaf88 100644 --- a/hw/riscv/virt-acpi-build.c +++ b/hw/riscv/virt-acpi-build.c @@ -32,6 +32,7 @@ #include "sysemu/reset.h" #include "migration/vmstate.h" #include "hw/riscv/virt.h" +#include "hw/riscv/numa.h" #define ACPI_BUILD_TABLE_SIZE 0x20000 @@ -160,6 +161,36 @@ static void build_dsdt(GArray *table_data, free_aml_allocator(); } +/* + * ACPI spec, Revision 6.5+ + * 5.2.12 Multiple APIC Description Table (MADT) + * REF: https://github.com/riscv-non-isa/riscv-acpi/issues/15 + * https://drive.google.com/file/d/1R6k4MshhN3WTT-hwqAquu5nX6xSEqK2l/view + */ +static void build_madt(GArray *table_data, + BIOSLinker *linker, + RISCVVirtState *s) +{ + MachineClass *mc = MACHINE_GET_CLASS(s); + MachineState *ms = MACHINE(s); + const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(ms); + + AcpiTable table = { .sig = "APIC", .rev = 6, .oem_id = s->oem_id, + .oem_table_id = s->oem_table_id }; + + acpi_table_begin(&table, table_data); + /* Local Interrupt Controller Address */ + build_append_int_noprefix(table_data, 0, 4); + build_append_int_noprefix(table_data, 0, 4); /* MADT Flags */ + + /* RISC-V Local INTC structures per HART */ + for (int i = 0; i < arch_ids->len; i++) { + riscv_acpi_madt_add_rintc(i, arch_ids, table_data); + } + + acpi_table_end(linker, &table); +} + static void virt_acpi_build(RISCVVirtState *s, AcpiBuildTables *tables) { GArray *table_offsets; @@ -181,6 +212,9 @@ static void virt_acpi_build(RISCVVirtState *s, AcpiBuildTables *tables) acpi_add_table(table_offsets, tables_blob); build_fadt_rev6(tables_blob, tables->linker, s, dsdt); + acpi_add_table(table_offsets, tables_blob); + build_madt(tables_blob, tables->linker, s); + /* XSDT is pointed to by RSDP */ xsdt = tables_blob->len; build_xsdt(tables_blob, tables->linker, table_offsets, s->oem_id, From patchwork Thu Mar 2 09:12:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13156864 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 527B8C7EE30 for ; Thu, 2 Mar 2023 09:14:57 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pXezi-0004FP-FL; Thu, 02 Mar 2023 04:12:58 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pXezg-00046R-8N for qemu-devel@nongnu.org; Thu, 02 Mar 2023 04:12:56 -0500 Received: from mail-pj1-x1031.google.com ([2607:f8b0:4864:20::1031]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pXezd-0004oD-SH for qemu-devel@nongnu.org; Thu, 02 Mar 2023 04:12:55 -0500 Received: by mail-pj1-x1031.google.com with SMTP id p3-20020a17090ad30300b0023a1cd5065fso2104648pju.0 for ; Thu, 02 Mar 2023 01:12:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=nuyTRWn/HlJGxmjclNYs5gw13EaqAWEYeHjzcNKvwTE=; b=SdiMrXDc0NvwpySHFYhgygmfMkyGqiOSdVLRaz3cogyZVSnykE9E4SmqJJZc4Hq4yd TTDHs4XKXJnF01Uukcj5fIF5hfP6uCQuoAKmJwOA/0f/E1KV/1A/0EJ9eaMpaZw6cYDa mf5FDJPZRXGepP/cu3ubvjtyQrNMPHbiCx0dNKZ1iIISd+lYFCoPCFscFcLFN1A+BosT FMGlptbVcKLdlRTaHybT3HTap5pXX6Q296yoflK9tbdl6UJum/57FRUlBAvl0wGfoSYl bJWe3vt6fyeO7NRjev24ZxDJDa4Wka23wTXJz7Q/r7ZdEIKAdA6AQ26OSPjle+8aiVz9 0XUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nuyTRWn/HlJGxmjclNYs5gw13EaqAWEYeHjzcNKvwTE=; b=GHzvRgeusGNDfcdDARsDVPWbzZfOtVN8Drh9+THma79YargeK3iriT4hCM3TmqmS7k MlOrP9VU+GFMrhFI70tJLhl5V79AXkTAvl1KbAfzsPW2a3rcowsBNJBwo++s/OQsZqdx 7t+n2v3TJMhCdeDkKuMKm8TQ8M7ymOX69pvuQqiWlRZEtzR1FQa6/VyRGPPARbDqEdtG yg2OdGQPOabNbEgiZfGKtLkQMb+gWvebnZn/v0nJYj16ur8hn3xnuUrJOlbnjMq9XCHZ OWyldcpWfC9HiIRcCryXSHX+EwtF3SGaTAPqFnUGRypCBOw9inKyfNT35Xn9RqsoucQ2 /1Rw== X-Gm-Message-State: AO0yUKU17q8zN62P28LUnzvzZI8gZkbeLSmWtffMkoGSS1ZMOZ8Fd/OO smk7c4GcrHy0x00oE56r/MjP1Q== X-Google-Smtp-Source: AK7set+/LXaMm3i4fxEauETbJWnJcAIYYwX+6QDJLrueOb9WEcCnA4/nkWrNUZgtCk+4n5TJZLimeA== X-Received: by 2002:a17:902:a513:b0:19d:6f7:70d2 with SMTP id s19-20020a170902a51300b0019d06f770d2mr7340599plq.50.1677748368510; Thu, 02 Mar 2023 01:12:48 -0800 (PST) Received: from localhost.localdomain ([49.206.14.226]) by smtp.gmail.com with ESMTPSA id iz12-20020a170902ef8c00b0019945535973sm9850692plb.63.2023.03.02.01.12.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Mar 2023 01:12:48 -0800 (PST) From: Sunil V L To: qemu-riscv@nongnu.org, qemu-devel@nongnu.org Cc: Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Andrew Jones , Anup Patel , Atish Kumar Patra , Igor Mammedov , Sunil V L Subject: [PATCH V5 6/8] hw/riscv/virt: virt-acpi-build.c: Add RHCT Table Date: Thu, 2 Mar 2023 14:42:10 +0530 Message-Id: <20230302091212.999767-7-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230302091212.999767-1-sunilvl@ventanamicro.com> References: <20230302091212.999767-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=sunilvl@ventanamicro.com; helo=mail-pj1-x1031.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org RISC-V ACPI platforms need to provide RISC-V Hart Capabilities Table (RHCT). Add this to the ACPI tables. Signed-off-by: Sunil V L Reviewed-by: Andrew Jones --- hw/riscv/virt-acpi-build.c | 78 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 78 insertions(+) diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c index 026d1eaf88..82da0a238c 100644 --- a/hw/riscv/virt-acpi-build.c +++ b/hw/riscv/virt-acpi-build.c @@ -33,6 +33,7 @@ #include "migration/vmstate.h" #include "hw/riscv/virt.h" #include "hw/riscv/numa.h" +#include "hw/intc/riscv_aclint.h" #define ACPI_BUILD_TABLE_SIZE 0x20000 @@ -111,6 +112,80 @@ static void acpi_dsdt_add_fw_cfg(Aml *scope, const MemMapEntry *fw_cfg_memmap) aml_append(scope, dev); } +/* RHCT Node[N] starts at offset 56 */ +#define RHCT_NODE_ARRAY_OFFSET 56 + +/* + * ACPI spec, Revision 6.5+ + * 5.2.36 RISC-V Hart Capabilities Table (RHCT) + * REF: https://github.com/riscv-non-isa/riscv-acpi/issues/16 + * https://drive.google.com/file/d/1nP3nFiH4jkPMp6COOxP6123DCZKR-tia/view + */ +static void build_rhct(GArray *table_data, + BIOSLinker *linker, + RISCVVirtState *s) +{ + MachineClass *mc = MACHINE_GET_CLASS(s); + MachineState *ms = MACHINE(s); + const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(ms); + size_t len, aligned_len; + uint32_t isa_offset, num_rhct_nodes; + RISCVCPU *cpu; + char *isa; + + AcpiTable table = { .sig = "RHCT", .rev = 1, .oem_id = s->oem_id, + .oem_table_id = s->oem_table_id }; + + acpi_table_begin(&table, table_data); + + build_append_int_noprefix(table_data, 0x0, 4); /* Reserved */ + + /* Time Base Frequency */ + build_append_int_noprefix(table_data, + RISCV_ACLINT_DEFAULT_TIMEBASE_FREQ, 8); + + /* ISA + N hart info */ + num_rhct_nodes = 1 + ms->smp.cpus; + + /* Number of RHCT nodes*/ + build_append_int_noprefix(table_data, num_rhct_nodes, 4); + + /* Offset to the RHCT node array */ + build_append_int_noprefix(table_data, RHCT_NODE_ARRAY_OFFSET, 4); + + /* ISA String Node */ + isa_offset = table_data->len - table.table_offset; + build_append_int_noprefix(table_data, 0, 2); /* Type 0 */ + + cpu = &s->soc[0].harts[0]; + isa = riscv_isa_string(cpu); + len = 8 + strlen(isa) + 1; + aligned_len = (len % 2) ? (len + 1) : len; + + build_append_int_noprefix(table_data, aligned_len, 2); /* Length */ + build_append_int_noprefix(table_data, 0x1, 2); /* Revision */ + + /* ISA string length including NUL */ + build_append_int_noprefix(table_data, strlen(isa) + 1, 2); + g_array_append_vals(table_data, isa, strlen(isa) + 1); /* ISA string */ + + if (aligned_len != len) { + build_append_int_noprefix(table_data, 0x0, 1); /* Optional Padding */ + } + + /* Hart Info Node */ + for (int i = 0; i < arch_ids->len; i++) { + build_append_int_noprefix(table_data, 0xFFFF, 2); /* Type */ + build_append_int_noprefix(table_data, 16, 2); /* Length */ + build_append_int_noprefix(table_data, 0x1, 2); /* Revision */ + build_append_int_noprefix(table_data, 1, 2); /* Number of offsets */ + build_append_int_noprefix(table_data, i, 4); /* ACPI Processor UID */ + build_append_int_noprefix(table_data, isa_offset, 4); /* Offsets[0] */ + } + + acpi_table_end(linker, &table); +} + /* FADT */ static void build_fadt_rev6(GArray *table_data, BIOSLinker *linker, @@ -215,6 +290,9 @@ static void virt_acpi_build(RISCVVirtState *s, AcpiBuildTables *tables) acpi_add_table(table_offsets, tables_blob); build_madt(tables_blob, tables->linker, s); + acpi_add_table(table_offsets, tables_blob); + build_rhct(tables_blob, tables->linker, s); + /* XSDT is pointed to by RSDP */ xsdt = tables_blob->len; build_xsdt(tables_blob, tables->linker, table_offsets, s->oem_id, From patchwork Thu Mar 2 09:12:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13156859 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8537DC6FA8E for ; Thu, 2 Mar 2023 09:13:37 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pXezg-00048L-QP; Thu, 02 Mar 2023 04:12:56 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pXeze-00045x-Ld for qemu-devel@nongnu.org; Thu, 02 Mar 2023 04:12:54 -0500 Received: from mail-pj1-x102c.google.com ([2607:f8b0:4864:20::102c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pXezd-0004RU-20 for qemu-devel@nongnu.org; Thu, 02 Mar 2023 04:12:54 -0500 Received: by mail-pj1-x102c.google.com with SMTP id 6-20020a17090a190600b00237c5b6ecd7so2162684pjg.4 for ; Thu, 02 Mar 2023 01:12:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=IgHDmQnuC0ohesXkjuU3Tp9ntNJhpkJz30khys/nojg=; b=POf5lDVWrgDnI00pdsHqfak12z61bs7Ck44vaFKPRp+rjsmILnioOu8L+Sf42VDfMc CEURMHg4n3oVnxFAXqIrEnS7o2Kw99aDeZDNNEMg88t4SsHiK3kjxVxd+rw6y/Rs1gje WBFEqnzwflj8y4R/qgkv0qQRUzDR5y12KlER2ChAQyK14RVrmerJQzrFP1izglGi3Ovi UtcUsRCcEaYsAymeW/jewfdK2zpaHz1aCeH31E37NySbbB1vzdSFwnpCdnZ3BJKUkBqR VGDkK0U17W6DwK+PmKB+niCdJ8qB+uYzOoDvFv+pSpqaNGRdnkSRt+xN+UsInbxUKHBM kJQw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=IgHDmQnuC0ohesXkjuU3Tp9ntNJhpkJz30khys/nojg=; b=4iBYvh3RYDBm3GmOTNjuSo1mh2mR22VSWR5jN0LX2TRVN44R8dM8wRuHaSh6xMNQtQ +I7XqYfvoLelVL3ieSYxSOnw0PlpP7HHYQANa4bds4TrORWTlM8Nr63cosXSlXUDeW3P 44rpRfwo5BE/bgjrIXaD/RJ1Fn0BkI0G7dlzOVxJ01tGYPjzxW/QU8Xx1PXmvrq+WYSh RUmciDRYS7obE4x3JaIv+FuSW7T4Rs8dAMR3YHVnIkeZtAygwXkoGHQrTGN/2JmxF0YX 2uwkqbtB6bQ9JHXBdiCekVpSDhp5QXL9wvcoABRu+MX9I5GReZGTZUaeMFbNqryLWTTf MHRQ== X-Gm-Message-State: AO0yUKW1uzi/W+VA0MhH6/9nPnfB0HuXEwq1K6X7M4REbz9B+LcJcW2P 6mwpeXsWiA5EhcLGyBKihQosCA== X-Google-Smtp-Source: AK7set8B92TYWEnMi5z//wnelwPvN5S0mRhyfpmmCKqwTLYj4mIZM+oE3jFBMmZQy5wqj9I2AmPJtg== X-Received: by 2002:a17:903:40c6:b0:19c:d6d0:7887 with SMTP id t6-20020a17090340c600b0019cd6d07887mr8106425pld.30.1677748372374; Thu, 02 Mar 2023 01:12:52 -0800 (PST) Received: from localhost.localdomain ([49.206.14.226]) by smtp.gmail.com with ESMTPSA id iz12-20020a170902ef8c00b0019945535973sm9850692plb.63.2023.03.02.01.12.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Mar 2023 01:12:52 -0800 (PST) From: Sunil V L To: qemu-riscv@nongnu.org, qemu-devel@nongnu.org Cc: Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Andrew Jones , Anup Patel , Atish Kumar Patra , Igor Mammedov , Sunil V L , Bin Meng Subject: [PATCH V5 7/8] hw/riscv/virt.c: Initialize the ACPI tables Date: Thu, 2 Mar 2023 14:42:11 +0530 Message-Id: <20230302091212.999767-8-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230302091212.999767-1-sunilvl@ventanamicro.com> References: <20230302091212.999767-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=sunilvl@ventanamicro.com; helo=mail-pj1-x102c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Initialize the ACPI tables if the acpi option is not disabled. Signed-off-by: Sunil V L Reviewed-by: Bin Meng Reviewed-by: Andrew Jones --- hw/riscv/virt.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 9b85d5b747..8329c477a7 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -1316,6 +1316,10 @@ static void virt_machine_done(Notifier *notifier, void *data) if (kvm_enabled()) { riscv_setup_direct_kernel(kernel_entry, fdt_load_addr); } + + if (virt_is_acpi_enabled(s)) { + virt_acpi_setup(s); + } } static void virt_machine_init(MachineState *machine) From patchwork Thu Mar 2 09:12:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13156861 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7DF0FC6FA8E for ; Thu, 2 Mar 2023 09:14:25 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pXezk-0004Is-JZ; Thu, 02 Mar 2023 04:13:00 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pXezi-0004GN-Ui for qemu-devel@nongnu.org; Thu, 02 Mar 2023 04:12:58 -0500 Received: from mail-pl1-x62e.google.com ([2607:f8b0:4864:20::62e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pXezg-0006FJ-V5 for qemu-devel@nongnu.org; Thu, 02 Mar 2023 04:12:58 -0500 Received: by mail-pl1-x62e.google.com with SMTP id z2so16831543plf.12 for ; Thu, 02 Mar 2023 01:12:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=WRPPbttll/DWnQNdAzlT2kSuA8zqc53TPKgPf1dqdsw=; b=EJH6gK33ll8t+AbipM2m3dzIXSCE+Er3MeBSBhvirFV4lw731gEnN35B/m+2IqSvyo rurYZkf8LYdi2t4sPNz0wqlV3AFe5wlSUTZiKCWaGmVE0Vy9ITjCI/gISO8WhJXW1wYT hgLVBzq2unDoyYU9DPo88Uvo/yBGup9eGt03ge3HpphQwCsRsXbGOrBHd7gbg/s80RJu MTpdyTQwiS4zfEotbkv877ni11o9tzhOPj4YJDjrnuzFcjE5u6Hnr+wCXATGxT0tQrUv GCdoiIxeFHECYs4o1POpzqMGxkCtHTLQKxDnEZUQS/rwaQXiK1zZ29CdfAvYBoJQKpzF C3RA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WRPPbttll/DWnQNdAzlT2kSuA8zqc53TPKgPf1dqdsw=; b=2vRUg0TD9VEXs767Ie8oqh+TR38c02AQbA1M3HAF0xwiYhuUdXXhLFIr15iXHYpM/x dJP1NPzlhiaj8drKW89JROjZ8XhEbW5BHlKEx+K0IWhTJRgSP9cMVZz7F4GXOC2FdDHi mULTpoPHlMK0Y+b5odV/dBRE1+eUiJ1ZBqJJBPgjhbQIcnD3hTifbDPY/3+RyVq6EeUc w8xO2sE++OCSwEg3387nf4TxSNQvbvB9PBE2DuCKDkIOoqVR+0QHxQEmNJCw0EaF75dU HXOkVEpVMdV7GY4znLXWdjtvFE2mZtFyZ2+Mnsl/MS3z5Sud/e9vqUIp/A5A51pQk98z DHAw== X-Gm-Message-State: AO0yUKXOPAIicUE49CaGFgdnjA6z7KZDdGKwugzNKClNsx+r2byYdlCJ JHgEJymFGixGBp8Pf7Q8bMtu8A== X-Google-Smtp-Source: AK7set/fmJMItSMT2xZ2VOrN22B+NmgjPd+JVgyeBemFEEMtExTwFl+H4y3p5+kz3d/V39NpCcn1pg== X-Received: by 2002:a17:902:6b03:b0:19e:700c:b6e0 with SMTP id o3-20020a1709026b0300b0019e700cb6e0mr1059537plk.35.1677748376242; Thu, 02 Mar 2023 01:12:56 -0800 (PST) Received: from localhost.localdomain ([49.206.14.226]) by smtp.gmail.com with ESMTPSA id iz12-20020a170902ef8c00b0019945535973sm9850692plb.63.2023.03.02.01.12.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Mar 2023 01:12:55 -0800 (PST) From: Sunil V L To: qemu-riscv@nongnu.org, qemu-devel@nongnu.org Cc: Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Andrew Jones , Anup Patel , Atish Kumar Patra , Igor Mammedov , Sunil V L , Bin Meng Subject: [PATCH V5 8/8] MAINTAINERS: Add entry for RISC-V ACPI Date: Thu, 2 Mar 2023 14:42:12 +0530 Message-Id: <20230302091212.999767-9-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230302091212.999767-1-sunilvl@ventanamicro.com> References: <20230302091212.999767-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62e; envelope-from=sunilvl@ventanamicro.com; helo=mail-pl1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org RISC-V ACPI related functionality for virt machine is added in virt-acpi-build.c. Add the maintainer entry after moving the ARM ACPI entry under the main ACPI entry. Signed-off-by: Sunil V L Reviewed-by: Bin Meng Acked-by: Alistair Francis Reviewed-by: Andrew Jones --- MAINTAINERS | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index e96e9dbfe6..3b840fa700 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -999,12 +999,6 @@ S: Maintained F: hw/ssi/xlnx-versal-ospi.c F: include/hw/ssi/xlnx-versal-ospi.h -ARM ACPI Subsystem -M: Shannon Zhao -L: qemu-arm@nongnu.org -S: Maintained -F: hw/arm/virt-acpi-build.c - STM32F100 M: Alexandre Iooss L: qemu-arm@nongnu.org @@ -1892,6 +1886,18 @@ F: docs/specs/acpi_nvdimm.rst F: docs/specs/acpi_pci_hotplug.rst F: docs/specs/acpi_hw_reduced_hotplug.rst +ARM ACPI Subsystem +M: Shannon Zhao +L: qemu-arm@nongnu.org +S: Maintained +F: hw/arm/virt-acpi-build.c + +RISC-V ACPI Subsystem +M: Sunil V L +L: qemu-riscv@nongnu.org +S: Maintained +F: hw/riscv/virt-acpi-build.c + ACPI/VIOT M: Jean-Philippe Brucker S: Supported