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Thu, 02 Mar 2023 04:40:47 -0800 (PST) Received: from localhost.localdomain ([95.183.227.97]) by smtp.gmail.com with ESMTPSA id c22-20020a50f616000000b004c07b11deb8sm599036edn.64.2023.03.02.04.40.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Mar 2023 04:40:47 -0800 (PST) From: Yassine Oudjana X-Google-Original-From: Yassine Oudjana To: Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Philipp Zabel Cc: Yassine Oudjana , Yassine Oudjana , linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH 1/2] dt-bindings: reset: Add binding for MediaTek MT6735 TOPRGU/WDT Date: Thu, 2 Mar 2023 15:40:14 +0300 Message-Id: <20230302124015.75546-2-y.oudjana@protonmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230302124015.75546-1-y.oudjana@protonmail.com> References: <20230302124015.75546-1-y.oudjana@protonmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230302_044053_188162_C006E574 X-CRM114-Status: GOOD ( 14.17 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Yassine Oudjana Add a DT binding for the MT6735 top reset generation unit/watchdog timer. Signed-off-by: Yassine Oudjana Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Krzysztof Kozlowski Reviewed-by: Guenter Roeck --- .../bindings/watchdog/mediatek,mtk-wdt.yaml | 1 + include/dt-bindings/reset/mediatek,mt6735-wdt.h | 17 +++++++++++++++++ 2 files changed, 18 insertions(+) create mode 100644 include/dt-bindings/reset/mediatek,mt6735-wdt.h diff --git a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml index 55b34461df1b..009ccdb60b84 100644 --- a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml @@ -22,6 +22,7 @@ properties: - enum: - mediatek,mt2712-wdt - mediatek,mt6589-wdt + - mediatek,mt6735-wdt - mediatek,mt6795-wdt - mediatek,mt7986-wdt - mediatek,mt8183-wdt diff --git a/include/dt-bindings/reset/mediatek,mt6735-wdt.h b/include/dt-bindings/reset/mediatek,mt6735-wdt.h new file mode 100644 index 000000000000..c6056e676d46 --- /dev/null +++ b/include/dt-bindings/reset/mediatek,mt6735-wdt.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ + +#ifndef _DT_BINDINGS_RESET_MEDIATEK_MT6735_WDT_H_ +#define _DT_BINDINGS_RESET_MEDIATEK_MT6735_WDT_H_ + +#define MT6735_TOPRGU_MM_RST 1 +#define MT6735_TOPRGU_MFG_RST 2 +#define MT6735_TOPRGU_VENC_RST 3 +#define MT6735_TOPRGU_VDEC_RST 4 +#define MT6735_TOPRGU_IMG_RST 5 +#define MT6735_TOPRGU_MD_RST 7 +#define MT6735_TOPRGU_CONN_RST 9 +#define MT6735_TOPRGU_C2K_SW_RST 14 +#define MT6735_TOPRGU_C2K_RST 15 +#define MT6735_TOPRGU_RST_NUM 9 + +#endif From patchwork Thu Mar 2 12:40:15 2023 Content-Type: text/plain; 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Thu, 02 Mar 2023 04:40:50 -0800 (PST) Received: from localhost.localdomain ([95.183.227.97]) by smtp.gmail.com with ESMTPSA id c22-20020a50f616000000b004c07b11deb8sm599036edn.64.2023.03.02.04.40.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Mar 2023 04:40:50 -0800 (PST) From: Yassine Oudjana X-Google-Original-From: Yassine Oudjana To: Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Philipp Zabel Cc: Yassine Oudjana , Yassine Oudjana , linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH 2/2] watchdog: mtk_wdt: Add support for MT6735 WDT Date: Thu, 2 Mar 2023 15:40:15 +0300 Message-Id: <20230302124015.75546-3-y.oudjana@protonmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230302124015.75546-1-y.oudjana@protonmail.com> References: <20230302124015.75546-1-y.oudjana@protonmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230302_044055_536073_4AE4DEF7 X-CRM114-Status: GOOD ( 15.26 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Yassine Oudjana Add support for the watchdog timer/top reset generation unit found on MT6735. Disable WDT_MODE_IRQ_EN in mtk_wdt_restart in order to make TOPRGU assert the SYSRST pin instead of issuing an IRQ. This change may be needed in other SoCs as well. Signed-off-by: Yassine Oudjana --- drivers/watchdog/mtk_wdt.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c index a9c437598e7e..5a7a7b2b3727 100644 --- a/drivers/watchdog/mtk_wdt.c +++ b/drivers/watchdog/mtk_wdt.c @@ -10,6 +10,7 @@ */ #include +#include #include #include #include @@ -82,6 +83,10 @@ static const struct mtk_wdt_data mt2712_data = { .toprgu_sw_rst_num = MT2712_TOPRGU_SW_RST_NUM, }; +static const struct mtk_wdt_data mt6735_data = { + .toprgu_sw_rst_num = MT6735_TOPRGU_RST_NUM, +}; + static const struct mtk_wdt_data mt6795_data = { .toprgu_sw_rst_num = MT6795_TOPRGU_SW_RST_NUM, }; @@ -187,9 +192,15 @@ static int mtk_wdt_restart(struct watchdog_device *wdt_dev, { struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev); void __iomem *wdt_base; + u32 reg; wdt_base = mtk_wdt->wdt_base; + /* Enable reset in order to issue a system reset instead of an IRQ */ + reg = readl(wdt_base + WDT_MODE); + reg &= ~WDT_MODE_IRQ_EN; + writel(reg | WDT_MODE_KEY, wdt_base + WDT_MODE); + while (1) { writel(WDT_SWRST_KEY, wdt_base + WDT_SWRST); mdelay(5); @@ -443,6 +454,7 @@ static int mtk_wdt_resume(struct device *dev) static const struct of_device_id mtk_wdt_dt_ids[] = { { .compatible = "mediatek,mt2712-wdt", .data = &mt2712_data }, { .compatible = "mediatek,mt6589-wdt" }, + { .compatible = "mediatek,mt6735-wdt", .data = &mt6735_data }, { .compatible = "mediatek,mt6795-wdt", .data = &mt6795_data }, { .compatible = "mediatek,mt7986-wdt", .data = &mt7986_data }, { .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data },