From patchwork Tue Jan 29 08:38:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Bonn X-Patchwork-Id: 10785781 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F2A78922 for ; Tue, 29 Jan 2019 08:38:56 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E28D92AC27 for ; Tue, 29 Jan 2019 08:38:56 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D58432AC2D; Tue, 29 Jan 2019 08:38:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C02462AC27 for ; Tue, 29 Jan 2019 08:38:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727599AbfA2Iiy (ORCPT ); Tue, 29 Jan 2019 03:38:54 -0500 Received: from mail-lj1-f196.google.com ([209.85.208.196]:38341 "EHLO mail-lj1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726016AbfA2Iix (ORCPT ); Tue, 29 Jan 2019 03:38:53 -0500 Received: by mail-lj1-f196.google.com with SMTP id c19-v6so16723348lja.5 for ; Tue, 29 Jan 2019 00:38:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=norrbonn-se.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=LEY4OzlWgevwGood0/zS+8H1L1rcDa+oZc5FrDXHufI=; b=2SPZ6hDyY96b1U9TN7mMQOSEZA4G1ggfoWju5A5g5dy4R3yRcKbVJaYBiZwcryVSEz OQexqTADoZAAl7y6RwTx91itD2y0s+vyd72w8dZ2UXms54m9TAgaHbiogpl1odzEhmh/ NZUf8lROfnkr0adztTBUNT6dcA5ghl8+KCR3ywyCcc0ZlsunUm3y3PCvrHhf5PEsfnaU dnT1R7HjqvS3u5081MXjjPQ6oN5gLMmUzEF6ckThixNTrJmqiaJbDsqmIqOuVadAfhXO 3n/oh5NxGFvl6vaqa5YVuI7b+QtKI3KZYmF7a2T/mW/0qKaE90/k4Bidhwlyalt/H9fn WWvw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LEY4OzlWgevwGood0/zS+8H1L1rcDa+oZc5FrDXHufI=; b=VYE86G9Y/ttxJwAeKtjQleiZHWbCyLLfKbZxDzzlm9coAt97OPptnlVcLSTX6x1epi Smw10j7VgLmZPy9PJaZ1xNOfPpu0/6CZ7WUbB7uB0x7E1c/AxQWATlS0SW4kTwOFII1Z ZIACbbcSCtz++9e6/4XoLulgrir51idHQbnugHK2DYjrpbBkbzYg83/uOimOc9GlKG99 QrTJUCTdkwb6Y7rc7USqUw4p8xH1uwaQx9EBhEbJRU9piJa676Ynyja+ClVJIpGQI5mh 26QhkAWXja+9s+TOGG/vSKU1NeuKKZjXzdtiSlUdJhQvWenqP5UzAE06oFAz6joMUwvg SQOg== X-Gm-Message-State: AJcUukdbYYw79mVQa4Qgyh2X6E2BzHaMONsw3frNazAbKnCktQz95fut Yhao/1MnjjPu5MlY+baAVmWASA== X-Google-Smtp-Source: ALg8bN5MNkbSdkzx2Yyug3pz/RCq5Od7aAu5RYol+6myXaSMPwBSPA1dp3cw0aMr9eJIs4ZoxYRSKg== X-Received: by 2002:a2e:3e04:: with SMTP id l4-v6mr17837144lja.148.1548751130789; Tue, 29 Jan 2019 00:38:50 -0800 (PST) Received: from mimer.lan (h-29-16.A159.priv.bahnhof.se. [79.136.29.16]) by smtp.gmail.com with ESMTPSA id v17-v6sm3378774ljg.32.2019.01.29.00.38.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 29 Jan 2019 00:38:50 -0800 (PST) From: Jonas Bonn To: linux-kernel@vger.kernel.org Cc: Jonas Bonn , Mark Brown , Rob Herring , Mark Rutland , linux-spi@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v4 1/2] spi: support inter-word delay requirement for devices Date: Tue, 29 Jan 2019 09:38:43 +0100 Message-Id: <20190129083844.20572-2-jonas@norrbonn.se> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190129083844.20572-1-jonas@norrbonn.se> References: <20190129083844.20572-1-jonas@norrbonn.se> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Some devices are slow and cannot keep up with the SPI bus and therefore require a short delay between words of the SPI transfer. The example of this that I'm looking at is a SAMA5D2 with a minimum SPI clock of 400kHz talking to an AVR-based SPI slave. The AVR cannot put bytes on the bus fast enough to keep up with the SoC's SPI controller even at the lowest bus speed. This patch introduces the ability to specify a required inter-word delay for SPI devices. It is up to the controller driver to configure itself accordingly in order to introduce the requested delay. Note that, for spi_transfer, there is already a field word_delay that provides similar functionality. This field, however, is specified in clock cycles (and worse, SPI controller cycles, not SCK cycles); that makes this value dependent on the master clock instead of the device clock for which the delay is intended to provide some relief. This patch leaves this old word_delay in place and provides a time-based word_delay_us alongside it; the new field fits in the struct padding so struct size is constant. There is only one in-kernel user of the word_delay field and presumably that driver could be reworked to use the time-based value instead. The time-based delay is limited to 8 bits as these delays are intended to be short. The SAMA5D2 that I've tested this on limits delays to a maximum of ~100us, which is already many word-transfer periods even at the minimum transfer speed supported by the controller. Signed-off-by: Jonas Bonn CC: Mark Brown CC: Rob Herring CC: Mark Rutland CC: linux-spi@vger.kernel.org CC: devicetree@vger.kernel.org --- drivers/spi/spi.c | 5 +++++ include/linux/spi/spi.h | 6 ++++++ 2 files changed, 11 insertions(+) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 9a7def7c3237..64f13204bcb7 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -2961,6 +2961,8 @@ static int __spi_validate(struct spi_device *spi, struct spi_message *message) * it is not set for this transfer. * Set transfer tx_nbits and rx_nbits as single transfer default * (SPI_NBITS_SINGLE) if it is not set for this transfer. + * Ensure transfer word_delay is at least as long as that required by + * device itself. */ message->frame_length = 0; list_for_each_entry(xfer, &message->transfers, transfer_list) { @@ -3031,6 +3033,9 @@ static int __spi_validate(struct spi_device *spi, struct spi_message *message) !(spi->mode & SPI_RX_QUAD)) return -EINVAL; } + + if (xfer->word_delay_us < spi->word_delay_us) + xfer->word_delay_us = spi->word_delay_us; } message->status = -EINPROGRESS; diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index 314d922ca607..e04622a01836 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -118,6 +118,8 @@ void spi_statistics_add_transfer_stats(struct spi_statistics *stats, * for driver coldplugging, and in uevents used for hotplugging * @cs_gpio: gpio number of the chipselect line (optional, -ENOENT when * not using a GPIO line) + * @word_delay_us: microsecond delay to be inserted between consecutive + * words of a transfer * * @statistics: statistics for the spi_device * @@ -164,6 +166,7 @@ struct spi_device { char modalias[SPI_NAME_SIZE]; const char *driver_override; int cs_gpio; /* chip select gpio */ + uint8_t word_delay_us; /* inter-word delay */ /* the statistics */ struct spi_statistics statistics; @@ -706,6 +709,8 @@ extern void spi_res_release(struct spi_controller *ctlr, * @delay_usecs: microseconds to delay after this transfer before * (optionally) changing the chipselect status, then starting * the next transfer or completing this @spi_message. + * @word_delay_us: microseconds to inter word delay after each word size + * (set by bits_per_word) transmission. * @word_delay: clock cycles to inter word delay after each word size * (set by bits_per_word) transmission. * @transfer_list: transfers are sequenced through @spi_message.transfers @@ -788,6 +793,7 @@ struct spi_transfer { #define SPI_NBITS_DUAL 0x02 /* 2bits transfer */ #define SPI_NBITS_QUAD 0x04 /* 4bits transfer */ u8 bits_per_word; + u8 word_delay_us; u16 delay_usecs; u32 speed_hz; u16 word_delay; From patchwork Tue Jan 29 08:38:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Bonn X-Patchwork-Id: 10785785 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 30F1213B4 for ; Tue, 29 Jan 2019 08:39:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 238462AC2D for ; Tue, 29 Jan 2019 08:39:07 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 177322AC7D; Tue, 29 Jan 2019 08:39:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AFB0B2AC2D for ; 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[79.136.29.16]) by smtp.gmail.com with ESMTPSA id v17-v6sm3378774ljg.32.2019.01.29.00.38.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 29 Jan 2019 00:38:51 -0800 (PST) From: Jonas Bonn To: linux-kernel@vger.kernel.org Cc: Jonas Bonn , Nicolas Ferre , Mark Brown , Alexandre Belloni , Ludovic Desroches , linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 2/2] spi-atmel: support inter-word delay Date: Tue, 29 Jan 2019 09:38:44 +0100 Message-Id: <20190129083844.20572-3-jonas@norrbonn.se> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190129083844.20572-1-jonas@norrbonn.se> References: <20190129083844.20572-1-jonas@norrbonn.se> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP If the SPI slave requires an inter-word delay, configure the DLYBCT register accordingly. Tested on a SAMA5D2 board (derived from SAMA5D2-Xplained reference board). Signed-off-by: Jonas Bonn CC: Nicolas Ferre CC: Mark Brown CC: Alexandre Belloni CC: Ludovic Desroches CC: linux-spi@vger.kernel.org CC: linux-arm-kernel@lists.infradead.org --- drivers/spi/spi-atmel.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index 74fddcd3282b..6389a228d2f5 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c @@ -1209,13 +1209,21 @@ static int atmel_spi_setup(struct spi_device *spi) csr |= SPI_BIT(CSAAT); /* DLYBS is mostly irrelevant since we manage chipselect using GPIOs. - * - * DLYBCT would add delays between words, slowing down transfers. - * It could potentially be useful to cope with DMA bottlenecks, but - * in those cases it's probably best to just use a lower bitrate. */ csr |= SPI_BF(DLYBS, 0); - csr |= SPI_BF(DLYBCT, 0); + + /* DLYBCT adds delays between words. This is useful for slow devices + * that need a bit of time to setup the next transfer. + */ + if (spi->word_delay_us) { + csr |= SPI_BF(DLYBCT, + clamp_t(u8, + (as->spi_clk/1000000*spi->word_delay_us)>>5, + 1, 255)); + } else { + csr |= SPI_BF(DLYBCT, 0); + } + /* chipselect must have been muxed as GPIO (e.g. in board setup) */ npcs_pin = (unsigned long)spi->controller_data;