From patchwork Thu Mar 9 02:56:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolu Lu X-Patchwork-Id: 13166754 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1518AC678D5 for ; Thu, 9 Mar 2023 02:57:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229523AbjCIC5u (ORCPT ); Wed, 8 Mar 2023 21:57:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37114 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229819AbjCIC5t (ORCPT ); Wed, 8 Mar 2023 21:57:49 -0500 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 577BB91B4F; Wed, 8 Mar 2023 18:57:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1678330668; x=1709866668; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Mr8/K6JBGpVgjtzlsLYvSNCRVB4WvcXxxyRVG14osPg=; b=SL98nc+dD5afs9cyGYSjig4cb5y9xRDawWza4Km/W1QlbUGntMdxXAZQ bPDExRvfbehP9GB2QNf6HDdZBOUWboW0HsKopo6E931AHGVZrjK0dB+ru aeHkExW6LZVBT1LGneXivUEfXV5Zc3gy6VFa9gc8Y4YE4MBQ33zOB3jYW fudLToUjkfnp1VAitFwBvizxVVPsKK1POwJH92EMp4UDCsk3MakU9szL+ rgPPjIQBRBhnXrXMniLN8g/gKp1hpVQJpBZQot+obYVxMdB5Uzfrmc36e vqR+UX6RanKrzVAbxQQmS85p6Fiv7Z+sjt2EMuK2dVabcq2dmbL6yUsEA Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10643"; a="316732642" X-IronPort-AV: E=Sophos;i="5.98,245,1673942400"; d="scan'208";a="316732642" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Mar 2023 18:57:48 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10643"; a="746144610" X-IronPort-AV: E=Sophos;i="5.98,245,1673942400"; d="scan'208";a="746144610" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga004.fm.intel.com with ESMTP; 08 Mar 2023 18:57:45 -0800 From: Lu Baolu To: iommu@lists.linux.dev, dmaengine@vger.kernel.org Cc: Joerg Roedel , Will Deacon , Robin Murphy , Kevin Tian , Fenghua Yu , Dave Jiang , Vinod Koul , Jacob Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v2 1/5] dmaengine: idxd: Add enable/disable device IOPF feature Date: Thu, 9 Mar 2023 10:56:35 +0800 Message-Id: <20230309025639.26109-2-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230309025639.26109-1-baolu.lu@linux.intel.com> References: <20230309025639.26109-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The iommu subsystem requires IOMMU_DEV_FEAT_IOPF must be enabled before and disabled after IOMMU_DEV_FEAT_SVA, if device's I/O page faults rely on the IOMMU. Add explicit IOMMU_DEV_FEAT_IOPF enabling/disabling in this driver. At present, missing IOPF enabling/disabling doesn't cause any real issue, because the IOMMU driver places the IOPF enabling/disabling in the path of SVA feature handling. But this may change. Reviewed-by: Dave Jiang Signed-off-by: Lu Baolu Reviewed-by: Fenghua Yu Reviewed-by: Kevin Tian --- drivers/dma/idxd/init.c | 31 +++++++++++++++++++++++++------ 1 file changed, 25 insertions(+), 6 deletions(-) diff --git a/drivers/dma/idxd/init.c b/drivers/dma/idxd/init.c index 640d3048368e..09ef62aa0635 100644 --- a/drivers/dma/idxd/init.c +++ b/drivers/dma/idxd/init.c @@ -516,6 +516,27 @@ static void idxd_disable_system_pasid(struct idxd_device *idxd) idxd->sva = NULL; } +static int idxd_enable_sva(struct pci_dev *pdev) +{ + int ret; + + ret = iommu_dev_enable_feature(&pdev->dev, IOMMU_DEV_FEAT_IOPF); + if (ret) + return ret; + + ret = iommu_dev_enable_feature(&pdev->dev, IOMMU_DEV_FEAT_SVA); + if (ret) + iommu_dev_disable_feature(&pdev->dev, IOMMU_DEV_FEAT_IOPF); + + return ret; +} + +static void idxd_disable_sva(struct pci_dev *pdev) +{ + iommu_dev_disable_feature(&pdev->dev, IOMMU_DEV_FEAT_SVA); + iommu_dev_disable_feature(&pdev->dev, IOMMU_DEV_FEAT_IOPF); +} + static int idxd_probe(struct idxd_device *idxd) { struct pci_dev *pdev = idxd->pdev; @@ -530,7 +551,7 @@ static int idxd_probe(struct idxd_device *idxd) dev_dbg(dev, "IDXD reset complete\n"); if (IS_ENABLED(CONFIG_INTEL_IDXD_SVM) && sva) { - if (iommu_dev_enable_feature(dev, IOMMU_DEV_FEAT_SVA)) { + if (idxd_enable_sva(pdev)) { dev_warn(dev, "Unable to turn on user SVA feature.\n"); } else { set_bit(IDXD_FLAG_USER_PASID_ENABLED, &idxd->flags); @@ -578,21 +599,19 @@ static int idxd_probe(struct idxd_device *idxd) if (device_pasid_enabled(idxd)) idxd_disable_system_pasid(idxd); if (device_user_pasid_enabled(idxd)) - iommu_dev_disable_feature(dev, IOMMU_DEV_FEAT_SVA); + idxd_disable_sva(pdev); return rc; } static void idxd_cleanup(struct idxd_device *idxd) { - struct device *dev = &idxd->pdev->dev; - perfmon_pmu_remove(idxd); idxd_cleanup_interrupts(idxd); idxd_cleanup_internals(idxd); if (device_pasid_enabled(idxd)) idxd_disable_system_pasid(idxd); if (device_user_pasid_enabled(idxd)) - iommu_dev_disable_feature(dev, IOMMU_DEV_FEAT_SVA); + idxd_disable_sva(idxd->pdev); } static int idxd_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) @@ -710,7 +729,7 @@ static void idxd_remove(struct pci_dev *pdev) pci_free_irq_vectors(pdev); pci_iounmap(pdev, idxd->reg_base); if (device_user_pasid_enabled(idxd)) - iommu_dev_disable_feature(&pdev->dev, IOMMU_DEV_FEAT_SVA); + idxd_disable_sva(pdev); pci_disable_device(pdev); destroy_workqueue(idxd->wq); perfmon_pmu_remove(idxd); From patchwork Thu Mar 9 02:56:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolu Lu X-Patchwork-Id: 13166755 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5ADF4C678D5 for ; Thu, 9 Mar 2023 02:57:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229936AbjCIC5x (ORCPT ); Wed, 8 Mar 2023 21:57:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37226 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229941AbjCIC5w (ORCPT ); Wed, 8 Mar 2023 21:57:52 -0500 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 42F6393E28; Wed, 8 Mar 2023 18:57:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1678330671; x=1709866671; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=QiXay9B0/cIAt+xudzeSslyrWr7mHV5btFCAUOhzZSY=; b=PPxFmRDvHxBKoeUka0ZcsPRp+1bMbvOVNvUTRF6sCG8RvEAhHeQUsCx8 5gj2oscSkqY1mp6WQ5fGDHjN/UITF4VOIoQbtKW8gZCHDFz3mHblYoc1I WRxz4zjxF94NDjh3eYoxtwmLKR3eU74F6L+HQI78WKe4CJ9AbWGxtw0fA TNPIZe87cQyLpPU2rhpCnDQwmxj3G6i4zk1Bdo1ASdVrbnqlW85WFZG55 H3od8BtlvQoTt3AE6uJncYgSYBHn1oOgeZcBgk/yLVMtPTzTo57azl93G RHPbCAn2qAM1VovoZ+qqushtjm/FcRrXBCz4vcxrnk1DR4ntpNNiS//uU g==; X-IronPort-AV: E=McAfee;i="6500,9779,10643"; a="316732654" X-IronPort-AV: E=Sophos;i="5.98,245,1673942400"; d="scan'208";a="316732654" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Mar 2023 18:57:50 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10643"; a="746144621" X-IronPort-AV: E=Sophos;i="5.98,245,1673942400"; d="scan'208";a="746144621" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga004.fm.intel.com with ESMTP; 08 Mar 2023 18:57:48 -0800 From: Lu Baolu To: iommu@lists.linux.dev, dmaengine@vger.kernel.org Cc: Joerg Roedel , Will Deacon , Robin Murphy , Kevin Tian , Fenghua Yu , Dave Jiang , Vinod Koul , Jacob Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v2 2/5] iommu/vt-d: Allow SVA with device-specific IOPF Date: Thu, 9 Mar 2023 10:56:36 +0800 Message-Id: <20230309025639.26109-3-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230309025639.26109-1-baolu.lu@linux.intel.com> References: <20230309025639.26109-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Currently enabling SVA requires IOPF support from the IOMMU and device PCI PRI. However, some devices can handle IOPF by itself without ever sending PCI page requests nor advertising PRI capability. Allow SVA support with IOPF handled either by IOMMU (PCI PRI) or device driver (device-specific IOPF). As long as IOPF could be handled, SVA should continue to work. Signed-off-by: Lu Baolu --- drivers/iommu/intel/iommu.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 7c2f4bd33582..d2fcab9d8f61 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -4650,7 +4650,18 @@ static int intel_iommu_enable_sva(struct device *dev) if (!(iommu->flags & VTD_FLAG_SVM_CAPABLE)) return -ENODEV; - if (!info->pasid_enabled || !info->pri_enabled || !info->ats_enabled) + if (!info->pasid_enabled) + return -EINVAL; + + /* + * Devices having device-specific I/O fault handling should not + * support PCI/PRI. + */ + if (!info->pri_supported) + return 0; + + /* Devices supporting ATS/PRI should have it enabled. */ + if (!info->pri_enabled || !info->ats_enabled) return -EINVAL; ret = iopf_queue_add_device(iommu->iopf_queue, dev); From patchwork Thu Mar 9 02:56:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolu Lu X-Patchwork-Id: 13166756 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 860A3C64EC4 for ; Thu, 9 Mar 2023 02:58:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230100AbjCIC6E (ORCPT ); Wed, 8 Mar 2023 21:58:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37808 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229827AbjCIC57 (ORCPT ); Wed, 8 Mar 2023 21:57:59 -0500 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DE117C2; Wed, 8 Mar 2023 18:57:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1678330673; x=1709866673; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=etYi5IgjOwIgLSDHDiUJVx1EpEQNh0CUBtN03FXsKLI=; b=T1jtIMoj/pvcqeSe6RpJP3cWUpGcC3CSakeV73Nlvd4OyQQAptfk2wtl ZgKrhALURGcqyhee9pnjjq9z3OiymoBwLxbb6t9eHFgFEn0hDgKail+3t RYPVsD9PnAUL6MJ5jSF7sDxG7RCl2fN5Fa2MyBm+auTZBdXEWp6IsD1pY 9ryiAoeN1au9wR/xh1EuftSQP2McLqTWDBw8V7KixEaSZq3BiVa7kdZvy hR40+0RNbwhmL9NJN7B5DgOLq2nbRGFjGof4O198+BDSlVYd6tTzpktPJ r7YXoBsq+9SGhEjAxCKYpn+9+soP3pWTrIlriiHqtdgeP4azGoXJ94b8o g==; X-IronPort-AV: E=McAfee;i="6500,9779,10643"; a="316732664" X-IronPort-AV: E=Sophos;i="5.98,245,1673942400"; d="scan'208";a="316732664" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Mar 2023 18:57:53 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10643"; a="746144632" X-IronPort-AV: E=Sophos;i="5.98,245,1673942400"; d="scan'208";a="746144632" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga004.fm.intel.com with ESMTP; 08 Mar 2023 18:57:51 -0800 From: Lu Baolu To: iommu@lists.linux.dev, dmaengine@vger.kernel.org Cc: Joerg Roedel , Will Deacon , Robin Murphy , Kevin Tian , Fenghua Yu , Dave Jiang , Vinod Koul , Jacob Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v2 3/5] iommu/vt-d: Move iopf code from SVA to IOPF enabling path Date: Thu, 9 Mar 2023 10:56:37 +0800 Message-Id: <20230309025639.26109-4-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230309025639.26109-1-baolu.lu@linux.intel.com> References: <20230309025639.26109-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Generally enabling IOMMU_DEV_FEAT_SVA requires IOMMU_DEV_FEAT_IOPF, but some devices manage I/O Page Faults themselves instead of relying on the IOMMU. Move IOPF related code from SVA to IOPF enabling path. For the device drivers that relies on the IOMMU for IOPF through PCI/PRI, IOMMU_DEV_FEAT_IOPF must be enabled before and disabled after IOMMU_DEV_FEAT_SVA. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian --- drivers/iommu/intel/iommu.c | 32 ++++++++++++++++++-------------- 1 file changed, 18 insertions(+), 14 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index d2fcab9d8f61..9ada12bf38dd 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -4638,7 +4638,6 @@ static int intel_iommu_enable_sva(struct device *dev) { struct device_domain_info *info = dev_iommu_priv_get(dev); struct intel_iommu *iommu; - int ret; if (!info || dmar_disabled) return -EINVAL; @@ -4664,6 +4663,21 @@ static int intel_iommu_enable_sva(struct device *dev) if (!info->pri_enabled || !info->ats_enabled) return -EINVAL; + return 0; +} + +static int intel_iommu_enable_iopf(struct device *dev) +{ + struct device_domain_info *info = dev_iommu_priv_get(dev); + struct intel_iommu *iommu; + int ret; + + if (!info || !info->ats_enabled || !info->pri_enabled) + return -ENODEV; + iommu = info->iommu; + if (!iommu) + return -EINVAL; + ret = iopf_queue_add_device(iommu->iopf_queue, dev); if (ret) return ret; @@ -4675,7 +4689,7 @@ static int intel_iommu_enable_sva(struct device *dev) return ret; } -static int intel_iommu_disable_sva(struct device *dev) +static int intel_iommu_disable_iopf(struct device *dev) { struct device_domain_info *info = dev_iommu_priv_get(dev); struct intel_iommu *iommu = info->iommu; @@ -4692,16 +4706,6 @@ static int intel_iommu_disable_sva(struct device *dev) return ret; } -static int intel_iommu_enable_iopf(struct device *dev) -{ - struct device_domain_info *info = dev_iommu_priv_get(dev); - - if (info && info->pri_supported) - return 0; - - return -ENODEV; -} - static int intel_iommu_dev_enable_feat(struct device *dev, enum iommu_dev_features feat) { @@ -4722,10 +4726,10 @@ intel_iommu_dev_disable_feat(struct device *dev, enum iommu_dev_features feat) { switch (feat) { case IOMMU_DEV_FEAT_IOPF: - return 0; + return intel_iommu_disable_iopf(dev); case IOMMU_DEV_FEAT_SVA: - return intel_iommu_disable_sva(dev); + return 0; default: return -ENODEV; From patchwork Thu Mar 9 02:56:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolu Lu X-Patchwork-Id: 13166757 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E3EDEC6FD1C for ; Thu, 9 Mar 2023 02:58:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230031AbjCIC6G (ORCPT ); Wed, 8 Mar 2023 21:58:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38048 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230033AbjCIC6B (ORCPT ); Wed, 8 Mar 2023 21:58:01 -0500 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A0407DBDE; Wed, 8 Mar 2023 18:57:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1678330677; x=1709866677; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Ue30EGl5GVT7NuvhkyMNOql0d+yRmWolurmgmiReO2I=; b=g4CZfSAQb1LE6z95oBCs0Js4HWV1KZOsB+JApu2+eowu3QYFDLokPpww 5m06CdAn0HeDPd+CZr4zszTdItrsH9hDn+aoJWXA0kD8RMWt6GkgCKIeP Ok1HyeoejD7Ni0ddtr9wl1gaJ/xlNJUGHqCdbXezCRz3oQhne8bZTQC9h o9I0oGZ3uI6mxwScDNEtxysZDDbbN5grKUy8Nbxrdg03ecpjDm/Q2r0zw gYaHQqyP69mSzzvPqYOP+mmi43wYInjPMF66cEOVIQ76s5j/yBTNdx05j cudPwIo5wo4kFvrqfShOGRa6/bcyJ855uGA1rybTBdDRGsxEf2mqHWaR4 w==; X-IronPort-AV: E=McAfee;i="6500,9779,10643"; a="316732675" X-IronPort-AV: E=Sophos;i="5.98,245,1673942400"; d="scan'208";a="316732675" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Mar 2023 18:57:56 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10643"; a="746144644" X-IronPort-AV: E=Sophos;i="5.98,245,1673942400"; d="scan'208";a="746144644" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga004.fm.intel.com with ESMTP; 08 Mar 2023 18:57:53 -0800 From: Lu Baolu To: iommu@lists.linux.dev, dmaengine@vger.kernel.org Cc: Joerg Roedel , Will Deacon , Robin Murphy , Kevin Tian , Fenghua Yu , Dave Jiang , Vinod Koul , Jacob Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v2 4/5] iommu/vt-d: Move pfsid and ats_qdep calculation to device probe path Date: Thu, 9 Mar 2023 10:56:38 +0800 Message-Id: <20230309025639.26109-5-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230309025639.26109-1-baolu.lu@linux.intel.com> References: <20230309025639.26109-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org They should be part of the per-device iommu private data initialization. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian Reviewed-by: Jacob Pan --- drivers/iommu/intel/iommu.c | 26 +++++++++++--------------- 1 file changed, 11 insertions(+), 15 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 9ada12bf38dd..fb64ab8358a9 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -1406,20 +1406,6 @@ static void iommu_enable_pci_caps(struct device_domain_info *info) return; pdev = to_pci_dev(info->dev); - /* For IOMMU that supports device IOTLB throttling (DIT), we assign - * PFSID to the invalidation desc of a VF such that IOMMU HW can gauge - * queue depth at PF level. If DIT is not set, PFSID will be treated as - * reserved, which should be set to 0. - */ - if (!ecap_dit(info->iommu->ecap)) - info->pfsid = 0; - else { - struct pci_dev *pf_pdev; - - /* pdev will be returned if device is not a vf */ - pf_pdev = pci_physfn(pdev); - info->pfsid = pci_dev_id(pf_pdev); - } /* The PCIe spec, in its wisdom, declares that the behaviour of the device if you enable PASID support after ATS support is @@ -1438,7 +1424,6 @@ static void iommu_enable_pci_caps(struct device_domain_info *info) !pci_enable_ats(pdev, VTD_PAGE_SHIFT)) { info->ats_enabled = 1; domain_update_iotlb(info->domain); - info->ats_qdep = pci_ats_queue_depth(pdev); } } @@ -4521,6 +4506,17 @@ static struct iommu_device *intel_iommu_probe_device(struct device *dev) dmar_ats_supported(pdev, iommu)) { info->ats_supported = 1; info->dtlb_extra_inval = dev_needs_extra_dtlb_flush(pdev); + + /* + * For IOMMU that supports device IOTLB throttling + * (DIT), we assign PFSID to the invalidation desc + * of a VF such that IOMMU HW can gauge queue depth + * at PF level. If DIT is not set, PFSID will be + * treated as reserved, which should be set to 0. + */ + if (ecap_dit(iommu->ecap)) + info->pfsid = pci_dev_id(pci_physfn(pdev)); + info->ats_qdep = pci_ats_queue_depth(pdev); } if (sm_supported(iommu)) { if (pasid_supported(iommu)) { From patchwork Thu Mar 9 02:56:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolu Lu X-Patchwork-Id: 13166758 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9644FC64EC4 for ; Thu, 9 Mar 2023 02:58:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230050AbjCIC6K (ORCPT ); Wed, 8 Mar 2023 21:58:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38342 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230096AbjCIC6E (ORCPT ); Wed, 8 Mar 2023 21:58:04 -0500 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CF7B2244B3; Wed, 8 Mar 2023 18:57:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1678330679; x=1709866679; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=hyRAeVg/VZEIlAorH/vE8IpPiieMJP0llhhFp7ElHnk=; b=HUYjJpUuAfVFpx0LrgbR1Y23EX3ApUBeCDzIAGfCk6CgqgYQU40Ml6vh iEX9zsTWCy5mQLi7hMu4sBcVpwtl24YAc8Sv66pBxx/UzRq6TvVDfd+ta lVm8bNhVWQiHSJI4xctLt/lt9ZC86h1b/nnJMc0MNoArmTMu7H4BXA1aT aapUg5a0QQWRitTAFIeg2GU8JX7wcZREV1JMwRxA3FddcBLiVDyi6ID+V bPobRnfcwodojfCxZVYN1Ww3Kd1qKMjqradbajb5tFdfo2Bj4z4FiPe5e DVBht3TZ2HOwsNnYwzcBn1XxK49JmllTKuaIScpHgrkZKEQnMLDehkO38 g==; X-IronPort-AV: E=McAfee;i="6500,9779,10643"; a="316732691" X-IronPort-AV: E=Sophos;i="5.98,245,1673942400"; d="scan'208";a="316732691" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Mar 2023 18:57:59 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10643"; a="746144657" X-IronPort-AV: E=Sophos;i="5.98,245,1673942400"; d="scan'208";a="746144657" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga004.fm.intel.com with ESMTP; 08 Mar 2023 18:57:56 -0800 From: Lu Baolu To: iommu@lists.linux.dev, dmaengine@vger.kernel.org Cc: Joerg Roedel , Will Deacon , Robin Murphy , Kevin Tian , Fenghua Yu , Dave Jiang , Vinod Koul , Jacob Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v2 5/5] iommu/vt-d: Move PRI handling to IOPF feature path Date: Thu, 9 Mar 2023 10:56:39 +0800 Message-Id: <20230309025639.26109-6-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230309025639.26109-1-baolu.lu@linux.intel.com> References: <20230309025639.26109-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org PRI is only used for IOPF. With this move, the PCI/PRI feature could be controlled by the device driver through iommu_dev_enable/disable_feature() interfaces. Signed-off-by: Lu Baolu Reviewed-by: Jacob Pan --- drivers/iommu/intel/iommu.c | 59 ++++++++++++++++++++++++------------- 1 file changed, 39 insertions(+), 20 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index fb64ab8358a9..4ed32bde4287 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -1415,11 +1415,6 @@ static void iommu_enable_pci_caps(struct device_domain_info *info) if (info->pasid_supported && !pci_enable_pasid(pdev, info->pasid_supported & ~1)) info->pasid_enabled = 1; - if (info->pri_supported && - (info->pasid_enabled ? pci_prg_resp_pasid_required(pdev) : 1) && - !pci_reset_pri(pdev) && !pci_enable_pri(pdev, PRQ_DEPTH)) - info->pri_enabled = 1; - if (info->ats_supported && pci_ats_page_aligned(pdev) && !pci_enable_ats(pdev, VTD_PAGE_SHIFT)) { info->ats_enabled = 1; @@ -1442,11 +1437,6 @@ static void iommu_disable_pci_caps(struct device_domain_info *info) domain_update_iotlb(info->domain); } - if (info->pri_enabled) { - pci_disable_pri(pdev); - info->pri_enabled = 0; - } - if (info->pasid_enabled) { pci_disable_pasid(pdev); info->pasid_enabled = 0; @@ -4664,23 +4654,48 @@ static int intel_iommu_enable_sva(struct device *dev) static int intel_iommu_enable_iopf(struct device *dev) { + struct pci_dev *pdev = dev_is_pci(dev) ? to_pci_dev(dev) : NULL; struct device_domain_info *info = dev_iommu_priv_get(dev); struct intel_iommu *iommu; int ret; - if (!info || !info->ats_enabled || !info->pri_enabled) + if (!pdev || !info || !info->ats_enabled || !info->pri_supported) return -ENODEV; + + if (info->pri_enabled) + return -EBUSY; + iommu = info->iommu; if (!iommu) return -EINVAL; + /* PASID is required in PRG Response Message. */ + if (info->pasid_enabled && !pci_prg_resp_pasid_required(pdev)) + return -EINVAL; + + ret = pci_reset_pri(pdev); + if (ret) + return ret; + ret = iopf_queue_add_device(iommu->iopf_queue, dev); if (ret) return ret; ret = iommu_register_device_fault_handler(dev, iommu_queue_iopf, dev); if (ret) - iopf_queue_remove_device(iommu->iopf_queue, dev); + goto iopf_remove_device; + + ret = pci_enable_pri(pdev, PRQ_DEPTH); + if (ret) + goto iopf_unregister_handler; + info->pri_enabled = 1; + + return 0; + +iopf_unregister_handler: + iommu_unregister_device_fault_handler(dev); +iopf_remove_device: + iopf_queue_remove_device(iommu->iopf_queue, dev); return ret; } @@ -4689,17 +4704,21 @@ static int intel_iommu_disable_iopf(struct device *dev) { struct device_domain_info *info = dev_iommu_priv_get(dev); struct intel_iommu *iommu = info->iommu; - int ret; - ret = iommu_unregister_device_fault_handler(dev); - if (ret) - return ret; + if (!info->pri_enabled) + return -EINVAL; - ret = iopf_queue_remove_device(iommu->iopf_queue, dev); - if (ret) - iommu_register_device_fault_handler(dev, iommu_queue_iopf, dev); + pci_disable_pri(to_pci_dev(dev)); + info->pri_enabled = 0; - return ret; + /* + * With pri_enabled checked, unregistering fault handler and + * removing device from iopf queue should never fail. + */ + iommu_unregister_device_fault_handler(dev); + iopf_queue_remove_device(iommu->iopf_queue, dev); + + return 0; } static int