From patchwork Thu Mar 9 14:34:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Bernhard_Rosenkr=C3=A4nzer?= X-Patchwork-Id: 13167585 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D1A68C64EC4 for ; Thu, 9 Mar 2023 14:38:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Cc:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=geB8f7lk0ZOKD1wZHZueSz2x7Tez8VCxO75LvzfKSfk=; b=NTs5WupaKqXvQm hHv5LCWTrz3gtO/r2AUUCYzFlNpzyZ3t149jqwVPxea2HmzVeoWEI489cI+aU1eOv4OS9ocJtZDrk QBaN124pb7V6seCDGeo+q/7P0RiqW+cCrCMON1MZFSptFRGKSdWI6ZtqOgB1zUWFGw7/SzHf/+87Y 9aVp76OxSddw8CD6+gb9Su0mZKb56+oyD9bpegqSCw2eeNED2iJs1z6eayw2Sry/kojcdRJoHhPiI 2NZS4ZujUKtSt+MXj5pnrUYQC+0V7Y3B0rsFg+Y37sn2fB5+dzZXFhqbyOVionGx875NUUvf200sk P19c6GslEC6qNQq6mJag==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1paHOM-00AaAU-3q; Thu, 09 Mar 2023 14:37:15 +0000 Received: from mail-ed1-x532.google.com ([2a00:1450:4864:20::532]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1paHMQ-00AZJn-7m for linux-arm-kernel@lists.infradead.org; Thu, 09 Mar 2023 14:35:16 +0000 Received: by mail-ed1-x532.google.com with SMTP id j11so7836058edq.4 for ; Thu, 09 Mar 2023 06:35:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; t=1678372508; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=uvjNBXeeYphBWgNkcT8wLT8gdWY2M0B9Tjp0nJ/il2U=; b=4KYfaUs16ATIQmgfHGIiO1XlwvR2SggVkcJBEfiVouxApDCubSiGgFbPnSShsETRYy osLsCoGwTaEk3ybDE64pvRN0q1CuG2E65nOYWfbGZ+C5SPT8YhTZCuNcLUQw2WY4XPP1 NBz4RVlVi04CxccL1W3fnHHIIL09pwbpWKy9XAXSymeDX+btDdLk7yRgpY8uCZKrM0Nt W1Kx9TIHNdGQWDaXihZegh+OE3MrbWbii/J5URuEDCG9wjr5ziAtXL4E48LjIZNozQSu Ukh7NzPBPnVSHj+qW6Z63i8H/D9UBpDwqKXvQuiAetFI56QFgXbv2l57bJj0p/huvmdl NOqw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678372508; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=uvjNBXeeYphBWgNkcT8wLT8gdWY2M0B9Tjp0nJ/il2U=; b=t+pbTjbUHGO60kv/8SVN/avdFJQuXdFykx9v6CWu6mOEGPST53Ve+mt434HR9+fzD9 kwGsTtJIkR11zHDmeUsva10MRfkU8xCPwhPRm5Uz0INrq9pLEngENmDMgPzHWFu0vafs I/Nb74bKW4jdq13xRlQYI7La587zoCY2MncZ8VSjNU5lH6MENuGijfjFBY39yHJS33+9 I+YBHUsyd6nlbvQJAzTGg73mEVG4KU9rnQeMmZ5O4ucW1QusuhT2FCExNAqVwclgn9Lm bGi7muTXqBgKxsj7+WxcS32TB1RaYv2yWYOIzz/UwEKm82NKJT24henTyvsiccSDWTUs jSCA== X-Gm-Message-State: AO0yUKWBDl+aCD6kmHWW06UYwKsmg3sXy9ArAKbs2h/uwXLbXHXywj3G VVE5j4uXiUOvAH3QRXBeFwlWtA== X-Google-Smtp-Source: AK7set8Qe8U6tp7US8u9NFqeRC9Aiio3kqtK7ujJVoqRZi/jAyoPIflQmwQykEFZpkPXbalGWg36QA== X-Received: by 2002:a17:907:7da6:b0:888:b764:54e5 with SMTP id oz38-20020a1709077da600b00888b76454e5mr26631536ejc.71.1678372508260; Thu, 09 Mar 2023 06:35:08 -0800 (PST) Received: from ryzen9.fritz.box ([81.221.122.240]) by smtp.gmail.com with ESMTPSA id w4-20020a170906184400b008cb7473e488sm9046239eje.12.2023.03.09.06.35.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Mar 2023 06:35:07 -0800 (PST) From: =?utf-8?q?Bernhard_Rosenkr=C3=A4nzer?= To: linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, angelogioacchino.delregno@collabora.com, matthias.bgg@gmail.com, gregkh@linuxfoundation.org, krzysztof.kozlowski+dt@linaro.org, robh+dt@kernel.org, maz@kernel.org, tglx@linutronix.de Subject: [PATCH v10 1/3] dt-bindings: irq: mtk, sysirq: add support for mt8365 Date: Thu, 9 Mar 2023 15:34:57 +0100 Message-Id: <20230309143459.401783-2-bero@baylibre.com> X-Mailer: git-send-email 2.40.0.rc2 In-Reply-To: <20230309143459.401783-1-bero@baylibre.com> References: <20230309143459.401783-1-bero@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230309_063514_335566_38981336 X-CRM114-Status: GOOD ( 10.22 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add binding documentation of mediatek,sysirq for mt8365 SoC. Signed-off-by: Bernhard Rosenkränzer Acked-by: Krzysztof Kozlowski Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Matthias Brugger --- .../devicetree/bindings/interrupt-controller/mediatek,sysirq.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt index 84ced3f4179b9..3ffc60184e445 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt @@ -25,6 +25,7 @@ Required properties: "mediatek,mt6577-sysirq": for MT6577 "mediatek,mt2712-sysirq", "mediatek,mt6577-sysirq": for MT2712 "mediatek,mt2701-sysirq", "mediatek,mt6577-sysirq": for MT2701 + "mediatek,mt8365-sysirq", "mediatek,mt6577-sysirq": for MT8365 - interrupt-controller : Identifies the node as an interrupt controller - #interrupt-cells : Use the same format as specified by GIC in arm,gic.txt. - reg: Physical base address of the intpol registers and length of memory From patchwork Thu Mar 9 14:34:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Bernhard_Rosenkr=C3=A4nzer?= X-Patchwork-Id: 13167592 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C5D39C64EC4 for ; Thu, 9 Mar 2023 14:39:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Cc:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=uKdbCQQW+rtBB4eO5E9U6IvCYYvJNip1dMrOXk9AAEM=; b=VBALbxLU+s2Jm8 KZL2cmdw4gF/4QR1T2hdSbWsBrpP8rZEYerK3/CwA1LA198okxN685zTSo5ciQKWDxV+WB2KF63w/ eKJO0V+66TveUk22C5zPI4E7fHSDhxecfWOTV2p/81Lt4GDL7mcQQ1J2gYh70Krr8Isu1LGwV8yFs iN3y5xB33jIAEBCGpSpp0RThXK1mu2oC6CIqtdgLPMU0RTPwAArNf/FS/qH0XbBv33eey85ta3wOV RpddXvZTFAiyeBib1nlnQUmNWBzYvkDMcmsl1FxdiThZ/Ku3QftdgLKcKrO/9fY2AH3uk8laP++sT ZliglkgU3k0/S1esLofw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1paHPO-00Aac5-L2; Thu, 09 Mar 2023 14:38:19 +0000 Received: from mail-ed1-x52d.google.com ([2a00:1450:4864:20::52d]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1paHMQ-00AZJb-89 for linux-arm-kernel@lists.infradead.org; Thu, 09 Mar 2023 14:35:18 +0000 Received: by mail-ed1-x52d.google.com with SMTP id g3so7889095eda.1 for ; Thu, 09 Mar 2023 06:35:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; t=1678372509; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=/XGnTW8d5154ClkyTBOCffDzRAqbcCupwBDkGcyCWzM=; b=VWPDh6dtM1UkmUdD7p5LKK8/I9+WNmFbF+ajDTXODZ3BAiuXnUEvgLz40BtjcvPYRZ T/FpT9sG2LUdjcjm3BXeWIPvnqgqWZyrJCESFGxPJ/xizYSGzfwomH7IkORp0woQr4LV 7EC6cWtPzN8QhwV9duy3AoX7PpW+T62soDi4eE1WhnElgDoIfmfONRcS6uw1NwhjYUo+ J1QHsW611tFkrVCbFwA535WwMR8D8XWr/zaBP+l7NuVEzlrA50Z9CR0xzO4Hx0Ia1O6g a2AsWYRc9LvX0z9kSz0/n3T2dBk4IANbIxcNxbdgmP2N0sPCziJx7HE0+JOhe1IXKdET +Taw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678372509; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/XGnTW8d5154ClkyTBOCffDzRAqbcCupwBDkGcyCWzM=; b=m6LUUlvNRR9IE2nvhQJIscnSrc79i4BDu0xDGOF7wmpHmwy2TnEObzD3s36/vLrvJz EbrZSqbAz0imhC1dWdnqyfGVnl2UEt/+sX/FD0BPkIKQFBFk+lH9PCRk6eqEDpnPwgKH ACJYj8H4vnEcTVD1U+3vrlaRsbhIALI1VgsskpENZ58WOSRcswzi5XWj7Nvqd1lRq7qC sRhBdxEhgsKBlppWocPOuGq1QY6w2aoIlYsVymM7RJ25sQme/abG7+4YA/M/Rx0AJ4bY JJ+AXoKG23MhunrYmMSVniofHEYNG06AXPL0BlGdKS1l1Ym085F48Rsal0z7HToyIx0V EtoQ== X-Gm-Message-State: AO0yUKWrxvHWzQpV4sHek4QYl0J+/fGsvztI/3j9hePZCUWrfTGmMkWm RbmDwArUZ1/6vz2Y/3V2w1veeUyEpM//3ZbGszg= X-Google-Smtp-Source: AK7set9O4rl8P3uzhwE/hnhV/DPn1W87oDD35gpX7Y95gY0+bM2ivwGXgJy3SWXHzNLsycSnau36pw== X-Received: by 2002:a17:907:72c9:b0:889:b38b:4bb2 with SMTP id du9-20020a17090772c900b00889b38b4bb2mr25849740ejc.49.1678372509238; Thu, 09 Mar 2023 06:35:09 -0800 (PST) Received: from ryzen9.fritz.box ([81.221.122.240]) by smtp.gmail.com with ESMTPSA id w4-20020a170906184400b008cb7473e488sm9046239eje.12.2023.03.09.06.35.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Mar 2023 06:35:08 -0800 (PST) From: =?utf-8?q?Bernhard_Rosenkr=C3=A4nzer?= To: linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, angelogioacchino.delregno@collabora.com, matthias.bgg@gmail.com, gregkh@linuxfoundation.org, krzysztof.kozlowski+dt@linaro.org, robh+dt@kernel.org, maz@kernel.org, tglx@linutronix.de Subject: [PATCH v10 2/3] dt-bindings: serial: mediatek,uart: add MT8365 Date: Thu, 9 Mar 2023 15:34:58 +0100 Message-Id: <20230309143459.401783-3-bero@baylibre.com> X-Mailer: git-send-email 2.40.0.rc2 In-Reply-To: <20230309143459.401783-1-bero@baylibre.com> References: <20230309143459.401783-1-bero@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230309_063514_446340_0EAD003C X-CRM114-Status: UNSURE ( 8.61 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add binding description for mediatek,mt8365-uart Signed-off-by: Bernhard Rosenkränzer Acked-by: Krzysztof Kozlowski Reviewed-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/serial/mediatek,uart.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/serial/mediatek,uart.yaml b/Documentation/devicetree/bindings/serial/mediatek,uart.yaml index fe098d98af6ee..303d02ca4e1ba 100644 --- a/Documentation/devicetree/bindings/serial/mediatek,uart.yaml +++ b/Documentation/devicetree/bindings/serial/mediatek,uart.yaml @@ -45,6 +45,7 @@ properties: - mediatek,mt8188-uart - mediatek,mt8192-uart - mediatek,mt8195-uart + - mediatek,mt8365-uart - mediatek,mt8516-uart - const: mediatek,mt6577-uart From patchwork Thu Mar 9 14:34:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Bernhard_Rosenkr=C3=A4nzer?= X-Patchwork-Id: 13167594 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 27EF4C6FD1F for ; Thu, 9 Mar 2023 14:41:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Cc:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=y5YLzmx7C5kibteY0wYauGueEqPffcWDW/lSSqGO7CQ=; b=m4B/NxPneeJnmN 4oOFKtgOsTGZrO9+qfX3nciLdJ8uxTV2dJyi6bc9GNUGvpnRJ1bdu9KdoEMe8BPG7rU4yb4c7mq4G a4429t60WXRFLtFTM/s6wq5Sj48GDaNwOMRQxf6WtdOkNIq6HrvuSJwDPM6wrIZrF4pjY+9VfXUBQ SNAGp5pQ+gZrqMYKc8ynOLn5SnAwOWODlqGk1gwXFL4sWYHb6zppnqqTaBckfP6wQewye1fYDH+BV pN0vjgtV2GwWLfhwdmT5U27aRRLjiIhIIxYGgo1dW5By+flruWF8tyJ1j0QWw+cfaDHyO+Fzmtdzi +GaJ9Ek3FkXPQvLeJjSw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1paHRV-00AbXZ-Gs; Thu, 09 Mar 2023 14:40:29 +0000 Received: from mail-ed1-x531.google.com ([2a00:1450:4864:20::531]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1paHMQ-00AZK5-7s for linux-arm-kernel@lists.infradead.org; Thu, 09 Mar 2023 14:35:19 +0000 Received: by mail-ed1-x531.google.com with SMTP id s11so7784099edy.8 for ; Thu, 09 Mar 2023 06:35:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; t=1678372510; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=3veNr6QWQGLni1Lhr5d3vEQOMdWTECPvtYq1u5Z90HI=; b=uKrTjKVXr5kUTMafP5GX+G5H7zA9LRVWa1vJlGY50vg8smv8RycKvvXR6LeZm37nEg jITFgdlFDqUzb1Hnj+lL+gx8XunMNaSx6Z0ejWZ5YtPglSljXJVTEddDUR8I3uTWXIAW jF7lAmEVEy7wuxZGCEp5+UTbCgxveoUJuYaaVqj+3TBlSMC6Bz8SLAcpMAB5IUCOYh/Q UlINv2fh8q8HTpYLc4N4C5Ot23ZMJiD07ACwvRIOHQc0gUUXuDTClI6uzYPkPxcF9MNB vrsJKCC8eQ9tUMnbpzwkAGwHGkUWjkOrLWvoovYOoOUGSlf3mT4VBVVSnCu6qqmduJIM UdHg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678372510; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3veNr6QWQGLni1Lhr5d3vEQOMdWTECPvtYq1u5Z90HI=; b=bH8sn1kSQmT9NW3T7AfOFmpWjGJFsBjSr6xBddIq+IAzzYA7FDY69xER81MkPcAwxE MJa8Upir+z3Yzj9bUXkwCH9I4T0GgfSzF7Z98K41Y1Z7/a7qsn15YMYNLWhWAqlAEgPW 8tq/+Bo6GhBR/AV1J7DXatKDgCtlWvbn3xnjXMeH/ddY14vmPgpdRg7KaSezbUSXKbHq F0NvovdEwp9HVRwAFZIGZUSdivyT27bWZFXmdVKU8db4EtHu9IRl/CSu/w1UM4gFfcFF n0y4en/xGinzb3LbAaGvgoy4ED5V9rj4Z+/7sTQB7fqYU9lwnlEa0El1j06lfgtS8xLv TxGQ== X-Gm-Message-State: AO0yUKW2e8US++BUHjEU4lVFQJqiVvN1UWWgh5tElK1bysSPhlsyltJc 54LhVWJ8qk/9ghTxnI0Amh3XOA== X-Google-Smtp-Source: AK7set+ynrH82jLlnB9KtwNkoM+6pBhDpm5xZExd3UBm2ErYBt5QjkePER/xCOqr/OMu6+1HYJNh9Q== X-Received: by 2002:a17:906:718d:b0:8b1:81eb:158f with SMTP id h13-20020a170906718d00b008b181eb158fmr21899010ejk.62.1678372510413; Thu, 09 Mar 2023 06:35:10 -0800 (PST) Received: from ryzen9.fritz.box ([81.221.122.240]) by smtp.gmail.com with ESMTPSA id w4-20020a170906184400b008cb7473e488sm9046239eje.12.2023.03.09.06.35.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Mar 2023 06:35:09 -0800 (PST) From: =?utf-8?q?Bernhard_Rosenkr=C3=A4nzer?= To: linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, angelogioacchino.delregno@collabora.com, matthias.bgg@gmail.com, gregkh@linuxfoundation.org, krzysztof.kozlowski+dt@linaro.org, robh+dt@kernel.org, maz@kernel.org, tglx@linutronix.de Subject: [PATCH v10 3/3] arm64: dts: mediatek: Initial mt8365-evk support Date: Thu, 9 Mar 2023 15:34:59 +0100 Message-Id: <20230309143459.401783-4-bero@baylibre.com> X-Mailer: git-send-email 2.40.0.rc2 In-Reply-To: <20230309143459.401783-1-bero@baylibre.com> References: <20230309143459.401783-1-bero@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230309_063514_519008_3E80A513 X-CRM114-Status: GOOD ( 16.38 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Fabien Parent This adds minimal support for the Mediatek 8365 SOC and the EVK reference board, allowing the board to boot to initramfs with serial port I/O. Signed-off-by: Fabien Parent [bero@baylibre.com: Removed parts depending on drivers that aren't upstream yet, cleanups, add CPU cache layout, add systimer, fix GIC] Signed-off-by: Bernhard Rosenkränzer [aouledameur@baylibre.com: Fix systimer properties] Signed-off-by: Amjad Ouled-Ameur Signed-off-by: Alexandre Mergnat Tested-by: Kevin Hilman Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/Makefile | 1 + arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 168 +++++++++ arch/arm64/boot/dts/mediatek/mt8365.dtsi | 377 ++++++++++++++++++++ 3 files changed, 546 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8365-evk.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8365.dtsi diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile index d5cd7b3e09cf5..c99c3372a4b5e 100644 --- a/arch/arm64/boot/dts/mediatek/Makefile +++ b/arch/arm64/boot/dts/mediatek/Makefile @@ -52,4 +52,5 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-cherry-tomato-r2.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-cherry-tomato-r3.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-demo.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-evb.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8365-evk.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8516-pumpkin.dtb diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts new file mode 100644 index 0000000000000..4683704ea2355 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts @@ -0,0 +1,168 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2021-2022 BayLibre, SAS. + * Authors: + * Fabien Parent + * Bernhard Rosenkränzer + */ + +/dts-v1/; + +#include +#include +#include +#include "mt8365.dtsi" + +/ { + model = "MediaTek MT8365 Open Platform EVK"; + compatible = "mediatek,mt8365-evk", "mediatek,mt8365"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:921600n8"; + }; + + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&gpio_keys>; + + key-volume-up { + gpios = <&pio 24 GPIO_ACTIVE_LOW>; + label = "volume_up"; + linux,code = ; + wakeup-source; + debounce-interval = <15>; + }; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0 0x40000000 0 0xc0000000>; + }; + + usb_otg_vbus: regulator-0 { + compatible = "regulator-fixed"; + regulator-name = "otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&pio 16 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* 128 KiB reserved for ARM Trusted Firmware (BL31) */ + bl31_secmon_reserved: secmon@43000000 { + no-map; + reg = <0 0x43000000 0 0x20000>; + }; + + /* 12 MiB reserved for OP-TEE (BL32) + * +-----------------------+ 0x43e0_0000 + * | SHMEM 2MiB | + * +-----------------------+ 0x43c0_0000 + * | | TA_RAM 8MiB | + * + TZDRAM +--------------+ 0x4340_0000 + * | | TEE_RAM 2MiB | + * +-----------------------+ 0x4320_0000 + */ + optee_reserved: optee@43200000 { + no-map; + reg = <0 0x43200000 0 0x00c00000>; + }; + }; +}; + +&pio { + gpio_keys: gpio-keys-pins { + pins { + pinmux = ; + bias-pull-up; + input-enable; + }; + }; + + uart0_pins: uart0-pins { + pins { + pinmux = , + ; + }; + }; + + uart1_pins: uart1-pins { + pins { + pinmux = , + ; + }; + }; + + uart2_pins: uart2-pins { + pins { + pinmux = , + ; + }; + }; + + usb_pins: usb-pins { + id-pins { + pinmux = ; + input-enable; + bias-pull-up; + }; + + usb0-vbus-pins { + pinmux = ; + output-high; + }; + + usb1-vbus-pins { + pinmux = ; + output-high; + }; + }; + + pwm_pins: pwm-pins { + pins { + pinmux = , + ; + }; + }; +}; + +&pwm { + pinctrl-0 = <&pwm_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&uart0 { + pinctrl-0 = <&uart0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&uart1 { + pinctrl-0 = <&uart1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&uart2 { + pinctrl-0 = <&uart2_pins>; + pinctrl-names = "default"; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi new file mode 100644 index 0000000000000..5d6763ebcf869 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -0,0 +1,377 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * (C) 2018 MediaTek Inc. + * Copyright (C) 2022 BayLibre SAS + * Fabien Parent + * Bernhard Rosenkränzer + */ +#include +#include +#include +#include + +/ { + compatible = "mediatek,mt8365"; + interrupt-parent = <&sysirq>; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + core2 { + cpu = <&cpu2>; + }; + core3 { + cpu = <&cpu3>; + }; + }; + }; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0>; + #cooling-cells = <2>; + enable-method = "psci"; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; + next-level-cache = <&l2>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x1>; + #cooling-cells = <2>; + enable-method = "psci"; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; + next-level-cache = <&l2>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x2>; + #cooling-cells = <2>; + enable-method = "psci"; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; + next-level-cache = <&l2>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x3>; + #cooling-cells = <2>; + enable-method = "psci"; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; + next-level-cache = <&l2>; + }; + + l2: l2-cache { + compatible = "cache"; + cache-level = <2>; + cache-size = <0x80000>; + cache-line-size = <64>; + cache-sets = <512>; + cache-unified; + }; + }; + + clk26m: oscillator { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + clock-output-names = "clk26m"; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + soc { + #address-cells = <2>; + #size-cells = <2>; + compatible = "simple-bus"; + ranges; + + gic: interrupt-controller@c000000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + interrupt-controller; + reg = <0 0x0c000000 0 0x10000>, /* GICD */ + <0 0x0c080000 0 0x80000>, /* GICR */ + <0 0x0c400000 0 0x2000>, /* GICC */ + <0 0x0c410000 0 0x1000>, /* GICH */ + <0 0x0c420000 0 0x2000>; /* GICV */ + + interrupts = ; + }; + + topckgen: syscon@10000000 { + compatible = "mediatek,mt8365-topckgen", "syscon"; + reg = <0 0x10000000 0 0x1000>; + #clock-cells = <1>; + }; + + infracfg: syscon@10001000 { + compatible = "mediatek,mt8365-infracfg", "syscon"; + reg = <0 0x10001000 0 0x1000>; + #clock-cells = <1>; + }; + + pericfg: syscon@10003000 { + compatible = "mediatek,mt8365-pericfg", "syscon"; + reg = <0 0x10003000 0 0x1000>; + #clock-cells = <1>; + }; + + syscfg_pctl: syscfg-pctl@10005000 { + compatible = "mediatek,mt8365-syscfg", "syscon"; + reg = <0 0x10005000 0 0x1000>; + }; + + pio: pinctrl@1000b000 { + compatible = "mediatek,mt8365-pinctrl"; + reg = <0 0x1000b000 0 0x1000>; + mediatek,pctl-regmap = <&syscfg_pctl>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + apmixedsys: syscon@1000c000 { + compatible = "mediatek,mt8365-apmixedsys", "syscon"; + reg = <0 0x1000c000 0 0x1000>; + #clock-cells = <1>; + }; + + keypad: keypad@10010000 { + compatible = "mediatek,mt6779-keypad"; + reg = <0 0x10010000 0 0x1000>; + wakeup-source; + interrupts = ; + clocks = <&clk26m>; + clock-names = "kpd"; + status = "disabled"; + }; + + mcucfg: syscon@10200000 { + compatible = "mediatek,mt8365-mcucfg", "syscon"; + reg = <0 0x10200000 0 0x2000>; + #clock-cells = <1>; + }; + + sysirq: interrupt-controller@10200a80 { + compatible = "mediatek,mt8365-sysirq", "mediatek,mt6577-sysirq"; + interrupt-controller; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + reg = <0 0x10200a80 0 0x20>; + }; + + infracfg_nao: infracfg@1020e000 { + compatible = "mediatek,mt8365-infracfg", "syscon"; + reg = <0 0x1020e000 0 0x1000>; + #clock-cells = <1>; + }; + + rng: rng@1020f000 { + compatible = "mediatek,mt8365-rng", "mediatek,mt7623-rng"; + reg = <0 0x1020f000 0 0x100>; + clocks = <&infracfg CLK_IFR_TRNG>; + clock-names = "rng"; + }; + + apdma: dma-controller@11000280 { + compatible = "mediatek,mt8365-uart-dma", "mediatek,mt6577-uart-dma"; + reg = <0 0x11000280 0 0x80>, + <0 0x11000300 0 0x80>, + <0 0x11000380 0 0x80>, + <0 0x11000400 0 0x80>, + <0 0x11000580 0 0x80>, + <0 0x11000600 0 0x80>; + interrupts = , + , + , + , + , + ; + dma-requests = <6>; + clocks = <&infracfg CLK_IFR_AP_DMA>; + clock-names = "apdma"; + #dma-cells = <1>; + }; + + uart0: serial@11002000 { + compatible = "mediatek,mt8365-uart", "mediatek,mt6577-uart"; + reg = <0 0x11002000 0 0x1000>; + interrupts = ; + clocks = <&clk26m>, <&infracfg CLK_IFR_UART0>; + clock-names = "baud", "bus"; + dmas = <&apdma 0>, <&apdma 1>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + uart1: serial@11003000 { + compatible = "mediatek,mt8365-uart", "mediatek,mt6577-uart"; + reg = <0 0x11003000 0 0x1000>; + interrupts = ; + clocks = <&clk26m>, <&infracfg CLK_IFR_UART1>; + clock-names = "baud", "bus"; + dmas = <&apdma 2>, <&apdma 3>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + uart2: serial@11004000 { + compatible = "mediatek,mt8365-uart", "mediatek,mt6577-uart"; + reg = <0 0x11004000 0 0x1000>; + interrupts = ; + clocks = <&clk26m>, <&infracfg CLK_IFR_UART2>; + clock-names = "baud", "bus"; + dmas = <&apdma 4>, <&apdma 5>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + pwm: pwm@11006000 { + compatible = "mediatek,mt8365-pwm"; + reg = <0 0x11006000 0 0x1000>; + #pwm-cells = <2>; + interrupts = ; + clocks = <&infracfg CLK_IFR_PWM_HCLK>, + <&infracfg CLK_IFR_PWM>, + <&infracfg CLK_IFR_PWM1>, + <&infracfg CLK_IFR_PWM2>, + <&infracfg CLK_IFR_PWM3>; + clock-names = "top", "main", "pwm1", "pwm2", "pwm3"; + }; + + spi: spi@1100a000 { + compatible = "mediatek,mt8365-spi", "mediatek,mt7622-spi"; + reg = <0 0x1100a000 0 0x100>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clocks = <&topckgen CLK_TOP_UNIVPLL2_D4>, + <&topckgen CLK_TOP_SPI_SEL>, + <&infracfg CLK_IFR_SPI0>; + clock-names = "parent-clk", "sel-clk", "spi-clk"; + status = "disabled"; + }; + + ssusb: usb@11201000 { + compatible = "mediatek,mt8365-mtu3", "mediatek,mtu3"; + reg = <0 0x11201000 0 0x2e00>, <0 0x11203e00 0 0x0100>; + reg-names = "mac", "ippc"; + interrupts = ; + phys = <&u2port0 PHY_TYPE_USB2>, + <&u2port1 PHY_TYPE_USB2>; + clocks = <&topckgen CLK_TOP_SSUSB_TOP_CK_EN>, + <&infracfg CLK_IFR_SSUSB_REF>, + <&infracfg CLK_IFR_SSUSB_SYS>, + <&infracfg CLK_IFR_ICUSB>; + clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "disabled"; + + usb_host: usb@11200000 { + compatible = "mediatek,mt8365-xhci", "mediatek,mtk-xhci"; + reg = <0 0x11200000 0 0x1000>; + reg-names = "mac"; + interrupts = ; + clocks = <&topckgen CLK_TOP_SSUSB_TOP_CK_EN>, + <&infracfg CLK_IFR_SSUSB_REF>, + <&infracfg CLK_IFR_SSUSB_SYS>, + <&infracfg CLK_IFR_ICUSB>, + <&infracfg CLK_IFR_SSUSB_XHCI>; + clock-names = "sys_ck", "ref_ck", "mcu_ck", + "dma_ck", "xhci_ck"; + status = "disabled"; + }; + }; + + u3phy: t-phy@11cc0000 { + compatible = "mediatek,mt8365-tphy", "mediatek,generic-tphy-v2"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0x11cc0000 0x9000>; + + u2port0: usb-phy@0 { + reg = <0x0 0x400>; + clocks = <&topckgen CLK_TOP_SSUSB_PHY_CK_EN>, + <&topckgen CLK_TOP_USB20_48M_EN>; + clock-names = "ref", "da_ref"; + #phy-cells = <1>; + }; + + u2port1: usb-phy@1000 { + reg = <0x1000 0x400>; + clocks = <&topckgen CLK_TOP_SSUSB_PHY_CK_EN>, + <&topckgen CLK_TOP_USB20_48M_EN>; + clock-names = "ref", "da_ref"; + #phy-cells = <1>; + }; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupt-parent = <&gic>; + interrupts = , + , + , + ; + }; + + system_clk: dummy13m { + compatible = "fixed-clock"; + clock-frequency = <13000000>; + #clock-cells = <0>; + }; + + systimer: timer@10017000 { + compatible = "mediatek,mt8365-systimer", "mediatek,mt6795-timer"; + reg = <0 0x10017000 0 0x100>; + interrupts = ; + clocks = <&system_clk>; + clock-names = "clk13m"; + }; +};