From patchwork Fri Mar 10 09:30:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhenhua Huang X-Patchwork-Id: 13168969 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 529E0C64EC4 for ; Fri, 10 Mar 2023 09:30:44 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 94EDC6B0074; Fri, 10 Mar 2023 04:30:43 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id 926AA8E0001; Fri, 10 Mar 2023 04:30:43 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 7ED636B0078; Fri, 10 Mar 2023 04:30:43 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0014.hostedemail.com [216.40.44.14]) by kanga.kvack.org (Postfix) with ESMTP id 6E19E6B0074 for ; Fri, 10 Mar 2023 04:30:43 -0500 (EST) Received: from smtpin18.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay04.hostedemail.com (Postfix) with ESMTP id 3ACF71A1644 for ; Fri, 10 Mar 2023 09:30:43 +0000 (UTC) X-FDA: 80552468766.18.285CEA5 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by imf10.hostedemail.com (Postfix) with ESMTP id 13B7DC0012 for ; Fri, 10 Mar 2023 09:30:40 +0000 (UTC) Authentication-Results: imf10.hostedemail.com; dkim=pass header.d=quicinc.com header.s=qcppdkim1 header.b=nFWqdgoa; spf=pass (imf10.hostedemail.com: domain of quic_zhenhuah@quicinc.com designates 205.220.168.131 as permitted sender) smtp.mailfrom=quic_zhenhuah@quicinc.com; dmarc=pass (policy=none) header.from=quicinc.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1678440641; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type:content-transfer-encoding:in-reply-to: references:dkim-signature; bh=tnEL3oCBzCfkJDbY5JlfL0dj9i+4DIeoKa3aJ04N4kc=; b=bi2MTNpBHUEMv5+nJLJLQ/42gOWNC/GbNGso5oASrXNMN64vzs383X9H9pqFfWm6j5ecqT j9AfO4GB8Owzr7e4qr2awJbvIg9VD7Fe91bM9dOjN2dFc40aZ9SQlMcp8CDRweEluHpJv7 QRIZ20uGQJboXu/+b62OQr+gaTxoH3k= ARC-Authentication-Results: i=1; imf10.hostedemail.com; dkim=pass header.d=quicinc.com header.s=qcppdkim1 header.b=nFWqdgoa; spf=pass (imf10.hostedemail.com: domain of quic_zhenhuah@quicinc.com designates 205.220.168.131 as permitted sender) smtp.mailfrom=quic_zhenhuah@quicinc.com; dmarc=pass (policy=none) header.from=quicinc.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1678440641; a=rsa-sha256; cv=none; b=gayN49UBas93Ugq0xtEJ+oWbr0Q6tSj7FIws9XnArRqo1itoPtsfHjjGBsaKfc869dzdv4 xR+W3fI8rNy/+wZupVxmMjoMbeTTqjl9j5faIFmc6gr7BeVPc6ymCBV1n83ZUM4NfPvxsO /Y4LbJzDwQXH939VcBPLMFlSsbWHZQM= Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 32A4vt6Z027894; Fri, 10 Mar 2023 09:30:24 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=qcppdkim1; bh=tnEL3oCBzCfkJDbY5JlfL0dj9i+4DIeoKa3aJ04N4kc=; b=nFWqdgoaONxqhF3EYmNsTOdwz1eAgu6x8vwR2kcsyFYhTWxpWQG8rEqp3uWE2aL8Z6Ov S/ECr4ESZQ+IozrmxVz14jRuTXq81iGWMl8aMU1Q05RgOFZLyCgplGlAMRwYZ3vB1cT9 SHCF+ASwf4hy3QLzFyTVEJWi6GCbmBFJo/zqgR3dBK4cdutthEKHlO4Yo1lITYJs/aqT 0JRX/f1sqLyut/1AGKTihiY5WGus/72ywnP3nbx51d6zqHyXTzNq8hUro6C5e0XSCMjY eD2Gc2bIWOG8zANYxCICWjoOsvhzMplsthFNjQobVVEk1L+vBoClRVQtcsQwQp0k9LMt Eg== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3p7bvk3jw7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 10 Mar 2023 09:30:24 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 32A9UN3v019608 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 10 Mar 2023 09:30:23 GMT Received: from zhenhuah-gv.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Fri, 10 Mar 2023 01:30:19 -0800 From: Zhenhua Huang To: , , , , , , , , , CC: Zhenhua Huang , , , , , , Subject: [PATCH v4] mm,kfence: decouple kfence from page granularity mapping judgement Date: Fri, 10 Mar 2023 17:30:04 +0800 Message-ID: <1678440604-796-1-git-send-email-quic_zhenhuah@quicinc.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: vrVYIJ-qG-r_JQDxJJIMqmFiDQ5tYfxj X-Proofpoint-ORIG-GUID: vrVYIJ-qG-r_JQDxJJIMqmFiDQ5tYfxj X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-10_03,2023-03-09_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 impostorscore=0 malwarescore=0 phishscore=0 spamscore=0 clxscore=1015 adultscore=0 mlxlogscore=999 lowpriorityscore=0 mlxscore=0 suspectscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2303100072 X-Rspam-User: X-Rspamd-Server: rspam03 X-Stat-Signature: 1akrts1ryfdkyu6ta1cfkzkpizohufqj X-Rspamd-Queue-Id: 13B7DC0012 X-HE-Tag: 1678440640-850045 X-HE-Meta: U2FsdGVkX18oynhuFbJafslVddVsW+nfhDV40R9GbdeBIA/DjTNbN4zkOoqNQWMiBa6aLla0AfSAJA3/GBiZmkoj0q+W449nW91Ya58pdBYIAafwXSQlxZ4BhMu0EEMCvQfAN/gELfL1SDwXUMz4v9rpZXIFCE4+WtrnF0Iy+Xbqv3NKbMVYBDR6GTFeJoL6OBIaXaKuvfcNrYD8PJ9Liu/+EjRnKkdb5z4mGGqnRzbYh4yd7KILXYC5Du0P0BL98EFfOUV0LvZGHCn/kBznVJb/7igtRFC1fOzAnjkgYN4a5C38jpR32mQIJN2qecqH6WCd0FSmFFHx9Dx727rrnuOQgYdbP0rVFbrvu+EGrKKTEDlkUhiZaWJW6IYFeox6ptDRrGVODIULojXPB96c94bHuWV8RdNSnv18lsR7bA/Z6RCv+g00RKRcNf2pyM1x4ya8yoQvUu0pjiXAO/I9jIkTQFbJW3eRqwqAcKwQSamuq4jNwVCcYmGBb2lf0lwP0VVcyQZCms4BAQe4Lis2exQH/TczzsZqtAFkamcbZxEyZLyKzFroH8dYVnb9+xGFrkZRbleGAkdn3qAuCD3MO7UbUjJjFSTRYhO61465gwzSJ9NhlWIsvcJTeK3N/0rbNEzPkIbbTrWtbFafKSz87WBRsU830uvwxsbqJPzhoZwH+vYGdYKSqqFmiSHUISnl/ZXlLfzGEu9i6xBTiX8ori0aFxLddpFFKDz+k27S/d0gzaakKvtcRalBhwg1g41arTK6Azx/nuqI6P+dVmpIvr6wAKEhx+Oc+482qW/jrbgtZ4ZPmbN/6/qJ0OhMS/oH7O1JXW0OzOJud7sY052Qzu+/qf3TZDrFtsc3Xb5Xu+nVcy5OoKoTECGct97qO58okgbuXoo3q1utPSfYMs91G+xnYPS81R3IduTqta4bQHCj1FK+E4uZzOeErK3Sjcf4G4Kn8tItEOhltAajG5u WqyeDYSw xdUbxLjzRtZH/G49wZp0teGkPSQJaw9NyQKCxhrOwnOTu+O90xRP4Mre1ULcl22rCrdWSqsP99x5RgNczPpymTSc9xNGO1dn3xbkpd5Og48RPaQGWcnU/JzlRieEAj7cdb9bQBTMNMosaCGGc0hu2X+M+ixcWVQCKI55p8eQ/crOaeOZQ1jSRL86Pp20un1CHM25Ltqez/nLlD1WgBtOwPFvr1ks9EStFQpOu3X/MarU73cQhPh6dXiGKcEc2yOyuHOXP7/FrIBqKVJFv6fA10lzRvtnVgHS6X+1Lvw33MsUn8NDdnf40XZMXk7RvWJbZk8ijQU9OWst/J75KCf9qj2nkikvoarnh7wAH X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Kfence only needs its pool to be mapped as page granularity, previous judgement was a bit over protected. Decouple it from judgement and do page granularity mapping for kfence pool only [1]. To implement this, also relocate the kfence pool allocation before the linear mapping setting up, arm64_kfence_alloc_pool is to allocate phys addr, __kfence_pool is to be set after linear mapping set up. LINK: [1] https://lore.kernel.org/linux-arm-kernel/1675750519-1064-1-git-send-email-quic_zhenhuah@quicinc.com/T/ Suggested-by: Mark Rutland Signed-off-by: Zhenhua Huang --- arch/arm64/mm/mmu.c | 42 ++++++++++++++++++++++++++++++++++++++++++ arch/arm64/mm/pageattr.c | 5 ++--- include/linux/kfence.h | 8 ++++++++ mm/kfence/core.c | 9 +++++++++ 4 files changed, 61 insertions(+), 3 deletions(-) diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index 6f9d889..ca5c932 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include @@ -525,6 +526,31 @@ static int __init enable_crash_mem_map(char *arg) } early_param("crashkernel", enable_crash_mem_map); +#ifdef CONFIG_KFENCE + +static phys_addr_t arm64_kfence_alloc_pool(void) +{ + phys_addr_t kfence_pool; + + if (!kfence_sample_interval) + return 0; + + kfence_pool = memblock_phys_alloc(KFENCE_POOL_SIZE, PAGE_SIZE); + if (!kfence_pool) + pr_err("failed to allocate kfence pool\n"); + + return kfence_pool; +} + +#else + +static phys_addr_t arm64_kfence_alloc_pool(void) +{ + return 0; +} + +#endif + static void __init map_mem(pgd_t *pgdp) { static const u64 direct_map_end = _PAGE_END(VA_BITS_MIN); @@ -532,6 +558,7 @@ static void __init map_mem(pgd_t *pgdp) phys_addr_t kernel_end = __pa_symbol(__init_begin); phys_addr_t start, end; int flags = NO_EXEC_MAPPINGS; + phys_addr_t kfence_pool; u64 i; /* @@ -564,6 +591,10 @@ static void __init map_mem(pgd_t *pgdp) } #endif + kfence_pool = arm64_kfence_alloc_pool(); + if (kfence_pool) + memblock_mark_nomap(kfence_pool, KFENCE_POOL_SIZE); + /* map all the memory banks */ for_each_mem_range(i, &start, &end) { if (start >= end) @@ -608,6 +639,17 @@ static void __init map_mem(pgd_t *pgdp) } } #endif + + /* Kfence pool needs page-level mapping */ + if (kfence_pool) { + __map_memblock(pgdp, kfence_pool, + kfence_pool + KFENCE_POOL_SIZE, + pgprot_tagged(PAGE_KERNEL), + NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS); + memblock_clear_nomap(kfence_pool, KFENCE_POOL_SIZE); + /* kfence_pool really mapped now */ + kfence_set_pool(kfence_pool); + } } void mark_rodata_ro(void) diff --git a/arch/arm64/mm/pageattr.c b/arch/arm64/mm/pageattr.c index 79dd201..61156d0 100644 --- a/arch/arm64/mm/pageattr.c +++ b/arch/arm64/mm/pageattr.c @@ -22,12 +22,11 @@ bool rodata_full __ro_after_init = IS_ENABLED(CONFIG_RODATA_FULL_DEFAULT_ENABLED bool can_set_direct_map(void) { /* - * rodata_full, DEBUG_PAGEALLOC and KFENCE require linear map to be + * rodata_full and DEBUG_PAGEALLOC require linear map to be * mapped at page granularity, so that it is possible to * protect/unprotect single pages. */ - return (rodata_enabled && rodata_full) || debug_pagealloc_enabled() || - IS_ENABLED(CONFIG_KFENCE); + return (rodata_enabled && rodata_full) || debug_pagealloc_enabled(); } static int change_page_range(pte_t *ptep, unsigned long addr, void *data) diff --git a/include/linux/kfence.h b/include/linux/kfence.h index 726857a..570d4e3 100644 --- a/include/linux/kfence.h +++ b/include/linux/kfence.h @@ -64,6 +64,12 @@ static __always_inline bool is_kfence_address(const void *addr) void __init kfence_alloc_pool(void); /** + * kfence_set_pool() - allows an arch to set the + * KFENCE pool during early init + */ +void __init kfence_set_pool(phys_addr_t addr); + +/** * kfence_init() - perform KFENCE initialization at boot time * * Requires that kfence_alloc_pool() was called before. This sets up the @@ -222,8 +228,10 @@ bool __kfence_obj_info(struct kmem_obj_info *kpp, void *object, struct slab *sla #else /* CONFIG_KFENCE */ +#define KFENCE_POOL_SIZE 0 static inline bool is_kfence_address(const void *addr) { return false; } static inline void kfence_alloc_pool(void) { } +static inline void kfence_set_pool(phys_addr_t addr) { } static inline void kfence_init(void) { } static inline void kfence_shutdown_cache(struct kmem_cache *s) { } static inline void *kfence_alloc(struct kmem_cache *s, size_t size, gfp_t flags) { return NULL; } diff --git a/mm/kfence/core.c b/mm/kfence/core.c index 5349c37..0765395 100644 --- a/mm/kfence/core.c +++ b/mm/kfence/core.c @@ -814,12 +814,21 @@ void __init kfence_alloc_pool(void) if (!kfence_sample_interval) return; + /* if the pool has already been initialized by arch, skip the below */ + if (__kfence_pool) + return; + __kfence_pool = memblock_alloc(KFENCE_POOL_SIZE, PAGE_SIZE); if (!__kfence_pool) pr_err("failed to allocate pool\n"); } +void __init kfence_set_pool(phys_addr_t addr) +{ + __kfence_pool = phys_to_virt(addr); +} + static void kfence_init_enable(void) { if (!IS_ENABLED(CONFIG_KFENCE_STATIC_KEYS))