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Tsirkin" , Stefano Stabellini , Anthony PERARD , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Jan Beulich , Antonio Caggiano , "Dr . David Alan Gilbert" , Robert Beckett , , CC: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , "Stewart Hildebrand" , Xenia Ragiadakou , Honglei Huang , Julia Zhang , Chen Jiqian Subject: [RFC QEMU PATCH 01/18] virtio: Add shared memory capability Date: Sun, 12 Mar 2023 17:22:27 +0800 Message-ID: <20230312092244.451465-2-ray.huang@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230312092244.451465-1-ray.huang@amd.com> References: <20230312092244.451465-1-ray.huang@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT082:EE_|BL1PR12MB5351:EE_ X-MS-Office365-Filtering-Correlation-Id: cc7f3646-c4a3-4231-417c-08db22db6c70 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: GUUVhREe5AEdwl7j0EIEkBb3I6AML33ZQLUI9+NFxJRD3WLhcyhTToors9wdBlYTKApwCd7XmTlD5D2NCxzv2yBjVsl8ozCO0wyfXrINiFXUfr2kq5kMcTJmYc95u0VmklK88GsLXF+O4EDvWydrEsmXoRhPNNOWesVHxGHoz5zrrKGQxaL0MG7NCi/XxkoLDHGmlgevLDvbjM2uaO6VLfzWsfgj/GLK1YcqxbWRsz8wpnf57Ks3XKZh8XaARviE33twlXN5+oFXi+WAuRI4FyvhziMkvD6czfEd7eJLiOl1MS92n1ZirsTLRJZlPvq+hMGMPYjmRRbBk4cwf/idsZJr51XyYNXAaBfR4UWeP2D1T7ZzAvVPk6qo4jJ0FuDjsvc0N5DHhG1sojMmDAJ4cj1ujuban8Q7Irha+YCCMO+jfJGOxLBe1F1DpguwF039ZGxngTrbIq7u8CzybeKTpxsCagAZPaYRQtDGs1Cu6aKZQ3h/Hk/UaGUwmutc54PbE8DJWLTuCspVGiPkGEX/tZ2RoYrTqqTnhhmjGmWg57SHMkn3gjzBUtNoGjaQjhrBroiYXFbOTunJlFB1z/FzhGHhKCwMn1jXvnibzdSM6YWpNh1JADZuvcwB7ik+edczhbGE6gRqy+nabYmqi+Hpn9U+udnT3ipF8tpub5a4akml6wLs3gqsBLdIRdehjqvy/DLEtao0LGPiajuM4Ag9/uglbdA9x6/5uJWYCenzKKIdUShD5ZRjYOf9yPOGyLPD X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(39860400002)(396003)(136003)(346002)(376002)(451199018)(36840700001)(46966006)(40470700004)(82310400005)(36756003)(86362001)(16526019)(186003)(41300700001)(1076003)(26005)(5660300002)(40460700003)(7416002)(336012)(4326008)(2616005)(8936002)(316002)(7696005)(110136005)(478600001)(54906003)(70586007)(8676002)(6666004)(70206006)(40480700001)(81166007)(82740400003)(921005)(356005)(2906002)(47076005)(426003)(36860700001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2023 09:23:21.3973 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cc7f3646-c4a3-4231-417c-08db22db6c70 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT082.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5351 From: "Dr. David Alan Gilbert" Define a new capability type 'VIRTIO_PCI_CAP_SHARED_MEMORY_CFG' to allow defining shared memory regions with sizes and offsets of 2^32 and more. Multiple instances of the capability are allowed and distinguished by a device-specific 'id'. Signed-off-by: Dr. David Alan Gilbert Signed-off-by: Antonio Caggiano --- hw/virtio/virtio-pci.c | 18 ++++++++++++++++++ include/hw/virtio/virtio-pci.h | 4 ++++ 2 files changed, 22 insertions(+) diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index a1c9dfa7bb..ae4c29cb96 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -1191,6 +1191,24 @@ static int virtio_pci_add_mem_cap(VirtIOPCIProxy *proxy, return offset; } +int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy, + uint8_t bar, uint64_t offset, uint64_t length, + uint8_t id) +{ + struct virtio_pci_cap64 cap = { + .cap.cap_len = sizeof cap, + .cap.cfg_type = VIRTIO_PCI_CAP_SHARED_MEMORY_CFG, + }; + + cap.cap.bar = bar; + cap.cap.length = cpu_to_le32(length); + cap.length_hi = cpu_to_le32(length >> 32); + cap.cap.offset = cpu_to_le32(offset); + cap.offset_hi = cpu_to_le32(offset >> 32); + cap.cap.id = id; + return virtio_pci_add_mem_cap(proxy, &cap.cap); +} + static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr, unsigned size) { diff --git a/include/hw/virtio/virtio-pci.h b/include/hw/virtio/virtio-pci.h index 938799e8f6..e67fe422a1 100644 --- a/include/hw/virtio/virtio-pci.h +++ b/include/hw/virtio/virtio-pci.h @@ -257,4 +257,8 @@ void virtio_pci_types_register(const VirtioPCIDeviceTypeInfo *t); */ unsigned virtio_pci_optimal_num_queues(unsigned fixed_queues); +int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy, + uint8_t bar, uint64_t offset, uint64_t length, + uint8_t id); + #endif From patchwork Sun Mar 12 09:22:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huang Rui X-Patchwork-Id: 13171161 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4C512C6FD1C for ; Sun, 12 Mar 2023 09:23:41 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.508899.783841 (Exim 4.92) (envelope-from ) id 1pbHvS-0000jh-Qs; Sun, 12 Mar 2023 09:23:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 508899.783841; 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Tsirkin" , Stefano Stabellini , Anthony PERARD , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Jan Beulich , Antonio Caggiano , "Dr . David Alan Gilbert" , Robert Beckett , , CC: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , "Stewart Hildebrand" , Xenia Ragiadakou , Honglei Huang , Julia Zhang , Chen Jiqian Subject: [RFC QEMU PATCH 02/18] virtio-gpu: hostmem Date: Sun, 12 Mar 2023 17:22:28 +0800 Message-ID: <20230312092244.451465-3-ray.huang@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230312092244.451465-1-ray.huang@amd.com> References: <20230312092244.451465-1-ray.huang@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT063:EE_|DS0PR12MB8219:EE_ X-MS-Office365-Filtering-Correlation-Id: 982555ee-d6fd-4a67-7bf1-08db22db6f35 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 0DfCFFUbyGy/IsPKOs1mMuIzWpTSmCFizswGW9SJonB7qeclKPZvD+kSKSe9F0hIVxIr4/ScKZpy1nfkMdPG06YlRNluxaAuHQlak/XZdUgG6h+bmVbimIMN/m0YEkOlRdr/rnNphOB9M9MK+Hqa2OffVhNS8RPxtwUBotS6yrfyTc2BIUbvLLmXR8xamLYdRLcK1aGU61qZugAceSOd8UQp2eQ0fkuUUBEwFeqW/XW7NtVok9GtdfzHJK4Ld2ul3lz9H1C1eBuTGq9c1KVSkZGiWF8VUeIAdT9ewCO4g0h2KxFWqvCUNdy0IiMHlJgA2RN8DhMZ3haG06h0Z5FYaykCarwdioWFqfwBjXAIpf8m3/f8BdjwWWojvhAvBxjTxIjQzqjro8RksIAQVRPykKzGNVWlnwzXL1oOsY7NBly05JIsu2/pHtQbznD85lgUOASgmH+O+6L5XDXkbTxpwEnrc2g0sSzAuGyxkd3Tb3Hfx0yeMln0EZfN6yFMbquyVCzF4UgEIHgmh7wRhH45dQwxuDhgJNl8O2XMBsshZQ2Op7w8fb9Mu3YfK6InHH3TMHXIy/gmqCiizUWKOI8VNIoLFeq92KIprPEPwL5w739KIW1Gj6YdD9xG95JG6liQSXvVAsYKcqSP/VyydLKFcvrzTnLyeS0V2rS+guSGCTaJe+4fdW/ENQfTN2NR9LvzlAnSgSq2BcCe49P/9PcJTkRP8gfED5BHCdnKcqUgUhqPwQb9UEUZ3PiEigHse2uh X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(39860400002)(396003)(136003)(346002)(376002)(451199018)(36840700001)(46966006)(40470700004)(82310400005)(36756003)(86362001)(16526019)(186003)(41300700001)(1076003)(26005)(5660300002)(40460700003)(7416002)(336012)(4326008)(2616005)(8936002)(316002)(7696005)(110136005)(478600001)(54906003)(70586007)(8676002)(70206006)(40480700001)(81166007)(82740400003)(921005)(356005)(2906002)(83380400001)(47076005)(426003)(36860700001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2023 09:23:26.0609 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 982555ee-d6fd-4a67-7bf1-08db22db6f35 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT063.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8219 From: Gerd Hoffmann Use VIRTIO_GPU_SHM_ID_HOST_VISIBLE as id for virtio-gpu. Signed-off-by: Antonio Caggiano Acked-by: Michael S. Tsirkin --- hw/display/virtio-gpu-pci.c | 14 ++++++++++++++ hw/display/virtio-gpu.c | 1 + hw/display/virtio-vga.c | 33 ++++++++++++++++++++++++--------- include/hw/virtio/virtio-gpu.h | 5 +++++ 4 files changed, 44 insertions(+), 9 deletions(-) diff --git a/hw/display/virtio-gpu-pci.c b/hw/display/virtio-gpu-pci.c index 93f214ff58..da6a99f038 100644 --- a/hw/display/virtio-gpu-pci.c +++ b/hw/display/virtio-gpu-pci.c @@ -33,6 +33,20 @@ static void virtio_gpu_pci_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp) DeviceState *vdev = DEVICE(g); int i; + if (virtio_gpu_hostmem_enabled(g->conf)) { + vpci_dev->msix_bar_idx = 1; + vpci_dev->modern_mem_bar_idx = 2; + memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem", + g->conf.hostmem); + pci_register_bar(&vpci_dev->pci_dev, 4, + PCI_BASE_ADDRESS_SPACE_MEMORY | + PCI_BASE_ADDRESS_MEM_PREFETCH | + PCI_BASE_ADDRESS_MEM_TYPE_64, + &g->hostmem); + virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, + VIRTIO_GPU_SHM_ID_HOST_VISIBLE); + } + virtio_pci_force_virtio_1(vpci_dev); if (!qdev_realize(vdev, BUS(&vpci_dev->bus), errp)) { return; diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index 5e15c79b94..7b592f998d 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -1425,6 +1425,7 @@ static Property virtio_gpu_properties[] = { 256 * MiB), DEFINE_PROP_BIT("blob", VirtIOGPU, parent_obj.conf.flags, VIRTIO_GPU_FLAG_BLOB_ENABLED, false), + DEFINE_PROP_SIZE("hostmem", VirtIOGPU, parent_obj.conf.hostmem, 0), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c index 4dcb34c4a7..aa8d1ab993 100644 --- a/hw/display/virtio-vga.c +++ b/hw/display/virtio-vga.c @@ -115,17 +115,32 @@ static void virtio_vga_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp) pci_register_bar(&vpci_dev->pci_dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram); - /* - * Configure virtio bar and regions - * - * We use bar #2 for the mmio regions, to be compatible with stdvga. - * virtio regions are moved to the end of bar #2, to make room for - * the stdvga mmio registers at the start of bar #2. - */ - vpci_dev->modern_mem_bar_idx = 2; - vpci_dev->msix_bar_idx = 4; vpci_dev->modern_io_bar_idx = 5; + if (!virtio_gpu_hostmem_enabled(g->conf)) { + /* + * Configure virtio bar and regions + * + * We use bar #2 for the mmio regions, to be compatible with stdvga. + * virtio regions are moved to the end of bar #2, to make room for + * the stdvga mmio registers at the start of bar #2. + */ + vpci_dev->modern_mem_bar_idx = 2; + vpci_dev->msix_bar_idx = 4; + } else { + vpci_dev->msix_bar_idx = 1; + vpci_dev->modern_mem_bar_idx = 2; + memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem", + g->conf.hostmem); + pci_register_bar(&vpci_dev->pci_dev, 4, + PCI_BASE_ADDRESS_SPACE_MEMORY | + PCI_BASE_ADDRESS_MEM_PREFETCH | + PCI_BASE_ADDRESS_MEM_TYPE_64, + &g->hostmem); + virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, + VIRTIO_GPU_SHM_ID_HOST_VISIBLE); + } + if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) { /* * with page-per-vq=off there is no padding space we can use diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index 2e28507efe..eafce75b04 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -102,12 +102,15 @@ enum virtio_gpu_base_conf_flags { (_cfg.flags & (1 << VIRTIO_GPU_FLAG_DMABUF_ENABLED)) #define virtio_gpu_blob_enabled(_cfg) \ (_cfg.flags & (1 << VIRTIO_GPU_FLAG_BLOB_ENABLED)) +#define virtio_gpu_hostmem_enabled(_cfg) \ + (_cfg.hostmem > 0) struct virtio_gpu_base_conf { uint32_t max_outputs; uint32_t flags; uint32_t xres; uint32_t yres; + uint64_t hostmem; }; struct virtio_gpu_ctrl_command { @@ -131,6 +134,8 @@ struct VirtIOGPUBase { int renderer_blocked; int enable; + MemoryRegion hostmem; + struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS]; int enabled_output_bitmask; From patchwork Sun Mar 12 09:22:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huang Rui X-Patchwork-Id: 13171162 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 16A71C6FD1C for ; Sun, 12 Mar 2023 09:23:47 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.508901.783851 (Exim 4.92) (envelope-from ) id 1pbHvY-00017m-4r; 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mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=redhat.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Yo3LTX71PNs2g4NoqoVbLWjlsvWLNAFtBIZSAhB5XKo=; b=ZKmGPu0woYvxIOIyiY1j9YqqCVabqBeoCfEEZxvc0tQ6XFha1pt3ltkAQim6b4E3z8rVZn9FO0fl2Qp6KoeuAvGUYZrk+8QcJVznYC/qcCe6Esb9hNjV+coib8zzmWhCNSvBCfHxB6XxlqyRsFauMiVzNHXd17gh+DmLySuFtRs= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C From: Huang Rui To: Gerd Hoffmann , "Michael S . Tsirkin" , Stefano Stabellini , Anthony PERARD , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Jan Beulich , Antonio Caggiano , "Dr . David Alan Gilbert" , Robert Beckett , , CC: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , "Stewart Hildebrand" , Xenia Ragiadakou , Honglei Huang , Julia Zhang , Chen Jiqian , Dmitry Osipenko Subject: [RFC QEMU PATCH 03/18] virtio-gpu: Handle resource blob commands Date: Sun, 12 Mar 2023 17:22:29 +0800 Message-ID: <20230312092244.451465-4-ray.huang@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230312092244.451465-1-ray.huang@amd.com> References: <20230312092244.451465-1-ray.huang@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT099:EE_|SN7PR12MB7227:EE_ X-MS-Office365-Filtering-Correlation-Id: 325f08db-a2cc-466a-dc1a-08db22db71d3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: FdwlsG44QQd8owXN6r45o50t0XDMPHyPVKdphTbIcE9JOkJkPSUm9mHn3nkCLDSNYU80tdTNe1KC40wHo29H/kwTTD+Jy36dN6UfN8PhQpAJ18dsKuPNpZyEF0/lXDwQkKs7FqTfQLPD5nzF+s6M7SSo1AEdiHY14WK9cEYhNRnHDxHqHETddLK+2ykMXqxWCeFI+PmIYaoaKilT25odk1KA6UelGkKxlhUQbI2e6plW4VXLj/lO0iKMCDSqQPt4q/sSkNIO21GUyYj1JbKkGOldOmwaE6tsxgOjFSgEcjY1nBZUML2xC68xnqpI93UEWEI/0+7Ptl+S7EYvs+bPmXJEFG2AkqhSH4iXDt9/xQNG29fp6SOcZ2fITHFJWGN4HJbltABhemJNmJ7exk4T0iJh9tGSGB0UgErryWdPd1wte6sO9RlUfSSWPTzi5z6/NQxaswSbIKc1Gqw1bgx2jrTPPgKpyCai6CcgrLlpCxJ0KvrotxPOf54wpIOExdEGyYojkhSNMRcFfJfcJuN8pTzRPgZce+vlIrMlgXxXD6+HVEfpP98/mBsB8f37YjrKpFSItUTrSr70WKa/kbQrWwsCQ8PcYf497PyAJZxtzNzC4qFNufuqgUMXoPeNZlmbBkbu5hbcTiOiUbm2MYQsmDYwZnI2tC/QDuQdXwZ1D5sAlqqBj/PzMlZgbKBfwxMsayDWTysPIrhLkO4bH1H6dUR6x5CbvyDOC38WRemfhkqVVjqHGHqU5BHJXB+CkxxY X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(376002)(39860400002)(346002)(396003)(136003)(451199018)(46966006)(40470700004)(36840700001)(186003)(356005)(921005)(2906002)(82740400003)(16526019)(2616005)(30864003)(26005)(1076003)(81166007)(5660300002)(8936002)(36860700001)(7416002)(336012)(47076005)(41300700001)(426003)(40460700003)(86362001)(4326008)(40480700001)(8676002)(70586007)(70206006)(82310400005)(7696005)(316002)(83380400001)(36756003)(478600001)(54906003)(110136005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2023 09:23:30.4543 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 325f08db-a2cc-466a-dc1a-08db22db71d3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT099.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7227 From: Antonio Caggiano Support BLOB resources creation, mapping and unmapping by calling the new stable virglrenderer 0.10 interface. Only enabled when available and via the blob config. E.g. -device virtio-vga-gl,blob=true Signed-off-by: Antonio Caggiano Signed-off-by: Dmitry Osipenko --- hw/display/virtio-gpu-virgl.c | 168 +++++++++++++++++++++++++++ hw/display/virtio-gpu.c | 12 +- include/hw/virtio/virtio-gpu-bswap.h | 18 +++ include/hw/virtio/virtio-gpu.h | 8 ++ meson.build | 4 + 5 files changed, 206 insertions(+), 4 deletions(-) diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c index 73cb92c8d5..9b5e3dc782 100644 --- a/hw/display/virtio-gpu-virgl.c +++ b/hw/display/virtio-gpu-virgl.c @@ -16,6 +16,8 @@ #include "trace.h" #include "hw/virtio/virtio.h" #include "hw/virtio/virtio-gpu.h" +#include "hw/virtio/virtio-gpu-bswap.h" +#include "hw/virtio/virtio-iommu.h" #include @@ -398,6 +400,161 @@ static void virgl_cmd_get_capset(VirtIOGPU *g, g_free(resp); } +#ifdef HAVE_VIRGL_RESOURCE_BLOB + +static void virgl_cmd_resource_create_blob(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cmd) +{ + struct virtio_gpu_simple_resource *res; + struct virtio_gpu_resource_create_blob cblob; + int ret; + + VIRTIO_GPU_FILL_CMD(cblob); + virtio_gpu_create_blob_bswap(&cblob); + trace_virtio_gpu_cmd_res_create_blob(cblob.resource_id, cblob.size); + + if (cblob.resource_id == 0) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: resource id 0 is not allowed\n", + __func__); + cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; + return; + } + + res = virtio_gpu_find_resource(g, cblob.resource_id); + if (res) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: resource already exists %d\n", + __func__, cblob.resource_id); + cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; + return; + } + + res = g_new0(struct virtio_gpu_simple_resource, 1); + QTAILQ_INSERT_HEAD(&g->reslist, res, next); + + res->resource_id = cblob.resource_id; + res->blob_size = cblob.size; + + if (cblob.blob_mem != VIRTIO_GPU_BLOB_MEM_HOST3D) { + ret = virtio_gpu_create_mapping_iov(g, cblob.nr_entries, sizeof(cblob), + cmd, &res->addrs, &res->iov, + &res->iov_cnt); + if (ret != 0) { + cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC; + return; + } + } + + if (cblob.blob_mem == VIRTIO_GPU_BLOB_MEM_GUEST) { + virtio_gpu_init_udmabuf(res); + } + const struct virgl_renderer_resource_create_blob_args virgl_args = { + .res_handle = cblob.resource_id, + .ctx_id = cblob.hdr.ctx_id, + .blob_mem = cblob.blob_mem, + .blob_id = cblob.blob_id, + .blob_flags = cblob.blob_flags, + .size = cblob.size, + .iovecs = res->iov, + .num_iovs = res->iov_cnt, + }; + ret = virgl_renderer_resource_create_blob(&virgl_args); + if (ret) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: virgl blob create error: %s\n", + __func__, strerror(-ret)); + cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC; + } +} + +static void virgl_cmd_resource_map_blob(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cmd) +{ + struct virtio_gpu_simple_resource *res; + struct virtio_gpu_resource_map_blob mblob; + int ret; + uint64_t size; + struct virtio_gpu_resp_map_info resp; + + VIRTIO_GPU_FILL_CMD(mblob); + virtio_gpu_map_blob_bswap(&mblob); + + if (mblob.resource_id == 0) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: resource id 0 is not allowed\n", + __func__); + cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; + return; + } + + res = virtio_gpu_find_resource(g, mblob.resource_id); + if (!res) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: resource does not exist %d\n", + __func__, mblob.resource_id); + cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; + return; + } + + ret = virgl_renderer_resource_map(res->resource_id, &res->mapped, &size); + if (ret) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: resource map error: %s\n", + __func__, strerror(-ret)); + cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; + return; + } + + memory_region_init_ram_device_ptr(&res->region, OBJECT(g), NULL, size, res->mapped); + memory_region_add_subregion(&g->parent_obj.hostmem, mblob.offset, &res->region); + memory_region_set_enabled(&res->region, true); + + memset(&resp, 0, sizeof(resp)); + resp.hdr.type = VIRTIO_GPU_RESP_OK_MAP_INFO; + virgl_renderer_resource_get_map_info(mblob.resource_id, &resp.map_info); + virtio_gpu_ctrl_response(g, cmd, &resp.hdr, sizeof(resp)); +} + +int virtio_gpu_virgl_resource_unmap(VirtIOGPU *g, + struct virtio_gpu_simple_resource *res) +{ + if (!res->mapped) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: resource already unmapped %d\n", + __func__, res->resource_id); + return VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; + } + + memory_region_set_enabled(&res->region, false); + memory_region_del_subregion(&g->parent_obj.hostmem, &res->region); + object_unparent(OBJECT(&res->region)); + + res->mapped = NULL; + return virgl_renderer_resource_unmap(res->resource_id); +} + +static void virgl_cmd_resource_unmap_blob(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cmd) +{ + struct virtio_gpu_simple_resource *res; + struct virtio_gpu_resource_unmap_blob ublob; + VIRTIO_GPU_FILL_CMD(ublob); + virtio_gpu_unmap_blob_bswap(&ublob); + + if (ublob.resource_id == 0) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: resource id 0 is not allowed\n", + __func__); + cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; + return; + } + + res = virtio_gpu_find_resource(g, ublob.resource_id); + if (!res) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: resource does not exist %d\n", + __func__, ublob.resource_id); + cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; + return; + } + + virtio_gpu_virgl_resource_unmap(g, res); +} + +#endif /* HAVE_VIRGL_RESOURCE_BLOB */ + void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd) { @@ -464,6 +621,17 @@ void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, case VIRTIO_GPU_CMD_GET_EDID: virtio_gpu_get_edid(g, cmd); break; +#ifdef HAVE_VIRGL_RESOURCE_BLOB + case VIRTIO_GPU_CMD_RESOURCE_CREATE_BLOB: + virgl_cmd_resource_create_blob(g, cmd); + break; + case VIRTIO_GPU_CMD_RESOURCE_MAP_BLOB: + virgl_cmd_resource_map_blob(g, cmd); + break; + case VIRTIO_GPU_CMD_RESOURCE_UNMAP_BLOB: + virgl_cmd_resource_unmap_blob(g, cmd); + break; +#endif /* HAVE_VIRGL_RESOURCE_BLOB */ default: cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC; break; diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index 7b592f998d..95d1347a2e 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -33,8 +33,6 @@ #define VIRTIO_GPU_VM_VERSION 1 -static struct virtio_gpu_simple_resource* -virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id); static struct virtio_gpu_simple_resource * virtio_gpu_find_check_resource(VirtIOGPU *g, uint32_t resource_id, bool require_backing, @@ -115,7 +113,7 @@ static void update_cursor(VirtIOGPU *g, struct virtio_gpu_update_cursor *cursor) cursor->resource_id ? 1 : 0); } -static struct virtio_gpu_simple_resource * +struct virtio_gpu_simple_resource * virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id) { struct virtio_gpu_simple_resource *res; @@ -875,6 +873,10 @@ void virtio_gpu_cleanup_mapping_iov(VirtIOGPU *g, static void virtio_gpu_cleanup_mapping(VirtIOGPU *g, struct virtio_gpu_simple_resource *res) { + if (res->mapped) { + virtio_gpu_virgl_resource_unmap(g, res); + } + virtio_gpu_cleanup_mapping_iov(g, res->iov, res->iov_cnt); res->iov = NULL; res->iov_cnt = 0; @@ -1324,10 +1326,12 @@ void virtio_gpu_device_realize(DeviceState *qdev, Error **errp) return; } +#ifndef HAVE_VIRGL_RESOURCE_BLOB if (virtio_gpu_virgl_enabled(g->parent_obj.conf)) { - error_setg(errp, "blobs and virgl are not compatible (yet)"); + error_setg(errp, "Linked virglrenderer does not support blob resources"); return; } +#endif } if (!virtio_gpu_base_device_realize(qdev, diff --git a/include/hw/virtio/virtio-gpu-bswap.h b/include/hw/virtio/virtio-gpu-bswap.h index 9124108485..dd1975e2d4 100644 --- a/include/hw/virtio/virtio-gpu-bswap.h +++ b/include/hw/virtio/virtio-gpu-bswap.h @@ -63,10 +63,28 @@ virtio_gpu_create_blob_bswap(struct virtio_gpu_resource_create_blob *cblob) { virtio_gpu_ctrl_hdr_bswap(&cblob->hdr); le32_to_cpus(&cblob->resource_id); + le32_to_cpus(&cblob->blob_mem); le32_to_cpus(&cblob->blob_flags); + le32_to_cpus(&cblob->nr_entries); + le64_to_cpus(&cblob->blob_id); le64_to_cpus(&cblob->size); } +static inline void +virtio_gpu_map_blob_bswap(struct virtio_gpu_resource_map_blob *mblob) +{ + virtio_gpu_ctrl_hdr_bswap(&mblob->hdr); + le32_to_cpus(&mblob->resource_id); + le64_to_cpus(&mblob->offset); +} + +static inline void +virtio_gpu_unmap_blob_bswap(struct virtio_gpu_resource_unmap_blob *ublob) +{ + virtio_gpu_ctrl_hdr_bswap(&ublob->hdr); + le32_to_cpus(&ublob->resource_id); +} + static inline void virtio_gpu_scanout_blob_bswap(struct virtio_gpu_set_scanout_blob *ssb) { diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index eafce75b04..caca834680 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -55,6 +55,9 @@ struct virtio_gpu_simple_resource { int dmabuf_fd; uint8_t *remapped; + MemoryRegion region; + void *mapped; + QTAILQ_ENTRY(virtio_gpu_simple_resource) next; }; @@ -245,6 +248,9 @@ void virtio_gpu_base_fill_display_info(VirtIOGPUBase *g, struct virtio_gpu_resp_display_info *dpy_info); /* virtio-gpu.c */ +struct virtio_gpu_simple_resource * +virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id); + void virtio_gpu_ctrl_response(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd, struct virtio_gpu_ctrl_hdr *resp, @@ -289,5 +295,7 @@ void virtio_gpu_virgl_reset_scanout(VirtIOGPU *g); void virtio_gpu_virgl_reset(VirtIOGPU *g); int virtio_gpu_virgl_init(VirtIOGPU *g); int virtio_gpu_virgl_get_num_capsets(VirtIOGPU *g); +int virtio_gpu_virgl_resource_unmap(VirtIOGPU *g, + struct virtio_gpu_simple_resource *res); #endif diff --git a/meson.build b/meson.build index 5c6b5a1c75..be74b653b6 100644 --- a/meson.build +++ b/meson.build @@ -774,6 +774,10 @@ if not get_option('virglrenderer').auto() or have_system or have_vhost_user_gpu method: 'pkg-config', required: get_option('virglrenderer'), kwargs: static_kwargs) + config_host_data.set('HAVE_VIRGL_RESOURCE_BLOB', + cc.has_function('virgl_renderer_resource_create_blob', + prefix: '#include ', + dependencies: virgl)) endif blkio = not_found if not get_option('blkio').auto() or have_block From patchwork Sun Mar 12 09:22:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Huang Rui X-Patchwork-Id: 13171163 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 93BC1C6FD1C for ; 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Tsirkin" , Stefano Stabellini , Anthony PERARD , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Jan Beulich , Antonio Caggiano , "Dr . David Alan Gilbert" , Robert Beckett , , CC: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , "Stewart Hildebrand" , Xenia Ragiadakou , Honglei Huang , Julia Zhang , Chen Jiqian , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= Subject: [RFC QEMU PATCH 04/18] virtio-gpu: CONTEXT_INIT feature Date: Sun, 12 Mar 2023 17:22:30 +0800 Message-ID: <20230312092244.451465-5-ray.huang@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230312092244.451465-1-ray.huang@amd.com> References: <20230312092244.451465-1-ray.huang@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT090:EE_|CH0PR12MB5041:EE_ X-MS-Office365-Filtering-Correlation-Id: 9e86e931-b5bb-4f89-eda1-08db22db748e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: af0y3k6r8CX7j/uC1tgO1mOAYWCGr+eBir7gGr2nojwxGwQF+DdPN0fgz2aXpWszK8muho3nkqJlLVmdInM6c5ge0fVb5S7I8FNubJABRhAGpFokl8sF+YjF1ZJ+ailH3xwK+X5h7aOTAmS7VUnYjhDimr9XI/GR4hyEcdYtls79gokxtiSULg0Q381e1r/G4WXNMaeOyVph9etToZmalPgs0DMYu72kDI2NLft2mSEm/xqA7W99eQ7aINbOaDEbCUT2lsNKTj97wN8tSZnPN057GUXbILGeFDC7FH/xefBlmbkfHlrJx+i3yzjHWUFGeRtd5W2pi5PYDqJmumY2GnrwNC/75942NXBITh0zSG4I0B3sOumV8WYTEoHHu+XW2SAvAp+GJAM8cRbIJHHa1yRZjstjBr60qH0GcfQHoBZn+gZAPfCXh3xAJrIsCFtsMw62xjVKLjoK1GaKRm8k1SvvjPXVjBT+WdhmITbTeYM9eoLfk1hIb1aaUvUMQzNZTiyDroKCwlsSt7y2Z40WDf2CUt4VGVCmNLFB6cuevzjdJG4kJ+T+9SCs4GUZjoLT1dCbxdBLcSEziX/FcVZugFbfcD91WfoQYNY6YgWcutXg7egU91gTablzv7S+w7y2ZwBkKFr1JwNEFlAan6f8F/Hi5BUusL8fD1xTXAxUbDkm8P6Opovqo7pw5TlXW6IxQozxh3mXnle2rW2jeyKt+H31uxmaW5PMjNyliKcVv2JvYemjzZvCImjX7ZwALHmO X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(136003)(346002)(376002)(39860400002)(396003)(451199018)(36840700001)(46966006)(40470700004)(40460700003)(110136005)(54906003)(41300700001)(8936002)(478600001)(4326008)(8676002)(70586007)(70206006)(36756003)(82310400005)(921005)(356005)(86362001)(40480700001)(36860700001)(82740400003)(81166007)(26005)(1076003)(7696005)(6666004)(186003)(16526019)(5660300002)(7416002)(2906002)(316002)(83380400001)(47076005)(336012)(426003)(2616005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2023 09:23:35.0200 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9e86e931-b5bb-4f89-eda1-08db22db748e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT090.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH0PR12MB5041 From: Antonio Caggiano Create virgl renderer context with flags using context_id when valid. The feature can be enabled via the context_init config option. A warning message will be emitted and the feature will not be used when linking with virglrenderer versions without context_init support. Signed-off-by: Antonio Caggiano Reviewed-by: Marc-André Lureau --- hw/display/virtio-gpu-base.c | 3 +++ hw/display/virtio-gpu-virgl.c | 16 ++++++++++++++-- hw/display/virtio-gpu.c | 2 ++ include/hw/virtio/virtio-gpu.h | 3 +++ meson.build | 4 ++++ 5 files changed, 26 insertions(+), 2 deletions(-) diff --git a/hw/display/virtio-gpu-base.c b/hw/display/virtio-gpu-base.c index a29f191aa8..6c5f1f327f 100644 --- a/hw/display/virtio-gpu-base.c +++ b/hw/display/virtio-gpu-base.c @@ -215,6 +215,9 @@ virtio_gpu_base_get_features(VirtIODevice *vdev, uint64_t features, if (virtio_gpu_blob_enabled(g->conf)) { features |= (1 << VIRTIO_GPU_F_RESOURCE_BLOB); } + if (virtio_gpu_context_init_enabled(g->conf)) { + features |= (1 << VIRTIO_GPU_F_CONTEXT_INIT); + } return features; } diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c index 9b5e3dc782..41712b79ee 100644 --- a/hw/display/virtio-gpu-virgl.c +++ b/hw/display/virtio-gpu-virgl.c @@ -99,8 +99,20 @@ static void virgl_cmd_context_create(VirtIOGPU *g, trace_virtio_gpu_cmd_ctx_create(cc.hdr.ctx_id, cc.debug_name); - virgl_renderer_context_create(cc.hdr.ctx_id, cc.nlen, - cc.debug_name); + if (cc.context_init) { +#ifdef HAVE_VIRGL_CONTEXT_INIT + virgl_renderer_context_create_with_flags(cc.hdr.ctx_id, + cc.context_init, + cc.nlen, + cc.debug_name); + return; +#else + qemu_log_mask(LOG_UNIMP, + "Linked virglrenderer does not support context-init\n"); +#endif + } + + virgl_renderer_context_create(cc.hdr.ctx_id, cc.nlen, cc.debug_name); } static void virgl_cmd_context_destroy(VirtIOGPU *g, diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index 95d1347a2e..11f3e56013 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -1430,6 +1430,8 @@ static Property virtio_gpu_properties[] = { DEFINE_PROP_BIT("blob", VirtIOGPU, parent_obj.conf.flags, VIRTIO_GPU_FLAG_BLOB_ENABLED, false), DEFINE_PROP_SIZE("hostmem", VirtIOGPU, parent_obj.conf.hostmem, 0), + DEFINE_PROP_BIT("context_init", VirtIOGPU, parent_obj.conf.flags, + VIRTIO_GPU_FLAG_CONTEXT_INIT_ENABLED, false), DEFINE_PROP_END_OF_LIST(), }; diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index caca834680..d1ae97153f 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -93,6 +93,7 @@ enum virtio_gpu_base_conf_flags { VIRTIO_GPU_FLAG_EDID_ENABLED, VIRTIO_GPU_FLAG_DMABUF_ENABLED, VIRTIO_GPU_FLAG_BLOB_ENABLED, + VIRTIO_GPU_FLAG_CONTEXT_INIT_ENABLED, }; #define virtio_gpu_virgl_enabled(_cfg) \ @@ -107,6 +108,8 @@ enum virtio_gpu_base_conf_flags { (_cfg.flags & (1 << VIRTIO_GPU_FLAG_BLOB_ENABLED)) #define virtio_gpu_hostmem_enabled(_cfg) \ (_cfg.hostmem > 0) +#define virtio_gpu_context_init_enabled(_cfg) \ + (_cfg.flags & (1 << VIRTIO_GPU_FLAG_CONTEXT_INIT_ENABLED)) struct virtio_gpu_base_conf { uint32_t max_outputs; diff --git a/meson.build b/meson.build index be74b653b6..826b3473c4 100644 --- a/meson.build +++ b/meson.build @@ -778,6 +778,10 @@ if not get_option('virglrenderer').auto() or have_system or have_vhost_user_gpu cc.has_function('virgl_renderer_resource_create_blob', prefix: '#include ', dependencies: virgl)) + config_host_data.set('HAVE_VIRGL_CONTEXT_INIT', + cc.has_function('virgl_renderer_context_create_with_flags', + prefix: '#include ', + dependencies: virgl)) endif blkio = not_found if not get_option('blkio').auto() or have_block From patchwork Sun Mar 12 09:22:31 2023 Content-Type: text/plain; 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Tsirkin" , Stefano Stabellini , Anthony PERARD , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Jan Beulich , Antonio Caggiano , "Dr . David Alan Gilbert" , Robert Beckett , , CC: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , "Stewart Hildebrand" , Xenia Ragiadakou , Honglei Huang , Julia Zhang , Chen Jiqian Subject: [RFC QEMU PATCH 05/18] virtio-gpu: Unrealize Date: Sun, 12 Mar 2023 17:22:31 +0800 Message-ID: <20230312092244.451465-6-ray.huang@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230312092244.451465-1-ray.huang@amd.com> References: <20230312092244.451465-1-ray.huang@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT005:EE_|PH0PR12MB7469:EE_ X-MS-Office365-Filtering-Correlation-Id: a6d6344b-0d60-4e24-1762-08db22db772d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: +DXJ5B3oGAwQyhKdNp79mAO31SH9seTUCYvoi0kV+PfBZ/x9JWBT7m09Y6BaV0Zt9pp60RROleYql8AIARtX1V2QTpXmUIAYicDd7pzJyEwl+xibof1kiQENsOH1G9FtL2HVX72uHaiBwYGRTQ+nAwJIaaGdx3bbnXDNRZWi/tZUJe3GDLvWg2vP0YJAlOryZ4buvtHMHOuXm7rtxRhESHzn+U0zqmFnJEsvpzPjqXH4kKpgOgT1GIl80yGG5oL4+DLQ5pO6Ipe8OS/qLLQ+DX5/4Eot1fzr7y810aCyhqAX7rmaFfUYWMtSa1vVFD9+EUwObTk0kXt1FTlAMFwR0lEqhrWcAEAryBSIqOoEybKXi0kZ4ZURBjurK25zhB0jczgGR7B9SdPeZf1Qgj+VJOfQGx1FvmRlcQ7AWYNES9Ctw1R8gM9oDczNMLVYEgYf1VAZBjSGHq1f4qb/xkvk4YZc65LT28bsmrp+41Ml8rvhf3LmX5yDl2+87+dn6R9HBd9OfKCabUBWWf+3+RZ4SrvhzOX7F/niiLdNoKE4N9+nHWggO2CMFw7lwMJ1m7vp2tyEoBH8skl+DSEWjTkMMe3vP7yyOma4v+apJZktGCRF6lPiV5MiWFv9784SUtoOBQveoeqlMkFeqzPeTJTXHowZ/mPupzpTJWg06cXUb0uEEAtZIoPzcfWDFgi3gFe4ssimJofU2D+25qe3ElFS7T3Hln5/ChnT6HeAawbmziKHqbMUqOfmNRGLQCACe77r X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(136003)(396003)(39860400002)(376002)(346002)(451199018)(46966006)(36840700001)(40470700004)(6666004)(7696005)(83380400001)(110136005)(82740400003)(316002)(81166007)(478600001)(36860700001)(54906003)(82310400005)(16526019)(186003)(8936002)(40480700001)(40460700003)(26005)(1076003)(36756003)(5660300002)(7416002)(921005)(356005)(47076005)(8676002)(4326008)(336012)(426003)(70206006)(70586007)(41300700001)(86362001)(2616005)(2906002)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2023 09:23:39.4120 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a6d6344b-0d60-4e24-1762-08db22db772d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT005.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB7469 From: Antonio Caggiano Implement an unrealize function for virtio gpu device. Signed-off-by: Antonio Caggiano --- hw/display/virtio-gpu-base.c | 2 +- hw/display/virtio-gpu.c | 11 +++++++++++ include/hw/virtio/virtio-gpu.h | 1 + 3 files changed, 13 insertions(+), 1 deletion(-) diff --git a/hw/display/virtio-gpu-base.c b/hw/display/virtio-gpu-base.c index 6c5f1f327f..5cb71e71ad 100644 --- a/hw/display/virtio-gpu-base.c +++ b/hw/display/virtio-gpu-base.c @@ -230,7 +230,7 @@ virtio_gpu_base_set_features(VirtIODevice *vdev, uint64_t features) trace_virtio_gpu_features(((features & virgl) == virgl)); } -static void +void virtio_gpu_base_device_unrealize(DeviceState *qdev) { VirtIOGPUBase *g = VIRTIO_GPU_BASE(qdev); diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index 11f3e56013..62239dee0f 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -1350,6 +1350,16 @@ void virtio_gpu_device_realize(DeviceState *qdev, Error **errp) QTAILQ_INIT(&g->fenceq); } +static void virtio_gpu_device_unrealize(DeviceState *qdev) +{ + VirtIOGPU *g = VIRTIO_GPU(qdev); + + qemu_bh_delete(g->cursor_bh); + qemu_bh_delete(g->ctrl_bh); + + virtio_gpu_base_device_unrealize(qdev); +} + void virtio_gpu_reset(VirtIODevice *vdev) { VirtIOGPU *g = VIRTIO_GPU(vdev); @@ -1448,6 +1458,7 @@ static void virtio_gpu_class_init(ObjectClass *klass, void *data) vgbc->gl_flushed = virtio_gpu_handle_gl_flushed; vdc->realize = virtio_gpu_device_realize; + vdc->unrealize = virtio_gpu_device_unrealize; vdc->reset = virtio_gpu_reset; vdc->get_config = virtio_gpu_get_config; vdc->set_config = virtio_gpu_set_config; diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index d1ae97153f..ef02190f97 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -246,6 +246,7 @@ bool virtio_gpu_base_device_realize(DeviceState *qdev, VirtIOHandleOutput ctrl_cb, VirtIOHandleOutput cursor_cb, Error **errp); +void virtio_gpu_base_device_unrealize(DeviceState *qdev); void virtio_gpu_base_reset(VirtIOGPUBase *g); void virtio_gpu_base_fill_display_info(VirtIOGPUBase *g, struct virtio_gpu_resp_display_info *dpy_info); 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Tsirkin" , Stefano Stabellini , Anthony PERARD , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Jan Beulich , Antonio Caggiano , "Dr . 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This is done by introducing a hash table to map resource IDs to their UUIDs. Signed-off-by: Antonio Caggiano --- hw/display/trace-events | 1 + hw/display/virtio-gpu-base.c | 2 ++ hw/display/virtio-gpu-virgl.c | 11 +++++++++ hw/display/virtio-gpu.c | 41 ++++++++++++++++++++++++++++++++++ include/hw/virtio/virtio-gpu.h | 4 ++++ 5 files changed, 59 insertions(+) diff --git a/hw/display/trace-events b/hw/display/trace-events index 0c0ffcbe42..6632344322 100644 --- a/hw/display/trace-events +++ b/hw/display/trace-events @@ -41,6 +41,7 @@ virtio_gpu_cmd_res_create_blob(uint32_t res, uint64_t size) "res 0x%x, size %" P virtio_gpu_cmd_res_unref(uint32_t res) "res 0x%x" virtio_gpu_cmd_res_back_attach(uint32_t res) "res 0x%x" virtio_gpu_cmd_res_back_detach(uint32_t res) "res 0x%x" +virtio_gpu_cmd_res_assign_uuid(uint32_t res) "res 0x%x" virtio_gpu_cmd_res_xfer_toh_2d(uint32_t res) "res 0x%x" virtio_gpu_cmd_res_xfer_toh_3d(uint32_t res) "res 0x%x" virtio_gpu_cmd_res_xfer_fromh_3d(uint32_t res) "res 0x%x" diff --git a/hw/display/virtio-gpu-base.c b/hw/display/virtio-gpu-base.c index 5cb71e71ad..54792aa501 100644 --- a/hw/display/virtio-gpu-base.c +++ b/hw/display/virtio-gpu-base.c @@ -219,6 +219,8 @@ virtio_gpu_base_get_features(VirtIODevice *vdev, uint64_t features, features |= (1 << VIRTIO_GPU_F_CONTEXT_INIT); } + features |= (1 << VIRTIO_GPU_F_RESOURCE_UUID); + return features; } diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c index 41712b79ee..a3c388f907 100644 --- a/hw/display/virtio-gpu-virgl.c +++ b/hw/display/virtio-gpu-virgl.c @@ -45,6 +45,10 @@ static void virgl_cmd_create_resource_2d(VirtIOGPU *g, args.nr_samples = 0; args.flags = VIRTIO_GPU_RESOURCE_FLAG_Y_0_TOP; virgl_renderer_resource_create(&args, NULL, 0); + + struct virtio_gpu_simple_resource *res = g_new0(struct virtio_gpu_simple_resource, 1); + res->resource_id = c2d.resource_id; + QTAILQ_INSERT_HEAD(&g->reslist, res, next); } static void virgl_cmd_create_resource_3d(VirtIOGPU *g, @@ -69,6 +73,10 @@ static void virgl_cmd_create_resource_3d(VirtIOGPU *g, args.nr_samples = c3d.nr_samples; args.flags = c3d.flags; virgl_renderer_resource_create(&args, NULL, 0); + + struct virtio_gpu_simple_resource *res = g_new0(struct virtio_gpu_simple_resource, 1); + res->resource_id = c3d.resource_id; + QTAILQ_INSERT_HEAD(&g->reslist, res, next); } static void virgl_cmd_resource_unref(VirtIOGPU *g, @@ -621,6 +629,9 @@ void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, /* TODO add security */ virgl_cmd_ctx_detach_resource(g, cmd); break; + case VIRTIO_GPU_CMD_RESOURCE_ASSIGN_UUID: + virtio_gpu_resource_assign_uuid(g, cmd); + break; case VIRTIO_GPU_CMD_GET_CAPSET_INFO: virgl_cmd_get_capset_info(g, cmd); break; diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index 62239dee0f..c7d1e52cb5 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -940,6 +940,37 @@ virtio_gpu_resource_detach_backing(VirtIOGPU *g, virtio_gpu_cleanup_mapping(g, res); } +void virtio_gpu_resource_assign_uuid(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cmd) +{ + struct virtio_gpu_simple_resource *res; + struct virtio_gpu_resource_assign_uuid assign; + struct virtio_gpu_resp_resource_uuid resp; + QemuUUID *uuid = NULL; + + VIRTIO_GPU_FILL_CMD(assign); + virtio_gpu_bswap_32(&assign, sizeof(assign)); + trace_virtio_gpu_cmd_res_assign_uuid(assign.resource_id); + + res = virtio_gpu_find_check_resource(g, assign.resource_id, false, __func__, &cmd->error); + if (!res) { + return; + } + + memset(&resp, 0, sizeof(resp)); + resp.hdr.type = VIRTIO_GPU_RESP_OK_RESOURCE_UUID; + + uuid = g_hash_table_lookup(g->resource_uuids, GUINT_TO_POINTER(assign.resource_id)); + if (!uuid) { + uuid = g_new(QemuUUID, 1); + qemu_uuid_generate(uuid); + g_hash_table_insert(g->resource_uuids, GUINT_TO_POINTER(assign.resource_id), uuid); + } + + memcpy(resp.uuid, uuid, sizeof(QemuUUID)); + virtio_gpu_ctrl_response(g, cmd, &resp.hdr, sizeof(resp)); +} + void virtio_gpu_simple_process_cmd(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd) { @@ -988,6 +1019,9 @@ void virtio_gpu_simple_process_cmd(VirtIOGPU *g, case VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING: virtio_gpu_resource_detach_backing(g, cmd); break; + case VIRTIO_GPU_CMD_RESOURCE_ASSIGN_UUID: + virtio_gpu_resource_assign_uuid(g, cmd); + break; default: cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC; break; @@ -1348,12 +1382,15 @@ void virtio_gpu_device_realize(DeviceState *qdev, Error **errp) QTAILQ_INIT(&g->reslist); QTAILQ_INIT(&g->cmdq); QTAILQ_INIT(&g->fenceq); + + g->resource_uuids = g_hash_table_new_full(NULL, NULL, NULL, g_free); } static void virtio_gpu_device_unrealize(DeviceState *qdev) { VirtIOGPU *g = VIRTIO_GPU(qdev); + g_hash_table_destroy(g->resource_uuids); qemu_bh_delete(g->cursor_bh); qemu_bh_delete(g->ctrl_bh); @@ -1383,6 +1420,10 @@ void virtio_gpu_reset(VirtIODevice *vdev) g_free(cmd); } + if (g->resource_uuids) { + g_hash_table_remove_all(g->resource_uuids); + } + virtio_gpu_base_reset(VIRTIO_GPU_BASE(vdev)); } diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index ef02190f97..0a44aea4ee 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -200,6 +200,8 @@ struct VirtIOGPU { QTAILQ_HEAD(, VGPUDMABuf) bufs; VGPUDMABuf *primary[VIRTIO_GPU_MAX_SCANOUTS]; } dmabuf; + + GHashTable *resource_uuids; }; struct VirtIOGPUClass { @@ -273,6 +275,8 @@ int virtio_gpu_create_mapping_iov(VirtIOGPU *g, uint32_t *niov); void virtio_gpu_cleanup_mapping_iov(VirtIOGPU *g, struct iovec *iov, uint32_t count); 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Tsirkin" , Stefano Stabellini , Anthony PERARD , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Jan Beulich , Antonio Caggiano , "Dr . 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Signed-off-by: Antonio Caggiano --- hw/display/virtio-gpu-virgl.c | 21 +++++++++++++++++---- include/standard-headers/linux/virtio_gpu.h | 2 ++ 2 files changed, 19 insertions(+), 4 deletions(-) diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c index a3c388f907..fe03dc916f 100644 --- a/hw/display/virtio-gpu-virgl.c +++ b/hw/display/virtio-gpu-virgl.c @@ -388,6 +388,11 @@ static void virgl_cmd_get_capset_info(VirtIOGPU *g, virgl_renderer_get_cap_set(resp.capset_id, &resp.capset_max_version, &resp.capset_max_size); + } else if (info.capset_index == 2) { + resp.capset_id = VIRTIO_GPU_CAPSET_VENUS; + virgl_renderer_get_cap_set(resp.capset_id, + &resp.capset_max_version, + &resp.capset_max_size); } else { resp.capset_max_version = 0; resp.capset_max_size = 0; @@ -817,10 +822,18 @@ int virtio_gpu_virgl_init(VirtIOGPU *g) int virtio_gpu_virgl_get_num_capsets(VirtIOGPU *g) { - uint32_t capset2_max_ver, capset2_max_size; + uint32_t capset2_max_ver, capset2_max_size, num_capsets; + num_capsets = 1; + virgl_renderer_get_cap_set(VIRTIO_GPU_CAPSET_VIRGL2, - &capset2_max_ver, - &capset2_max_size); + &capset2_max_ver, + &capset2_max_size); + num_capsets += capset2_max_ver ? 1 : 0; + + virgl_renderer_get_cap_set(VIRTIO_GPU_CAPSET_VENUS, + &capset2_max_ver, + &capset2_max_size); + num_capsets += capset2_max_size ? 1 : 0; - return capset2_max_ver ? 2 : 1; + return num_capsets; } diff --git a/include/standard-headers/linux/virtio_gpu.h b/include/standard-headers/linux/virtio_gpu.h index 2da48d3d4c..2db643ed8f 100644 --- a/include/standard-headers/linux/virtio_gpu.h +++ b/include/standard-headers/linux/virtio_gpu.h @@ -309,6 +309,8 @@ struct virtio_gpu_cmd_submit { #define VIRTIO_GPU_CAPSET_VIRGL 1 #define VIRTIO_GPU_CAPSET_VIRGL2 2 +/* 3 is reserved for gfxstream */ +#define VIRTIO_GPU_CAPSET_VENUS 4 /* VIRTIO_GPU_CMD_GET_CAPSET_INFO */ struct virtio_gpu_get_capset_info { From patchwork Sun Mar 12 09:22:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huang Rui X-Patchwork-Id: 13171167 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 78102C6FA99 for ; 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Tsirkin" , Stefano Stabellini , Anthony PERARD , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Jan Beulich , Antonio Caggiano , "Dr . David Alan Gilbert" , Robert Beckett , , CC: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , "Stewart Hildebrand" , Xenia Ragiadakou , Honglei Huang , Julia Zhang , Chen Jiqian Subject: [RFC QEMU PATCH 08/18] virtio-gpu: Initialize Venus Date: Sun, 12 Mar 2023 17:22:34 +0800 Message-ID: <20230312092244.451465-9-ray.huang@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230312092244.451465-1-ray.huang@amd.com> References: <20230312092244.451465-1-ray.huang@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT038:EE_|CH0PR12MB5315:EE_ X-MS-Office365-Filtering-Correlation-Id: 80ec8d29-17e2-4534-677d-08db22db7ef9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: +xQ6NUWBgGTjalqIQj/mDDwvH1HiZKVP7/eEVBbnQZ1Nw2lUHuACKhTRjxlnYPUJ8Pg93Yw9GUWvykvpatNvah0s03kx9UnSbmo5o6Pe13u17hk1EaiRRstB47dTCAK6PjhvOZYvWutkRwdK4a1LZeMJ9DPgaoxhw0jrpBWesLQrIu/FjUapa8E2RIfIg0s57+sFYpd75dOXQHoL5YRLZ5jJ2Jdpxvec4zG6mOIfAB2NprSPUpFdYpMvSHXGIqKbr8t3+pC6foD3jPcH3relbTjtfSwz8u9KNsEmQV/mNj0iEMNOLlD8p0fCXFmxujEpTEELxViRpNzuQjZz3wC8Oay5MG47Jm+DnMzURuyXyPeZpiXE7I7WF5Qy40fRSnNFnq+MlTJ6P3hj1lv9CHu7NsuOFjsIAIAfjfwmGr6Pp8rc9MlVW9xCcj+pr0DJo9mQ11MUaTfVseyQIKKC8i/gR+VVsXxt628jQzjqP2ODHXvxEV9mlKBt59mGo8JeDKGY1g0n+Kxt1l2IrQeVFsXb+ky19kTP1J5wt/Kjyc6hR0Dl/WWu55RaZiYWhJmgXBh2IUsFUDK0fvsaCU6bqvmDmimg2xA4Kyih72mOmmGrsth/L2T3ikHvVRv32aGkBuumCjOZ2xQ+Z3bVMh0Bkx/XcxiU6R22IBV3a+qQX4uwjZdpa0QBw4hWsaWMNMOJ7ddk2xPLXVLiomPnsEGeYVYN89BpDWqm/GjK1xvKoWk6ltPmsjLZ72hmpBHvm2x97f+j X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(39860400002)(396003)(136003)(376002)(346002)(451199018)(46966006)(40470700004)(36840700001)(6666004)(7696005)(83380400001)(82740400003)(110136005)(316002)(81166007)(478600001)(36860700001)(54906003)(82310400005)(8936002)(16526019)(40480700001)(186003)(26005)(40460700003)(1076003)(4744005)(36756003)(5660300002)(7416002)(4326008)(8676002)(921005)(356005)(336012)(426003)(47076005)(70206006)(70586007)(41300700001)(86362001)(2616005)(2906002)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2023 09:23:52.4951 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 80ec8d29-17e2-4534-677d-08db22db7ef9 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT038.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH0PR12MB5315 From: Antonio Caggiano Request Venus when initializing VirGL. Signed-off-by: Antonio Caggiano --- hw/display/virtio-gpu-virgl.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c index fe03dc916f..f5ce206b93 100644 --- a/hw/display/virtio-gpu-virgl.c +++ b/hw/display/virtio-gpu-virgl.c @@ -803,7 +803,11 @@ int virtio_gpu_virgl_init(VirtIOGPU *g) { int ret; +#ifdef VIRGL_RENDERER_VENUS + ret = virgl_renderer_init(g, VIRGL_RENDERER_VENUS, &virtio_gpu_3d_cbs); +#else ret = virgl_renderer_init(g, 0, &virtio_gpu_3d_cbs); +#endif if (ret != 0) { error_report("virgl could not be initialized: %d", ret); return ret; From patchwork Sun Mar 12 09:22:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huang Rui X-Patchwork-Id: 13171168 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EB30EC6FD1C for ; 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Tsirkin" , Stefano Stabellini , Anthony PERARD , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Jan Beulich , Antonio Caggiano , "Dr . David Alan Gilbert" , Robert Beckett , , CC: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , "Stewart Hildebrand" , Xenia Ragiadakou , Honglei Huang , Julia Zhang , Chen Jiqian Subject: [RFC QEMU PATCH 09/18] meson: Enable virglrenderer unstable APIs Date: Sun, 12 Mar 2023 17:22:35 +0800 Message-ID: <20230312092244.451465-10-ray.huang@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230312092244.451465-1-ray.huang@amd.com> References: <20230312092244.451465-1-ray.huang@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT038:EE_|CH2PR12MB4280:EE_ X-MS-Office365-Filtering-Correlation-Id: 8dffb5e8-41f1-43f6-8892-08db22db81d0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: y86SUr+jwgzasKdrOvmk8524iVts/Yoxc+yEKW/6ckrGyMiOr9ZREwmWmyxTfiSKUKZIC93AKDfytuetiK6qMY60M8XRZkf9nMuS3+nBLgfjWYhYbvW13RcC5EUJ9XOT8KHtxsimkw+Iysf2wfJ/HsF29lInFxl/kRDR6UJIUo9gctDfPmsEx5SGg8SpUUeI5Yl/lcixKuHiR57yEiDMtggPuCQCZNg4+GOgfQjs1Vs7c0of0PlwYjSztn4EuAV62pOlVDxbiSAMS+tOqSNgMD+AzYnqwfLqN+s1ZwmnUTZ0tR6Zny3uP9zC0ViPwiIMNXecwCVxO0rb48UZVmth0YEqttt0TqCZMPSg4zfuwuR1CcAVgY/D3o9uztN9HrL+TTcOpCbr5hr/4A2AKH1OlxMUPUO9FqTYIjOa0wTnrywTJqNbmaMV/YQA9AQUuM0ea/y3zlmWO0Ot0vx1rTt6s6QH9HmRwj5GzG2AKfmznnR81cqh9agOjHtKZ9PbkmNQG8YlnOuqvUxwa19KjL0TtB2RLudqApCnFginyV2dJeR2Sb9F9WTpEYH+q3kzNDABPPbUMRV1Q59mxVZJ0NR1SCi3vxzrC5oDtdvfPi7cBX4tWlAZcFNzlAeZ3YgLrsjMMry+rYC6bi+knYiRL8I+1tlveaRgG+BWf6xfL0oDJepUbZQDi9BiZCFckQBVb1KtE3vDur+nBVJj4SVMkeg4pmBn8BX+If+0ZHMHAO8kxdHeJST7Qy6UA1feQSJWmtuj X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(136003)(39860400002)(396003)(376002)(346002)(451199018)(46966006)(40470700004)(36840700001)(82310400005)(921005)(356005)(36756003)(86362001)(36860700001)(82740400003)(81166007)(40480700001)(40460700003)(4326008)(70586007)(70206006)(8676002)(8936002)(41300700001)(110136005)(54906003)(478600001)(316002)(5660300002)(7416002)(2906002)(336012)(47076005)(426003)(2616005)(83380400001)(7696005)(186003)(26005)(16526019)(6666004)(1076003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2023 09:23:57.2604 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8dffb5e8-41f1-43f6-8892-08db22db81d0 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT038.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4280 From: Antonio Caggiano Also, use alternatives to meson compiler has_function, which does not work properly on my development environment. Signed-off-by: Antonio Caggiano --- meson.build | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/meson.build b/meson.build index 826b3473c4..8cd453844f 100644 --- a/meson.build +++ b/meson.build @@ -774,13 +774,16 @@ if not get_option('virglrenderer').auto() or have_system or have_vhost_user_gpu method: 'pkg-config', required: get_option('virglrenderer'), kwargs: static_kwargs) + virgl = declare_dependency(compile_args: '-DVIRGL_RENDERER_UNSTABLE_APIS', + dependencies: virgl) + config_host_data.set('HAVE_VIRGL_RESOURCE_BLOB', - cc.has_function('virgl_renderer_resource_create_blob', + cc.has_type('struct virgl_renderer_resource_create_blob_args', prefix: '#include ', dependencies: virgl)) config_host_data.set('HAVE_VIRGL_CONTEXT_INIT', - cc.has_function('virgl_renderer_context_create_with_flags', - prefix: '#include ', + cc.has_header_symbol('virglrenderer.h', + 'VIRGL_RENDERER_CONTEXT_FLAG_CAPSET_ID_MASK', dependencies: virgl)) endif blkio = not_found From patchwork Sun Mar 12 09:22:36 2023 Content-Type: text/plain; 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Tsirkin" , Stefano Stabellini , Anthony PERARD , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Jan Beulich , Antonio Caggiano , "Dr . David Alan Gilbert" , Robert Beckett , , CC: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , "Stewart Hildebrand" , Xenia Ragiadakou , Honglei Huang , Julia Zhang , Chen Jiqian Subject: [RFC QEMU PATCH 10/18] virtio-gpu: Handle set scanout blob command Date: Sun, 12 Mar 2023 17:22:36 +0800 Message-ID: <20230312092244.451465-11-ray.huang@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230312092244.451465-1-ray.huang@amd.com> References: <20230312092244.451465-1-ray.huang@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT038:EE_|DM6PR12MB4449:EE_ X-MS-Office365-Filtering-Correlation-Id: 9554ee66-e5c4-4edd-5212-08db22db8534 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 5CLHP5wU2YH8UsonWfyKjo2Bma1/vH7DsvUbXzwsz2LNisDvP+HsGpeoDmF11m0CLuwwlUygEJ5LtBBmqWEU1/xVV+3eNpSiO/i/XLGFr9FlSqX/w33c9syHwmQc1GxVmeNJ8mQcGqeYAKjlTcCydXC7AiHEgo2/UAPkfUvxdQcuAskMdDswxDxmFCOce4PobuZWdFaOztpVcguL8sP6O7G0tmhO1mDhreC2TWl6+TOosLQn+ghFAz7R0n6i5cF9AtYP453TCDPIA4pwmK8H42l8giBx7V6B1rIWY3JwZSv5vL647GTkFXt4sJvxWBD7WqdeYpmZ3zulxPNsc/zO789WGaYpQTUkIB/OLPXxDbV14/fGdKUg7jg96jUl1RyEP9Xr99BwZoFKE3XBa5VS/tt/huvN+EooBQ0NlrZWWquYEeKG/1vUxWSyoq19+3LaJZ86qCYRcwzBTYA7iFlXbcb2Ljnbro6AzK0zpB2/qJ2Go5Seo+X94BASrOvqodKd+Gs9yoJEBJ/9mBknFWieZWpodjaH5SmPwTCLOegZLQ3fe/Usq7SGU0aI6sqHWBZouT/BdU85UXoHQzayiF0yzSnYpnmsdz/eEdo4cRbjiVbUuTsFcstsqBC55REHXOIZUsfjjLvLIz397EYxx4j0PBW4ZQkaR35F/l6//nuG31cvZGkrOdzEGfdl6rUaMe6/MnnU3ck9TShs7wQ6urycmihFWp9z8HbNCY/0iiKITg4RnMQXwggYdX0ouI9AEyQA X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(346002)(376002)(396003)(39860400002)(136003)(451199018)(40470700004)(46966006)(36840700001)(82310400005)(36756003)(86362001)(16526019)(186003)(41300700001)(1076003)(26005)(5660300002)(40460700003)(7416002)(336012)(4326008)(2616005)(8936002)(316002)(7696005)(110136005)(478600001)(54906003)(70586007)(8676002)(6666004)(70206006)(40480700001)(81166007)(82740400003)(921005)(356005)(2906002)(83380400001)(47076005)(426003)(36860700001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2023 09:24:02.9475 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9554ee66-e5c4-4edd-5212-08db22db8534 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT038.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4449 From: Antonio Caggiano Use mapped data pointer as data for the scanout. Signed-off-by: Antonio Caggiano --- hw/display/virtio-gpu-virgl.c | 3 +++ hw/display/virtio-gpu.c | 11 +++++++---- include/hw/virtio/virtio-gpu.h | 2 ++ 3 files changed, 12 insertions(+), 4 deletions(-) diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c index f5ce206b93..1fe144f64d 100644 --- a/hw/display/virtio-gpu-virgl.c +++ b/hw/display/virtio-gpu-virgl.c @@ -653,6 +653,9 @@ void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, case VIRTIO_GPU_CMD_RESOURCE_CREATE_BLOB: virgl_cmd_resource_create_blob(g, cmd); break; + case VIRTIO_GPU_CMD_SET_SCANOUT_BLOB: + virtio_gpu_set_scanout_blob(g, cmd); + break; case VIRTIO_GPU_CMD_RESOURCE_MAP_BLOB: virgl_cmd_resource_map_blob(g, cmd); break; diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index c7d1e52cb5..1e334a1e78 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -144,7 +144,7 @@ virtio_gpu_find_check_resource(VirtIOGPU *g, uint32_t resource_id, } if (require_backing) { - if (!res->iov || (!res->image && !res->blob)) { + if (!res->iov || (!res->image && !res->blob) || !res->mapped) { qemu_log_mask(LOG_GUEST_ERROR, "%s: no backing storage %d\n", caller, resource_id); if (error) { @@ -637,7 +637,10 @@ static void virtio_gpu_do_set_scanout(VirtIOGPU *g, } data = res->blob; - } else { + } else if (res->mapped) { + data = (uint8_t *)res->mapped; + } + else { data = (uint8_t *)pixman_image_get_data(res->image); } @@ -714,8 +717,8 @@ static void virtio_gpu_set_scanout(VirtIOGPU *g, &fb, res, &ss.r, &cmd->error); } -static void virtio_gpu_set_scanout_blob(VirtIOGPU *g, - struct virtio_gpu_ctrl_command *cmd) +void virtio_gpu_set_scanout_blob(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cmd) { struct virtio_gpu_simple_resource *res; struct virtio_gpu_framebuffer fb = { 0 }; diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index 0a44aea4ee..ce49cdfafb 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -284,6 +284,8 @@ void virtio_gpu_simple_process_cmd(VirtIOGPU *g, struct virtio_gpu_ctrl_command void virtio_gpu_update_cursor_data(VirtIOGPU *g, struct virtio_gpu_scanout *s, uint32_t resource_id); +void virtio_gpu_set_scanout_blob(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cmd); /* virtio-gpu-udmabuf.c */ bool virtio_gpu_have_udmabuf(void); From patchwork Sun Mar 12 09:22:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huang Rui X-Patchwork-Id: 13171176 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7327CC6FD1C for ; Sun, 12 Mar 2023 09:29:21 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.508940.783984 (Exim 4.92) (envelope-from ) id 1pbI0m-0007is-Mf; Sun, 12 Mar 2023 09:29:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 508940.783984; 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Tsirkin" , Stefano Stabellini , Anthony PERARD , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Jan Beulich , Antonio Caggiano , "Dr . David Alan Gilbert" , Robert Beckett , , CC: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , "Stewart Hildebrand" , Xenia Ragiadakou , Honglei Huang , Julia Zhang , Chen Jiqian Subject: [RFC QEMU PATCH 11/18] virtio-gpu: make blob scanout use dmabuf fd Date: Sun, 12 Mar 2023 17:22:37 +0800 Message-ID: <20230312092244.451465-12-ray.huang@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230312092244.451465-1-ray.huang@amd.com> References: <20230312092244.451465-1-ray.huang@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT007:EE_|DS7PR12MB6287:EE_ X-MS-Office365-Filtering-Correlation-Id: b74e6c69-b477-4d2c-248b-08db22db86ff X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: t6ub4QDusTL1/8jllv0iUXcdHrMi0fysP/UoBYZkSUYjVL0uMnKIDMJUubWcf+H2Mmez3U+ObN23sLAPdmxhjRay5Rmja+ks3F57wNHvAfAkOAS14v+Q1H8sU/0QuOVcw3RSrvU7zMhs6OBTLjcIw8Rnv2nEACvjRi9R0Rl2Ang5IHRODQTHnUTa/KWWyTnerlkXna13+PtlAPdQNLA6BsZaYFyOvEOjWeheqkqfhDeBIFMXatbIycA5LN3apDhBtY9INJMhSM0tu/kopJllQNcJGBqU7CBkX69/68Th7VoidphekqOUObxXKmbLe07WGIKovaKrjN+xmDrBhjN5ivCXfUmpJh4V9S8e2EVsYptv6ONQdvgsPDBAP/kuLhptu65ZGsYAekRDAavjalzudSkUguuaS+inqjm7pgkCXfa1sekYLfvL913w0anwZtj1Qk7dFY/rogVo/iGSmuBoZitfMWVoBJFeGV72ArP3Wb7oXq+3yFHewEyNiu8rJ06pE4l6CPskMc9JJTPCAIKUIqdto0NjmNl0muUmorduVRo5rAcD5jlpop6Rv+cYxY9rnYdyH9UVcB8n1VJVrAnrKZ0cqLXSKNLeouFsAMP4jZBCS1s+towxX0xNHejMkIXXz808kBgOOCFZADnH+cgnfB1G3Mr5bEbJS+LNfXgesSAKzXlVFcNkQsFxe2Zg0G/XiSxr4SrfyVhV299S2wAa6iSpGIHr9uesvJVbi8R02gLQXiEdGIet80uUNucTCJ+q X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(136003)(39860400002)(346002)(396003)(376002)(451199018)(36840700001)(40470700004)(46966006)(186003)(356005)(921005)(2906002)(16526019)(82740400003)(26005)(1076003)(81166007)(2616005)(8936002)(5660300002)(36860700001)(6666004)(7416002)(336012)(426003)(47076005)(40460700003)(41300700001)(86362001)(8676002)(4326008)(82310400005)(40480700001)(70586007)(70206006)(36756003)(7696005)(478600001)(316002)(83380400001)(110136005)(54906003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2023 09:24:05.9544 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b74e6c69-b477-4d2c-248b-08db22db86ff X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT007.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6287 From: Robert Beckett This relies on a virglrenderer change to include the dmabuf fd when returning resource info. Signed-off-by: Robert Beckett --- hw/display/virtio-gpu-virgl.c | 103 ++++++++++++++++++++++++++++++++- hw/display/virtio-gpu.c | 4 +- include/hw/virtio/virtio-gpu.h | 5 ++ 3 files changed, 109 insertions(+), 3 deletions(-) diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c index 1fe144f64d..69083d15a9 100644 --- a/hw/display/virtio-gpu-virgl.c +++ b/hw/display/virtio-gpu-virgl.c @@ -18,6 +18,7 @@ #include "hw/virtio/virtio-gpu.h" #include "hw/virtio/virtio-gpu-bswap.h" #include "hw/virtio/virtio-iommu.h" +#include "hw/virtio/virtio-gpu-pixman.h" #include @@ -208,6 +209,106 @@ static void virgl_cmd_set_scanout(VirtIOGPU *g, g->parent_obj.scanout[ss.scanout_id].resource_id = ss.resource_id; } +static void virgl_cmd_set_scanout_blob(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cmd) +{ + struct virtio_gpu_simple_resource *res; + struct virtio_gpu_framebuffer fb = { 0 }; + struct virtio_gpu_set_scanout_blob ss; + struct virgl_renderer_resource_info info; + uint64_t fbend; + + VIRTIO_GPU_FILL_CMD(ss); + virtio_gpu_scanout_blob_bswap(&ss); + trace_virtio_gpu_cmd_set_scanout_blob(ss.scanout_id, ss.resource_id, + ss.r.width, ss.r.height, ss.r.x, + ss.r.y); + + if (ss.scanout_id >= g->parent_obj.conf.max_outputs) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal scanout id specified %d", + __func__, ss.scanout_id); + cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_SCANOUT_ID; + return; + } + + if (ss.resource_id == 0) { + virtio_gpu_disable_scanout(g, ss.scanout_id); + return; + } + + if (ss.width < 16 || + ss.height < 16 || + ss.r.x + ss.r.width > ss.width || + ss.r.y + ss.r.height > ss.height) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal scanout %d bounds for" + " resource %d, rect (%d,%d)+%d,%d, fb %d %d\n", + __func__, ss.scanout_id, ss.resource_id, + ss.r.x, ss.r.y, ss.r.width, ss.r.height, + ss.width, ss.height); + cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER; + return; + } + + if (!console_has_gl(g->parent_obj.scanout[ss.scanout_id].con)) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: unable to scanout blot without GL!\n", __func__); + return; + } + + res = virtio_gpu_find_resource(g, ss.resource_id); + if (!res) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: illegal resource specified %d\n", + __func__, ss.resource_id); + cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; + return; + } + if (virgl_renderer_resource_get_info(ss.resource_id, &info)) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: illegal virgl resource specified %d\n", + __func__, ss.resource_id); + cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; + return; + } + if (!res->dmabuf_fd && info.fd) + res->dmabuf_fd = info.fd; + + fb.format = virtio_gpu_get_pixman_format(ss.format); + if (!fb.format) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: host couldn't handle guest format %d\n", + __func__, ss.format); + cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER; + return; + } + + fb.bytes_pp = DIV_ROUND_UP(PIXMAN_FORMAT_BPP(fb.format), 8); + fb.width = ss.width; + fb.height = ss.height; + fb.stride = ss.strides[0]; + fb.offset = ss.offsets[0] + ss.r.x * fb.bytes_pp + ss.r.y * fb.stride; + + fbend = fb.offset; + fbend += fb.stride * (ss.r.height - 1); + fbend += fb.bytes_pp * ss.r.width; + if (fbend > res->blob_size) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: fb end out of range\n", + __func__); + cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER; + return; + } + + g->parent_obj.enable = 1; + if (virtio_gpu_update_dmabuf(g, ss.scanout_id, res, &fb, &ss.r)) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: failed to update dmabuf\n", __func__); + cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER; + return; + } + virtio_gpu_update_scanout(g, ss.scanout_id, res, &ss.r); +} + + static void virgl_cmd_submit_3d(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd) { @@ -654,7 +755,7 @@ void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, virgl_cmd_resource_create_blob(g, cmd); break; case VIRTIO_GPU_CMD_SET_SCANOUT_BLOB: - virtio_gpu_set_scanout_blob(g, cmd); + virgl_cmd_set_scanout_blob(g, cmd); break; case VIRTIO_GPU_CMD_RESOURCE_MAP_BLOB: virgl_cmd_resource_map_blob(g, cmd); diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index 1e334a1e78..95e421a525 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -371,7 +371,7 @@ static void virtio_gpu_resource_create_blob(VirtIOGPU *g, QTAILQ_INSERT_HEAD(&g->reslist, res, next); } -static void virtio_gpu_disable_scanout(VirtIOGPU *g, int scanout_id) +void virtio_gpu_disable_scanout(VirtIOGPU *g, int scanout_id) { struct virtio_gpu_scanout *scanout = &g->parent_obj.scanout[scanout_id]; struct virtio_gpu_simple_resource *res; @@ -575,7 +575,7 @@ static void virtio_unref_resource(pixman_image_t *image, void *data) pixman_image_unref(data); } -static void virtio_gpu_update_scanout(VirtIOGPU *g, +void virtio_gpu_update_scanout(VirtIOGPU *g, uint32_t scanout_id, struct virtio_gpu_simple_resource *res, struct virtio_gpu_rect *r) diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index ce49cdfafb..ba509833db 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -286,6 +286,11 @@ void virtio_gpu_update_cursor_data(VirtIOGPU *g, uint32_t resource_id); void virtio_gpu_set_scanout_blob(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd); +void virtio_gpu_update_scanout(VirtIOGPU *g, + uint32_t scanout_id, + struct virtio_gpu_simple_resource *res, + struct virtio_gpu_rect *r); +void virtio_gpu_disable_scanout(VirtIOGPU *g, int scanout_id); /* virtio-gpu-udmabuf.c */ bool virtio_gpu_have_udmabuf(void); From patchwork Sun Mar 12 09:22:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huang Rui X-Patchwork-Id: 13171171 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DCE5CC6FA99 for ; Sun, 12 Mar 2023 09:29:17 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.508937.783965 (Exim 4.92) (envelope-from ) id 1pbI0j-0006zD-5h; Sun, 12 Mar 2023 09:29:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 508937.783965; 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Tsirkin" , Stefano Stabellini , Anthony PERARD , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Jan Beulich , Antonio Caggiano , "Dr . David Alan Gilbert" , Robert Beckett , , CC: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , "Stewart Hildebrand" , Xenia Ragiadakou , Honglei Huang , Julia Zhang , Chen Jiqian , Huang Rui Subject: [RFC QEMU PATCH 12/18] softmmu: Fix the size to map cache with xen for host virtual address Date: Sun, 12 Mar 2023 17:22:38 +0800 Message-ID: <20230312092244.451465-13-ray.huang@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230312092244.451465-1-ray.huang@amd.com> References: <20230312092244.451465-1-ray.huang@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT081:EE_|MW4PR12MB6730:EE_ X-MS-Office365-Filtering-Correlation-Id: dee7682c-ed0d-4f3d-332d-08db22db89eb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: m1jlEmupMXRV44cn+86FabSTWSRL5yxQFrDFzXb/jh/UNvcq9PBWDse1XBQ6W5mRDN1nQZNylwg66VM3N8Zmh+nklXnsbjC4dJ0p4HsCmJ3NSrIXD9HSvu75IJX0qoAQgp+t9WVVkmi+ctafdo5ws1RPggDjT+e43B28+M86RpXG+cWTDFlZF9rvZF6Kin1TAjxwAciXOtLHQ7OK5tnplJYmV0fMw+0Is32Qt15bxvAtsRH0Udhcm1IBfWM+Z8o+avg8XbvxGiuKVzPGt9JhUVdYa59QcihDmJ+6/mrpdTbK3wQL0UGmVaqq8dQsswcrekbbw4Pf4RZ3yRY2FbeNVgs+42Z39JX7+Rw2s7xxacaJpqgQ3Zx6bqXSAfx1y84IfaQphd5q5n/xsqYv9AMs054FA4gzRSZ0Qq4Kj9m5zeTgANs0yF0BQmfRPX4jrQqOcsTF4VJhgDIiT6LV1O4WkfiKq9F80AhJZviZinKbBR2qesHoF5lxQ0eCwyTqQFZoOoCwX+a9x85KS32CA+241Qs1F52Sibnv1xEMltsnD9PSouUqYludEAMYh3fqNmceW8u69lQyiCy8ytXPWQgIWCbBjVuzxE6mnChuWFmVa37YT05eYIqG307GzMoTIXLRiS3+bRT0tzMv6/K9Mya47iPOhKn5dhm95LK3R11zsfANtsjnrDEc8aWR8AfHadTCd5zINSUKwmar06lbGeW69rlS5NoZuI6q7WH8rg7IavjLf2NISPmTU/8uXy67ovhi X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(346002)(376002)(39860400002)(396003)(136003)(451199018)(46966006)(36840700001)(40470700004)(82310400005)(36860700001)(82740400003)(6666004)(83380400001)(426003)(47076005)(36756003)(478600001)(54906003)(110136005)(40480700001)(356005)(921005)(316002)(336012)(81166007)(2616005)(40460700003)(186003)(7696005)(26005)(16526019)(1076003)(5660300002)(2906002)(4326008)(8936002)(8676002)(41300700001)(70206006)(70586007)(7416002)(86362001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2023 09:24:10.8569 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: dee7682c-ed0d-4f3d-332d-08db22db89eb X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT081.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB6730 The xen_map_cache function wants to pass offset and size of this memory block as the input parameters to map the host virtual address. However, block->offset is too large as 0x100000000 (4G), if we assign the size as block->max_length (0x110000000), the mapped host address will be out of block->max_length and easy to overflow. We have to assign the size as (block->max_length - block->offset), then that is able to ensure the address will be located in legal range inside of max_length. {rcu = {next = 0x0, func = 0x0}, mr = 0x55555681b620, host = 0x0, colo_cache = 0x0, offset = 0x100000000, used_length = 0x110000000, max_length = 0x110000000, resized = 0x0, flags = 0x10, idstr = {0x78, 0x65, 0x6e, 0x2e, 0x72, 0x61, 0x6d, 0x0 }, next = { le_next = 0x5555568c61b0, le_prev = 0x55555681c640}, ramblock_notifiers = {lh_first = 0x0}, fd = 0xffffffff, page_size = 0x1000, bmap = 0x0, receivedmap = 0x0, clear_bmap = 0x0, clear_bmap_shift = 0x0, postcopy_length = 0x0} Signed-off-by: Huang Rui --- softmmu/physmem.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/softmmu/physmem.c b/softmmu/physmem.c index 1b606a3002..1b0bb35da9 100644 --- a/softmmu/physmem.c +++ b/softmmu/physmem.c @@ -2304,7 +2304,7 @@ void *qemu_map_ram_ptr(RAMBlock *ram_block, ram_addr_t addr) return xen_map_cache(addr, 0, 0, false); } - block->host = xen_map_cache(block->offset, block->max_length, 1, false); + block->host = xen_map_cache(block->offset, block->max_length, 1, false); } return ramblock_ptr(block, addr); } @@ -2337,7 +2337,8 @@ static void *qemu_ram_ptr_length(RAMBlock *ram_block, ram_addr_t addr, return xen_map_cache(addr, *size, lock, lock); } - block->host = xen_map_cache(block->offset, block->max_length, 1, lock); + block->host = xen_map_cache(block->offset, + block->max_length - block->offset, 1, lock); } return ramblock_ptr(block, addr); From patchwork Sun Mar 12 09:22:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huang Rui X-Patchwork-Id: 13171173 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2E4EDC6FD1F for ; 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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C From: Huang Rui To: Gerd Hoffmann , "Michael S . Tsirkin" , Stefano Stabellini , Anthony PERARD , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Jan Beulich , Antonio Caggiano , "Dr . David Alan Gilbert" , Robert Beckett , , CC: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , "Stewart Hildebrand" , Xenia Ragiadakou , Honglei Huang , Julia Zhang , Chen Jiqian , Huang Rui Subject: [RFC QEMU PATCH 13/18] hw/i386/xen/xen-hvm: Introduce xen_ram_block_check function Date: Sun, 12 Mar 2023 17:22:39 +0800 Message-ID: <20230312092244.451465-14-ray.huang@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230312092244.451465-1-ray.huang@amd.com> References: <20230312092244.451465-1-ray.huang@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT100:EE_|MW4PR12MB7119:EE_ X-MS-Office365-Filtering-Correlation-Id: b4174633-9b0b-400c-840f-08db22db8c44 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: T/U6F+Jvuw0soAImF7HBXYbLxcsiN/gzf3Vt67kfu626AyTRUGEKvHcC3ioGN5ci3J3hqJA3dDQLFC/nHQxhgYYVvnjuastS7Q5shOAShika35rkhq9KviXquCuYFGJ2iJsQL/rYjUQ+YbYvJqV1HkCVWIMnTHJjPxeHhGQs+ixJt8bZx2PTTwvI8vaRtdhFp1vG7X0tQaL4LOnNI7qBe0zFX1Ir+RNvVoAr9i0VK2L4jtwZZXMuZ8FblUx58Kl68pQcTFcv7A77YYDs9r7utgGo31dKAK8H3TQNOdqMyaw8orD5+HDQSmZwMwrOKcDzcA7RvUJFXqMQ+X5IP7s3CrF13XRQLqmgjyGCQAsCrNTbYodylkhd6CZNlDOVQCo29xZCKtbUxgz0xQ5yUR+55jFDTs1vT6kvu+JwIa8RVmWv2A/ZbFHAh7SOkP+6ewd7FYZ3ae+1SRpL8SLx+p2iq8sxeJn0L+gvRGmx+YjgPQmDttSq2sbk+jJeTqMVEDjbdUeC31b/xkXzi7xcu5IU/pBQ+dpddvjZQppqpxkYvIo1WJVsRYHn2rZPIAo0vq+V2mvmeUk6gGAsBM225alrJgQASvsDUyI7bRNiXIA6IZEIQP7Lz1AlsdproZ9T0yeMEyKRiQr8Y/Ef3vn7XZPl0SHkbmNRRUP9hhXqekuqC77ukGwh4oSstlNO5CziHPo7eFw6UxkozSGCHnRozCQDa1v4fVNW8dIAueSGkH44YllKdO+EdacEWXkAH+EUeLJ3 X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(376002)(346002)(39860400002)(136003)(396003)(451199018)(46966006)(36840700001)(40470700004)(86362001)(5660300002)(8936002)(70206006)(4326008)(70586007)(8676002)(2906002)(7416002)(36860700001)(81166007)(921005)(356005)(36756003)(82740400003)(41300700001)(1076003)(26005)(6666004)(7696005)(478600001)(54906003)(316002)(110136005)(40480700001)(82310400005)(83380400001)(426003)(47076005)(40460700003)(336012)(2616005)(16526019)(186003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2023 09:24:14.8133 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b4174633-9b0b-400c-840f-08db22db8c44 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT100.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB7119 Introduce xen_ram_block_check function to check whether current ramblock is xen ram memory. Signed-off-by: Huang Rui --- hw/i386/xen/xen-hvm.c | 15 +++++++++++++++ include/hw/xen/xen.h | 1 + 2 files changed, 16 insertions(+) diff --git a/hw/i386/xen/xen-hvm.c b/hw/i386/xen/xen-hvm.c index e4293d6d66..a4f12aefce 100644 --- a/hw/i386/xen/xen-hvm.c +++ b/hw/i386/xen/xen-hvm.c @@ -32,6 +32,7 @@ #include "sysemu/xen.h" #include "sysemu/xen-mapcache.h" #include "trace.h" +#include "include/exec/ramblock.h" #include #include @@ -1564,6 +1565,20 @@ void xen_register_framebuffer(MemoryRegion *mr) framebuffer = mr; } +bool xen_ram_block_check(RAMBlock *rb) +{ + bool ret; + + if (!rb) + return false; + + ret = (rb == ram_memory.ram_block); + if (ret) + rb->offset = 0; + + return ret; +} + void xen_shutdown_fatal_error(const char *fmt, ...) { va_list ap; diff --git a/include/hw/xen/xen.h b/include/hw/xen/xen.h index afdf9c436a..99a383eb17 100644 --- a/include/hw/xen/xen.h +++ b/include/hw/xen/xen.h @@ -31,5 +31,6 @@ qemu_irq *xen_interrupt_controller_init(void); void xenstore_store_pv_console_info(int i, Chardev *chr); void xen_register_framebuffer(struct MemoryRegion *mr); +bool xen_ram_block_check(RAMBlock *rb); #endif /* QEMU_HW_XEN_H */ From patchwork Sun Mar 12 09:22:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huang Rui X-Patchwork-Id: 13171175 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 34EDCC7618B for ; Sun, 12 Mar 2023 09:29:18 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.508936.783958 (Exim 4.92) (envelope-from ) id 1pbI0i-0006pq-LB; Sun, 12 Mar 2023 09:29:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 508936.783958; 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Tsirkin" , Stefano Stabellini , Anthony PERARD , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Jan Beulich , Antonio Caggiano , "Dr . David Alan Gilbert" , Robert Beckett , , CC: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , "Stewart Hildebrand" , Xenia Ragiadakou , Honglei Huang , Julia Zhang , Chen Jiqian , Huang Rui Subject: [RFC QEMU PATCH 14/18] softmmu: Add ram block check to map the xen ram memory Date: Sun, 12 Mar 2023 17:22:40 +0800 Message-ID: <20230312092244.451465-15-ray.huang@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230312092244.451465-1-ray.huang@amd.com> References: <20230312092244.451465-1-ray.huang@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT023:EE_|MN0PR12MB5713:EE_ X-MS-Office365-Filtering-Correlation-Id: 233e2c47-7e92-4f01-06d9-08db22db91d6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: zHnqSl2fLXBhXNsZMqMSmxcTNXoqbiR9wgoBOqhzuE25PU5xzUBROyipeJ20qdqgBu47Igfhv8BR2S41enqTbfwa6fvu470AmztSdQYuBcJurQJ6Ovrp7PMPQGB3WF0mm6z5FpvUgk7jlaxNTEU/iimnZ1GfzQpIMFaVpS9dRFndou8voXUBKjiZ3QFU51QRupf4fb9QBuWq+CqSpNVILV7Y2dkMFphn4vHbOgwiQ8s1quKz3sViG33+KB+SJrhgvtzC42DF/6s4AeznygswP3dL7QHpADIQ+V9Odx22BdWb/hUYhnR7cUiyX+evy0QMg7zwdWTBZah/MqyT8CpQWESdq/Fi4QwxXGBi16vLDJEo2uIn7iMJSuZEIRdPQvWugpKE25KpkODHZFqdLFjVLH28L2os72QBkjV/sTJljX/S046dig7uVU7eEhEm5THQcGAbx74Y2/NEmCQMBjXW5Gdc0Qp0j6TW/ZZCchwvKoC5EUMj4ceOEqhRnH0TUiKcmWa8tkVxz5+oouPViwTXX5e/9VKJj23OxWMVuOQ4OD/5L1uVZTYQGxktNcZg3ThM6mcI0dBW+q4DWGO1FWbHogbQxMnnykDJ2cFGDaxhNCWGwUhncpmLTSqiCIOMUlFLEhLW5jICSo/UVzPHICtSMStzAhfsrNie3oqOLPTMC1rkD+cH694CIXKlX/tVacoMH0iN6MooKd624mFuC1TGw3zg0XZ96s5KfNXW8lj0VnsiR084vR5wYbP5tEd9GWZe X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(136003)(396003)(376002)(39860400002)(346002)(451199018)(40470700004)(36840700001)(46966006)(2906002)(81166007)(82740400003)(83380400001)(36756003)(40460700003)(4744005)(5660300002)(7416002)(40480700001)(70206006)(70586007)(41300700001)(8936002)(8676002)(921005)(356005)(4326008)(316002)(54906003)(86362001)(36860700001)(110136005)(82310400005)(478600001)(7696005)(47076005)(426003)(336012)(2616005)(16526019)(186003)(1076003)(26005)(6666004)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2023 09:24:24.1399 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 233e2c47-7e92-4f01-06d9-08db22db91d6 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT023.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB5713 The xen ram memory should be mapped with addr instead of ramblock offset. So we need to add a check to make sure current ramblock is xen ram memory. Signed-off-by: Huang Rui --- softmmu/physmem.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/softmmu/physmem.c b/softmmu/physmem.c index 1b0bb35da9..e54561bace 100644 --- a/softmmu/physmem.c +++ b/softmmu/physmem.c @@ -2333,7 +2333,7 @@ static void *qemu_ram_ptr_length(RAMBlock *ram_block, ram_addr_t addr, * because we don't want to map the entire memory in QEMU. * In that case just map the requested area. */ - if (block->offset == 0) { + if (block->offset == 0 || (!lock && xen_ram_block_check(block))) { return xen_map_cache(addr, *size, lock, lock); } From patchwork Sun Mar 12 09:22:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huang Rui X-Patchwork-Id: 13171174 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 49DACC7618D for ; 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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C From: Huang Rui To: Gerd Hoffmann , "Michael S . Tsirkin" , Stefano Stabellini , Anthony PERARD , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Jan Beulich , Antonio Caggiano , "Dr . David Alan Gilbert" , Robert Beckett , , CC: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , "Stewart Hildebrand" , Xenia Ragiadakou , Honglei Huang , Julia Zhang , Chen Jiqian , Huang Rui Subject: [RFC QEMU PATCH 15/18] softmmu: Enable qemu ram allocation with fd for Xen Date: Sun, 12 Mar 2023 17:22:41 +0800 Message-ID: <20230312092244.451465-16-ray.huang@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230312092244.451465-1-ray.huang@amd.com> References: <20230312092244.451465-1-ray.huang@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT023:EE_|DS7PR12MB5861:EE_ X-MS-Office365-Filtering-Correlation-Id: 320fbbc4-3ebe-422a-ab2d-08db22db92a0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: XkZ9taQILHR0OZ90dxiZRfwAFgw/6CfL4DrM9E48dgM040CHWp7IozkZrznaCg9GKRAXXUr8XF8K+TWTWaBRhv74DPVKjtknJS+YP3S4LbFv8tdFMj8ufhpUpIs5nBy/RIcFqyYB/U1Bk+LckmLcJfRXkSMKZd/tpkL1Azp32fM2S+r3oRkTRlpXRN8tgl0zKdIPNQpH8xINo/In0dZT2XBG7rb+sMLZQEAFLPZCVQkevGrvEmgsPxGmEfE4r1o/o81TVfRmYSVDACekrhBe04kkgw9w4FF5tMyqrJNp6qRkqTc6qRHEOX+lT06KaXLp2dHTd+wSNo/74LImwAbI496CrUkDoSP0cAXm4q1Fe/ZVhK+Xfr0v0sFa58yTvKzV3mtzjKqk2pkin4d7tADWygQGBShrlSSaQmXCTIwn9qCEbSC8ODmXgP+URxeShkdw6hw/4Xct/GdpxfiX1wBnuMvQkhz1W2Pxe6Ge6vw8E4AmZ7G37stGjV/ONvPq0ru9ZsVNa6uetY+GR3ZOXri+EsDmN7D1wqQA2L+vIRi7in6Y8EX2ZcEPMkY6VdOpPeKOf63Oli4go4+oJJeuWncOWqr9gf6sDJPXAiDi2GFn05QNDu1FfbUt9phihs/vgFRL5S7cAXtXM3AXdgZZRQj0RCToGAb1S0ARcJoN4v4a4YDj0/irzXdNk2gk5dGCwfpMVR+piiloufY/RHmlmfCEiREyFSc7XucXtqKSzZ4hbCspSk+agj4k8YhJEYOpTzUN X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(346002)(39860400002)(376002)(396003)(136003)(451199018)(36840700001)(46966006)(40470700004)(5660300002)(7416002)(40460700003)(4744005)(36756003)(83380400001)(47076005)(426003)(478600001)(82310400005)(7696005)(6666004)(1076003)(26005)(2616005)(336012)(16526019)(186003)(921005)(356005)(4326008)(8676002)(70206006)(70586007)(40480700001)(8936002)(41300700001)(86362001)(54906003)(110136005)(36860700001)(316002)(82740400003)(81166007)(2906002)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2023 09:24:25.4680 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 320fbbc4-3ebe-422a-ab2d-08db22db92a0 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT023.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB5861 Venus is requesting the function on Xen as well, enable this path on Xen hypervisor. Signed-off-by: Huang Rui --- softmmu/physmem.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/softmmu/physmem.c b/softmmu/physmem.c index e54561bace..2838dee2f2 100644 --- a/softmmu/physmem.c +++ b/softmmu/physmem.c @@ -2060,11 +2060,6 @@ RAMBlock *qemu_ram_alloc_from_fd(ram_addr_t size, MemoryRegion *mr, assert((ram_flags & ~(RAM_SHARED | RAM_PMEM | RAM_NORESERVE | RAM_PROTECTED)) == 0); - if (xen_enabled()) { - error_setg(errp, "-mem-path not supported with Xen"); - return NULL; - } - if (kvm_enabled() && !kvm_has_sync_mmu()) { error_setg(errp, "host lacks kvm mmu notifiers, -mem-path unsupported"); From patchwork Sun Mar 12 09:22:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huang Rui X-Patchwork-Id: 13171177 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3960DC6FA99 for ; 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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C From: Huang Rui To: Gerd Hoffmann , "Michael S . Tsirkin" , Stefano Stabellini , Anthony PERARD , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Jan Beulich , Antonio Caggiano , "Dr . David Alan Gilbert" , Robert Beckett , , CC: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , "Stewart Hildebrand" , Xenia Ragiadakou , Honglei Huang , Julia Zhang , Chen Jiqian , Huang Rui Subject: [RFC QEMU PATCH 16/18] virtio-gpu: fix hw-display-virtio-gpu.so undefined symbol virtio_gpu_virgl_resource_unmap Date: Sun, 12 Mar 2023 17:22:42 +0800 Message-ID: <20230312092244.451465-17-ray.huang@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230312092244.451465-1-ray.huang@amd.com> References: <20230312092244.451465-1-ray.huang@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT033:EE_|MN0PR12MB6318:EE_ X-MS-Office365-Filtering-Correlation-Id: 4ef8e9f1-b34b-43a0-de72-08db22db9506 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: m5irxfKVWigmgE9iY41O+l4aueGQo50/hQPNrZ6T9soMxGCuLxrhfl6twhcJtu5Q1HTZ34J/PHCqHmNUvje8GjQxxCnxA2KJoOKZKdrMIAzh/hlwmEkNMz4v7qdKvIBtz6oawERxU5ELYFzLtHc0zpA9kOYcvUAr40qqDm2q5HfZK/6ZcQyUdaEEh/C2Q8VpedlDshSe39aSOWgYHCyEs1OdVmuLWtcbVjoa45Opr0ogtdRmHSXP81lJg/n0jZTbuJzTdSf/vOEczQkkX/cN7Yy4q3yyohoH4hZppsxL8HpZPjkt3Zrlw56tIUODJ4aHQuKTbg4o7jT/K1CPNK7EiRjFeX2FoO8KPzTrx9kZlUVKwXYv80uhaLthBC6bp1n/4ofpEJvNElG/aEuLf1NIQW8Uq8+hE74gclnD06kyDa6oj3WPSwQifIWAGOjFnPYK8FBGaZtUNcJsrOjyEVTf4udtnTIaKb+3um3BJhbyiUZ7wX0e3EYXw0H5RPNe0ZbGd2nckOii02VktdpqEoVa/7PSY8DuLX9GMu8texJnsGL8C4g8KagXr94fr/6cHWzZruULo2nZKKf1QJhGyGcxI36ktSyQ96puMiUEaLmcwP5F6L3+dOjlHSQ2lp9bF0E5P+WYu158QMBaEPThUlcVBv3tm+JXZ9hj7cFEt6cii16enYxce+OLzP33tDc/KMYRhjwmyDCx1J81meCpX8uNpXSwcytBRXmKEzM699VJUUZEo1Q23wbhS0sB8weI4apa X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(376002)(39860400002)(346002)(136003)(396003)(451199018)(36840700001)(40470700004)(46966006)(2906002)(83380400001)(6666004)(7696005)(36756003)(40460700003)(26005)(1076003)(5660300002)(356005)(8936002)(40480700001)(186003)(16526019)(86362001)(41300700001)(2616005)(8676002)(4326008)(921005)(47076005)(7416002)(426003)(70206006)(70586007)(336012)(110136005)(82740400003)(478600001)(316002)(81166007)(54906003)(82310400005)(36860700001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2023 09:24:29.4932 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4ef8e9f1-b34b-43a0-de72-08db22db9506 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT033.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB6318 From: Honglei Huang Move virtio_gpu_virgl_resource_unmap to virtio-gpu.c cause virtio-gpu.so call this function but this function in virtio-gpu-gl.so before. Add virgl dependency into virtio-gpu-gl.so. Suggested-by: Stefano Stabellini Signed-off-by: Honglei Huang Reviewed-by: Huang Rui Signed-off-by: Huang Rui --- hw/display/meson.build | 2 +- hw/display/virtio-gpu-virgl.c | 17 ----------------- hw/display/virtio-gpu.c | 19 +++++++++++++++++++ 3 files changed, 20 insertions(+), 18 deletions(-) diff --git a/hw/display/meson.build b/hw/display/meson.build index 7a725ed80e..21999dfbe0 100644 --- a/hw/display/meson.build +++ b/hw/display/meson.build @@ -67,7 +67,7 @@ softmmu_ss.add(when: [pixman, 'CONFIG_ATI_VGA'], if_true: files('ati.c', 'ati_2d if config_all_devices.has_key('CONFIG_VIRTIO_GPU') virtio_gpu_ss = ss.source_set() virtio_gpu_ss.add(when: 'CONFIG_VIRTIO_GPU', - if_true: [files('virtio-gpu-base.c', 'virtio-gpu.c'), pixman]) + if_true: [files('virtio-gpu-base.c', 'virtio-gpu.c'), pixman, virgl]) virtio_gpu_ss.add(when: 'CONFIG_LINUX', if_true: files('virtio-gpu-udmabuf.c'), if_false: files('virtio-gpu-udmabuf-stubs.c')) virtio_gpu_ss.add(when: 'CONFIG_VHOST_USER_GPU', if_true: files('vhost-user-gpu.c')) diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c index 69083d15a9..d5214e0f43 100644 --- a/hw/display/virtio-gpu-virgl.c +++ b/hw/display/virtio-gpu-virgl.c @@ -636,23 +636,6 @@ static void virgl_cmd_resource_map_blob(VirtIOGPU *g, virtio_gpu_ctrl_response(g, cmd, &resp.hdr, sizeof(resp)); } -int virtio_gpu_virgl_resource_unmap(VirtIOGPU *g, - struct virtio_gpu_simple_resource *res) -{ - if (!res->mapped) { - qemu_log_mask(LOG_GUEST_ERROR, "%s: resource already unmapped %d\n", - __func__, res->resource_id); - return VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; - } - - memory_region_set_enabled(&res->region, false); - memory_region_del_subregion(&g->parent_obj.hostmem, &res->region); - object_unparent(OBJECT(&res->region)); - - res->mapped = NULL; - return virgl_renderer_resource_unmap(res->resource_id); -} - static void virgl_cmd_resource_unmap_blob(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd) { diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index 95e421a525..95eaed61b3 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -31,6 +31,8 @@ #include "qapi/error.h" #include "qemu/error-report.h" +#include + #define VIRTIO_GPU_VM_VERSION 1 static struct virtio_gpu_simple_resource * @@ -873,6 +875,23 @@ void virtio_gpu_cleanup_mapping_iov(VirtIOGPU *g, g_free(iov); } +int virtio_gpu_virgl_resource_unmap(VirtIOGPU *g, + struct virtio_gpu_simple_resource *res) +{ + if (!res->mapped) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: resource already unmapped %d\n", + __func__, res->resource_id); + return VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; + } + + memory_region_set_enabled(&res->region, false); + memory_region_del_subregion(&g->parent_obj.hostmem, &res->region); + object_unparent(OBJECT(&res->region)); + + res->mapped = NULL; + return virgl_renderer_resource_unmap(res->resource_id); +} + static void virtio_gpu_cleanup_mapping(VirtIOGPU *g, struct virtio_gpu_simple_resource *res) { From patchwork Sun Mar 12 09:22:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huang Rui X-Patchwork-Id: 13171170 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A3419C6FD1C for ; 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Tsirkin" , Stefano Stabellini , Anthony PERARD , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Jan Beulich , Antonio Caggiano , "Dr . David Alan Gilbert" , Robert Beckett , , CC: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , "Stewart Hildebrand" , Xenia Ragiadakou , Honglei Huang , Julia Zhang , Chen Jiqian , Huang Rui Subject: [RFC QEMU PATCH 17/18] virtio-gpu: Add video hardware accelerate support for virgl Date: Sun, 12 Mar 2023 17:22:43 +0800 Message-ID: <20230312092244.451465-18-ray.huang@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230312092244.451465-1-ray.huang@amd.com> References: <20230312092244.451465-1-ray.huang@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT045:EE_|PH7PR12MB5901:EE_ X-MS-Office365-Filtering-Correlation-Id: 2230cd2f-e615-45e6-f989-08db22db97b1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: PnQkbM6r1qZs+pSWIT7uQVEAF08dfnMK3vtkNn6EaBZohne2lBoTZr2SU9BspSXQ/+hWFHcJfW3TCGdtqJcQyWEk0L9Qm4PrpC7Ey5dUngo1O+ACThyJneacl5MruDO+tZhrHc+i2m78s+6ZF/WGqI42J4pRsgY/ePOJmoD/uipfXLRRDfbepM0NcCIknTCpuNUnmqK8OlCG9JL6TJ8dUY8OzWoHKXcSX9XWvOubu+urrg1oi5rqZOoWCRJKYITRRn9OmZZTMawvE1d38QY+b/wcPvMRGKWblQGiHrXSOMZmoLSq5qSDj0uLpOjEmcFJ1DSTzrz3UvprB5NnrZg2dyNmmmERFEoQDeHnKRBFnM/Py98bnpfOqZchCL7w4wjPNlu0DE74WE6PVRTxAjbH8Eb9LSsOD2SpPcLUOv85NJi++TdfQcKJVyonZJE/tHOzg0ugGTP2MvNCdwDYQVND5rLgc2MQ8QuKoMNmjjDXLEQ5gBioCB8feM7GUmzvnHYnkJSd1n8qjx01wlaizavz98pq1vH4QKdwUJ/SitE/qHXX0ULatD0Tcr7XJroWQYTSrmVlsCCfxHz6hcxDcc4LW0O7AG5swNUoXByELURwOxSqB5NgjtBDsvTy4zgVmX1NTS+xMOjwJfagIVYZVdiobwa2eieKkfLx98FWmlzx+AEl/bd7Oe2PbPepMLMGOV11daj6Nq8QwvNJZK+4Eb22/iFtgKVcFuWq1LrVrf5JJKyisC85kxwW83gjuEM4G4Pw X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(346002)(376002)(39860400002)(396003)(136003)(451199018)(46966006)(36840700001)(40470700004)(36756003)(81166007)(186003)(110136005)(40460700003)(921005)(54906003)(7696005)(7416002)(478600001)(4326008)(316002)(5660300002)(70206006)(8936002)(2906002)(8676002)(70586007)(41300700001)(36860700001)(16526019)(86362001)(40480700001)(6666004)(82740400003)(2616005)(82310400005)(26005)(1076003)(356005)(426003)(336012)(83380400001)(47076005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2023 09:24:33.9075 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2230cd2f-e615-45e6-f989-08db22db97b1 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT045.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB5901 From: Honglei Huang Add get_drm_fd callback let the guest OS can get render node to using hw accel codec. Signed-off-by: Honglei Huang Signed-off-by: Huang Rui --- hw/display/virtio-gpu-virgl.c | 21 +++++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-) diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c index d5214e0f43..aef735a427 100644 --- a/hw/display/virtio-gpu-virgl.c +++ b/hw/display/virtio-gpu-virgl.c @@ -13,6 +13,7 @@ #include "qemu/osdep.h" #include "qemu/iov.h" +#include "qemu/drm.h" #include "trace.h" #include "hw/virtio/virtio.h" #include "hw/virtio/virtio-gpu.h" @@ -827,12 +828,22 @@ static int virgl_make_context_current(void *opaque, int scanout_idx, qctx); } +static int virgl_get_drm_fd(void *opaque) +{ + int fd = -1; + + fd = qemu_drm_rendernode_open(NULL); + + return fd; +} + static struct virgl_renderer_callbacks virtio_gpu_3d_cbs = { .version = 1, .write_fence = virgl_write_fence, .create_gl_context = virgl_create_context, .destroy_gl_context = virgl_destroy_context, .make_current = virgl_make_context_current, + .get_drm_fd = virgl_get_drm_fd, }; static void virtio_gpu_print_stats(void *opaque) @@ -886,14 +897,20 @@ void virtio_gpu_virgl_reset(VirtIOGPU *g) virgl_renderer_reset(); } + + int virtio_gpu_virgl_init(VirtIOGPU *g) { int ret; +#ifndef VIRGL_RENDERER_USE_VIDEO +#define VIRGL_RENDERER_USE_VIDEO (1 << 11) +#endif + #ifdef VIRGL_RENDERER_VENUS - ret = virgl_renderer_init(g, VIRGL_RENDERER_VENUS, &virtio_gpu_3d_cbs); + ret = virgl_renderer_init(g, VIRGL_RENDERER_VENUS | VIRGL_RENDERER_USE_VIDEO, &virtio_gpu_3d_cbs); #else - ret = virgl_renderer_init(g, 0, &virtio_gpu_3d_cbs); + ret = virgl_renderer_init(g, 0 | VIRGL_RENDERER_USE_VIDEO, &virtio_gpu_3d_cbs); #endif if (ret != 0) { error_report("virgl could not be initialized: %d", ret); From patchwork Sun Mar 12 09:22:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huang Rui X-Patchwork-Id: 13171172 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EC028C74A5B for ; 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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C From: Huang Rui To: Gerd Hoffmann , "Michael S . Tsirkin" , Stefano Stabellini , Anthony PERARD , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Jan Beulich , Antonio Caggiano , "Dr . David Alan Gilbert" , Robert Beckett , , CC: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , "Stewart Hildebrand" , Xenia Ragiadakou , Honglei Huang , Julia Zhang , Chen Jiqian , Huang Rui Subject: [RFC QEMU PATCH 18/18] xen: translate irq of host pci device to gsi Date: Sun, 12 Mar 2023 17:22:44 +0800 Message-ID: <20230312092244.451465-19-ray.huang@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230312092244.451465-1-ray.huang@amd.com> References: <20230312092244.451465-1-ray.huang@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT088:EE_|PH8PR12MB6962:EE_ X-MS-Office365-Filtering-Correlation-Id: cc673529-2423-4135-5ed6-08db22db9a78 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: XJOZrVicCW17z/AcoTuCNDsCWVZBmtGSfp5oLSWAjg/A86NQilOIu5bUUyq7g+Rf3jewmAMNSsj6E4+CmvMZsx5lHjGA2fAVgJBOfelFqEVUEt23AskDYZdCcnQArJKTADn/3zR8htkA1g0sHE8QOmZrmTmhHBjFvccPC5v3NXr+I3oljE80f9J6pS4r3NnrGsMakxShAAa+crZ0RZLQfB6It8XX2IknYhPMoQSHyCCVxvz1MldJwELllb5RXr/gDDkt591Yr/6+uHa0udrrFZPC0KluHRA1a3RwyJMFpK8CI1jniIIuEhtJqYx4HM8zSQB5uBBJlH2o4r9xMlrzitg4JayEU1IbX3K+2t/4CmgO7hBjBiIXfVJGZJl7UZ6Wl0/DindZZN7vZpRWVUIw//4I88kwWpWYuh8/Bq0Owtn44gEcoxshJpoZ//gg4tc8T6R5Wbmc4bX2NxstjevyC90Jvri1FW04av5MUoXLxDG7RnGIlTR64aiRou4UXdqaaA18DDjzDbojQ8NsWFNEkxkeKRKZIbul/tATRT80Qm3BeIzAe0D4JY0xPrlOUktUbcv+03DlteyAqC/zHjPY1XL3T72DAl0PaLv+bjFGKsPDY59L5MkXzXxWgawlCcMeaw9sT5ZpYzt9MVHUflEHB147Z9mptw8GhicWYzkP+IMlhsfmhkd/SuIt6Ugng8cmCb/lbq8F/a71X3Vh6OAX5s6qn/qH1ZL/3PBdQYiL/q9EAkBnC0DZikWWfAUtM8yj X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(136003)(396003)(346002)(39860400002)(376002)(451199018)(40470700004)(36840700001)(46966006)(36860700001)(6666004)(7416002)(5660300002)(8936002)(70586007)(70206006)(4326008)(82310400005)(7696005)(40480700001)(8676002)(83380400001)(54906003)(110136005)(36756003)(316002)(478600001)(426003)(47076005)(41300700001)(40460700003)(336012)(86362001)(82740400003)(2906002)(356005)(921005)(186003)(16526019)(81166007)(1076003)(26005)(4744005)(2616005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2023 09:24:38.6256 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cc673529-2423-4135-5ed6-08db22db9a78 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT088.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB6962 From: Chen Jiqian Use the new interface in the kernel to map pirq for qemu. Signed-off-by: Chen Jiqian Signed-off-by: Huang Rui --- hw/xen/xen-host-pci-device.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/xen/xen-host-pci-device.c b/hw/xen/xen-host-pci-device.c index 8c6e9a1716..6ca841a967 100644 --- a/hw/xen/xen-host-pci-device.c +++ b/hw/xen/xen-host-pci-device.c @@ -9,6 +9,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "qemu/cutils.h" +#include "hw/xen/xen_common.h" #include "xen-host-pci-device.h" #define XEN_HOST_PCI_MAX_EXT_CAP \ @@ -368,7 +369,7 @@ void xen_host_pci_device_get(XenHostPCIDevice *d, uint16_t domain, if (*errp) { goto error; } - d->irq = v; + d->irq = xc_physdev_gsi_from_irq(xen_xc, v); xen_host_pci_get_hex_value(d, "class", &v, errp); if (*errp) {