From patchwork Sun Mar 12 23:15:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 13171891 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AFAD6C7618A for ; Sun, 12 Mar 2023 23:16:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229738AbjCLXQQ (ORCPT ); Sun, 12 Mar 2023 19:16:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38052 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229543AbjCLXQN (ORCPT ); Sun, 12 Mar 2023 19:16:13 -0400 Received: from mail-qt1-x832.google.com (mail-qt1-x832.google.com [IPv6:2607:f8b0:4864:20::832]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 55EF026C23 for ; Sun, 12 Mar 2023 16:16:11 -0700 (PDT) Received: by mail-qt1-x832.google.com with SMTP id h19so11548242qtk.7 for ; Sun, 12 Mar 2023 16:16:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678662970; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=/NAfHzXco6zldfvoqj7JCDbqEcSO07sI8PwkAWaYsfA=; b=OokZaiJCpnD5oAhQfkNIC+T59gteaQHE4PiwicIbHexn3wwhyM86RRbxYPVgBHfRGJ EdmimsprMfFCJeICkrv+imkOwOLEns2PkkmD9TsnQmf3+u4IVCbzjB8dEtWWxnBqkb74 CZRkHXUrmBloa81NMIBz/+/WrV0UguRmVuJ0QACwLmD7+Ox4eB/ZZwkZgHaEB8a6sWa2 +Mdzi4IeZkQF2ftysRuM3NXdf9JM8VVThMtQlQNVMwEtUIMFMhAWUDft+SSWMuEpB4HH HpugeJmUe+ooS0cL0AhrZ0dWa71NOoiS+oe/7ncJjCBOJ3pbyXWJ2tTp+5CgSld0ntKb bWVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678662970; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=/NAfHzXco6zldfvoqj7JCDbqEcSO07sI8PwkAWaYsfA=; b=q+8C99II/q3dJmwXv7JoUFjIAHOvtGlUvS0E05dUqt67H5+jd+42rMLNqPCf3wAUuz UutqwTVVqVTaVLfppP/1NOXi08D9FfEyQxEaT4FSmQRNjrTvAXkiztq3KuA24+9inerX AeGVGuMtdysavEGpyuzBku6aCxtKZ1GfW3qSPOKYz0+fqlVA9y7W9V5A1H1j/lbbCijW CZRgtHgprYMcrgOR0TUiimIrrcq3DJjUlVmjhhWCjrU20C7EnSfYGiJjNXw2ibumPuUf 5ZmVgK5SABJoosPNnuNnsDTSNEOo/uNTcxk1ohjLqcyynznOaKqGBh51gDYN5u94HRXj zKtw== X-Gm-Message-State: AO0yUKXOnW39NJiBepnewtZ8zCmuvLe1TEt6onf1gaizDHpQ1HiwXg7N 9AVK5tu+Sn10QcNHtSdlP+zR9V8qDxAr8XxtwzQ= X-Google-Smtp-Source: AK7set9XzbO64RfWj4xomyRP7VJdmUocrohQOEmQzHErg/vfVJb+t90oVFfpuPrF+Y0unlFKFc5KTQ== X-Received: by 2002:ac8:5996:0:b0:3bf:d11a:c82f with SMTP id e22-20020ac85996000000b003bfd11ac82fmr59823074qte.58.1678662970046; Sun, 12 Mar 2023 16:16:10 -0700 (PDT) Received: from fedora.attlocal.net (69-109-179-158.lightspeed.dybhfl.sbcglobal.net. [69.109.179.158]) by smtp.gmail.com with ESMTPSA id dm21-20020a05620a1d5500b00742f250ebc0sm4307091qkb.9.2023.03.12.16.16.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Mar 2023 16:16:09 -0700 (PDT) From: William Breathitt Gray To: linux-iio@vger.kernel.org Cc: linux-kernel@vger.kernel.org, jic23@kernel.org, lars@metafoo.de, William Breathitt Gray , stable@vger.kernel.org Subject: [PATCH 6.1,6.2,6.3 v3 1/6] counter: 104-quad-8: Fix race condition between FLAG and CNTR reads Date: Sun, 12 Mar 2023 19:15:49 -0400 Message-Id: <20230312231554.134858-1-william.gray@linaro.org> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The Counter (CNTR) register is 24 bits wide, but we can have an effective 25-bit count value by setting bit 24 to the XOR of the Borrow flag and Carry flag. The flags can be read from the FLAG register, but a race condition exists: the Borrow flag and Carry flag are instantaneous and could change by the time the count value is read from the CNTR register. Since the race condition could result in an incorrect 25-bit count value, remove support for 25-bit count values from this driver; hard-coded maximum count values are replaced by a LS7267_CNTR_MAX define for consistency and clarity. Fixes: 28e5d3bb0325 ("iio: 104-quad-8: Add IIO support for the ACCES 104-QUAD-8") Cc: # 6.1.x Cc: # 6.2.x Signed-off-by: William Breathitt Gray --- Changes in v3: - Initialize *val in quad8_count_read() drivers/counter/104-quad-8.c | 29 ++++++++--------------------- 1 file changed, 8 insertions(+), 21 deletions(-) base-commit: fe15c26ee26efa11741a7b632e9f23b01aca4cc6 diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c index deed4afadb29..d59e4f34a680 100644 --- a/drivers/counter/104-quad-8.c +++ b/drivers/counter/104-quad-8.c @@ -97,10 +97,6 @@ struct quad8 { struct quad8_reg __iomem *reg; }; -/* Borrow Toggle flip-flop */ -#define QUAD8_FLAG_BT BIT(0) -/* Carry Toggle flip-flop */ -#define QUAD8_FLAG_CT BIT(1) /* Error flag */ #define QUAD8_FLAG_E BIT(4) /* Up/Down flag */ @@ -133,6 +129,9 @@ struct quad8 { #define QUAD8_CMR_QUADRATURE_X2 0x10 #define QUAD8_CMR_QUADRATURE_X4 0x18 +/* Each Counter is 24 bits wide */ +#define LS7267_CNTR_MAX GENMASK(23, 0) + static int quad8_signal_read(struct counter_device *counter, struct counter_signal *signal, enum counter_signal_level *level) @@ -156,18 +155,10 @@ static int quad8_count_read(struct counter_device *counter, { struct quad8 *const priv = counter_priv(counter); struct channel_reg __iomem *const chan = priv->reg->channel + count->id; - unsigned int flags; - unsigned int borrow; - unsigned int carry; unsigned long irqflags; int i; - flags = ioread8(&chan->control); - borrow = flags & QUAD8_FLAG_BT; - carry = !!(flags & QUAD8_FLAG_CT); - - /* Borrow XOR Carry effectively doubles count range */ - *val = (unsigned long)(borrow ^ carry) << 24; + *val = 0; spin_lock_irqsave(&priv->lock, irqflags); @@ -191,8 +182,7 @@ static int quad8_count_write(struct counter_device *counter, unsigned long irqflags; int i; - /* Only 24-bit values are supported */ - if (val > 0xFFFFFF) + if (val > LS7267_CNTR_MAX) return -ERANGE; spin_lock_irqsave(&priv->lock, irqflags); @@ -806,8 +796,7 @@ static int quad8_count_preset_write(struct counter_device *counter, struct quad8 *const priv = counter_priv(counter); unsigned long irqflags; - /* Only 24-bit values are supported */ - if (preset > 0xFFFFFF) + if (preset > LS7267_CNTR_MAX) return -ERANGE; spin_lock_irqsave(&priv->lock, irqflags); @@ -834,8 +823,7 @@ static int quad8_count_ceiling_read(struct counter_device *counter, *ceiling = priv->preset[count->id]; break; default: - /* By default 0x1FFFFFF (25 bits unsigned) is maximum count */ - *ceiling = 0x1FFFFFF; + *ceiling = LS7267_CNTR_MAX; break; } @@ -850,8 +838,7 @@ static int quad8_count_ceiling_write(struct counter_device *counter, struct quad8 *const priv = counter_priv(counter); unsigned long irqflags; - /* Only 24-bit values are supported */ - if (ceiling > 0xFFFFFF) + if (ceiling > LS7267_CNTR_MAX) return -ERANGE; spin_lock_irqsave(&priv->lock, irqflags); From patchwork Sun Mar 12 23:15:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 13171890 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C87A2C74A4B for ; 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[69.109.179.158]) by smtp.gmail.com with ESMTPSA id dm21-20020a05620a1d5500b00742f250ebc0sm4307091qkb.9.2023.03.12.16.16.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Mar 2023 16:16:11 -0700 (PDT) From: William Breathitt Gray To: linux-iio@vger.kernel.org Cc: linux-kernel@vger.kernel.org, jic23@kernel.org, lars@metafoo.de, William Breathitt Gray , stable@vger.kernel.org Subject: [PATCH 5.15 v3 2/6] counter: 104-quad-8: Fix race condition between FLAG and CNTR reads Date: Sun, 12 Mar 2023 19:15:50 -0400 Message-Id: <20230312231554.134858-2-william.gray@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230312231554.134858-1-william.gray@linaro.org> References: <20230312231554.134858-1-william.gray@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The Counter (CNTR) register is 24 bits wide, but we can have an effective 25-bit count value by setting bit 24 to the XOR of the Borrow flag and Carry flag. The flags can be read from the FLAG register, but a race condition exists: the Borrow flag and Carry flag are instantaneous and could change by the time the count value is read from the CNTR register. Since the race condition could result in an incorrect 25-bit count value, remove support for 25-bit count values from this driver. Fixes: 28e5d3bb0325 ("iio: 104-quad-8: Add IIO support for the ACCES 104-QUAD-8") Cc: # 5.15.x Signed-off-by: William Breathitt Gray --- drivers/counter/104-quad-8.c | 18 +++--------------- 1 file changed, 3 insertions(+), 15 deletions(-) base-commit: bbf9f29bac04f85bbf45af172dcdc9664d8808cb diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c index 0caa60537..643aae0c9 100644 --- a/drivers/counter/104-quad-8.c +++ b/drivers/counter/104-quad-8.c @@ -61,10 +61,6 @@ struct quad8 { #define QUAD8_REG_CHAN_OP 0x11 #define QUAD8_REG_INDEX_INPUT_LEVELS 0x16 #define QUAD8_DIFF_ENCODER_CABLE_STATUS 0x17 -/* Borrow Toggle flip-flop */ -#define QUAD8_FLAG_BT BIT(0) -/* Carry Toggle flip-flop */ -#define QUAD8_FLAG_CT BIT(1) /* Error flag */ #define QUAD8_FLAG_E BIT(4) /* Up/Down flag */ @@ -121,17 +117,9 @@ static int quad8_count_read(struct counter_device *counter, { struct quad8 *const priv = counter->priv; const int base_offset = priv->base + 2 * count->id; - unsigned int flags; - unsigned int borrow; - unsigned int carry; int i; - flags = inb(base_offset + 1); - borrow = flags & QUAD8_FLAG_BT; - carry = !!(flags & QUAD8_FLAG_CT); - - /* Borrow XOR Carry effectively doubles count range */ - *val = (unsigned long)(borrow ^ carry) << 24; + *val = 0; mutex_lock(&priv->lock); @@ -699,8 +687,8 @@ static ssize_t quad8_count_ceiling_read(struct counter_device *counter, mutex_unlock(&priv->lock); - /* By default 0x1FFFFFF (25 bits unsigned) is maximum count */ - return sprintf(buf, "33554431\n"); + /* By default 0xFFFFFF (24 bits unsigned) is maximum count */ + return sprintf(buf, "16777215\n"); } static ssize_t quad8_count_ceiling_write(struct counter_device *counter, From patchwork Sun Mar 12 23:15:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 13171892 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35EEEC7618A for ; Sun, 12 Mar 2023 23:16:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229700AbjCLXQU (ORCPT ); Sun, 12 Mar 2023 19:16:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38086 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229712AbjCLXQP (ORCPT ); Sun, 12 Mar 2023 19:16:15 -0400 Received: from mail-qt1-x82a.google.com (mail-qt1-x82a.google.com [IPv6:2607:f8b0:4864:20::82a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6FC6E27988 for ; Sun, 12 Mar 2023 16:16:13 -0700 (PDT) Received: by mail-qt1-x82a.google.com with SMTP id c3so11553677qtc.8 for ; Sun, 12 Mar 2023 16:16:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678662972; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=AoGPgKe2IxoYrPUIJ5SHvzZG4v3yw/sB6Vnm+zuZIxo=; b=lQ/RO+iSEnK5ZBEa1lcIF0WVTdzciAmoC1PP+hRycMW3GkNDUlO3jt7aGHYwXW+EAj nK4tr6vpvcY/OjlCdUQFM8g8Z9o1o/aqWVy0q2o1YPh236+zKpa9NDUyELiS4vaL2lNN QX9LNF/Ko7ii+zn7FlC3jWr44B+pXkf18zntaAXQnmD8J0FqPuDfjs4HrYutlAoDPFmc bbzNQp8NOxeqmX4/yyJvs984AJ0AEO6g35je8aWkucgTnIirwYUbZT8Z4j2Iysb4fnQZ hBfBMZ5NqDilQUCNqyeMSySz4O8IjcJIW5UNw+fu9ssNeVOKhFyO8F/M0x6K2NZIVB8Q i6Bg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678662972; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AoGPgKe2IxoYrPUIJ5SHvzZG4v3yw/sB6Vnm+zuZIxo=; b=niVmhTmDwIQF0OVVkRiDtXZoYmv9720whE4YK93ze3qlYlGZ8/ZgKovTGks3ZQdcKF OcF4j/mJ2VkIKm+hpaVpCFT1g09hh8cKPW0vc9PXUv6U8ttGcSoSfZyTpct4+HKYh+Cq ML/Q14/jTsbACOtei2lL4SMj/mzz79gCVrzbN2sA4Zvvv+gG/R/81ARqLHsYZjpXslcn LNGZ4XyDaUnmxdr0auHoyOjCd17/DBjUOdzh5ajCEJwmgZA5vK2OWDoLoagNEt9mf+6x a7G91shO9Qy04stSPpm3oRFL1Dcec2AuVFsx6qHN5mOuMgR+hf6suE9Wzz3fPeoKuwWo 6XhA== X-Gm-Message-State: AO0yUKWs5yVR5nxnPNTkyFUL3xNhmpDt8fAiK0sHYQOmNctPjCEAjsfy +xFBOq6SSlgUYJiqWCb1u3Jp+QygQDqWojbH29o= X-Google-Smtp-Source: AK7set9ALguWk4ZSeYP4J36WuS5uA8ksrQLDdeq0RjTAVM1WLijpdqARKxpjw5R5zDnw07rw3KnXYw== X-Received: by 2002:ac8:5bc9:0:b0:3bf:b75a:d7a7 with SMTP id b9-20020ac85bc9000000b003bfb75ad7a7mr16113862qtb.7.1678662972326; Sun, 12 Mar 2023 16:16:12 -0700 (PDT) Received: from fedora.attlocal.net (69-109-179-158.lightspeed.dybhfl.sbcglobal.net. [69.109.179.158]) by smtp.gmail.com with ESMTPSA id dm21-20020a05620a1d5500b00742f250ebc0sm4307091qkb.9.2023.03.12.16.16.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Mar 2023 16:16:12 -0700 (PDT) From: William Breathitt Gray To: linux-iio@vger.kernel.org Cc: linux-kernel@vger.kernel.org, jic23@kernel.org, lars@metafoo.de, William Breathitt Gray , stable@vger.kernel.org Subject: [PATCH 5.10 v3 3/6] counter: 104-quad-8: Fix race condition between FLAG and CNTR reads Date: Sun, 12 Mar 2023 19:15:51 -0400 Message-Id: <20230312231554.134858-3-william.gray@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230312231554.134858-1-william.gray@linaro.org> References: <20230312231554.134858-1-william.gray@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The Counter (CNTR) register is 24 bits wide, but we can have an effective 25-bit count value by setting bit 24 to the XOR of the Borrow flag and Carry flag. The flags can be read from the FLAG register, but a race condition exists: the Borrow flag and Carry flag are instantaneous and could change by the time the count value is read from the CNTR register. Since the race condition could result in an incorrect 25-bit count value, remove support for 25-bit count values from this driver. Fixes: 28e5d3bb0325 ("iio: 104-quad-8: Add IIO support for the ACCES 104-QUAD-8") Cc: # 5.10.x Signed-off-by: William Breathitt Gray --- drivers/counter/104-quad-8.c | 18 +++--------------- 1 file changed, 3 insertions(+), 15 deletions(-) base-commit: e5f315b55f8e09ac17c968da42f9345f64efcdd2 diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c index 21bb2bb76..1b4fdee9d 100644 --- a/drivers/counter/104-quad-8.c +++ b/drivers/counter/104-quad-8.c @@ -62,10 +62,6 @@ struct quad8_iio { #define QUAD8_REG_CHAN_OP 0x11 #define QUAD8_REG_INDEX_INPUT_LEVELS 0x16 #define QUAD8_DIFF_ENCODER_CABLE_STATUS 0x17 -/* Borrow Toggle flip-flop */ -#define QUAD8_FLAG_BT BIT(0) -/* Carry Toggle flip-flop */ -#define QUAD8_FLAG_CT BIT(1) /* Error flag */ #define QUAD8_FLAG_E BIT(4) /* Up/Down flag */ @@ -643,17 +639,9 @@ static int quad8_count_read(struct counter_device *counter, { struct quad8_iio *const priv = counter->priv; const int base_offset = priv->base + 2 * count->id; - unsigned int flags; - unsigned int borrow; - unsigned int carry; int i; - flags = inb(base_offset + 1); - borrow = flags & QUAD8_FLAG_BT; - carry = !!(flags & QUAD8_FLAG_CT); - - /* Borrow XOR Carry effectively doubles count range */ - *val = (unsigned long)(borrow ^ carry) << 24; + *val = 0; mutex_lock(&priv->lock); @@ -1198,8 +1186,8 @@ static ssize_t quad8_count_ceiling_read(struct counter_device *counter, mutex_unlock(&priv->lock); - /* By default 0x1FFFFFF (25 bits unsigned) is maximum count */ - return sprintf(buf, "33554431\n"); + /* By default 0xFFFFFF (24 bits unsigned) is maximum count */ + return sprintf(buf, "16777215\n"); } static ssize_t quad8_count_ceiling_write(struct counter_device *counter, From patchwork Sun Mar 12 23:15:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 13171893 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01449C7618D for ; Sun, 12 Mar 2023 23:16:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229796AbjCLXQW (ORCPT ); Sun, 12 Mar 2023 19:16:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38054 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229735AbjCLXQQ (ORCPT ); Sun, 12 Mar 2023 19:16:16 -0400 Received: from mail-qv1-xf2e.google.com (mail-qv1-xf2e.google.com [IPv6:2607:f8b0:4864:20::f2e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5B7D6279A8 for ; Sun, 12 Mar 2023 16:16:14 -0700 (PDT) Received: by mail-qv1-xf2e.google.com with SMTP id ks17so7241586qvb.6 for ; Sun, 12 Mar 2023 16:16:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678662973; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=bCcXjp0lmCj4QKMRCOzzdkCGwVUe3cwJnV9tyaVVNvo=; b=U8pWOtImrgJIFjVZj/Xq28/NpjxPFf4vLzvZkVXzha0RwiZNbGTkVlx+8nsrFxRvrx jXOd94daNGzJuQaiJoKqIAW72RfljfcnTf8SmgRtf2Yy/4jyh93POzHWWPyP3/vjmDW7 kNS/hwRH0mC8W2H0Dzc3U8gj9PCqhahCDy+U0JjcZpAFiEeUF/p0+moqlX1cyCQHno+h thwIGBFuRVMl6uAz4UISKWlVaMCjtWgXuMoiPEFolSAkISbJJclZUEqpNEt/zWI/bVjb NmL4bLI0fXg6n6khREG9g4j1pISa2iT2g4ZTjFCy3fcZqcsSVrglBeiA069Kvobtap9l +ftA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678662973; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bCcXjp0lmCj4QKMRCOzzdkCGwVUe3cwJnV9tyaVVNvo=; b=oH6l13W5FBBtc3/e1/xF6otqQqwxYHRcHCsNaEv9xtHc+CiVp3gkksM1yzV7X2gE3K WuTwopSHgLhZgx1KL4wX/3/j41FcAmYrGRZFOJaR/e2I+xjoIIKzlftYcVU9ZeBqjQTg YQzXQyQk8pZandb1q129ULfG+zyaIJwf3AEhPz8F4GznT7QhNK1rile/Ajelo1/haSZU C+KzGWmF8XsQUNk/URGDGq5JmEGM9LTWHap4waJAtjF5pgYEeSpz6dsCOivbEsF4Yulb 2135XUtJa8ce9F/K8rGXZmUA6pgKc1VwdBuqHZ1QUeAEhpffecgKSTvCQ+VACsqvfT03 JNPg== X-Gm-Message-State: AO0yUKVN0L1PlbF6bayucUWNedbAulCOSrufxWZ6FcN2W3zVnIxU8xIj hIgmoOTxw27tZBJA2Qu/8VBiEBepJmx7XePlMgQ= X-Google-Smtp-Source: AK7set8TQw8kYJb3ilSZLR2EUfhLXZ5VF3QVyPy8kdoT5WxN/ahhT4HfrRMD+6Pc5opZDP1IqA54Hw== X-Received: by 2002:a05:6214:f06:b0:56e:a96a:2bdc with SMTP id gw6-20020a0562140f0600b0056ea96a2bdcmr11438508qvb.40.1678662973185; Sun, 12 Mar 2023 16:16:13 -0700 (PDT) Received: from fedora.attlocal.net (69-109-179-158.lightspeed.dybhfl.sbcglobal.net. [69.109.179.158]) by smtp.gmail.com with ESMTPSA id dm21-20020a05620a1d5500b00742f250ebc0sm4307091qkb.9.2023.03.12.16.16.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Mar 2023 16:16:12 -0700 (PDT) From: William Breathitt Gray To: linux-iio@vger.kernel.org Cc: linux-kernel@vger.kernel.org, jic23@kernel.org, lars@metafoo.de, William Breathitt Gray , stable@vger.kernel.org Subject: [PATCH 5.4 v3 4/6] counter: 104-quad-8: Fix race condition between FLAG and CNTR reads Date: Sun, 12 Mar 2023 19:15:52 -0400 Message-Id: <20230312231554.134858-4-william.gray@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230312231554.134858-1-william.gray@linaro.org> References: <20230312231554.134858-1-william.gray@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The Counter (CNTR) register is 24 bits wide, but we can have an effective 25-bit count value by setting bit 24 to the XOR of the Borrow flag and Carry flag. The flags can be read from the FLAG register, but a race condition exists: the Borrow flag and Carry flag are instantaneous and could change by the time the count value is read from the CNTR register. Since the race condition could result in an incorrect 25-bit count value, remove support for 25-bit count values from this driver. Fixes: 28e5d3bb0325 ("iio: 104-quad-8: Add IIO support for the ACCES 104-QUAD-8") Cc: # 5.4.x Signed-off-by: William Breathitt Gray --- drivers/counter/104-quad-8.c | 20 +++----------------- 1 file changed, 3 insertions(+), 17 deletions(-) base-commit: 126ee8982bfcae6111f0fd157ee5cdd0ec7f5ca5 diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c index f261a57af..48de69f58 100644 --- a/drivers/counter/104-quad-8.c +++ b/drivers/counter/104-quad-8.c @@ -57,10 +57,6 @@ struct quad8_iio { #define QUAD8_REG_CHAN_OP 0x11 #define QUAD8_REG_INDEX_INPUT_LEVELS 0x16 -/* Borrow Toggle flip-flop */ -#define QUAD8_FLAG_BT BIT(0) -/* Carry Toggle flip-flop */ -#define QUAD8_FLAG_CT BIT(1) /* Error flag */ #define QUAD8_FLAG_E BIT(4) /* Up/Down flag */ @@ -639,19 +635,9 @@ static int quad8_count_read(struct counter_device *counter, { struct quad8_iio *const priv = counter->priv; const int base_offset = priv->base + 2 * count->id; - unsigned int flags; - unsigned int borrow; - unsigned int carry; - unsigned long position; + unsigned long position = 0; int i; - flags = inb(base_offset + 1); - borrow = flags & QUAD8_FLAG_BT; - carry = !!(flags & QUAD8_FLAG_CT); - - /* Borrow XOR Carry effectively doubles count range */ - position = (unsigned long)(borrow ^ carry) << 24; - mutex_lock(&priv->lock); /* Reset Byte Pointer; transfer Counter to Output Latch */ @@ -1204,8 +1190,8 @@ static ssize_t quad8_count_ceiling_read(struct counter_device *counter, mutex_unlock(&priv->lock); - /* By default 0x1FFFFFF (25 bits unsigned) is maximum count */ - return sprintf(buf, "33554431\n"); + /* By default 0xFFFFFF (24 bits unsigned) is maximum count */ + return sprintf(buf, "16777215\n"); } static ssize_t quad8_count_ceiling_write(struct counter_device *counter, From patchwork Sun Mar 12 23:15:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 13171894 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 25264C7618A for ; Sun, 12 Mar 2023 23:16:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229802AbjCLXQW (ORCPT ); Sun, 12 Mar 2023 19:16:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38128 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229450AbjCLXQR (ORCPT ); Sun, 12 Mar 2023 19:16:17 -0400 Received: from mail-qv1-xf2e.google.com (mail-qv1-xf2e.google.com [IPv6:2607:f8b0:4864:20::f2e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3104327D72 for ; Sun, 12 Mar 2023 16:16:15 -0700 (PDT) Received: by mail-qv1-xf2e.google.com with SMTP id cz13so464047qvb.0 for ; Sun, 12 Mar 2023 16:16:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678662974; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=L8b35TlVLwc8Sn7ZUBoVNCvt/IPK58Jissfx4Uxljug=; b=Q3UJgXN8SqUOOQzmoWlEYuWnWxqDpR2YRmndObkq0k6jeii7ykhFyA0VXlq1Hv9B/d H7srsVf7k+f1Y65foBIOs9MtLJApq1XFVNtoXGRfdyhm+BP5GXH7oEERJ378p2HsDELf VZ2nW4s6A4rp8PVKTVrOPUxAxSIL2Gwj0PV4aw1VD+2MVqROmVuZh/ZT069wyz9EE4Z3 OmaZP2AYprOQ1Szy9sg4g6bG2Pa4kGSdyYn9GuboJeK9cqnZZyYsWYV+L9KdbqvydQmk aq6V1eUpIci+hkQYskMG9GvzIRAvJSOVDq8h91jwNpsAJJIOsYUwuxpnV8uwoNlRgtKb lcWg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678662974; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=L8b35TlVLwc8Sn7ZUBoVNCvt/IPK58Jissfx4Uxljug=; b=l2CltQIO0vwcBPoCXgb3nFGshqLlX2lJwluD23Rj7Ai35I3gLx5yPB5U4l2lWN6rlH NGq8NAoztIegSMoejz7SRWW9HyrcumE8J6WX5+fcvkvRg9iRhp+qVEx+n5f7ZVKGpW7V a9t2HLFofbjSej14cnKPtftCJplr+1rlsWtrsPv4h4vZfN0Nt9XhUEHo2z2h6IR0ci9x aBJ2Q9M33sXlc9BA3RigGVsZc0XaF3A3mVHOJUTWsUyCZuV44turxBUtGb6wtlITlo8s CAeI/Jo0CtgiUCneLgh9+d2ZNt0oj+Y10bt5nKWNx6nCo0F/14P2wnpgy4NMczSIDUDe FKKA== X-Gm-Message-State: AO0yUKWko06WWmlYmX7AzJGon2BJAYOg73S9nrQzbEmbMboINr4g9Qyj XzW6i+1XoQUJgpAFhYvkcWoYhb/Qaeo1WIfrNOU= X-Google-Smtp-Source: AK7set8qhhF7wHcTTBx/iWbo8fMfYcdSC9CXEpBiNnKBI9VNL+8RJcl/KQ7f/lK6iUda5pkecOme0Q== X-Received: by 2002:a05:6214:1cc9:b0:5a3:fd18:e734 with SMTP id g9-20020a0562141cc900b005a3fd18e734mr5302463qvd.35.1678662974109; Sun, 12 Mar 2023 16:16:14 -0700 (PDT) Received: from fedora.attlocal.net (69-109-179-158.lightspeed.dybhfl.sbcglobal.net. [69.109.179.158]) by smtp.gmail.com with ESMTPSA id dm21-20020a05620a1d5500b00742f250ebc0sm4307091qkb.9.2023.03.12.16.16.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Mar 2023 16:16:13 -0700 (PDT) From: William Breathitt Gray To: linux-iio@vger.kernel.org Cc: linux-kernel@vger.kernel.org, jic23@kernel.org, lars@metafoo.de, William Breathitt Gray , stable@vger.kernel.org Subject: [PATCH 4.19 v3 5/6] iio: counter: 104-quad-8: Fix race condition between FLAG and CNTR reads Date: Sun, 12 Mar 2023 19:15:53 -0400 Message-Id: <20230312231554.134858-5-william.gray@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230312231554.134858-1-william.gray@linaro.org> References: <20230312231554.134858-1-william.gray@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The Counter (CNTR) register is 24 bits wide, but we can have an effective 25-bit count value by setting bit 24 to the XOR of the Borrow flag and Carry flag. The flags can be read from the FLAG register, but a race condition exists: the Borrow flag and Carry flag are instantaneous and could change by the time the count value is read from the CNTR register. Since the race condition could result in an incorrect 25-bit count value, remove support for 25-bit count values from this driver. Fixes: 28e5d3bb0325 ("iio: 104-quad-8: Add IIO support for the ACCES 104-QUAD-8") Cc: # 4.19.x Signed-off-by: William Breathitt Gray --- drivers/iio/counter/104-quad-8.c | 14 +------------- 1 file changed, 1 insertion(+), 13 deletions(-) base-commit: 6a98afd74b4c2016fb87f5c3b7ce1c53ac215c13 diff --git a/drivers/iio/counter/104-quad-8.c b/drivers/iio/counter/104-quad-8.c index 92be8d0f7..92e68cada 100644 --- a/drivers/iio/counter/104-quad-8.c +++ b/drivers/iio/counter/104-quad-8.c @@ -61,10 +61,6 @@ struct quad8_iio { #define QUAD8_REG_CHAN_OP 0x11 #define QUAD8_REG_INDEX_INPUT_LEVELS 0x16 -/* Borrow Toggle flip-flop */ -#define QUAD8_FLAG_BT BIT(0) -/* Carry Toggle flip-flop */ -#define QUAD8_FLAG_CT BIT(1) /* Error flag */ #define QUAD8_FLAG_E BIT(4) /* Up/Down flag */ @@ -97,9 +93,6 @@ static int quad8_read_raw(struct iio_dev *indio_dev, { struct quad8_iio *const priv = iio_priv(indio_dev); const int base_offset = priv->base + 2 * chan->channel; - unsigned int flags; - unsigned int borrow; - unsigned int carry; int i; switch (mask) { @@ -110,12 +103,7 @@ static int quad8_read_raw(struct iio_dev *indio_dev, return IIO_VAL_INT; } - flags = inb(base_offset + 1); - borrow = flags & QUAD8_FLAG_BT; - carry = !!(flags & QUAD8_FLAG_CT); - - /* Borrow XOR Carry effectively doubles count range */ - *val = (borrow ^ carry) << 24; + *val = 0; /* Reset Byte Pointer; transfer Counter to Output Latch */ outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP | QUAD8_RLD_CNTR_OUT, From patchwork Sun Mar 12 23:15:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 13171895 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6CE37C6FD19 for ; Sun, 12 Mar 2023 23:16:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229663AbjCLXQ0 (ORCPT ); Sun, 12 Mar 2023 19:16:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38074 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229752AbjCLXQR (ORCPT ); Sun, 12 Mar 2023 19:16:17 -0400 Received: from mail-qt1-x832.google.com (mail-qt1-x832.google.com [IPv6:2607:f8b0:4864:20::832]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2906C26C26 for ; Sun, 12 Mar 2023 16:16:16 -0700 (PDT) Received: by mail-qt1-x832.google.com with SMTP id r16so11543348qtx.9 for ; Sun, 12 Mar 2023 16:16:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678662975; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Y+Xk38KToa9bLZ6GwBjSbY6igY/qtneGnbAW3uwQlQw=; b=U5pJuR0FMiFRS8bVo2GOsYZw6KlCjiOm64xYJ7EsPXNq4+kW1OSzlnkR5T2G0Qsn/c uCdqbxAR/2G+glvS2laXxoATTfUFu99/ftiKM7EwNMC0O9rJmgrRF7TZJHJ/FlY7feQy zi5xRusoeLoh+QfohFaHWKPJ2eJ4d9+xA2Gr8/6Cvzn2QM1EBkWn/lPUuYToW/w0bwy6 xXibemPInuK1hSIBio8IVyMMglu6S47xBIRttlIY7pKXT3JlFxgSAG0zI1Zn6Y+ahngw 2aAlFcP/0SpbdOESBiv60hJKFrhgrBmQZ2CM+3A0XAehlwtkQDrVNuo3prN5uYvsJKM6 uP4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678662975; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Y+Xk38KToa9bLZ6GwBjSbY6igY/qtneGnbAW3uwQlQw=; b=EQqwjW5J5ZYQjTaRha3gfmlIm7b65rCjgmYMUsfxUfp4uw6PpImI45RKcAfzPH00AV OFnyzjUf0cvU4OOYkLH9tQhEV+ADNdRU0JwBmyybfD9GYnc7hxVu1anSz/ABk4Kg3v3T ek+NcSHetQ/6zvZXO++nfSXtAiNkVeB+Ih6NOSZL10Ly5Rr+ThW4ahijHImQ4lw2h2eP B1pcoXnxacb7ZjCgq70vUVl13Talr1hpChTylbm0eJwZyjVjfFfCd9b2XjjBItrJgkDd k95/tg1hUVYDm+ophjDlUB5IEKXH/koEeDYhSxLiEdPz49BDw12CgBkGihXZrbJ7bpDd 7UxA== X-Gm-Message-State: AO0yUKUL8xXy8yYA3YkxhoCCmJLTpeBVtA7Ge/ui4I4h5sBEw8SynYNv Y9SflVC+flGm8R7tlHU6eJCINhHrTSP/iOT/7Fo= X-Google-Smtp-Source: AK7set+DQDcxYPBVfh26QNjQ2U371RDTw0iJxDP2a1+zVcV+3ohD/VhgvBXJMFtgNJ5hxSr7lMepMw== X-Received: by 2002:a05:622a:1650:b0:3bf:c5a3:6143 with SMTP id y16-20020a05622a165000b003bfc5a36143mr58195499qtj.27.1678662975154; Sun, 12 Mar 2023 16:16:15 -0700 (PDT) Received: from fedora.attlocal.net (69-109-179-158.lightspeed.dybhfl.sbcglobal.net. [69.109.179.158]) by smtp.gmail.com with ESMTPSA id dm21-20020a05620a1d5500b00742f250ebc0sm4307091qkb.9.2023.03.12.16.16.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Mar 2023 16:16:14 -0700 (PDT) From: William Breathitt Gray To: linux-iio@vger.kernel.org Cc: linux-kernel@vger.kernel.org, jic23@kernel.org, lars@metafoo.de, William Breathitt Gray , stable@vger.kernel.org Subject: [PATCH 4.14 v3 6/6] iio: counter: 104-quad-8: Fix race condition between FLAG and CNTR reads Date: Sun, 12 Mar 2023 19:15:54 -0400 Message-Id: <20230312231554.134858-6-william.gray@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230312231554.134858-1-william.gray@linaro.org> References: <20230312231554.134858-1-william.gray@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The Counter (CNTR) register is 24 bits wide, but we can have an effective 25-bit count value by setting bit 24 to the XOR of the Borrow flag and Carry flag. The flags can be read from the FLAG register, but a race condition exists: the Borrow flag and Carry flag are instantaneous and could change by the time the count value is read from the CNTR register. Since the race condition could result in an incorrect 25-bit count value, remove support for 25-bit count values from this driver. Fixes: 28e5d3bb0325 ("iio: 104-quad-8: Add IIO support for the ACCES 104-QUAD-8") Cc: # 4.14.x Signed-off-by: William Breathitt Gray --- drivers/iio/counter/104-quad-8.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) base-commit: 373c2a0d721acdbed9f45bf9816c04edad3704ca diff --git a/drivers/iio/counter/104-quad-8.c b/drivers/iio/counter/104-quad-8.c index 181585ae..bdb07694 100644 --- a/drivers/iio/counter/104-quad-8.c +++ b/drivers/iio/counter/104-quad-8.c @@ -64,9 +64,6 @@ static int quad8_read_raw(struct iio_dev *indio_dev, { struct quad8_iio *const priv = iio_priv(indio_dev); const int base_offset = priv->base + 2 * chan->channel; - unsigned int flags; - unsigned int borrow; - unsigned int carry; int i; switch (mask) { @@ -76,12 +73,7 @@ static int quad8_read_raw(struct iio_dev *indio_dev, return IIO_VAL_INT; } - flags = inb(base_offset + 1); - borrow = flags & BIT(0); - carry = !!(flags & BIT(1)); - - /* Borrow XOR Carry effectively doubles count range */ - *val = (borrow ^ carry) << 24; + *val = 0; /* Reset Byte Pointer; transfer Counter to Output Latch */ outb(0x11, base_offset + 1);