From patchwork Tue Mar 14 01:53:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13173526 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 228A8C6FD19 for ; Tue, 14 Mar 2023 01:43:00 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 5AC0A146E; Tue, 14 Mar 2023 02:42:08 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 5AC0A146E DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1678758178; bh=vr8Kw7ba92HG1JhiR1fBD72PK2abpi9TsV7vewjYowA=; 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d="scan'208";a="711327326" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2023 18:41:06 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org Subject: [PATCH 01/16] soundwire: intel: move common definitions to header file Date: Tue, 14 Mar 2023 09:53:55 +0800 Message-Id: <20230314015410.487311-2-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230314015410.487311-1-yung-chuan.liao@linux.intel.com> References: <20230314015410.487311-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: SWR3BJ545Q4I4RXYFDPITA4HWWZIWQ5X X-Message-ID-Hash: SWR3BJ545Q4I4RXYFDPITA4HWWZIWQ5X X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: <> List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart Prepare for reused for addition of new hardware Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Signed-off-by: Bard Liao --- drivers/soundwire/intel.c | 32 -------------------------------- drivers/soundwire/intel.h | 29 +++++++++++++++++++++++++++++ 2 files changed, 29 insertions(+), 32 deletions(-) diff --git a/drivers/soundwire/intel.c b/drivers/soundwire/intel.c index 2651767272c7..20067f9cd128 100644 --- a/drivers/soundwire/intel.c +++ b/drivers/soundwire/intel.c @@ -19,38 +19,6 @@ #include "bus.h" #include "intel.h" - -enum intel_pdi_type { - INTEL_PDI_IN = 0, - INTEL_PDI_OUT = 1, - INTEL_PDI_BD = 2, -}; - -#define cdns_to_intel(_cdns) container_of(_cdns, struct sdw_intel, cdns) - -/* - * Read, write helpers for HW registers - */ -static inline int intel_readl(void __iomem *base, int offset) -{ - return readl(base + offset); -} - -static inline void intel_writel(void __iomem *base, int offset, int value) -{ - writel(value, base + offset); -} - -static inline u16 intel_readw(void __iomem *base, int offset) -{ - return readw(base + offset); -} - -static inline void intel_writew(void __iomem *base, int offset, u16 value) -{ - writew(value, base + offset); -} - static int intel_wait_bit(void __iomem *base, int offset, u32 mask, u32 target) { int timeout = 10; diff --git a/drivers/soundwire/intel.h b/drivers/soundwire/intel.h index de9883313c8f..089c41babfc1 100644 --- a/drivers/soundwire/intel.h +++ b/drivers/soundwire/intel.h @@ -50,6 +50,35 @@ struct sdw_intel { #endif }; +enum intel_pdi_type { + INTEL_PDI_IN = 0, + INTEL_PDI_OUT = 1, + INTEL_PDI_BD = 2, +}; + +/* + * Read, write helpers for HW registers + */ +static inline int intel_readl(void __iomem *base, int offset) +{ + return readl(base + offset); +} + +static inline void intel_writel(void __iomem *base, int offset, int value) +{ + writel(value, base + offset); +} + +static inline u16 intel_readw(void __iomem *base, int offset) +{ + return readw(base + offset); +} + +static inline void intel_writew(void __iomem *base, int offset, u16 value) +{ + writew(value, base + offset); +} + #define cdns_to_intel(_cdns) container_of(_cdns, struct sdw_intel, cdns) #define INTEL_MASTER_RESET_ITERATIONS 10 From patchwork Tue Mar 14 01:53:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13173528 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 62BD9C61DA4 for ; Tue, 14 Mar 2023 01:43:28 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id CAB63146F; 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d="scan'208";a="316949220" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2023 18:41:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10648"; a="711327350" X-IronPort-AV: E=Sophos;i="5.98,258,1673942400"; d="scan'208";a="711327350" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2023 18:41:08 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org Subject: [PATCH 02/16] soundwire: intel: remove stale/misleading comment Date: Tue, 14 Mar 2023 09:53:56 +0800 Message-Id: <20230314015410.487311-3-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230314015410.487311-1-yung-chuan.liao@linux.intel.com> References: <20230314015410.487311-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: 5RGSVKJ6S5EVDD234OGOVRBVUFEK6OKD X-Message-ID-Hash: 5RGSVKJ6S5EVDD234OGOVRBVUFEK6OKD X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart The PDIs don't really have a notion of rates and formats, only channels are relevant. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Signed-off-by: Bard Liao --- drivers/soundwire/intel.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/soundwire/intel.c b/drivers/soundwire/intel.c index 20067f9cd128..924dff670170 100644 --- a/drivers/soundwire/intel.c +++ b/drivers/soundwire/intel.c @@ -1056,7 +1056,6 @@ static int intel_create_dai(struct sdw_cdns *cdns, if (num == 0) return 0; - /* TODO: Read supported rates/formats from hardware */ for (i = off; i < (off + num); i++) { dais[i].name = devm_kasprintf(cdns->dev, GFP_KERNEL, "SDW%d Pin%d", From patchwork Tue Mar 14 01:53:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13173527 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 81DCAC61DA4 for ; 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X-IronPort-AV: E=McAfee;i="6500,9779,10648"; a="316949227" X-IronPort-AV: E=Sophos;i="5.98,258,1673942400"; d="scan'208";a="316949227" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2023 18:41:12 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10648"; a="711327372" X-IronPort-AV: E=Sophos;i="5.98,258,1673942400"; d="scan'208";a="711327372" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2023 18:41:10 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org Subject: [PATCH 03/16] soundwire: intel: remove PDI-level restrictions on rates and formats Date: Tue, 14 Mar 2023 09:53:57 +0800 Message-Id: <20230314015410.487311-4-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230314015410.487311-1-yung-chuan.liao@linux.intel.com> References: <20230314015410.487311-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: SV7DGVWMQORE3KFZWWUBB7KKGII6UVBZ X-Message-ID-Hash: SV7DGVWMQORE3KFZWWUBB7KKGII6UVBZ X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart This is not relevant and not aligned with hardware definitions. In addition, we've tested higher resolution formats so this is ignored at a higher level. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Signed-off-by: Bard Liao --- drivers/soundwire/intel.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/soundwire/intel.c b/drivers/soundwire/intel.c index 924dff670170..6c17baab7923 100644 --- a/drivers/soundwire/intel.c +++ b/drivers/soundwire/intel.c @@ -1066,15 +1066,11 @@ static int intel_create_dai(struct sdw_cdns *cdns, if (type == INTEL_PDI_BD || type == INTEL_PDI_OUT) { dais[i].playback.channels_min = 1; dais[i].playback.channels_max = max_ch; - dais[i].playback.rates = SNDRV_PCM_RATE_48000; - dais[i].playback.formats = SNDRV_PCM_FMTBIT_S16_LE; } if (type == INTEL_PDI_BD || type == INTEL_PDI_IN) { dais[i].capture.channels_min = 1; dais[i].capture.channels_max = max_ch; - dais[i].capture.rates = SNDRV_PCM_RATE_48000; - dais[i].capture.formats = SNDRV_PCM_FMTBIT_S16_LE; } dais[i].ops = &intel_pcm_dai_ops; From patchwork Tue Mar 14 01:53:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13173530 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DCDBFC6FD19 for ; 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X-IronPort-AV: E=McAfee;i="6500,9779,10648"; a="316949234" X-IronPort-AV: E=Sophos;i="5.98,258,1673942400"; d="scan'208";a="316949234" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2023 18:41:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10648"; a="711327386" X-IronPort-AV: E=Sophos;i="5.98,258,1673942400"; d="scan'208";a="711327386" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2023 18:41:12 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org Subject: [PATCH 04/16] soundwire: intel: remove useless abstraction Date: Tue, 14 Mar 2023 09:53:58 +0800 Message-Id: <20230314015410.487311-5-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230314015410.487311-1-yung-chuan.liao@linux.intel.com> References: <20230314015410.487311-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: LWI2GJHB3GRXOJZKGWP5W7OVZ4ZN2X4D X-Message-ID-Hash: LWI2GJHB3GRXOJZKGWP5W7OVZ4ZN2X4D X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart PDM is supported in the hardware but never enabled: there are no known PDM-based devices. We can directly call the PCM helper. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Signed-off-by: Bard Liao --- drivers/soundwire/intel.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/drivers/soundwire/intel.c b/drivers/soundwire/intel.c index 6c17baab7923..2c1c905f8889 100644 --- a/drivers/soundwire/intel.c +++ b/drivers/soundwire/intel.c @@ -586,13 +586,6 @@ static int intel_pdi_stream_ch_update(struct sdw_intel *sdw, return 0; } -static int intel_pdi_ch_update(struct sdw_intel *sdw) -{ - intel_pdi_stream_ch_update(sdw, &sdw->cdns.pcm); - - return 0; -} - static void intel_pdi_shim_configure(struct sdw_intel *sdw, struct sdw_cdns_pdi *pdi) { @@ -1094,7 +1087,7 @@ static int intel_register_dai(struct sdw_intel *sdw) if (ret) return ret; - intel_pdi_ch_update(sdw); + intel_pdi_stream_ch_update(sdw, &sdw->cdns.pcm); /* DAIs are created based on total number of PDIs supported */ num_dai = cdns->pcm.num_pdi; From patchwork Tue Mar 14 01:53:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13173529 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BBDCCC61DA4 for ; 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X-IronPort-AV: E=McAfee;i="6500,9779,10648"; a="316949242" X-IronPort-AV: E=Sophos;i="5.98,258,1673942400"; d="scan'208";a="316949242" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2023 18:41:16 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10648"; a="711327399" X-IronPort-AV: E=Sophos;i="5.98,258,1673942400"; d="scan'208";a="711327399" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2023 18:41:14 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org Subject: [PATCH 05/16] soundwire: intel: simplify sync_go sequence Date: Tue, 14 Mar 2023 09:53:59 +0800 Message-Id: <20230314015410.487311-6-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230314015410.487311-1-yung-chuan.liao@linux.intel.com> References: <20230314015410.487311-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: UMHUFYUDD6A6FKDPRNRYUCDPBTUM733M X-Message-ID-Hash: UMHUFYUDD6A6FKDPRNRYUCDPBTUM733M X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart In the existing code, the SHIM_SYNC::SYNC_GO bit is set, and the code waits for it to return to zero. That second wait part is just wrong: the SYNC_GO bit is *write-only* so there's no way to know if it's cleared by hardware. The code works because the value for a read-only bit is zero, but that's really just luck. Simplify the sequence to a plain read-modify-write. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Signed-off-by: Bard Liao --- drivers/soundwire/intel.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/drivers/soundwire/intel.c b/drivers/soundwire/intel.c index 2c1c905f8889..6fdb10117e59 100644 --- a/drivers/soundwire/intel.c +++ b/drivers/soundwire/intel.c @@ -475,7 +475,6 @@ static int intel_shim_sync_go_unlocked(struct sdw_intel *sdw) { void __iomem *shim = sdw->link_res->shim; u32 sync_reg; - int ret; /* Read SYNC register */ sync_reg = intel_readl(shim, SDW_SHIM_SYNC); @@ -487,13 +486,9 @@ static int intel_shim_sync_go_unlocked(struct sdw_intel *sdw) */ sync_reg |= SDW_SHIM_SYNC_SYNCGO; - ret = intel_clear_bit(shim, SDW_SHIM_SYNC, sync_reg, - SDW_SHIM_SYNC_SYNCGO); + intel_writel(shim, SDW_SHIM_SYNC, sync_reg); - if (ret < 0) - dev_err(sdw->cdns.dev, "SyncGO clear failed: %d\n", ret); - - return ret; + return 0; } static int intel_shim_sync_go(struct sdw_intel *sdw) From patchwork Tue Mar 14 01:54:00 2023 Content-Type: text/plain; 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d="scan'208";a="711327422" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2023 18:41:16 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org Subject: [PATCH 06/16] soundwire: intel: add sync_arm/sync_go to ops Date: Tue, 14 Mar 2023 09:54:00 +0800 Message-Id: <20230314015410.487311-7-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230314015410.487311-1-yung-chuan.liao@linux.intel.com> References: <20230314015410.487311-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: QF6WYEVTCSC5TJLL6F2LUP4OPKXM62MG X-Message-ID-Hash: QF6WYEVTCSC5TJLL6F2LUP4OPKXM62MG X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart The bus start/stop sequences can be reused between platforms if we add a couple of new callbacks. In following patches the code will be moved to a shared file. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Signed-off-by: Bard Liao --- drivers/soundwire/intel.c | 16 ++++++++++------ drivers/soundwire/intel.h | 20 ++++++++++++++++++++ include/linux/soundwire/sdw_intel.h | 8 ++++++++ 3 files changed, 38 insertions(+), 6 deletions(-) diff --git a/drivers/soundwire/intel.c b/drivers/soundwire/intel.c index 6fdb10117e59..902934cbb27b 100644 --- a/drivers/soundwire/intel.c +++ b/drivers/soundwire/intel.c @@ -686,7 +686,7 @@ static int intel_pre_bank_switch(struct sdw_intel *sdw) if (!bus->multi_link) return 0; - intel_shim_sync_arm(sdw); + sdw_intel_sync_arm(sdw); return 0; } @@ -720,7 +720,7 @@ static int intel_post_bank_switch(struct sdw_intel *sdw) goto unlock; } - ret = intel_shim_sync_go_unlocked(sdw); + ret = sdw_intel_sync_go_unlocked(sdw); unlock: mutex_unlock(sdw->link_res->shim_lock); @@ -1140,7 +1140,7 @@ static int intel_start_bus(struct sdw_intel *sdw) * gsync is enabled */ if (bus->multi_link) - intel_shim_sync_arm(sdw); + sdw_intel_sync_arm(sdw); ret = sdw_cdns_init(cdns); if (ret < 0) { @@ -1155,7 +1155,7 @@ static int intel_start_bus(struct sdw_intel *sdw) } if (bus->multi_link) { - ret = intel_shim_sync_go(sdw); + ret = sdw_intel_sync_go(sdw); if (ret < 0) { dev_err(dev, "%s: sync go failed: %d\n", __func__, ret); goto err_interrupt; @@ -1210,7 +1210,7 @@ static int intel_start_bus_after_reset(struct sdw_intel *sdw) * timeouts when gsync is enabled */ if (bus->multi_link) - intel_shim_sync_arm(sdw); + sdw_intel_sync_arm(sdw); /* * Re-initialize the IP since it was powered-off @@ -1239,7 +1239,7 @@ static int intel_start_bus_after_reset(struct sdw_intel *sdw) } if (bus->multi_link) { - ret = intel_shim_sync_go(sdw); + ret = sdw_intel_sync_go(sdw); if (ret < 0) { dev_err(sdw->cdns.dev, "sync go failed during resume\n"); goto err_interrupt; @@ -1342,6 +1342,10 @@ const struct sdw_intel_hw_ops sdw_intel_cnl_hw_ops = { .pre_bank_switch = intel_pre_bank_switch, .post_bank_switch = intel_post_bank_switch, + + .sync_arm = intel_shim_sync_arm, + .sync_go_unlocked = intel_shim_sync_go_unlocked, + .sync_go = intel_shim_sync_go, }; EXPORT_SYMBOL_NS(sdw_intel_cnl_hw_ops, SOUNDWIRE_INTEL); diff --git a/drivers/soundwire/intel.h b/drivers/soundwire/intel.h index 089c41babfc1..28b21a92e28b 100644 --- a/drivers/soundwire/intel.h +++ b/drivers/soundwire/intel.h @@ -167,4 +167,24 @@ static inline void sdw_intel_shim_wake(struct sdw_intel *sdw, bool wake_enable) SDW_INTEL_OPS(sdw, shim_wake)(sdw, wake_enable); } +static inline void sdw_intel_sync_arm(struct sdw_intel *sdw) +{ + if (SDW_INTEL_CHECK_OPS(sdw, sync_arm)) + SDW_INTEL_OPS(sdw, sync_arm)(sdw); +} + +static inline int sdw_intel_sync_go_unlocked(struct sdw_intel *sdw) +{ + if (SDW_INTEL_CHECK_OPS(sdw, sync_go_unlocked)) + return SDW_INTEL_OPS(sdw, sync_go_unlocked)(sdw); + return -ENOTSUPP; +} + +static inline int sdw_intel_sync_go(struct sdw_intel *sdw) +{ + if (SDW_INTEL_CHECK_OPS(sdw, sync_go)) + return SDW_INTEL_OPS(sdw, sync_go)(sdw); + return -ENOTSUPP; +} + #endif /* __SDW_INTEL_LOCAL_H */ diff --git a/include/linux/soundwire/sdw_intel.h b/include/linux/soundwire/sdw_intel.h index 91f0dc564fe5..06fa30929ebd 100644 --- a/include/linux/soundwire/sdw_intel.h +++ b/include/linux/soundwire/sdw_intel.h @@ -309,6 +309,10 @@ struct sdw_intel; * @shim_wake: enable/disable in-band wake management * @pre_bank_switch: helper for bus management * @post_bank_switch: helper for bus management + * @sync_arm: helper for multi-link synchronization + * @sync_go_unlocked: helper for multi-link synchronization - + * shim_lock is assumed to be locked at higher level + * @sync_go: helper for multi-link synchronization */ struct sdw_intel_hw_ops { void (*debugfs_init)(struct sdw_intel *sdw); @@ -330,6 +334,10 @@ struct sdw_intel_hw_ops { int (*pre_bank_switch)(struct sdw_intel *sdw); int (*post_bank_switch)(struct sdw_intel *sdw); + + void (*sync_arm)(struct sdw_intel *sdw); + int (*sync_go_unlocked)(struct sdw_intel *sdw); + int (*sync_go)(struct sdw_intel *sdw); }; extern const struct sdw_intel_hw_ops sdw_intel_cnl_hw_ops; From patchwork Tue Mar 14 01:54:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13173532 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C5013C61DA4 for ; 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no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart There was no benefit to using the existing abstraction, but since we are going to move the code make sure we do use the ops. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Signed-off-by: Bard Liao --- drivers/soundwire/intel.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/soundwire/intel.c b/drivers/soundwire/intel.c index 902934cbb27b..8395a20e5739 100644 --- a/drivers/soundwire/intel.c +++ b/drivers/soundwire/intel.c @@ -1311,13 +1311,13 @@ static int intel_stop_bus(struct sdw_intel *sdw, bool clock_stop) return ret; } - ret = intel_link_power_down(sdw); + ret = sdw_intel_link_power_down(sdw); if (ret) { dev_err(dev, "%s: Link power down failed: %d\n", __func__, ret); return ret; } - intel_shim_wake(sdw, wake_enable); + sdw_intel_shim_wake(sdw, wake_enable); return 0; } From patchwork Tue Mar 14 01:54:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13173534 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 682ADC61DA4 for ; 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X-IronPort-AV: E=McAfee;i="6500,9779,10648"; a="316949266" X-IronPort-AV: E=Sophos;i="5.98,258,1673942400"; d="scan'208";a="316949266" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2023 18:41:22 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10648"; a="711327459" X-IronPort-AV: E=Sophos;i="5.98,258,1673942400"; d="scan'208";a="711327459" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2023 18:41:20 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org Subject: [PATCH 08/16] soundwire: intel: move bus common sequences to different file Date: Tue, 14 Mar 2023 09:54:02 +0800 Message-Id: <20230314015410.487311-9-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230314015410.487311-1-yung-chuan.liao@linux.intel.com> References: <20230314015410.487311-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: WVAH7ZDZEBE5OXC7QVIPQDPPN5B5ES3F X-Message-ID-Hash: WVAH7ZDZEBE5OXC7QVIPQDPPN5B5ES3F X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart Now that the bus start/stop/clock_stop sequences use the ops, we can move them to a different file to reuse them. Note that we could in theory remove the abstraction for all those sequences and directly call the functions in intel_auxdevice.c. To allow for more flexibility and have means to special-case new platforms, we decided to keep the abstraction. If in time it becomes clear there is no benefit the abstraction will be simplified. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Signed-off-by: Bard Liao --- drivers/soundwire/Makefile | 3 +- drivers/soundwire/intel.c | 199 ------------------------- drivers/soundwire/intel.h | 7 + drivers/soundwire/intel_bus_common.c | 210 +++++++++++++++++++++++++++ 4 files changed, 219 insertions(+), 200 deletions(-) create mode 100644 drivers/soundwire/intel_bus_common.c diff --git a/drivers/soundwire/Makefile b/drivers/soundwire/Makefile index ca97414ada70..8038e840ac5b 100644 --- a/drivers/soundwire/Makefile +++ b/drivers/soundwire/Makefile @@ -20,7 +20,8 @@ soundwire-cadence-y := cadence_master.o obj-$(CONFIG_SOUNDWIRE_CADENCE) += soundwire-cadence.o #Intel driver -soundwire-intel-y := intel.o intel_auxdevice.o intel_init.o dmi-quirks.o +soundwire-intel-y := intel.o intel_auxdevice.o intel_init.o dmi-quirks.o \ + intel_bus_common.o obj-$(CONFIG_SOUNDWIRE_INTEL) += soundwire-intel.o #Qualcomm driver diff --git a/drivers/soundwire/intel.c b/drivers/soundwire/intel.c index 8395a20e5739..77d698908595 100644 --- a/drivers/soundwire/intel.c +++ b/drivers/soundwire/intel.c @@ -1122,205 +1122,6 @@ static int intel_register_dai(struct sdw_intel *sdw) dais, num_dai); } -static int intel_start_bus(struct sdw_intel *sdw) -{ - struct device *dev = sdw->cdns.dev; - struct sdw_cdns *cdns = &sdw->cdns; - struct sdw_bus *bus = &cdns->bus; - int ret; - - ret = sdw_cdns_enable_interrupt(cdns, true); - if (ret < 0) { - dev_err(dev, "%s: cannot enable interrupts: %d\n", __func__, ret); - return ret; - } - - /* - * follow recommended programming flows to avoid timeouts when - * gsync is enabled - */ - if (bus->multi_link) - sdw_intel_sync_arm(sdw); - - ret = sdw_cdns_init(cdns); - if (ret < 0) { - dev_err(dev, "%s: unable to initialize Cadence IP: %d\n", __func__, ret); - goto err_interrupt; - } - - ret = sdw_cdns_exit_reset(cdns); - if (ret < 0) { - dev_err(dev, "%s: unable to exit bus reset sequence: %d\n", __func__, ret); - goto err_interrupt; - } - - if (bus->multi_link) { - ret = sdw_intel_sync_go(sdw); - if (ret < 0) { - dev_err(dev, "%s: sync go failed: %d\n", __func__, ret); - goto err_interrupt; - } - } - sdw_cdns_check_self_clearing_bits(cdns, __func__, - true, INTEL_MASTER_RESET_ITERATIONS); - - return 0; - -err_interrupt: - sdw_cdns_enable_interrupt(cdns, false); - return ret; -} - -static int intel_start_bus_after_reset(struct sdw_intel *sdw) -{ - struct device *dev = sdw->cdns.dev; - struct sdw_cdns *cdns = &sdw->cdns; - struct sdw_bus *bus = &cdns->bus; - bool clock_stop0; - int status; - int ret; - - /* - * An exception condition occurs for the CLK_STOP_BUS_RESET - * case if one or more masters remain active. In this condition, - * all the masters are powered on for they are in the same power - * domain. Master can preserve its context for clock stop0, so - * there is no need to clear slave status and reset bus. - */ - clock_stop0 = sdw_cdns_is_clock_stop(&sdw->cdns); - - if (!clock_stop0) { - - /* - * make sure all Slaves are tagged as UNATTACHED and - * provide reason for reinitialization - */ - - status = SDW_UNATTACH_REQUEST_MASTER_RESET; - sdw_clear_slave_status(bus, status); - - ret = sdw_cdns_enable_interrupt(cdns, true); - if (ret < 0) { - dev_err(dev, "cannot enable interrupts during resume\n"); - return ret; - } - - /* - * follow recommended programming flows to avoid - * timeouts when gsync is enabled - */ - if (bus->multi_link) - sdw_intel_sync_arm(sdw); - - /* - * Re-initialize the IP since it was powered-off - */ - sdw_cdns_init(&sdw->cdns); - - } else { - ret = sdw_cdns_enable_interrupt(cdns, true); - if (ret < 0) { - dev_err(dev, "cannot enable interrupts during resume\n"); - return ret; - } - } - - ret = sdw_cdns_clock_restart(cdns, !clock_stop0); - if (ret < 0) { - dev_err(dev, "unable to restart clock during resume\n"); - goto err_interrupt; - } - - if (!clock_stop0) { - ret = sdw_cdns_exit_reset(cdns); - if (ret < 0) { - dev_err(dev, "unable to exit bus reset sequence during resume\n"); - goto err_interrupt; - } - - if (bus->multi_link) { - ret = sdw_intel_sync_go(sdw); - if (ret < 0) { - dev_err(sdw->cdns.dev, "sync go failed during resume\n"); - goto err_interrupt; - } - } - } - sdw_cdns_check_self_clearing_bits(cdns, __func__, true, INTEL_MASTER_RESET_ITERATIONS); - - return 0; - -err_interrupt: - sdw_cdns_enable_interrupt(cdns, false); - return ret; -} - -static void intel_check_clock_stop(struct sdw_intel *sdw) -{ - struct device *dev = sdw->cdns.dev; - bool clock_stop0; - - clock_stop0 = sdw_cdns_is_clock_stop(&sdw->cdns); - if (!clock_stop0) - dev_err(dev, "%s: invalid configuration, clock was not stopped\n", __func__); -} - -static int intel_start_bus_after_clock_stop(struct sdw_intel *sdw) -{ - struct device *dev = sdw->cdns.dev; - struct sdw_cdns *cdns = &sdw->cdns; - int ret; - - ret = sdw_cdns_enable_interrupt(cdns, true); - if (ret < 0) { - dev_err(dev, "%s: cannot enable interrupts: %d\n", __func__, ret); - return ret; - } - - ret = sdw_cdns_clock_restart(cdns, false); - if (ret < 0) { - dev_err(dev, "%s: unable to restart clock: %d\n", __func__, ret); - sdw_cdns_enable_interrupt(cdns, false); - return ret; - } - - sdw_cdns_check_self_clearing_bits(cdns, "intel_resume_runtime no_quirks", - true, INTEL_MASTER_RESET_ITERATIONS); - - return 0; -} - -static int intel_stop_bus(struct sdw_intel *sdw, bool clock_stop) -{ - struct device *dev = sdw->cdns.dev; - struct sdw_cdns *cdns = &sdw->cdns; - bool wake_enable = false; - int ret; - - if (clock_stop) { - ret = sdw_cdns_clock_stop(cdns, true); - if (ret < 0) - dev_err(dev, "%s: cannot stop clock: %d\n", __func__, ret); - else - wake_enable = true; - } - - ret = sdw_cdns_enable_interrupt(cdns, false); - if (ret < 0) { - dev_err(dev, "%s: cannot disable interrupts: %d\n", __func__, ret); - return ret; - } - - ret = sdw_intel_link_power_down(sdw); - if (ret) { - dev_err(dev, "%s: Link power down failed: %d\n", __func__, ret); - return ret; - } - - sdw_intel_shim_wake(sdw, wake_enable); - - return 0; -} const struct sdw_intel_hw_ops sdw_intel_cnl_hw_ops = { .debugfs_init = intel_debugfs_init, diff --git a/drivers/soundwire/intel.h b/drivers/soundwire/intel.h index 28b21a92e28b..abd1a500defa 100644 --- a/drivers/soundwire/intel.h +++ b/drivers/soundwire/intel.h @@ -187,4 +187,11 @@ static inline int sdw_intel_sync_go(struct sdw_intel *sdw) return -ENOTSUPP; } +/* common bus management */ +int intel_start_bus(struct sdw_intel *sdw); +int intel_start_bus_after_reset(struct sdw_intel *sdw); +void intel_check_clock_stop(struct sdw_intel *sdw); +int intel_start_bus_after_clock_stop(struct sdw_intel *sdw); +int intel_stop_bus(struct sdw_intel *sdw, bool clock_stop); + #endif /* __SDW_INTEL_LOCAL_H */ diff --git a/drivers/soundwire/intel_bus_common.c b/drivers/soundwire/intel_bus_common.c new file mode 100644 index 000000000000..9a06ab58018b --- /dev/null +++ b/drivers/soundwire/intel_bus_common.c @@ -0,0 +1,210 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) +// Copyright(c) 2015-2023 Intel Corporation. All rights reserved. + +#include +#include +#include +#include +#include "cadence_master.h" +#include "bus.h" +#include "intel.h" + +int intel_start_bus(struct sdw_intel *sdw) +{ + struct device *dev = sdw->cdns.dev; + struct sdw_cdns *cdns = &sdw->cdns; + struct sdw_bus *bus = &cdns->bus; + int ret; + + ret = sdw_cdns_enable_interrupt(cdns, true); + if (ret < 0) { + dev_err(dev, "%s: cannot enable interrupts: %d\n", __func__, ret); + return ret; + } + + /* + * follow recommended programming flows to avoid timeouts when + * gsync is enabled + */ + if (bus->multi_link) + sdw_intel_sync_arm(sdw); + + ret = sdw_cdns_init(cdns); + if (ret < 0) { + dev_err(dev, "%s: unable to initialize Cadence IP: %d\n", __func__, ret); + goto err_interrupt; + } + + ret = sdw_cdns_exit_reset(cdns); + if (ret < 0) { + dev_err(dev, "%s: unable to exit bus reset sequence: %d\n", __func__, ret); + goto err_interrupt; + } + + if (bus->multi_link) { + ret = sdw_intel_sync_go(sdw); + if (ret < 0) { + dev_err(dev, "%s: sync go failed: %d\n", __func__, ret); + goto err_interrupt; + } + } + sdw_cdns_check_self_clearing_bits(cdns, __func__, + true, INTEL_MASTER_RESET_ITERATIONS); + + return 0; + +err_interrupt: + sdw_cdns_enable_interrupt(cdns, false); + return ret; +} + +int intel_start_bus_after_reset(struct sdw_intel *sdw) +{ + struct device *dev = sdw->cdns.dev; + struct sdw_cdns *cdns = &sdw->cdns; + struct sdw_bus *bus = &cdns->bus; + bool clock_stop0; + int status; + int ret; + + /* + * An exception condition occurs for the CLK_STOP_BUS_RESET + * case if one or more masters remain active. In this condition, + * all the masters are powered on for they are in the same power + * domain. Master can preserve its context for clock stop0, so + * there is no need to clear slave status and reset bus. + */ + clock_stop0 = sdw_cdns_is_clock_stop(&sdw->cdns); + + if (!clock_stop0) { + + /* + * make sure all Slaves are tagged as UNATTACHED and + * provide reason for reinitialization + */ + + status = SDW_UNATTACH_REQUEST_MASTER_RESET; + sdw_clear_slave_status(bus, status); + + ret = sdw_cdns_enable_interrupt(cdns, true); + if (ret < 0) { + dev_err(dev, "cannot enable interrupts during resume\n"); + return ret; + } + + /* + * follow recommended programming flows to avoid + * timeouts when gsync is enabled + */ + if (bus->multi_link) + sdw_intel_sync_arm(sdw); + + /* + * Re-initialize the IP since it was powered-off + */ + sdw_cdns_init(&sdw->cdns); + + } else { + ret = sdw_cdns_enable_interrupt(cdns, true); + if (ret < 0) { + dev_err(dev, "cannot enable interrupts during resume\n"); + return ret; + } + } + + ret = sdw_cdns_clock_restart(cdns, !clock_stop0); + if (ret < 0) { + dev_err(dev, "unable to restart clock during resume\n"); + goto err_interrupt; + } + + if (!clock_stop0) { + ret = sdw_cdns_exit_reset(cdns); + if (ret < 0) { + dev_err(dev, "unable to exit bus reset sequence during resume\n"); + goto err_interrupt; + } + + if (bus->multi_link) { + ret = sdw_intel_sync_go(sdw); + if (ret < 0) { + dev_err(sdw->cdns.dev, "sync go failed during resume\n"); + goto err_interrupt; + } + } + } + sdw_cdns_check_self_clearing_bits(cdns, __func__, true, INTEL_MASTER_RESET_ITERATIONS); + + return 0; + +err_interrupt: + sdw_cdns_enable_interrupt(cdns, false); + return ret; +} + +void intel_check_clock_stop(struct sdw_intel *sdw) +{ + struct device *dev = sdw->cdns.dev; + bool clock_stop0; + + clock_stop0 = sdw_cdns_is_clock_stop(&sdw->cdns); + if (!clock_stop0) + dev_err(dev, "%s: invalid configuration, clock was not stopped\n", __func__); +} + +int intel_start_bus_after_clock_stop(struct sdw_intel *sdw) +{ + struct device *dev = sdw->cdns.dev; + struct sdw_cdns *cdns = &sdw->cdns; + int ret; + + ret = sdw_cdns_enable_interrupt(cdns, true); + if (ret < 0) { + dev_err(dev, "%s: cannot enable interrupts: %d\n", __func__, ret); + return ret; + } + + ret = sdw_cdns_clock_restart(cdns, false); + if (ret < 0) { + dev_err(dev, "%s: unable to restart clock: %d\n", __func__, ret); + sdw_cdns_enable_interrupt(cdns, false); + return ret; + } + + sdw_cdns_check_self_clearing_bits(cdns, "intel_resume_runtime no_quirks", + true, INTEL_MASTER_RESET_ITERATIONS); + + return 0; +} + +int intel_stop_bus(struct sdw_intel *sdw, bool clock_stop) +{ + struct device *dev = sdw->cdns.dev; + struct sdw_cdns *cdns = &sdw->cdns; + bool wake_enable = false; + int ret; + + if (clock_stop) { + ret = sdw_cdns_clock_stop(cdns, true); + if (ret < 0) + dev_err(dev, "%s: cannot stop clock: %d\n", __func__, ret); + else + wake_enable = true; + } + + ret = sdw_cdns_enable_interrupt(cdns, false); + if (ret < 0) { + dev_err(dev, "%s: cannot disable interrupts: %d\n", __func__, ret); + return ret; + } + + ret = sdw_intel_link_power_down(sdw); + if (ret) { + dev_err(dev, "%s: Link power down failed: %d\n", __func__, ret); + return ret; + } + + sdw_intel_shim_wake(sdw, wake_enable); + + return 0; +} From patchwork Tue Mar 14 01:54:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13173533 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7555EC61DA4 for ; Tue, 14 Mar 2023 01:44:43 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 497281464; Tue, 14 Mar 2023 02:43:51 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 497281464 DKIM-Signature: v=1; a=rsa-sha256; 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13 Mar 2023 18:41:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10648"; a="711327475" X-IronPort-AV: E=Sophos;i="5.98,258,1673942400"; d="scan'208";a="711327475" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2023 18:41:22 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org Subject: [PATCH 09/16] soundwire: intel: add abstraction for cmdsync check Date: Tue, 14 Mar 2023 09:54:03 +0800 Message-Id: <20230314015410.487311-10-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230314015410.487311-1-yung-chuan.liao@linux.intel.com> References: <20230314015410.487311-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: ONS7HORTKEAWW67SLUZTGVXREQ4P7YVI X-Message-ID-Hash: ONS7HORTKEAWW67SLUZTGVXREQ4P7YVI X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart If we add one more callback, we can have common bank switch sequences between old and new hardware: the only difference is where the CMDSYNC register is located. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Signed-off-by: Bard Liao --- drivers/soundwire/intel.c | 24 +++++++++++++----------- drivers/soundwire/intel.h | 7 +++++++ include/linux/soundwire/sdw_intel.h | 3 +++ 3 files changed, 23 insertions(+), 11 deletions(-) diff --git a/drivers/soundwire/intel.c b/drivers/soundwire/intel.c index 77d698908595..1131ecb4b5e7 100644 --- a/drivers/soundwire/intel.c +++ b/drivers/soundwire/intel.c @@ -325,6 +325,15 @@ static void intel_shim_wake(struct sdw_intel *sdw, bool wake_enable) mutex_unlock(sdw->link_res->shim_lock); } +static bool intel_check_cmdsync_unlocked(struct sdw_intel *sdw) +{ + void __iomem *shim = sdw->link_res->shim; + int sync_reg; + + sync_reg = intel_readl(shim, SDW_SHIM_SYNC); + return !!(sync_reg & SDW_SHIM_SYNC_CMDSYNC_MASK); +} + static int intel_link_power_up(struct sdw_intel *sdw) { unsigned int link_id = sdw->instance; @@ -695,8 +704,7 @@ static int intel_post_bank_switch(struct sdw_intel *sdw) { struct sdw_cdns *cdns = &sdw->cdns; struct sdw_bus *bus = &cdns->bus; - void __iomem *shim = sdw->link_res->shim; - int sync_reg, ret; + int ret = 0; /* Write to register only for multi-link */ if (!bus->multi_link) @@ -704,9 +712,6 @@ static int intel_post_bank_switch(struct sdw_intel *sdw) mutex_lock(sdw->link_res->shim_lock); - /* Read SYNC register */ - sync_reg = intel_readl(shim, SDW_SHIM_SYNC); - /* * post_bank_switch() ops is called from the bus in loop for * all the Masters in the steam with the expectation that @@ -715,13 +720,9 @@ static int intel_post_bank_switch(struct sdw_intel *sdw) * * So, set the SYNCGO bit only if CMDSYNC bit is set for any Master. */ - if (!(sync_reg & SDW_SHIM_SYNC_CMDSYNC_MASK)) { - ret = 0; - goto unlock; - } + if (sdw_intel_sync_check_cmdsync_unlocked(sdw)) + ret = sdw_intel_sync_go_unlocked(sdw); - ret = sdw_intel_sync_go_unlocked(sdw); -unlock: mutex_unlock(sdw->link_res->shim_lock); if (ret < 0) @@ -1147,6 +1148,7 @@ const struct sdw_intel_hw_ops sdw_intel_cnl_hw_ops = { .sync_arm = intel_shim_sync_arm, .sync_go_unlocked = intel_shim_sync_go_unlocked, .sync_go = intel_shim_sync_go, + .sync_check_cmdsync_unlocked = intel_check_cmdsync_unlocked, }; EXPORT_SYMBOL_NS(sdw_intel_cnl_hw_ops, SOUNDWIRE_INTEL); diff --git a/drivers/soundwire/intel.h b/drivers/soundwire/intel.h index abd1a500defa..7a69cf755954 100644 --- a/drivers/soundwire/intel.h +++ b/drivers/soundwire/intel.h @@ -187,6 +187,13 @@ static inline int sdw_intel_sync_go(struct sdw_intel *sdw) return -ENOTSUPP; } +static inline bool sdw_intel_sync_check_cmdsync_unlocked(struct sdw_intel *sdw) +{ + if (SDW_INTEL_CHECK_OPS(sdw, sync_check_cmdsync_unlocked)) + return SDW_INTEL_OPS(sdw, sync_check_cmdsync_unlocked)(sdw); + return false; +} + /* common bus management */ int intel_start_bus(struct sdw_intel *sdw); int intel_start_bus_after_reset(struct sdw_intel *sdw); diff --git a/include/linux/soundwire/sdw_intel.h b/include/linux/soundwire/sdw_intel.h index 06fa30929ebd..207701aeeb47 100644 --- a/include/linux/soundwire/sdw_intel.h +++ b/include/linux/soundwire/sdw_intel.h @@ -313,6 +313,8 @@ struct sdw_intel; * @sync_go_unlocked: helper for multi-link synchronization - * shim_lock is assumed to be locked at higher level * @sync_go: helper for multi-link synchronization + * @sync_check_cmdsync_unlocked: helper for multi-link synchronization + * and bank switch - shim_lock is assumed to be locked at higher level */ struct sdw_intel_hw_ops { void (*debugfs_init)(struct sdw_intel *sdw); @@ -338,6 +340,7 @@ struct sdw_intel_hw_ops { void (*sync_arm)(struct sdw_intel *sdw); int (*sync_go_unlocked)(struct sdw_intel *sdw); int (*sync_go)(struct sdw_intel *sdw); + bool (*sync_check_cmdsync_unlocked)(struct sdw_intel *sdw); }; extern const struct sdw_intel_hw_ops sdw_intel_cnl_hw_ops; From patchwork Tue Mar 14 01:54:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13173535 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8CEA8C61DA4 for ; Tue, 14 Mar 2023 01:45:14 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id AC0B51488; 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d="scan'208";a="316949282" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2023 18:41:26 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10648"; a="711327485" X-IronPort-AV: E=Sophos;i="5.98,258,1673942400"; d="scan'208";a="711327485" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2023 18:41:24 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org Subject: [PATCH 10/16] soundwire: intel: move bank switch routine to common intel_bus_common.c Date: Tue, 14 Mar 2023 09:54:04 +0800 Message-Id: <20230314015410.487311-11-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230314015410.487311-1-yung-chuan.liao@linux.intel.com> References: <20230314015410.487311-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: KUIEP2TKEQKTULU2LYGEZPSLATREYDD4 X-Message-ID-Hash: KUIEP2TKEQKTULU2LYGEZPSLATREYDD4 X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart No functionality change, just moving the routines to a common file so that they can be used for new hardware. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Signed-off-by: Bard Liao --- drivers/soundwire/intel.c | 49 ---------------------------- drivers/soundwire/intel.h | 4 +++ drivers/soundwire/intel_bus_common.c | 49 ++++++++++++++++++++++++++++ 3 files changed, 53 insertions(+), 49 deletions(-) diff --git a/drivers/soundwire/intel.c b/drivers/soundwire/intel.c index 1131ecb4b5e7..046c67a2a39b 100644 --- a/drivers/soundwire/intel.c +++ b/drivers/soundwire/intel.c @@ -682,55 +682,6 @@ static int intel_free_stream(struct sdw_intel *sdw, return 0; } -/* - * bank switch routines - */ - -static int intel_pre_bank_switch(struct sdw_intel *sdw) -{ - struct sdw_cdns *cdns = &sdw->cdns; - struct sdw_bus *bus = &cdns->bus; - - /* Write to register only for multi-link */ - if (!bus->multi_link) - return 0; - - sdw_intel_sync_arm(sdw); - - return 0; -} - -static int intel_post_bank_switch(struct sdw_intel *sdw) -{ - struct sdw_cdns *cdns = &sdw->cdns; - struct sdw_bus *bus = &cdns->bus; - int ret = 0; - - /* Write to register only for multi-link */ - if (!bus->multi_link) - return 0; - - mutex_lock(sdw->link_res->shim_lock); - - /* - * post_bank_switch() ops is called from the bus in loop for - * all the Masters in the steam with the expectation that - * we trigger the bankswitch for the only first Master in the list - * and do nothing for the other Masters - * - * So, set the SYNCGO bit only if CMDSYNC bit is set for any Master. - */ - if (sdw_intel_sync_check_cmdsync_unlocked(sdw)) - ret = sdw_intel_sync_go_unlocked(sdw); - - mutex_unlock(sdw->link_res->shim_lock); - - if (ret < 0) - dev_err(sdw->cdns.dev, "Post bank switch failed: %d\n", ret); - - return ret; -} - /* * DAI routines */ diff --git a/drivers/soundwire/intel.h b/drivers/soundwire/intel.h index 7a69cf755954..09d479f2c77b 100644 --- a/drivers/soundwire/intel.h +++ b/drivers/soundwire/intel.h @@ -201,4 +201,8 @@ void intel_check_clock_stop(struct sdw_intel *sdw); int intel_start_bus_after_clock_stop(struct sdw_intel *sdw); int intel_stop_bus(struct sdw_intel *sdw, bool clock_stop); +/* common bank switch routines */ +int intel_pre_bank_switch(struct sdw_intel *sdw); +int intel_post_bank_switch(struct sdw_intel *sdw); + #endif /* __SDW_INTEL_LOCAL_H */ diff --git a/drivers/soundwire/intel_bus_common.c b/drivers/soundwire/intel_bus_common.c index 9a06ab58018b..f180e3bea989 100644 --- a/drivers/soundwire/intel_bus_common.c +++ b/drivers/soundwire/intel_bus_common.c @@ -208,3 +208,52 @@ int intel_stop_bus(struct sdw_intel *sdw, bool clock_stop) return 0; } + +/* + * bank switch routines + */ + +int intel_pre_bank_switch(struct sdw_intel *sdw) +{ + struct sdw_cdns *cdns = &sdw->cdns; + struct sdw_bus *bus = &cdns->bus; + + /* Write to register only for multi-link */ + if (!bus->multi_link) + return 0; + + sdw_intel_sync_arm(sdw); + + return 0; +} + +int intel_post_bank_switch(struct sdw_intel *sdw) +{ + struct sdw_cdns *cdns = &sdw->cdns; + struct sdw_bus *bus = &cdns->bus; + int ret = 0; + + /* Write to register only for multi-link */ + if (!bus->multi_link) + return 0; + + mutex_lock(sdw->link_res->shim_lock); + + /* + * post_bank_switch() ops is called from the bus in loop for + * all the Masters in the steam with the expectation that + * we trigger the bankswitch for the only first Master in the list + * and do nothing for the other Masters + * + * So, set the SYNCGO bit only if CMDSYNC bit is set for any Master. + */ + if (sdw_intel_sync_check_cmdsync_unlocked(sdw)) + ret = sdw_intel_sync_go_unlocked(sdw); + + mutex_unlock(sdw->link_res->shim_lock); + + if (ret < 0) + dev_err(sdw->cdns.dev, "Post bank switch failed: %d\n", ret); + + return ret; +} From patchwork Tue Mar 14 01:54:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13173537 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0E523C61DA4 for ; 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no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart This field is not used, and its definition is not aligned with the hardware specification. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Signed-off-by: Bard Liao --- drivers/soundwire/cadence_master.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/soundwire/cadence_master.c b/drivers/soundwire/cadence_master.c index e835dabb516c..4f34fc72dbd5 100644 --- a/drivers/soundwire/cadence_master.c +++ b/drivers/soundwire/cadence_master.c @@ -33,7 +33,6 @@ MODULE_PARM_DESC(cdns_mcp_int_mask, "Cadence MCP IntMask"); #define CDNS_MCP_CONFIG_MMASTER BIT(7) #define CDNS_MCP_CONFIG_BUS_REL BIT(6) #define CDNS_MCP_CONFIG_SNIFFER BIT(5) -#define CDNS_MCP_CONFIG_SSPMOD BIT(4) #define CDNS_MCP_CONFIG_CMD BIT(3) #define CDNS_MCP_CONFIG_OP GENMASK(2, 0) #define CDNS_MCP_CONFIG_OP_NORMAL 0 From patchwork Tue Mar 14 01:54:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13173538 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 33BD2C6FD19 for ; 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X-IronPort-AV: E=McAfee;i="6500,9779,10648"; a="316949294" X-IronPort-AV: E=Sophos;i="5.98,258,1673942400"; d="scan'208";a="316949294" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2023 18:41:30 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10648"; a="711327521" X-IronPort-AV: E=Sophos;i="5.98,258,1673942400"; d="scan'208";a="711327521" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2023 18:41:28 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org Subject: [PATCH 12/16] soundwire: cadence: add helpers to access IP_MCP registers Date: Tue, 14 Mar 2023 09:54:06 +0800 Message-Id: <20230314015410.487311-13-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230314015410.487311-1-yung-chuan.liao@linux.intel.com> References: <20230314015410.487311-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: SDC3QVLVIRZGOR4C2ZTRW6TUNNMT66R2 X-Message-ID-Hash: SDC3QVLVIRZGOR4C2ZTRW6TUNNMT66R2 X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart The latest Cadence IP splits some of the existing registers into two, separated by a fixed offset. The bitfields themselves remain at the same position, so we can use new helpers to dynamically add the fixed offset. For example, the existing MCP_CONFIG is now split in two with MCP_CONFIG and IP_MCP_CONFIG (the naming comes directly from the design document). This patch adds helpers to access registers with the IP_ prefix. The addition of the 'ip' prefix for helpers, registers and bitfields is intentional to help reviewers spot any mistake. For existing solutions, the offset is exactly zero so there's no functional change - the MCP_CONFIG and IP_MCP_CONFIG are aliased to the same address. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Signed-off-by: Bard Liao --- drivers/soundwire/cadence_master.c | 16 ++++++++++++++++ drivers/soundwire/cadence_master.h | 3 +++ 2 files changed, 19 insertions(+) diff --git a/drivers/soundwire/cadence_master.c b/drivers/soundwire/cadence_master.c index 4f34fc72dbd5..4461a7fa4124 100644 --- a/drivers/soundwire/cadence_master.c +++ b/drivers/soundwire/cadence_master.c @@ -205,6 +205,16 @@ static inline void cdns_writel(struct sdw_cdns *cdns, int offset, u32 value) writel(value, cdns->registers + offset); } +static inline u32 cdns_ip_readl(struct sdw_cdns *cdns, int offset) +{ + return cdns_readl(cdns, cdns->ip_offset + offset); +} + +static inline void cdns_ip_writel(struct sdw_cdns *cdns, int offset, u32 value) +{ + return cdns_writel(cdns, cdns->ip_offset + offset, value); +} + static inline void cdns_updatel(struct sdw_cdns *cdns, int offset, u32 mask, u32 val) { @@ -215,6 +225,12 @@ static inline void cdns_updatel(struct sdw_cdns *cdns, cdns_writel(cdns, offset, tmp); } +static inline void cdns_ip_updatel(struct sdw_cdns *cdns, + int offset, u32 mask, u32 val) +{ + cdns_updatel(cdns, cdns->ip_offset + offset, mask, val); +} + static int cdns_set_wait(struct sdw_cdns *cdns, int offset, u32 mask, u32 value) { int timeout = 10; diff --git a/drivers/soundwire/cadence_master.h b/drivers/soundwire/cadence_master.h index dec0b4f993c1..b653734085d9 100644 --- a/drivers/soundwire/cadence_master.h +++ b/drivers/soundwire/cadence_master.h @@ -107,6 +107,7 @@ struct sdw_cdns_dai_runtime { * @dev: Linux device * @bus: Bus handle * @instance: instance number + * @ip_offset: version-dependent offset to access IP_MCP registers and fields * @response_buf: SoundWire response buffer * @tx_complete: Tx completion * @ports: Data ports @@ -122,6 +123,8 @@ struct sdw_cdns { struct sdw_bus bus; unsigned int instance; + u32 ip_offset; + /* * The datasheet says the RX FIFO AVAIL can be 2 entries more * than the FIFO capacity, so allow for this. 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Rename the relevant fields and change the access methods used for those fields. For existing solutions, this is an iso-functionality change. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Signed-off-by: Bard Liao --- drivers/soundwire/cadence_master.c | 47 +++++++++++++++++------------- 1 file changed, 27 insertions(+), 20 deletions(-) diff --git a/drivers/soundwire/cadence_master.c b/drivers/soundwire/cadence_master.c index 4461a7fa4124..f7499e126404 100644 --- a/drivers/soundwire/cadence_master.c +++ b/drivers/soundwire/cadence_master.c @@ -27,15 +27,17 @@ module_param_named(cnds_mcp_int_mask, interrupt_mask, int, 0444); MODULE_PARM_DESC(cdns_mcp_int_mask, "Cadence MCP IntMask"); #define CDNS_MCP_CONFIG 0x0 - -#define CDNS_MCP_CONFIG_MCMD_RETRY GENMASK(27, 24) -#define CDNS_MCP_CONFIG_MPREQ_DELAY GENMASK(20, 16) -#define CDNS_MCP_CONFIG_MMASTER BIT(7) #define CDNS_MCP_CONFIG_BUS_REL BIT(6) -#define CDNS_MCP_CONFIG_SNIFFER BIT(5) -#define CDNS_MCP_CONFIG_CMD BIT(3) -#define CDNS_MCP_CONFIG_OP GENMASK(2, 0) -#define CDNS_MCP_CONFIG_OP_NORMAL 0 + +#define CDNS_IP_MCP_CONFIG 0x0 /* IP offset added at run-time */ + +#define CDNS_IP_MCP_CONFIG_MCMD_RETRY GENMASK(27, 24) +#define CDNS_IP_MCP_CONFIG_MPREQ_DELAY GENMASK(20, 16) +#define CDNS_IP_MCP_CONFIG_MMASTER BIT(7) +#define CDNS_IP_MCP_CONFIG_SNIFFER BIT(5) +#define CDNS_IP_MCP_CONFIG_CMD BIT(3) +#define CDNS_IP_MCP_CONFIG_OP GENMASK(2, 0) +#define CDNS_IP_MCP_CONFIG_OP_NORMAL 0 #define CDNS_MCP_CONTROL 0x4 @@ -1348,28 +1350,33 @@ int sdw_cdns_init(struct sdw_cdns *cdns) /* Configure mcp config */ val = cdns_readl(cdns, CDNS_MCP_CONFIG); + /* Disable auto bus release */ + val &= ~CDNS_MCP_CONFIG_BUS_REL; + + cdns_writel(cdns, CDNS_MCP_CONFIG, val); + + /* Configure IP mcp config */ + val = cdns_ip_readl(cdns, CDNS_IP_MCP_CONFIG); + /* enable bus operations with clock and data */ - val &= ~CDNS_MCP_CONFIG_OP; - val |= CDNS_MCP_CONFIG_OP_NORMAL; + val &= ~CDNS_IP_MCP_CONFIG_OP; + val |= CDNS_IP_MCP_CONFIG_OP_NORMAL; /* Set cmd mode for Tx and Rx cmds */ - val &= ~CDNS_MCP_CONFIG_CMD; + val &= ~CDNS_IP_MCP_CONFIG_CMD; /* Disable sniffer mode */ - val &= ~CDNS_MCP_CONFIG_SNIFFER; - - /* Disable auto bus release */ - val &= ~CDNS_MCP_CONFIG_BUS_REL; + val &= ~CDNS_IP_MCP_CONFIG_SNIFFER; if (cdns->bus.multi_link) /* Set Multi-master mode to take gsync into account */ - val |= CDNS_MCP_CONFIG_MMASTER; + val |= CDNS_IP_MCP_CONFIG_MMASTER; /* leave frame delay to hardware default of 0x1F */ /* leave command retry to hardware default of 0 */ - cdns_writel(cdns, CDNS_MCP_CONFIG, val); + cdns_ip_writel(cdns, CDNS_IP_MCP_CONFIG, val); /* changes will be committed later */ return 0; @@ -1683,9 +1690,9 @@ int sdw_cdns_clock_restart(struct sdw_cdns *cdns, bool bus_reset) if (!bus_reset) { /* enable bus operations with clock and data */ - cdns_updatel(cdns, CDNS_MCP_CONFIG, - CDNS_MCP_CONFIG_OP, - CDNS_MCP_CONFIG_OP_NORMAL); + cdns_ip_updatel(cdns, CDNS_IP_MCP_CONFIG, + CDNS_IP_MCP_CONFIG_OP, + CDNS_IP_MCP_CONFIG_OP_NORMAL); ret = cdns_config_update(cdns); if (ret < 0) { From patchwork Tue Mar 14 01:54:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13173540 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 470E5C61DA4 for ; Tue, 14 Mar 2023 01:46:33 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 44743F6F; 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d="scan'208";a="316949311" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2023 18:41:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10648"; a="711327558" X-IronPort-AV: E=Sophos;i="5.98,258,1673942400"; d="scan'208";a="711327558" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2023 18:41:32 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org Subject: [PATCH 14/16] soundwire: cadence: split access to IP_MCP_CONTROL fields Date: Tue, 14 Mar 2023 09:54:08 +0800 Message-Id: <20230314015410.487311-15-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230314015410.487311-1-yung-chuan.liao@linux.intel.com> References: <20230314015410.487311-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: B4REOUAERP4JV37N45RNAGCLFBDR7IEJ X-Message-ID-Hash: B4REOUAERP4JV37N45RNAGCLFBDR7IEJ X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart The latest Cadence IP splits the MCP_CONTROL fields in two registers: MCP_CONTROL and IP_MCP_CONTROL. Rename the relevant fields and change the access methods used for those fields. For existing solutions, this is an iso-functionality change. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Signed-off-by: Bard Liao --- drivers/soundwire/cadence_master.c | 41 ++++++++++++++++++------------ 1 file changed, 25 insertions(+), 16 deletions(-) diff --git a/drivers/soundwire/cadence_master.c b/drivers/soundwire/cadence_master.c index f7499e126404..4c82712944b9 100644 --- a/drivers/soundwire/cadence_master.c +++ b/drivers/soundwire/cadence_master.c @@ -41,15 +41,18 @@ MODULE_PARM_DESC(cdns_mcp_int_mask, "Cadence MCP IntMask"); #define CDNS_MCP_CONTROL 0x4 -#define CDNS_MCP_CONTROL_RST_DELAY GENMASK(10, 8) #define CDNS_MCP_CONTROL_CMD_RST BIT(7) #define CDNS_MCP_CONTROL_SOFT_RST BIT(6) -#define CDNS_MCP_CONTROL_SW_RST BIT(5) #define CDNS_MCP_CONTROL_HW_RST BIT(4) -#define CDNS_MCP_CONTROL_CLK_PAUSE BIT(3) #define CDNS_MCP_CONTROL_CLK_STOP_CLR BIT(2) -#define CDNS_MCP_CONTROL_CMD_ACCEPT BIT(1) -#define CDNS_MCP_CONTROL_BLOCK_WAKEUP BIT(0) + +#define CDNS_IP_MCP_CONTROL 0x4 /* IP offset added at run-time */ + +#define CDNS_IP_MCP_CONTROL_RST_DELAY GENMASK(10, 8) +#define CDNS_IP_MCP_CONTROL_SW_RST BIT(5) +#define CDNS_IP_MCP_CONTROL_CLK_PAUSE BIT(3) +#define CDNS_IP_MCP_CONTROL_CMD_ACCEPT BIT(1) +#define CDNS_IP_MCP_CONTROL_BLOCK_WAKEUP BIT(0) #define CDNS_MCP_CMDCTRL 0x8 @@ -1050,6 +1053,7 @@ static void cdns_update_slave_status_work(struct work_struct *work) void sdw_cdns_check_self_clearing_bits(struct sdw_cdns *cdns, const char *string, bool initial_delay, int reset_iterations) { + u32 ip_mcp_control; u32 mcp_control; u32 mcp_config_update; int i; @@ -1057,6 +1061,12 @@ void sdw_cdns_check_self_clearing_bits(struct sdw_cdns *cdns, const char *string if (initial_delay) usleep_range(1000, 1500); + ip_mcp_control = cdns_ip_readl(cdns, CDNS_IP_MCP_CONTROL); + + /* the following bits should be cleared immediately */ + if (ip_mcp_control & CDNS_IP_MCP_CONTROL_SW_RST) + dev_err(cdns->dev, "%s failed: IP_MCP_CONTROL_SW_RST is not cleared\n", string); + mcp_control = cdns_readl(cdns, CDNS_MCP_CONTROL); /* the following bits should be cleared immediately */ @@ -1064,10 +1074,9 @@ void sdw_cdns_check_self_clearing_bits(struct sdw_cdns *cdns, const char *string dev_err(cdns->dev, "%s failed: MCP_CONTROL_CMD_RST is not cleared\n", string); if (mcp_control & CDNS_MCP_CONTROL_SOFT_RST) dev_err(cdns->dev, "%s failed: MCP_CONTROL_SOFT_RST is not cleared\n", string); - if (mcp_control & CDNS_MCP_CONTROL_SW_RST) - dev_err(cdns->dev, "%s failed: MCP_CONTROL_SW_RST is not cleared\n", string); if (mcp_control & CDNS_MCP_CONTROL_CLK_STOP_CLR) dev_err(cdns->dev, "%s failed: MCP_CONTROL_CLK_STOP_CLR is not cleared\n", string); + mcp_config_update = cdns_readl(cdns, CDNS_MCP_CONFIG_UPDATE); if (mcp_config_update & CDNS_MCP_CONFIG_UPDATE_BIT) dev_err(cdns->dev, "%s failed: MCP_CONFIG_UPDATE_BIT is not cleared\n", string); @@ -1344,8 +1353,8 @@ int sdw_cdns_init(struct sdw_cdns *cdns) CDNS_MCP_CONTROL_CMD_RST); /* Set cmd accept mode */ - cdns_updatel(cdns, CDNS_MCP_CONTROL, CDNS_MCP_CONTROL_CMD_ACCEPT, - CDNS_MCP_CONTROL_CMD_ACCEPT); + cdns_ip_updatel(cdns, CDNS_IP_MCP_CONTROL, CDNS_IP_MCP_CONTROL_CMD_ACCEPT, + CDNS_IP_MCP_CONTROL_CMD_ACCEPT); /* Configure mcp config */ val = cdns_readl(cdns, CDNS_MCP_CONFIG); @@ -1606,9 +1615,9 @@ int sdw_cdns_clock_stop(struct sdw_cdns *cdns, bool block_wake) * in clock stop state */ if (block_wake) - cdns_updatel(cdns, CDNS_MCP_CONTROL, - CDNS_MCP_CONTROL_BLOCK_WAKEUP, - CDNS_MCP_CONTROL_BLOCK_WAKEUP); + cdns_ip_updatel(cdns, CDNS_IP_MCP_CONTROL, + CDNS_IP_MCP_CONTROL_BLOCK_WAKEUP, + CDNS_IP_MCP_CONTROL_BLOCK_WAKEUP); list_for_each_entry(slave, &cdns->bus.slaves, node) { if (slave->status == SDW_SLAVE_ATTACHED || @@ -1681,11 +1690,11 @@ int sdw_cdns_clock_restart(struct sdw_cdns *cdns, bool bus_reset) return ret; } - cdns_updatel(cdns, CDNS_MCP_CONTROL, - CDNS_MCP_CONTROL_BLOCK_WAKEUP, 0); + cdns_ip_updatel(cdns, CDNS_IP_MCP_CONTROL, + CDNS_IP_MCP_CONTROL_BLOCK_WAKEUP, 0); - cdns_updatel(cdns, CDNS_MCP_CONTROL, CDNS_MCP_CONTROL_CMD_ACCEPT, - CDNS_MCP_CONTROL_CMD_ACCEPT); + cdns_ip_updatel(cdns, CDNS_IP_MCP_CONTROL, CDNS_IP_MCP_CONTROL_CMD_ACCEPT, + CDNS_IP_MCP_CONTROL_CMD_ACCEPT); if (!bus_reset) { From patchwork Tue Mar 14 01:54:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13173539 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7DB67C61DA4 for ; Tue, 14 Mar 2023 01:46:21 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 8AD141452; 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d="scan'208";a="316949316" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2023 18:41:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10648"; a="711327575" X-IronPort-AV: E=Sophos;i="5.98,258,1673942400"; d="scan'208";a="711327575" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2023 18:41:34 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org Subject: [PATCH 15/16] soundwire: cadence: split access to IP_MCP_CMDCTRL fields Date: Tue, 14 Mar 2023 09:54:09 +0800 Message-Id: <20230314015410.487311-16-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230314015410.487311-1-yung-chuan.liao@linux.intel.com> References: <20230314015410.487311-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: 3IP2ZHMXBPQSR4OC6FMXSXUTSZ46LPBR X-Message-ID-Hash: 3IP2ZHMXBPQSR4OC6FMXSXUTSZ46LPBR X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart The latest Cadence IP splits the MCP_CMDCTRL fields in two registers: MCP_CMDCTRL and IP_MCP_CMDCTRL. Rename the relevant fields and change the access methods used for those fields. In practice we only use the Parity error insertion in IP_CMD_CTRL. For existing solutions, this is an iso-functionality change. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Signed-off-by: Bard Liao --- drivers/soundwire/cadence_master.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/soundwire/cadence_master.c b/drivers/soundwire/cadence_master.c index 4c82712944b9..5128923f051e 100644 --- a/drivers/soundwire/cadence_master.c +++ b/drivers/soundwire/cadence_master.c @@ -54,9 +54,9 @@ MODULE_PARM_DESC(cdns_mcp_int_mask, "Cadence MCP IntMask"); #define CDNS_IP_MCP_CONTROL_CMD_ACCEPT BIT(1) #define CDNS_IP_MCP_CONTROL_BLOCK_WAKEUP BIT(0) -#define CDNS_MCP_CMDCTRL 0x8 +#define CDNS_IP_MCP_CMDCTRL 0x8 /* IP offset added at run-time */ -#define CDNS_MCP_CMDCTRL_INSERT_PARITY_ERR BIT(2) +#define CDNS_IP_MCP_CMDCTRL_INSERT_PARITY_ERR BIT(2) #define CDNS_MCP_SSPSTAT 0xC #define CDNS_MCP_FRAME_SHAPE 0x10 @@ -428,9 +428,9 @@ static int cdns_parity_error_injection(void *data, u64 value) mutex_lock(&bus->bus_lock); /* program hardware to inject parity error */ - cdns_updatel(cdns, CDNS_MCP_CMDCTRL, - CDNS_MCP_CMDCTRL_INSERT_PARITY_ERR, - CDNS_MCP_CMDCTRL_INSERT_PARITY_ERR); + cdns_ip_updatel(cdns, CDNS_IP_MCP_CMDCTRL, + CDNS_IP_MCP_CMDCTRL_INSERT_PARITY_ERR, + CDNS_IP_MCP_CMDCTRL_INSERT_PARITY_ERR); /* commit changes */ cdns_updatel(cdns, CDNS_MCP_CONFIG_UPDATE, @@ -442,9 +442,9 @@ static int cdns_parity_error_injection(void *data, u64 value) dev_info(cdns->dev, "parity error injection, read: %d\n", ret); /* program hardware to disable parity error */ - cdns_updatel(cdns, CDNS_MCP_CMDCTRL, - CDNS_MCP_CMDCTRL_INSERT_PARITY_ERR, - 0); + cdns_ip_updatel(cdns, CDNS_IP_MCP_CMDCTRL, + CDNS_IP_MCP_CMDCTRL_INSERT_PARITY_ERR, + 0); /* commit changes */ cdns_updatel(cdns, CDNS_MCP_CONFIG_UPDATE, From patchwork Tue Mar 14 01:54:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13173541 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CC909C6FD19 for ; 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X-IronPort-AV: E=McAfee;i="6500,9779,10648"; a="316949325" X-IronPort-AV: E=Sophos;i="5.98,258,1673942400"; d="scan'208";a="316949325" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2023 18:41:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10648"; a="711327601" X-IronPort-AV: E=Sophos;i="5.98,258,1673942400"; d="scan'208";a="711327601" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2023 18:41:36 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org Subject: [PATCH 16/16] soundwire: cadence: change access to IP_MCP_CMD_BASE Date: Tue, 14 Mar 2023 09:54:10 +0800 Message-Id: <20230314015410.487311-17-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230314015410.487311-1-yung-chuan.liao@linux.intel.com> References: <20230314015410.487311-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: WS7MYPVNSZ3V47EWYTUTIMJPW73PVBNR X-Message-ID-Hash: WS7MYPVNSZ3V47EWYTUTIMJPW73PVBNR X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart The latest Cadence IP moves MCP_CMD_BASE and MCP_CMD_RESP to the IP_MCP_CMD_BASE and IP_MCP_CMD_RESP registers located in different area and accessed with a fixed offset. Unlike other patches, the fields are not renamed to avoid a very invasive and low-value set of changes. For existing solutions, this is an iso-functionality change. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Signed-off-by: Bard Liao --- drivers/soundwire/cadence_master.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/soundwire/cadence_master.c b/drivers/soundwire/cadence_master.c index 5128923f051e..39502bc75712 100644 --- a/drivers/soundwire/cadence_master.c +++ b/drivers/soundwire/cadence_master.c @@ -129,8 +129,8 @@ MODULE_PARM_DESC(cdns_mcp_int_mask, "Cadence MCP IntMask"); #define CDNS_MCP_FIFOSTAT 0x7C #define CDNS_MCP_RX_FIFO_AVAIL GENMASK(5, 0) -#define CDNS_MCP_CMD_BASE 0x80 -#define CDNS_MCP_RESP_BASE 0x80 +#define CDNS_IP_MCP_CMD_BASE 0x80 /* IP offset added at run-time */ +#define CDNS_IP_MCP_RESP_BASE 0x80 /* IP offset added at run-time */ /* FIFO can hold 8 commands */ #define CDNS_MCP_CMD_LEN 8 #define CDNS_MCP_CMD_WORD_LEN 0x4 @@ -590,10 +590,10 @@ static void cdns_read_response(struct sdw_cdns *cdns) num_resp = ARRAY_SIZE(cdns->response_buf); } - cmd_base = CDNS_MCP_CMD_BASE; + cmd_base = CDNS_IP_MCP_CMD_BASE; for (i = 0; i < num_resp; i++) { - cdns->response_buf[i] = cdns_readl(cdns, cmd_base); + cdns->response_buf[i] = cdns_ip_readl(cdns, cmd_base); cmd_base += CDNS_MCP_CMD_WORD_LEN; } } @@ -612,7 +612,7 @@ _cdns_xfer_msg(struct sdw_cdns *cdns, struct sdw_msg *msg, int cmd, cdns->msg_count = count; } - base = CDNS_MCP_CMD_BASE; + base = CDNS_IP_MCP_CMD_BASE; addr = msg->addr + offset; for (i = 0; i < count; i++) { @@ -625,7 +625,7 @@ _cdns_xfer_msg(struct sdw_cdns *cdns, struct sdw_msg *msg, int cmd, data |= msg->buf[i + offset]; data |= FIELD_PREP(CDNS_MCP_CMD_SSP_TAG, msg->ssp_sync); - cdns_writel(cdns, base, data); + cdns_ip_writel(cdns, base, data); base += CDNS_MCP_CMD_WORD_LEN; } @@ -673,10 +673,10 @@ cdns_program_scp_addr(struct sdw_cdns *cdns, struct sdw_msg *msg) data[0] |= msg->addr_page1; data[1] |= msg->addr_page2; - base = CDNS_MCP_CMD_BASE; - cdns_writel(cdns, base, data[0]); + base = CDNS_IP_MCP_CMD_BASE; + cdns_ip_writel(cdns, base, data[0]); base += CDNS_MCP_CMD_WORD_LEN; - cdns_writel(cdns, base, data[1]); + cdns_ip_writel(cdns, base, data[1]); time = wait_for_completion_timeout(&cdns->tx_complete, msecs_to_jiffies(CDNS_TX_TIMEOUT));