From patchwork Tue Mar 14 19:27:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 13174974 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CCD35C6FD1F for ; Tue, 14 Mar 2023 19:29:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=WgyU+ZvrSB/AVXQaktnmdQdDTPAhcwkM6DQ9crW5i8E=; b=QTX6adG2BXx4H2 ZdlW3JdYRkawrvQo9c3uccGi5KMcjJtpUPlHNSUAlqBvCJ5hxCweT2UavfIQs/wyW2gFWJC3S7UVP wIZ1r3QfE9oEo2Y5cxrcbEGJLP09slUdrj9+9+xv7N3XzEMn11GIPkKcusIarETSvfkpMWzjgn+zk AVv5NfTPOJHmeFcun0flw/tjkOtzV4YoK3tmcqbjjUAtO38wk1misTDH7/43Y2oNIYqba17NBF2R6 iuXxunuQcbZ0sHmXAU1sr6IYYGPiIrjFweKkrHjU3lmr6MYO/cfXUwbu5HqwwHjaYRcF0Uiu2lvEc Ma2tVcgYmY3zNq6by88Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pcAJp-00BKZn-1A; Tue, 14 Mar 2023 19:28:21 +0000 Received: from ams.source.kernel.org ([145.40.68.75]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pcAJf-00BKUe-0N for linux-arm-kernel@lists.infradead.org; Tue, 14 Mar 2023 19:28:15 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 59DE5B81B7B; Tue, 14 Mar 2023 19:28:07 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 92EF9C4339C; Tue, 14 Mar 2023 19:28:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1678822086; bh=+Yml0BO7d/EHFxx7xc5Wri+IxHvUeC/lT7ncnOKr4VM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Eh5St+PqJa4W0+5OnPmRVrc40Sqx12HKrASavFJdfnvFyeqVvQugtutxBMBjDG7XY +h2/f9uDKNvOQRE7KNlG/CyhrxljvlAcvn96evR0LeUmbASJ4RV06Phdn0seC4k3jb M7rw2ziWllY5nwpl91ydMD9mjI+Nx23FHjN5a2SBVloan6kYxn+vdtyo7D2YNLyuuK a8laVI/QEioCgFRXqgJmofc2zHMGef+B+t0JMeLIl0lLUsEJNlyLlbiF8YXMoLO9PV 1MQYeh+7WoEzf5iBAkrfl4C5SpzQeevMzySjsucoaZg4Nh2IYnkuqXFKPFywV/+ZT8 KdoP905gtM60w== From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, linux@armlinux.org.uk Cc: Ard Biesheuvel , Frederic Weisbecker , Guenter Roeck , Peter Zijlstra , Linus Walleij Subject: [PATCH v2 1/3] ARM: vfp: Pass thread_info pointer to vfp_support_entry Date: Tue, 14 Mar 2023 20:27:54 +0100 Message-Id: <20230314192756.217966-2-ardb@kernel.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230314192756.217966-1-ardb@kernel.org> References: <20230314192756.217966-1-ardb@kernel.org> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2367; i=ardb@kernel.org; h=from:subject; bh=+Yml0BO7d/EHFxx7xc5Wri+IxHvUeC/lT7ncnOKr4VM=; b=owGbwMvMwCFmkMcZplerG8N4Wi2JIUXg1NaKr0aHva8dkL52bYGFzNL7T53+bzRvep550qp5i 9ZN22KljlIWBjEOBlkxRRaB2X/f7Tw9UarWeZYszBxWJpAhDFycAjARrSxGhq2T3yVqt0nHvVsb +ctM+rVs1/uTqgzrItI6dfplTjtquTL897wYrv3q4MNZbiFzFK0E7nFX+Hy5197K/yg0cbGq8+P zTAA= X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230314_122812_006753_A8D5AE1E X-CRM114-Status: GOOD ( 14.79 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Instead of dereferencing thread_info in do_vfp, pass the thread_info pointer to vfp_support_entry via R1. That way, we only use a single caller save register, which makes it easier to convert do_vfp to C code in a subsequent patch. Note that, unlike the CPU number, which can change due to preemption, passing the thread_info pointer can safely be done with preemption enabled. Signed-off-by: Ard Biesheuvel Reviewed-by: Linus Walleij --- arch/arm/vfp/entry.S | 5 +---- arch/arm/vfp/vfphw.S | 10 +++++++--- 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/arch/arm/vfp/entry.S b/arch/arm/vfp/entry.S index 9a89264cdcc0b46e..cfedc2a3dbd68f1c 100644 --- a/arch/arm/vfp/entry.S +++ b/arch/arm/vfp/entry.S @@ -22,15 +22,12 @@ @ IRQs enabled. @ ENTRY(do_vfp) - local_bh_disable r10, r4 + mov r1, r10 ldr r4, .LCvfp - ldr r11, [r10, #TI_CPU] @ CPU number - add r10, r10, #TI_VFPSTATE @ r10 = workspace ldr pc, [r4] @ call VFP entry point ENDPROC(do_vfp) ENTRY(vfp_null_entry) - local_bh_enable_ti r10, r4 ret lr ENDPROC(vfp_null_entry) diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S index 26c4f61ecfa39638..6d056d810e4868c2 100644 --- a/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S @@ -6,9 +6,9 @@ * Written by Deep Blue Solutions Limited. * * This code is called from the kernel's undefined instruction trap. + * r1 holds the thread_info pointer * r9 holds the return address for successful handling. * lr holds the return address for unrecognised instructions. - * r10 points at the start of the private FP workspace in the thread structure * sp points to a struct pt_regs (as defined in include/asm/proc/ptrace.h) */ #include @@ -69,13 +69,17 @@ @ VFP hardware support entry point. @ @ r0 = instruction opcode (32-bit ARM or two 16-bit Thumb) +@ r1 = thread_info pointer @ r2 = PC value to resume execution after successful emulation @ r9 = normal "successful" return address -@ r10 = vfp_state union -@ r11 = CPU number @ lr = unrecognised instruction return address @ IRQs enabled. ENTRY(vfp_support_entry) + local_bh_disable r1, r4 + + ldr r11, [r1, #TI_CPU] @ CPU number + add r10, r1, #TI_VFPSTATE @ r10 = workspace + DBGSTR3 "instr %08x pc %08x state %p", r0, r2, r10 .fpu vfpv2 From patchwork Tue Mar 14 19:27:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 13174972 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 682D4C6FD1F for ; Tue, 14 Mar 2023 19:29:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ur7x+2QB3KqdJH4mG3owBHSuADrfvQQ0MLyjokk4CQU=; b=V4BSXKkSjzC2e1 CzCm0IwNKCw0H8Q1gXesOIcLAigTVB9lT93dlY2kgBvKynxHX5yIsF2Ri+cYInMYWhjYJMwhBG2cT Wfrt6th3d8WOgQiweMeoG0pEL/LfK2EojOqw+IGr5qtmVNEPQ1fpVXXOwIrN+LXguKqENXfV7GW9j Zxhx4UnFIyr4mnlBChlJ28PNosk38xDwm+kkvIjCzJzF8AH+2vfDf9b5qFYojDmn4dV5ery69jnNH Yv50BE/YJ1yxvt4sW2Xgsm2H5b55TANARACk9MNMCEkltZSfb+j1X6seEj6J7WXn8lkLUe7etUAJn eohKUtZ3hEDhSCuEKSaw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pcAJn-00BKZG-26; Tue, 14 Mar 2023 19:28:19 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pcAJf-00BKUv-0D for linux-arm-kernel@lists.infradead.org; Tue, 14 Mar 2023 19:28:13 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id AA8EC6196E; Tue, 14 Mar 2023 19:28:08 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 86A0EC433A0; Tue, 14 Mar 2023 19:28:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1678822088; bh=bkiII1ySqhERhau7lE9cfvV5EqJK3uJqof8wrg1asvw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CHJ3FHKvgjdEynjTQFpNzC6ywW5K1IqEcWLdRwiuw8nULGISpYM6b5J7SQHFEUOPo U8OPGXwhO+oB6cjtRoRUuEkE3BuKVkU/WyCtGGzYrjEJFbYNAvjilipc5NPBUPhcZN tWH9n2sYrXBD/xyxJViEGWKIT4jiL/+ZkjAiftmmdZ7o+8Oodmmp/L5DavlDJHb8Aq 0z+P7zQ4GV6MQI4VVXGglvAAndGCfQD7kPM8YMrqje3Cvnhpu/tXSUPaUU9Uxvq51F gf2B+JaXP/jP46KVggP0S0v1XgBIwYDYyL68uOGVXqczRGLT53D0oCrybicX5g7InQ Ztt+bvLpIZFuw== From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, linux@armlinux.org.uk Cc: Ard Biesheuvel , Frederic Weisbecker , Guenter Roeck , Peter Zijlstra , Linus Walleij Subject: [PATCH v2 2/3] ARM: vfp: Pass successful return address via register R3 Date: Tue, 14 Mar 2023 20:27:55 +0100 Message-Id: <20230314192756.217966-3-ardb@kernel.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230314192756.217966-1-ardb@kernel.org> References: <20230314192756.217966-1-ardb@kernel.org> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3144; i=ardb@kernel.org; h=from:subject; bh=bkiII1ySqhERhau7lE9cfvV5EqJK3uJqof8wrg1asvw=; b=owGbwMvMwCFmkMcZplerG8N4Wi2JIUXg1E7v5VczT19OEhKfFhVRy/l9+pfYYN2ib/an3Qyb3 9rumbm1o5SFQYyDQVZMkUVg9t93O09PlKp1niULM4eVCWQIAxenAExE4ivD/0BL6YsiUs6fLc/3 ZibOnD432MC/5vLupV/FxPkXLbqWV8jI0GTzpYtx1uwFh5uLZ4ffrF82SUHl3rqDzZO3zszVtfn YzQQA X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230314_122811_992790_AF768E96 X-CRM114-Status: GOOD ( 17.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In preparation for reimplementing the do_vfp()->vfp_support_entry() handover in C code, switch to using R3 to pass the 'success' return address, rather than R9, as it cannot be used for parameter passing. Signed-off-by: Ard Biesheuvel Reviewed-by: Linus Walleij --- arch/arm/vfp/entry.S | 1 + arch/arm/vfp/vfphw.S | 14 +++++++------- 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/arch/arm/vfp/entry.S b/arch/arm/vfp/entry.S index cfedc2a3dbd68f1c..6dabb47617781a5f 100644 --- a/arch/arm/vfp/entry.S +++ b/arch/arm/vfp/entry.S @@ -23,6 +23,7 @@ @ ENTRY(do_vfp) mov r1, r10 + mov r3, r9 ldr r4, .LCvfp ldr pc, [r4] @ call VFP entry point ENDPROC(do_vfp) diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S index 6d056d810e4868c2..60acd42e05786e95 100644 --- a/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S @@ -7,7 +7,7 @@ * * This code is called from the kernel's undefined instruction trap. * r1 holds the thread_info pointer - * r9 holds the return address for successful handling. + * r3 holds the return address for successful handling. * lr holds the return address for unrecognised instructions. * sp points to a struct pt_regs (as defined in include/asm/proc/ptrace.h) */ @@ -71,7 +71,7 @@ @ r0 = instruction opcode (32-bit ARM or two 16-bit Thumb) @ r1 = thread_info pointer @ r2 = PC value to resume execution after successful emulation -@ r9 = normal "successful" return address +@ r3 = normal "successful" return address @ lr = unrecognised instruction return address @ IRQs enabled. ENTRY(vfp_support_entry) @@ -89,9 +89,9 @@ ENTRY(vfp_support_entry) bne look_for_VFP_exceptions @ VFP is already enabled DBGSTR1 "enable %x", r10 - ldr r3, vfp_current_hw_state_address + ldr r9, vfp_current_hw_state_address orr r1, r1, #FPEXC_EN @ user FPEXC has the enable bit set - ldr r4, [r3, r11, lsl #2] @ vfp_current_hw_state pointer + ldr r4, [r9, r11, lsl #2] @ vfp_current_hw_state pointer bic r5, r1, #FPEXC_EX @ make sure exceptions are disabled cmp r4, r10 @ this thread owns the hw context? #ifndef CONFIG_SMP @@ -150,7 +150,7 @@ vfp_reload_hw: #endif DBGSTR1 "load state %p", r10 - str r10, [r3, r11, lsl #2] @ update the vfp_current_hw_state pointer + str r10, [r9, r11, lsl #2] @ update the vfp_current_hw_state pointer @ Load the saved state back into the VFP VFPFLDMIA r10, r5 @ reload the working registers while @ FPEXC is in a safe state @@ -180,7 +180,7 @@ vfp_hw_state_valid: @ always subtract 4 from the following @ instruction address. local_bh_enable_ti r10, r4 - ret r9 @ we think we have handled things + ret r3 @ we think we have handled things look_for_VFP_exceptions: @@ -210,7 +210,7 @@ skip: process_exception: DBGSTR "bounce" mov r2, sp @ nothing stacked - regdump is at TOS - mov lr, r9 @ setup for a return to the user code. + mov lr, r3 @ setup for a return to the user code. @ Now call the C code to package up the bounce to the support code @ r0 holds the trigger instruction From patchwork Tue Mar 14 19:27:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 13174973 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 694C8C05027 for ; Tue, 14 Mar 2023 19:29:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=iyPlX0lKYMjT1YHoXf0Qpe0nGecUzzMCW2IlHqkQYaA=; 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Tue, 14 Mar 2023 19:28:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1678822090; bh=GF0c+BDJMJ9GX8f3FHxyu+yLf+j+T/uIXG8D2WIKbZA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=uJA5hYsu0mpAcqSMRBfcI5PQVybfUBUYavBKMg1UCpvnls24P3uvdb2d/M45HRk2q Qj9+MY/iEIa3TLfR+qJ5x8gBT6OJ6nMzc6SbdwRj/g6BiMyjXPV7Uvvot0bMRqT34I lUGbaVfMNNR62Oq2I62e6Ygw/uZsvtcXRvCR0OLOfNldxax4PL54Yijt9xpD7HEVaw 50/zGNVKhydQYixz9V6Tck1WnUAhHivfxxI9ORgyDKp0ClttpllKZYA56TSeWm80+7 zJChnlzhb7YxaxS5sp1RRsifl270HcJImiKgGVh8AyPIa+tm5cyiCgcXnz8hB6Nx5C PPo3bC5wp2Jrg== From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, linux@armlinux.org.uk Cc: Ard Biesheuvel , Frederic Weisbecker , Guenter Roeck , Peter Zijlstra , Linus Walleij Subject: [PATCH v2 3/3] ARM: vfp: Fix broken softirq handling with instrumentation enabled Date: Tue, 14 Mar 2023 20:27:56 +0100 Message-Id: <20230314192756.217966-4-ardb@kernel.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230314192756.217966-1-ardb@kernel.org> References: <20230314192756.217966-1-ardb@kernel.org> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=5049; i=ardb@kernel.org; h=from:subject; bh=GF0c+BDJMJ9GX8f3FHxyu+yLf+j+T/uIXG8D2WIKbZA=; b=owGbwMvMwCFmkMcZplerG8N4Wi2JIUXg1B5Dp02KlZx16w8XC6ntM/7+Y98hl7ouxW91fDOXt sxNK93RUcrCIMbBICumyCIw+++7nacnStU6z5KFmcPKBDKEgYtTACaSOomRYU7K11lH6iqObwrP M64P2f02tLZE847koR9aPByzFrxyWcLw393+xqXNyY9XpmVmiSfmzZxx/IjzS8ktZ/4JCdzot/n 4gg8A X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230314_122813_038708_0FDE0DC9 X-CRM114-Status: GOOD ( 16.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Commit 62b95a7b44d1 ("ARM: 9282/1: vfp: Manipulate task VFP state with softirqs disabled") replaced the en/disable preemption calls inside the VFP state handling code with en/disabling of soft IRQs, which is necessary to allow kernel use of the VFP/SIMD unit when handling a soft IRQ. Unfortunately, when lockdep is enabled (or other instrumentation that enables TRACE_IRQFLAGS), the disable path implemented in asm fails to perform the lockdep and RCU related bookkeeping, resulting in spurious warnings and other badness. Set let's rework the VFP entry code a little bit so we can make the local_bh_disable() call from C, with all the instrumentations that happen to have been configured. Calling local_bh_enable() can be done from asm, as it is always a callable function. Link: https://lore.kernel.org/all/ZBBYCSZUJOWBg1s8@localhost.localdomain/ Fixes: 62b95a7b44d1 ("ARM: 9282/1: vfp: Manipulate task VFP state with softirqs disabled") Signed-off-by: Ard Biesheuvel Reviewed-by: Linus Walleij --- arch/arm/include/asm/assembler.h | 13 ---------- arch/arm/vfp/entry.S | 11 +------- arch/arm/vfp/vfphw.S | 12 ++++----- arch/arm/vfp/vfpmodule.c | 27 ++++++++++++++++---- 4 files changed, 29 insertions(+), 34 deletions(-) diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h index 06b48ce23e1ca245..505a306e0271a9c4 100644 --- a/arch/arm/include/asm/assembler.h +++ b/arch/arm/include/asm/assembler.h @@ -244,19 +244,6 @@ THUMB( fpreg .req r7 ) .endm #endif - .macro local_bh_disable, ti, tmp - ldr \tmp, [\ti, #TI_PREEMPT] - add \tmp, \tmp, #SOFTIRQ_DISABLE_OFFSET - str \tmp, [\ti, #TI_PREEMPT] - .endm - - .macro local_bh_enable_ti, ti, tmp - get_thread_info \ti - ldr \tmp, [\ti, #TI_PREEMPT] - sub \tmp, \tmp, #SOFTIRQ_DISABLE_OFFSET - str \tmp, [\ti, #TI_PREEMPT] - .endm - #define USERL(l, x...) \ 9999: x; \ .pushsection __ex_table,"a"; \ diff --git a/arch/arm/vfp/entry.S b/arch/arm/vfp/entry.S index 6dabb47617781a5f..7483ef8bccda394c 100644 --- a/arch/arm/vfp/entry.S +++ b/arch/arm/vfp/entry.S @@ -24,14 +24,5 @@ ENTRY(do_vfp) mov r1, r10 mov r3, r9 - ldr r4, .LCvfp - ldr pc, [r4] @ call VFP entry point + b vfp_entry ENDPROC(do_vfp) - -ENTRY(vfp_null_entry) - ret lr -ENDPROC(vfp_null_entry) - - .align 2 -.LCvfp: - .word vfp_vector diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S index 60acd42e05786e95..4d8478264d82b3d2 100644 --- a/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S @@ -75,8 +75,6 @@ @ lr = unrecognised instruction return address @ IRQs enabled. ENTRY(vfp_support_entry) - local_bh_disable r1, r4 - ldr r11, [r1, #TI_CPU] @ CPU number add r10, r1, #TI_VFPSTATE @ r10 = workspace @@ -179,9 +177,12 @@ vfp_hw_state_valid: @ else it's one 32-bit instruction, so @ always subtract 4 from the following @ instruction address. - local_bh_enable_ti r10, r4 - ret r3 @ we think we have handled things + mov lr, r3 @ we think we have handled things +local_bh_enable_and_ret: + adr r0, . + mov r1, #SOFTIRQ_DISABLE_OFFSET + b __local_bh_enable_ip @ tail call look_for_VFP_exceptions: @ Check for synchronous or asynchronous exception @@ -204,8 +205,7 @@ skip: @ not recognised by VFP DBGSTR "not VFP" - local_bh_enable_ti r10, r4 - ret lr + b local_bh_enable_and_ret process_exception: DBGSTR "bounce" diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index 01bc48d738478142..0f32c15d3c96b5ac 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c @@ -32,10 +32,28 @@ /* * Our undef handlers (in entry.S) */ -asmlinkage void vfp_support_entry(void); -asmlinkage void vfp_null_entry(void); +asmlinkage void vfp_support_entry(u32, void *, u32, u32); -asmlinkage void (*vfp_vector)(void) = vfp_null_entry; +static bool have_vfp __ro_after_init; + +/* + * Entered with: + * + * r0 = instruction opcode (32-bit ARM or two 16-bit Thumb) + * r1 = thread_info pointer + * r2 = PC value to resume execution after successful emulation + * r3 = normal "successful" return address + * lr = unrecognised instruction return address + */ +asmlinkage void vfp_entry(u32 opcode, struct thread_info *ti, u32 resume_pc, + u32 resume_return_address) +{ + if (unlikely(!have_vfp)) + return; + + local_bh_disable(); + vfp_support_entry(opcode, ti, resume_pc, resume_return_address); +} /* * Dual-use variable. @@ -798,7 +816,6 @@ static int __init vfp_init(void) vfpsid = fmrx(FPSID); barrier(); unregister_undef_hook(&vfp_detect_hook); - vfp_vector = vfp_null_entry; pr_info("VFP support v0.3: "); if (VFP_arch) { @@ -883,7 +900,7 @@ static int __init vfp_init(void) "arm/vfp:starting", vfp_starting_cpu, vfp_dying_cpu); - vfp_vector = vfp_support_entry; + have_vfp = true; thread_register_notifier(&vfp_notifier_block); vfp_pm_init();