From patchwork Fri Mar 17 00:12:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Strahinja Jankovic X-Patchwork-Id: 13178406 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DAF4FC74A5B for ; Fri, 17 Mar 2023 00:14:24 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pcxin-0005Pj-97; Thu, 16 Mar 2023 20:13:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pcxij-0005Nj-AP; Thu, 16 Mar 2023 20:13:21 -0400 Received: from mail-lf1-x12e.google.com ([2a00:1450:4864:20::12e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pcxif-0004KF-0x; Thu, 16 Mar 2023 20:13:19 -0400 Received: by mail-lf1-x12e.google.com with SMTP id bp27so4509076lfb.6; Thu, 16 Mar 2023 17:13:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1679011995; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=GjKyaAihhiJJVryEYRZmT1XoeN0Kyuw58fhgijJJd5w=; b=OwAAd5lEg9BFajqiX4qv4GoruSDAzQx30sinrUimrQH0JwGf1ALV6fPDlU7RaAwCI5 CFduIN+/UGeRSYfLmEHEsHiH/ADo4DcmGsdxU/5PcFBnQpqYcmtWK0h2at/taqT8hvt7 l8Pwt2sAWENbfjJZbpBYlGrp2h3SylTb2oDaOFGEch4aDhkFtZdZckMdewx/h+ZyVXOJ nSzExUAwCLNKdH+5K2m5p65XfHudZ5NSD/5VA7HOhmp8ttbM47Ha4jM1Ov0nM970tacs ttJFyRD6fyQUKfmzk0MwDS4y7jlpbR5R/JC9ZvgTWVLOAKzWZbsqrYUFIvftmBk2adoO /KTA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679011995; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=GjKyaAihhiJJVryEYRZmT1XoeN0Kyuw58fhgijJJd5w=; b=lwmqTsnlbMaaRLr2YtEoS0zHKvvlfQvhpqfIdQFMK3RFV5QBtxBWl8Rp9s29VJ6pgn CaMcZd7eLJOdUnxd82UCeySd0PCz9r63DgO/2UJ1Za4FHdwuTZTVCi+U7UF5GE5G4fwC fNZ9Z2VImezFkn+SDgdqxA1MjmuoAdB3KLsK9Bf4S2ZMJEGPjFiCXnKlQb5aU6h2CssE OsY9+0G5qiNYxsGU9gH+uJMYzHJ452DLVfsiHcwYSd1WeZLf149sKfBmb3JNq6C5Z307 scP/spVFEwc+xy9PFfRweT5By7IwcVjvz6jtlrGNkdhVk8vUrLYGxGCPMV6FRLPjoMlf VTyg== X-Gm-Message-State: AO0yUKXk22eJ2081hjp7rvDumuZDBjQJoGYUbkkZtXZuBj3gFtXp1FY5 uRTwcbZfkGeAMtbFb4H7jSE= X-Google-Smtp-Source: AK7set9uPOf1y8qPLs9u/HAdOEQIg4CNWlRTiVP/LcFeF7l80A5J1/1+geKZ5J07Qq9tQrUgh/47LQ== X-Received: by 2002:a19:700b:0:b0:4e8:55ec:b17 with SMTP id h11-20020a19700b000000b004e855ec0b17mr2876533lfc.7.1679011994850; Thu, 16 Mar 2023 17:13:14 -0700 (PDT) Received: from penguin.lxd (213-67-202-254-no43.tbcn.telia.com. [213.67.202.254]) by smtp.googlemail.com with ESMTPSA id y17-20020ac24211000000b004ddaea30ba6sm97776lfh.235.2023.03.16.17.13.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 17:13:14 -0700 (PDT) From: Strahinja Jankovic X-Google-Original-From: Strahinja Jankovic To: Peter Maydell Cc: Beniamino Galvani , Niek Linnenbank , qemu-arm@nongnu.org, qemu-devel@nongnu.org, Strahinja Jankovic Subject: [PATCH v2 1/4] hw/watchdog: Allwinner WDT emulation for system reset Date: Fri, 17 Mar 2023 01:12:01 +0100 Message-Id: <20230317001203.18425-2-strahinja.p.jankovic@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230317001203.18425-1-strahinja.p.jankovic@gmail.com> References: <20230317001203.18425-1-strahinja.p.jankovic@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::12e; envelope-from=strahinjapjankovic@gmail.com; helo=mail-lf1-x12e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This patch adds basic support for Allwinner WDT. Both sun4i and sun6i variants are supported. However, interrupt generation is not supported, so WDT can be used only to trigger system reset. Signed-off-by: Strahinja Jankovic Reviewed-by: Niek Linnenbank Tested-by: Niek Linnenbank --- hw/watchdog/Kconfig | 4 + hw/watchdog/allwinner-wdt.c | 416 ++++++++++++++++++++++++++++ hw/watchdog/meson.build | 1 + hw/watchdog/trace-events | 7 + include/hw/watchdog/allwinner-wdt.h | 123 ++++++++ 5 files changed, 551 insertions(+) create mode 100644 hw/watchdog/allwinner-wdt.c create mode 100644 include/hw/watchdog/allwinner-wdt.h diff --git a/hw/watchdog/Kconfig b/hw/watchdog/Kconfig index 66e1d029e3..861fd00334 100644 --- a/hw/watchdog/Kconfig +++ b/hw/watchdog/Kconfig @@ -20,3 +20,7 @@ config WDT_IMX2 config WDT_SBSA bool + +config ALLWINNER_WDT + bool + select PTIMER diff --git a/hw/watchdog/allwinner-wdt.c b/hw/watchdog/allwinner-wdt.c new file mode 100644 index 0000000000..45a4a36ba7 --- /dev/null +++ b/hw/watchdog/allwinner-wdt.c @@ -0,0 +1,416 @@ +/* + * Allwinner Watchdog emulation + * + * Copyright (C) 2023 Strahinja Jankovic + * + * This file is derived from Allwinner RTC, + * by Niek Linnenbank. + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include "qemu/osdep.h" +#include "qemu/log.h" +#include "qemu/units.h" +#include "qemu/module.h" +#include "trace.h" +#include "hw/sysbus.h" +#include "hw/registerfields.h" +#include "hw/watchdog/allwinner-wdt.h" +#include "sysemu/watchdog.h" +#include "migration/vmstate.h" + +/* WDT registers */ +enum { + REG_IRQ_EN = 0, /* Watchdog interrupt enable */ + REG_IRQ_STA, /* Watchdog interrupt status */ + REG_CTRL, /* Watchdog control register */ + REG_CFG, /* Watchdog configuration register */ + REG_MODE, /* Watchdog mode register */ +}; + +/* Universal WDT register flags */ +#define WDT_RESTART_MASK (1 << 0) +#define WDT_EN_MASK (1 << 0) + +/* sun4i specific WDT register flags */ +#define RST_EN_SUN4I_MASK (1 << 1) +#define INTV_VALUE_SUN4I_SHIFT (3) +#define INTV_VALUE_SUN4I_MASK (0xfu << INTV_VALUE_SUN4I_SHIFT) + +/* sun6i specific WDT register flags */ +#define RST_EN_SUN6I_MASK (1 << 0) +#define KEY_FIELD_SUN6I_SHIFT (1) +#define KEY_FIELD_SUN6I_MASK (0xfffu << KEY_FIELD_SUN6I_SHIFT) +#define KEY_FIELD_SUN6I (0xA57u) +#define INTV_VALUE_SUN6I_SHIFT (4) +#define INTV_VALUE_SUN6I_MASK (0xfu << INTV_VALUE_SUN6I_SHIFT) + +/* Map of INTV_VALUE to 0.5s units. */ +static const uint8_t allwinner_wdt_count_map[] = { + 1, + 2, + 4, + 6, + 8, + 10, + 12, + 16, + 20, + 24, + 28, + 32 +}; + +/* WDT sun4i register map (offset to name) */ +const uint8_t allwinner_wdt_sun4i_regmap[] = { + [0x0000] = REG_CTRL, + [0x0004] = REG_MODE, +}; + +/* WDT sun6i register map (offset to name) */ +const uint8_t allwinner_wdt_sun6i_regmap[] = { + [0x0000] = REG_IRQ_EN, + [0x0004] = REG_IRQ_STA, + [0x0010] = REG_CTRL, + [0x0014] = REG_CFG, + [0x0018] = REG_MODE, +}; + +static bool allwinner_wdt_sun4i_read(AwWdtState *s, uint32_t offset) +{ + /* no sun4i specific registers currently implemented */ + return false; +} + +static bool allwinner_wdt_sun4i_write(AwWdtState *s, uint32_t offset, + uint32_t data) +{ + /* no sun4i specific registers currently implemented */ + return false; +} + +static bool allwinner_wdt_sun4i_can_reset_system(AwWdtState *s) +{ + if (s->regs[REG_MODE] & RST_EN_SUN6I_MASK) { + return true; + } else { + return false; + } +} + +static bool allwinner_wdt_sun4i_is_key_valid(AwWdtState *s, uint32_t val) +{ + /* sun4i has no key */ + return true; +} + +static uint8_t allwinner_wdt_sun4i_get_intv_value(AwWdtState *s) +{ + return ((s->regs[REG_MODE] & INTV_VALUE_SUN4I_MASK) >> + INTV_VALUE_SUN4I_SHIFT); +} + +static bool allwinner_wdt_sun6i_read(AwWdtState *s, uint32_t offset) +{ + const AwWdtClass *c = AW_WDT_GET_CLASS(s); + + switch (c->regmap[offset]) { + case REG_IRQ_EN: + case REG_IRQ_STA: + case REG_CFG: + return true; + default: + break; + } + return false; +} + +static bool allwinner_wdt_sun6i_write(AwWdtState *s, uint32_t offset, + uint32_t data) +{ + const AwWdtClass *c = AW_WDT_GET_CLASS(s); + + switch (c->regmap[offset]) { + case REG_IRQ_EN: + case REG_IRQ_STA: + case REG_CFG: + return true; + default: + break; + } + return false; +} + +static bool allwinner_wdt_sun6i_can_reset_system(AwWdtState *s) +{ + if (s->regs[REG_CFG] & RST_EN_SUN6I_MASK) { + return true; + } else { + return false; + } +} + +static bool allwinner_wdt_sun6i_is_key_valid(AwWdtState *s, uint32_t val) +{ + uint16_t key = (val & KEY_FIELD_SUN6I_MASK) >> KEY_FIELD_SUN6I_SHIFT; + return (key == KEY_FIELD_SUN6I); +} + +static uint8_t allwinner_wdt_sun6i_get_intv_value(AwWdtState *s) +{ + return ((s->regs[REG_MODE] & INTV_VALUE_SUN6I_MASK) >> + INTV_VALUE_SUN6I_SHIFT); +} + +static void allwinner_wdt_update_timer(AwWdtState *s) +{ + const AwWdtClass *c = AW_WDT_GET_CLASS(s); + uint8_t count = c->get_intv_value(s); + + ptimer_transaction_begin(s->timer); + ptimer_stop(s->timer); + + /* Use map to convert. */ + if (count < sizeof(allwinner_wdt_count_map)) { + ptimer_set_count(s->timer, allwinner_wdt_count_map[count]); + } else { + qemu_log_mask(LOG_GUEST_ERROR, "%s: incorrect INTV_VALUE 0x%02x\n", + __func__, count); + } + + ptimer_run(s->timer, 1); + ptimer_transaction_commit(s->timer); + + trace_allwinner_wdt_update_timer(count); +} + +static uint64_t allwinner_wdt_read(void *opaque, hwaddr offset, + unsigned size) +{ + AwWdtState *s = AW_WDT(opaque); + const AwWdtClass *c = AW_WDT_GET_CLASS(s); + uint64_t r; + + if (offset >= c->regmap_size) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: out-of-bounds offset 0x%04x\n", + __func__, (uint32_t)offset); + return 0; + } + + switch (c->regmap[offset]) { + case REG_CTRL: + case REG_MODE: + r = s->regs[c->regmap[offset]]; + break; + default: + if (!c->read(s, offset)) { + qemu_log_mask(LOG_UNIMP, "%s: unimplemented register 0x%04x\n", + __func__, (uint32_t)offset); + return 0; + } + r = s->regs[c->regmap[offset]]; + break; + } + + trace_allwinner_wdt_read(offset, r, size); + + return r; +} + +static void allwinner_wdt_write(void *opaque, hwaddr offset, + uint64_t val, unsigned size) +{ + AwWdtState *s = AW_WDT(opaque); + const AwWdtClass *c = AW_WDT_GET_CLASS(s); + uint32_t old_val; + + if (offset >= c->regmap_size) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: out-of-bounds offset 0x%04x\n", + __func__, (uint32_t)offset); + return; + } + + trace_allwinner_wdt_write(offset, val, size); + + switch (c->regmap[offset]) { + case REG_CTRL: + if (c->is_key_valid(s, val)) { + if (val & WDT_RESTART_MASK) { + /* Kick timer */ + allwinner_wdt_update_timer(s); + } + } + break; + case REG_MODE: + old_val = s->regs[REG_MODE]; + s->regs[REG_MODE] = (uint32_t)val; + + /* Check for rising edge on WDOG_MODE_EN */ + if ((s->regs[REG_MODE] & ~old_val) & WDT_EN_MASK) { + allwinner_wdt_update_timer(s); + } + break; + default: + if (!c->write(s, offset, val)) { + qemu_log_mask(LOG_UNIMP, "%s: unimplemented register 0x%04x\n", + __func__, (uint32_t)offset); + } + s->regs[c->regmap[offset]] = (uint32_t)val; + break; + } +} + +static const MemoryRegionOps allwinner_wdt_ops = { + .read = allwinner_wdt_read, + .write = allwinner_wdt_write, + .endianness = DEVICE_NATIVE_ENDIAN, + .valid = { + .min_access_size = 4, + .max_access_size = 4, + }, + .impl.min_access_size = 4, +}; + +static void allwinner_wdt_expired(void *opaque) +{ + AwWdtState *s = AW_WDT(opaque); + const AwWdtClass *c = AW_WDT_GET_CLASS(s); + + bool enabled = s->regs[REG_MODE] & WDT_EN_MASK; + bool reset_enabled = c->can_reset_system(s); + + trace_allwinner_wdt_expired(enabled, reset_enabled); + + /* Perform watchdog action if watchdog is enabled and can trigger reset */ + if (enabled && reset_enabled) { + watchdog_perform_action(); + } +} + +static void allwinner_wdt_reset_enter(Object *obj, ResetType type) +{ + AwWdtState *s = AW_WDT(obj); + + trace_allwinner_wdt_reset_enter(); + + /* Clear registers */ + memset(s->regs, 0, sizeof(s->regs)); +} + +static const VMStateDescription allwinner_wdt_vmstate = { + .name = "allwinner-wdt", + .version_id = 1, + .minimum_version_id = 1, + .fields = (VMStateField[]) { + VMSTATE_PTIMER(timer, AwWdtState), + VMSTATE_UINT32_ARRAY(regs, AwWdtState, AW_WDT_REGS_NUM), + VMSTATE_END_OF_LIST() + } +}; + +static void allwinner_wdt_init(Object *obj) +{ + SysBusDevice *sbd = SYS_BUS_DEVICE(obj); + AwWdtState *s = AW_WDT(obj); + const AwWdtClass *c = AW_WDT_GET_CLASS(s); + + /* Memory mapping */ + memory_region_init_io(&s->iomem, OBJECT(s), &allwinner_wdt_ops, s, + TYPE_AW_WDT, c->regmap_size * 4); + sysbus_init_mmio(sbd, &s->iomem); +} + +static void allwinner_wdt_realize(DeviceState *dev, Error **errp) +{ + AwWdtState *s = AW_WDT(dev); + + s->timer = ptimer_init(allwinner_wdt_expired, s, + PTIMER_POLICY_NO_IMMEDIATE_TRIGGER | + PTIMER_POLICY_NO_IMMEDIATE_RELOAD | + PTIMER_POLICY_NO_COUNTER_ROUND_DOWN); + + ptimer_transaction_begin(s->timer); + /* Set to 2Hz (0.5s period); other periods are multiples of 0.5s. */ + ptimer_set_freq(s->timer, 2); + ptimer_set_limit(s->timer, 0xff, 1); + ptimer_transaction_commit(s->timer); +} + +static void allwinner_wdt_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + ResettableClass *rc = RESETTABLE_CLASS(klass); + + rc->phases.enter = allwinner_wdt_reset_enter; + dc->realize = allwinner_wdt_realize; + dc->vmsd = &allwinner_wdt_vmstate; +} + +static void allwinner_wdt_sun4i_class_init(ObjectClass *klass, void *data) +{ + AwWdtClass *awc = AW_WDT_CLASS(klass); + + awc->regmap = allwinner_wdt_sun4i_regmap; + awc->regmap_size = sizeof(allwinner_wdt_sun4i_regmap); + awc->read = allwinner_wdt_sun4i_read; + awc->write = allwinner_wdt_sun4i_write; + awc->can_reset_system = allwinner_wdt_sun4i_can_reset_system; + awc->is_key_valid = allwinner_wdt_sun4i_is_key_valid; + awc->get_intv_value = allwinner_wdt_sun4i_get_intv_value; +} + +static void allwinner_wdt_sun6i_class_init(ObjectClass *klass, void *data) +{ + AwWdtClass *awc = AW_WDT_CLASS(klass); + + awc->regmap = allwinner_wdt_sun6i_regmap; + awc->regmap_size = sizeof(allwinner_wdt_sun6i_regmap); + awc->read = allwinner_wdt_sun6i_read; + awc->write = allwinner_wdt_sun6i_write; + awc->can_reset_system = allwinner_wdt_sun6i_can_reset_system; + awc->is_key_valid = allwinner_wdt_sun6i_is_key_valid; + awc->get_intv_value = allwinner_wdt_sun6i_get_intv_value; +} + +static const TypeInfo allwinner_wdt_info = { + .name = TYPE_AW_WDT, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_init = allwinner_wdt_init, + .instance_size = sizeof(AwWdtState), + .class_init = allwinner_wdt_class_init, + .class_size = sizeof(AwWdtClass), + .abstract = true, +}; + +static const TypeInfo allwinner_wdt_sun4i_info = { + .name = TYPE_AW_WDT_SUN4I, + .parent = TYPE_AW_WDT, + .class_init = allwinner_wdt_sun4i_class_init, +}; + +static const TypeInfo allwinner_wdt_sun6i_info = { + .name = TYPE_AW_WDT_SUN6I, + .parent = TYPE_AW_WDT, + .class_init = allwinner_wdt_sun6i_class_init, +}; + +static void allwinner_wdt_register(void) +{ + type_register_static(&allwinner_wdt_info); + type_register_static(&allwinner_wdt_sun4i_info); + type_register_static(&allwinner_wdt_sun6i_info); +} + +type_init(allwinner_wdt_register) diff --git a/hw/watchdog/meson.build b/hw/watchdog/meson.build index 8974b5cf4c..5dcd4fbe2f 100644 --- a/hw/watchdog/meson.build +++ b/hw/watchdog/meson.build @@ -1,4 +1,5 @@ softmmu_ss.add(files('watchdog.c')) +softmmu_ss.add(when: 'CONFIG_ALLWINNER_WDT', if_true: files('allwinner-wdt.c')) softmmu_ss.add(when: 'CONFIG_CMSDK_APB_WATCHDOG', if_true: files('cmsdk-apb-watchdog.c')) softmmu_ss.add(when: 'CONFIG_WDT_IB6300ESB', if_true: files('wdt_i6300esb.c')) softmmu_ss.add(when: 'CONFIG_WDT_IB700', if_true: files('wdt_ib700.c')) diff --git a/hw/watchdog/trace-events b/hw/watchdog/trace-events index 54371ae075..2739570652 100644 --- a/hw/watchdog/trace-events +++ b/hw/watchdog/trace-events @@ -1,5 +1,12 @@ # See docs/devel/tracing.rst for syntax documentation. +# allwinner-wdt.c +allwinner_wdt_read(uint64_t offset, uint64_t data, unsigned size) "Allwinner watchdog read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" +allwinner_wdt_write(uint64_t offset, uint64_t data, unsigned size) "Allwinner watchdog write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" +allwinner_wdt_reset_enter(void) "Allwinner watchdog: reset" +allwinner_wdt_update_timer(uint8_t count) "Allwinner watchdog: count %" PRIu8 +allwinner_wdt_expired(bool enabled, bool reset_enabled) "Allwinner watchdog: enabled %u reset_enabled %u" + # cmsdk-apb-watchdog.c cmsdk_apb_watchdog_read(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB watchdog read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" cmsdk_apb_watchdog_write(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB watchdog write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" diff --git a/include/hw/watchdog/allwinner-wdt.h b/include/hw/watchdog/allwinner-wdt.h new file mode 100644 index 0000000000..7fe41e20f2 --- /dev/null +++ b/include/hw/watchdog/allwinner-wdt.h @@ -0,0 +1,123 @@ +/* + * Allwinner Watchdog emulation + * + * Copyright (C) 2023 Strahinja Jankovic + * + * This file is derived from Allwinner RTC, + * by Niek Linnenbank. + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef HW_WATCHDOG_ALLWINNER_WDT_H +#define HW_WATCHDOG_ALLWINNER_WDT_H + +#include "qom/object.h" +#include "hw/ptimer.h" +#include "hw/sysbus.h" + +/* + * This is a model of the Allwinner watchdog. + * Since watchdog registers belong to the timer module (and are shared with the + * RTC module), the interrupt line from watchdog is not handled right now. + * In QEMU, we just wire up the watchdog reset to watchdog_perform_action(), + * at least for the moment. + */ + +#define TYPE_AW_WDT "allwinner-wdt" + +/** Allwinner WDT sun4i family (A10, A12), also sun7i (A20) */ +#define TYPE_AW_WDT_SUN4I TYPE_AW_WDT "-sun4i" + +/** Allwinner WDT sun6i family and newer (A31, H2+, H3, etc) */ +#define TYPE_AW_WDT_SUN6I TYPE_AW_WDT "-sun6i" + +/** Number of WDT registers */ +#define AW_WDT_REGS_NUM (5) + +OBJECT_DECLARE_TYPE(AwWdtState, AwWdtClass, AW_WDT) + +/** + * Allwinner WDT object instance state. + */ +struct AwWdtState { + /*< private >*/ + SysBusDevice parent_obj; + + /*< public >*/ + MemoryRegion iomem; + struct ptimer_state *timer; + + uint32_t regs[AW_WDT_REGS_NUM]; +}; + +/** + * Allwinner WDT class-level struct. + * + * This struct is filled by each sunxi device specific code + * such that the generic code can use this struct to support + * all devices. + */ +struct AwWdtClass { + /*< private >*/ + SysBusDeviceClass parent_class; + /*< public >*/ + + /** Defines device specific register map */ + const uint8_t *regmap; + + /** Size of the regmap in bytes */ + size_t regmap_size; + + /** + * Read device specific register + * + * @offset: register offset to read + * @return true if register read successful, false otherwise + */ + bool (*read)(AwWdtState *s, uint32_t offset); + + /** + * Write device specific register + * + * @offset: register offset to write + * @data: value to set in register + * @return true if register write successful, false otherwise + */ + bool (*write)(AwWdtState *s, uint32_t offset, uint32_t data); + + /** + * Check if watchdog can generate system reset + * + * @return true if watchdog can generate system reset + */ + bool (*can_reset_system)(AwWdtState *s); + + /** + * Check if provided key is valid + * + * @value: value written to register + * @return true if key is valid, false otherwise + */ + bool (*is_key_valid)(AwWdtState *s, uint32_t val); + + /** + * Get current INTV_VALUE setting + * + * @return current INTV_VALUE (0-15) + */ + uint8_t (*get_intv_value)(AwWdtState *s); +}; + +#endif /* HW_WATCHDOG_ALLWINNER_WDT_H */ From patchwork Fri Mar 17 00:12:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Strahinja Jankovic X-Patchwork-Id: 13178407 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E4F6FC6FD1F for ; Fri, 17 Mar 2023 00:14:34 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pcxir-0005Yc-3j; Thu, 16 Mar 2023 20:13:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pcxip-0005XD-80; Thu, 16 Mar 2023 20:13:27 -0400 Received: from mail-lf1-x12a.google.com ([2a00:1450:4864:20::12a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pcxin-0004PX-Bx; Thu, 16 Mar 2023 20:13:26 -0400 Received: by mail-lf1-x12a.google.com with SMTP id o8so4567854lfo.0; Thu, 16 Mar 2023 17:13:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1679012003; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=gibIWHp2DjKhjqmF4CDIwlJs//RfjUNBpQ15/PPbVXI=; b=WNYFb6NJ27vYiKs4ZbCIVgbQRT9TR0/xH7sli9sDXrodzcj/qWqsDLWcJXgWP9UUfv vlzRT/pvhmnFYjopcAz7u6URuMKjqthOoCx+NTnh5zPf+A7ixJl+gISr5B2hzULoPBnj sGA3Nma/C+ZSh3iNF+n7At89653ueYsnANOXJhwum/Uon4nUEmMByFnxv6gsP6AvZMp2 GdkyS1SaI+aS1FeG/zOr3vrdvNvX+RuPYbmUdKGHE+uYIuZTXca7RAHz/cLIDQM/XWwL j5KQuwcMKXhz5YB0dpMEcXw690ntcZBq8A0xVTnD/2q6djVrs9Ss6REdmNCjObZv7wOu NOSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679012003; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gibIWHp2DjKhjqmF4CDIwlJs//RfjUNBpQ15/PPbVXI=; b=IjP8Bbm8+EkRDykI3jODyTgFZY8eOEc3qJ1Gv0c0tnE+spZ+BMHELK99ldWgM/lAjs HfGdZlSxOCtztPXFHlc2hD0cHGnoPLPQ7qzYwL/N/LBmgYhEdsGAcYUKRyTMHQrVE82W L/tQDjBWTB+yUHY0XQ0ay0/9dQuVofFg5b/VTR+ay99PvInh/kubRvuhOugyxn2Vn7Dd oaRfdEvMdtrbbUpUTMQj64IyOoXpHb0F9+/xbYdWSCOIM51qWuUY5sxeyDt2WZvCMXQa 55Y03PSqsqtv75i5wTQ/VqqdMekQGWv2Kn9iuD/IF4pouorSHoSfPxg+03W8Xj2nwGE2 JG2w== X-Gm-Message-State: AO0yUKULDUvqHV05OW4982R7AHStAldnpe/ntbLkGvRYH3cFj9cE73P6 cWU/0bJ4ChKGi8BdoJVqBP8kJMRnQmvwFvlwU8w= X-Google-Smtp-Source: AK7set/oqLwRiD6jHG7QNNnE8oyblLeu9M4Iheea2eBamio8KBHwrQxczDqVUEohP4YySivQdJiczw== X-Received: by 2002:ac2:44cb:0:b0:4e8:5f9d:13d5 with SMTP id d11-20020ac244cb000000b004e85f9d13d5mr2565868lfm.43.1679012002676; Thu, 16 Mar 2023 17:13:22 -0700 (PDT) Received: from penguin.lxd (213-67-202-254-no43.tbcn.telia.com. [213.67.202.254]) by smtp.googlemail.com with ESMTPSA id y17-20020ac24211000000b004ddaea30ba6sm97776lfh.235.2023.03.16.17.13.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 17:13:22 -0700 (PDT) From: Strahinja Jankovic X-Google-Original-From: Strahinja Jankovic To: Peter Maydell Cc: Beniamino Galvani , Niek Linnenbank , qemu-arm@nongnu.org, qemu-devel@nongnu.org, Strahinja Jankovic Subject: [PATCH v2 2/4] hw/arm: Add WDT to Allwinner-A10 and Cubieboard Date: Fri, 17 Mar 2023 01:12:03 +0100 Message-Id: <20230317001203.18425-3-strahinja.p.jankovic@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230317001203.18425-1-strahinja.p.jankovic@gmail.com> References: <20230317001203.18425-1-strahinja.p.jankovic@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::12a; envelope-from=strahinjapjankovic@gmail.com; helo=mail-lf1-x12a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This patch adds WDT to Allwinner-A10 and Cubieboard. WDT is added as an overlay to the Timer module memory map. Signed-off-by: Strahinja Jankovic Reviewed-by: Niek Linnenbank --- docs/system/arm/cubieboard.rst | 1 + hw/arm/Kconfig | 1 + hw/arm/allwinner-a10.c | 7 +++++++ include/hw/arm/allwinner-a10.h | 2 ++ 4 files changed, 11 insertions(+) diff --git a/docs/system/arm/cubieboard.rst b/docs/system/arm/cubieboard.rst index 8d485f5435..58c4a2d3ea 100644 --- a/docs/system/arm/cubieboard.rst +++ b/docs/system/arm/cubieboard.rst @@ -15,3 +15,4 @@ Emulated devices: - USB controller - SATA controller - TWI (I2C) controller +- Watchdog timer diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index b5aed4aff5..ec15248536 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -325,6 +325,7 @@ config ALLWINNER_A10 select ALLWINNER_A10_PIC select ALLWINNER_A10_CCM select ALLWINNER_A10_DRAMC + select ALLWINNER_WDT select ALLWINNER_EMAC select ALLWINNER_I2C select AXP209_PMU diff --git a/hw/arm/allwinner-a10.c b/hw/arm/allwinner-a10.c index b7ca795c71..b0ea3f7f66 100644 --- a/hw/arm/allwinner-a10.c +++ b/hw/arm/allwinner-a10.c @@ -38,6 +38,7 @@ #define AW_A10_EHCI_BASE 0x01c14000 #define AW_A10_OHCI_BASE 0x01c14400 #define AW_A10_SATA_BASE 0x01c18000 +#define AW_A10_WDT_BASE 0x01c20c90 #define AW_A10_RTC_BASE 0x01c20d00 #define AW_A10_I2C0_BASE 0x01c2ac00 @@ -92,6 +93,8 @@ static void aw_a10_init(Object *obj) object_initialize_child(obj, "mmc0", &s->mmc0, TYPE_AW_SDHOST_SUN4I); object_initialize_child(obj, "rtc", &s->rtc, TYPE_AW_RTC_SUN4I); + + object_initialize_child(obj, "wdt", &s->wdt, TYPE_AW_WDT_SUN4I); } static void aw_a10_realize(DeviceState *dev, Error **errp) @@ -203,6 +206,10 @@ static void aw_a10_realize(DeviceState *dev, Error **errp) sysbus_realize(SYS_BUS_DEVICE(&s->i2c0), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c0), 0, AW_A10_I2C0_BASE); sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c0), 0, qdev_get_gpio_in(dev, 7)); + + /* WDT */ + sysbus_realize(SYS_BUS_DEVICE(&s->wdt), &error_fatal); + sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->wdt), 0, AW_A10_WDT_BASE, 1); } static void aw_a10_class_init(ObjectClass *oc, void *data) diff --git a/include/hw/arm/allwinner-a10.h b/include/hw/arm/allwinner-a10.h index 095afb225d..cd1465c613 100644 --- a/include/hw/arm/allwinner-a10.h +++ b/include/hw/arm/allwinner-a10.h @@ -13,6 +13,7 @@ #include "hw/misc/allwinner-a10-ccm.h" #include "hw/misc/allwinner-a10-dramc.h" #include "hw/i2c/allwinner-i2c.h" +#include "hw/watchdog/allwinner-wdt.h" #include "sysemu/block-backend.h" #include "target/arm/cpu.h" @@ -41,6 +42,7 @@ struct AwA10State { AwSdHostState mmc0; AWI2CState i2c0; AwRtcState rtc; + AwWdtState wdt; MemoryRegion sram_a; EHCISysBusState ehci[AW_A10_NUM_USB]; OHCISysBusState ohci[AW_A10_NUM_USB]; From patchwork Fri Mar 17 00:12:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Strahinja Jankovic X-Patchwork-Id: 13178408 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CD6E7C74A5B for ; Fri, 17 Mar 2023 00:14:38 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pcxj7-0005nh-U7; Thu, 16 Mar 2023 20:13:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pcxiz-0005db-Hp; Thu, 16 Mar 2023 20:13:37 -0400 Received: from mail-lf1-x12c.google.com ([2a00:1450:4864:20::12c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pcxiw-0004SS-7x; Thu, 16 Mar 2023 20:13:36 -0400 Received: by mail-lf1-x12c.google.com with SMTP id x17so4513500lfu.5; Thu, 16 Mar 2023 17:13:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1679012012; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=J+9drRYcPap8x0rvwcbFK9iA3EPw67rquBQoOyVcYNs=; b=D6lms0RhFYeZz7A496H3g7GjvThyIReCsd1Wr8twJ/wp0yvi+Sg3GKx1z6T5vYWNL5 xkqbsBTQ3yIUyHYyM1V+V+61C5dsrOTE52jxlwaVywzyryQz2Qs7hhCtHNANynsBY83V Pzl4jrXwczLBGPvvOUdrq4ISDB5ShzfVwLytddhnP+2/cBQE0EmJfTKsgsRwmDICX80m X1nj1mT339mznz0NMQ2SPrqJkwozjw0RoqI3XhehlBBiBleN+Yzs1uiZWcXKsV2GpwjY SQNxHjqzLJyGg+R1eFqfFLOaIVxRs1os5sT3apSlOEubukNNK1xoTtCUAmkAxY93O0Us uxSQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679012012; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=J+9drRYcPap8x0rvwcbFK9iA3EPw67rquBQoOyVcYNs=; b=NQhgLMN77nycBjC4x2ULKL4evbc6p9K5/xP/eV1iWgTVlrpPu9BPvKkN0gOF9hy2JD nxOcwv5rfoFs/qPJXkmdW6NgZGxCv8L557+HGw8VMxB9Hf1HZIXsZlo1N43wTxhgGbVg c8MZAKSw5f6FH3tOZ/BbuWvnuHXS+HbE52XDu4KhD3Yhg13lLxGnBEvQRbvBPgTvr2Iw fa3A6E55Qyw/97xFdKW7LeBbDR3eLlByyqVVyvrGZ5lYa9bm+BcAQAABemlckTNvxIgK czz1kCR4vzvwyzUkCI7bcfBEoCBcHSAf1uDYttX7HzyPVCVPn0K6zx9k5N3Hn9ykLdv2 m6Tw== X-Gm-Message-State: AO0yUKXZWpcOd+G1+Y/nroPlMdni3hJJrNb5csap6ROnQZQiT3TZKYI6 9T5klQRfhTjFpw61eUu6Bk4= X-Google-Smtp-Source: AK7set8fiz263uCYen3lHp//sIQS1iAaJnei3B15SzOjq1iSBMmxkbzTN2QH6GvONU+ODHLz+O+Uqg== X-Received: by 2002:a05:6512:3f07:b0:4da:ffa0:3f21 with SMTP id y7-20020a0565123f0700b004daffa03f21mr286839lfa.14.1679012012232; Thu, 16 Mar 2023 17:13:32 -0700 (PDT) Received: from penguin.lxd (213-67-202-254-no43.tbcn.telia.com. [213.67.202.254]) by smtp.googlemail.com with ESMTPSA id y17-20020ac24211000000b004ddaea30ba6sm97776lfh.235.2023.03.16.17.13.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 17:13:32 -0700 (PDT) From: Strahinja Jankovic X-Google-Original-From: Strahinja Jankovic To: Peter Maydell Cc: Beniamino Galvani , Niek Linnenbank , qemu-arm@nongnu.org, qemu-devel@nongnu.org, Strahinja Jankovic Subject: [PATCH v2 3/4] hw/arm: Add WDT to Allwinner-H3 and Orangepi-PC Date: Fri, 17 Mar 2023 01:12:05 +0100 Message-Id: <20230317001203.18425-4-strahinja.p.jankovic@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230317001203.18425-1-strahinja.p.jankovic@gmail.com> References: <20230317001203.18425-1-strahinja.p.jankovic@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::12c; envelope-from=strahinjapjankovic@gmail.com; helo=mail-lf1-x12c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, WEIRD_QUOTING=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This patch adds WDT to Allwinner-H3 and Orangepi-PC. WDT is added as an overlay to the Timer module memory area. Signed-off-by: Strahinja Jankovic Reviewed-by: Niek Linnenbank --- docs/system/arm/orangepi.rst | 1 + hw/arm/Kconfig | 1 + hw/arm/allwinner-h3.c | 8 ++++++++ include/hw/arm/allwinner-h3.h | 5 ++++- 4 files changed, 14 insertions(+), 1 deletion(-) diff --git a/docs/system/arm/orangepi.rst b/docs/system/arm/orangepi.rst index e5973600a1..9afa54213b 100644 --- a/docs/system/arm/orangepi.rst +++ b/docs/system/arm/orangepi.rst @@ -26,6 +26,7 @@ The Orange Pi PC machine supports the following devices: * System Control module * Security Identifier device * TWI (I2C) + * Watchdog timer Limitations """"""""""" diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index ec15248536..7d916f5450 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -337,6 +337,7 @@ config ALLWINNER_H3 select ALLWINNER_A10_PIT select ALLWINNER_SUN8I_EMAC select ALLWINNER_I2C + select ALLWINNER_WDT select SERIAL select ARM_TIMER select ARM_GIC diff --git a/hw/arm/allwinner-h3.c b/hw/arm/allwinner-h3.c index 69d0ad6f50..f05afddf7e 100644 --- a/hw/arm/allwinner-h3.c +++ b/hw/arm/allwinner-h3.c @@ -49,6 +49,7 @@ const hwaddr allwinner_h3_memmap[] = { [AW_H3_DEV_OHCI3] = 0x01c1d400, [AW_H3_DEV_CCU] = 0x01c20000, [AW_H3_DEV_PIT] = 0x01c20c00, + [AW_H3_DEV_WDT] = 0x01c20ca0, [AW_H3_DEV_UART0] = 0x01c28000, [AW_H3_DEV_UART1] = 0x01c28400, [AW_H3_DEV_UART2] = 0x01c28800, @@ -234,6 +235,8 @@ static void allwinner_h3_init(Object *obj) object_initialize_child(obj, "twi1", &s->i2c1, TYPE_AW_I2C_SUN6I); object_initialize_child(obj, "twi2", &s->i2c2, TYPE_AW_I2C_SUN6I); object_initialize_child(obj, "r_twi", &s->r_twi, TYPE_AW_I2C_SUN6I); + + object_initialize_child(obj, "wdt", &s->wdt, TYPE_AW_WDT_SUN6I); } static void allwinner_h3_realize(DeviceState *dev, Error **errp) @@ -453,6 +456,11 @@ static void allwinner_h3_realize(DeviceState *dev, Error **errp) sysbus_connect_irq(SYS_BUS_DEVICE(&s->r_twi), 0, qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_R_TWI)); + /* WDT */ + sysbus_realize(SYS_BUS_DEVICE(&s->wdt), &error_fatal); + sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->wdt), 0, + s->memmap[AW_H3_DEV_WDT], 1); + /* Unimplemented devices */ for (i = 0; i < ARRAY_SIZE(unimplemented); i++) { create_unimplemented_device(unimplemented[i].device_name, diff --git a/include/hw/arm/allwinner-h3.h b/include/hw/arm/allwinner-h3.h index 59e0f822d2..f15d6d7cc7 100644 --- a/include/hw/arm/allwinner-h3.h +++ b/include/hw/arm/allwinner-h3.h @@ -48,6 +48,7 @@ #include "hw/net/allwinner-sun8i-emac.h" #include "hw/rtc/allwinner-rtc.h" #include "hw/i2c/allwinner-i2c.h" +#include "hw/watchdog/allwinner-wdt.h" #include "target/arm/cpu.h" #include "sysemu/block-backend.h" @@ -96,7 +97,8 @@ enum { AW_H3_DEV_RTC, AW_H3_DEV_CPUCFG, AW_H3_DEV_R_TWI, - AW_H3_DEV_SDRAM + AW_H3_DEV_SDRAM, + AW_H3_DEV_WDT }; /** Total number of CPU cores in the H3 SoC */ @@ -141,6 +143,7 @@ struct AwH3State { AWI2CState r_twi; AwSun8iEmacState emac; AwRtcState rtc; + AwWdtState wdt; GICState gic; MemoryRegion sram_a1; MemoryRegion sram_a2; From patchwork Fri Mar 17 00:12:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Strahinja Jankovic X-Patchwork-Id: 13178405 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CF7B2C6FD1F for ; Fri, 17 Mar 2023 00:14:22 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pcxjD-00066H-SD; Thu, 16 Mar 2023 20:13:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pcxj5-0005kt-KL; Thu, 16 Mar 2023 20:13:44 -0400 Received: from mail-lf1-x12a.google.com ([2a00:1450:4864:20::12a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pcxj2-0004St-4q; Thu, 16 Mar 2023 20:13:42 -0400 Received: by mail-lf1-x12a.google.com with SMTP id r27so4493353lfe.10; Thu, 16 Mar 2023 17:13:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1679012018; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xfZjNMjzWHrnALAVPW0l5NgU6D15/Iv55fFst8PORK8=; b=a6jHcY4R91CJmYGbXSHvN4ENjYSfKRyiFxBtoRlSCMgBm7AWU5meRyU0s6tHfauQUV GDCRrHJJoZ54oDPQ4ADAwsdO/2w6a5Xv1azdxYPHmuAiv1wzKI+4qnkDB/EhPcwkW8KT vxo9WXzJS53QWz2baJ1EKNAZuePBuhj1EOXpj5PqqDtDpCGuFbVbEtxznRcmJCTkImLd kC6uGYG8tCy2o+NbCv7Dc86MtUgwkXxp/tCf/NUIVARPprdVXs42/y9d4fPJx7ThaTZG uz9pNKtmGvm9fMvR3rU63WTDk8CadVSSCzR9A6cAu350JwFFzerfEZ+sd3ANEzC+rwJh J+Nw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679012018; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xfZjNMjzWHrnALAVPW0l5NgU6D15/Iv55fFst8PORK8=; b=CG203iNitApCupr6hSUEE0ueP8zKx5v1k91KtPoOcL5Z/5yfFDZmr0hhHase6p1DuN YLO1wl5xa1AsdOMa/J/JlpDI41BKydYzf0s9id3+wP4mpyEGMVBXdHomntVInZxMeMY2 tc5bRCzo88OumldVw6tSU60g9TFDuD0PRXrH75d7n+ROMRwBi09cURSnI/pzQmtFzSFC r0Exbs8Vf2vpSP9XvhdYLlpYMffyKNBTQWJNB9hELRoxA8ZYTEnhcOM1DHW35+EH9bCM xMOKA4KduFWgaSqF1YH2jPM53SsG3qtCd3EeEBPFxnhMTFK59QvZP1ygjHtuxGsVjwrA Zk5w== X-Gm-Message-State: AO0yUKXe+7lCNpdiDnsutxE2nRpMj6VHv4feFKEhxwDhOzxWr04VPKWM Tp99AdEWfntlEBxdXDmN3GV0TWJjO9g1NZffO/8= X-Google-Smtp-Source: AK7set9mWgNvftohHw8c6u9R6SRLx4hMcLxYLkmgqBKK4q3XYtNB+XQVr0Ag36/Vle20+TMeGH+j1A== X-Received: by 2002:a19:7613:0:b0:4db:1fdf:4c64 with SMTP id c19-20020a197613000000b004db1fdf4c64mr213170lff.54.1679012018308; Thu, 16 Mar 2023 17:13:38 -0700 (PDT) Received: from penguin.lxd (213-67-202-254-no43.tbcn.telia.com. [213.67.202.254]) by smtp.googlemail.com with ESMTPSA id y17-20020ac24211000000b004ddaea30ba6sm97776lfh.235.2023.03.16.17.13.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 17:13:38 -0700 (PDT) From: Strahinja Jankovic X-Google-Original-From: Strahinja Jankovic To: Peter Maydell Cc: Beniamino Galvani , Niek Linnenbank , qemu-arm@nongnu.org, qemu-devel@nongnu.org, Strahinja Jankovic Subject: [PATCH v2 4/4] tests/avocado: Add reboot tests to Cubieboard Date: Fri, 17 Mar 2023 01:12:06 +0100 Message-Id: <20230317001203.18425-5-strahinja.p.jankovic@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230317001203.18425-1-strahinja.p.jankovic@gmail.com> References: <20230317001203.18425-1-strahinja.p.jankovic@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::12a; envelope-from=strahinjapjankovic@gmail.com; helo=mail-lf1-x12a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Cubieboard tests end with comment "reboot not functioning; omit test". Fix this so reboot is done at the end of each test. Signed-off-by: Strahinja Jankovic Reviewed-by: Niek Linnenbank Tested-by: Niek Linnenbank --- tests/avocado/boot_linux_console.py | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/tests/avocado/boot_linux_console.py b/tests/avocado/boot_linux_console.py index 574609bf43..c0675809e6 100644 --- a/tests/avocado/boot_linux_console.py +++ b/tests/avocado/boot_linux_console.py @@ -581,7 +581,10 @@ def test_arm_cubieboard_initrd(self): 'Allwinner sun4i/sun5i') exec_command_and_wait_for_pattern(self, 'cat /proc/iomem', 'system-control@1c00000') - # cubieboard's reboot is not functioning; omit reboot test. + exec_command_and_wait_for_pattern(self, 'reboot', + 'reboot: Restarting system') + # Wait for VM to shut down gracefully + self.vm.wait() def test_arm_cubieboard_sata(self): """ @@ -625,7 +628,10 @@ def test_arm_cubieboard_sata(self): 'Allwinner sun4i/sun5i') exec_command_and_wait_for_pattern(self, 'cat /proc/partitions', 'sda') - # cubieboard's reboot is not functioning; omit reboot test. + exec_command_and_wait_for_pattern(self, 'reboot', + 'reboot: Restarting system') + # Wait for VM to shut down gracefully + self.vm.wait() @skipUnless(os.getenv('AVOCADO_ALLOW_LARGE_STORAGE'), 'storage limited') def test_arm_cubieboard_openwrt_22_03_2(self): @@ -672,7 +678,10 @@ def test_arm_cubieboard_openwrt_22_03_2(self): exec_command_and_wait_for_pattern(self, 'cat /proc/cpuinfo', 'Allwinner sun4i/sun5i') - # cubieboard's reboot is not functioning; omit reboot test. + exec_command_and_wait_for_pattern(self, 'reboot', + 'reboot: Restarting system') + # Wait for VM to shut down gracefully + self.vm.wait() @skipUnless(os.getenv('AVOCADO_TIMEOUT_EXPECTED'), 'Test might timeout') def test_arm_quanta_gsj(self):