From patchwork Wed Mar 22 10:34:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13183856 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 70A81C6FD1F for ; Wed, 22 Mar 2023 10:34:56 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8938210E901; Wed, 22 Mar 2023 10:34:53 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4D09610E8E8 for ; Wed, 22 Mar 2023 10:34:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1679481282; x=1711017282; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=E3MxHmggTumlTIgLzmBnxWGg8GqqriU6T/dEDBKr+pc=; b=PPF4t2mA33NrWVhpEsy/mt0lzg9eO3RA8yeIY84AaoN480olI3h6aHem UJmwoqgbjJ3dYYNKLZ+XcGyGhifDV+hadHjgwN/zOt5c55UUwqTQcRH55 9L08uFMlQ/bFSXuQzhmMZyM4YilAfPa8WOEKTJHz2fm3lCM9fcrJaSsTF 0bw/xxztF9dtvYLE5+nqaL82FpEGy9tTjZkQvb83i81QTnHPfyizz3mam XPXm2hFptmctz+MoKrTAbTCBHMmw3JasnWOHblBMvtGi5bsX9DEq7Cj4t MpNLt0wxZEOhAuETjucMWBEjyC17GSaRl7FKKwjhtIa78XUM3qWuWEsa3 g==; X-IronPort-AV: E=McAfee;i="6600,9927,10656"; a="340716634" X-IronPort-AV: E=Sophos;i="5.98,281,1673942400"; d="scan'208";a="340716634" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 03:34:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10656"; a="746249852" X-IronPort-AV: E=Sophos;i="5.98,281,1673942400"; d="scan'208";a="746249852" Received: from swcompto-mobl1.amr.corp.intel.com (HELO jhogande-mobl1.ger.corp.intel.com) ([10.252.63.36]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 03:34:35 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org Date: Wed, 22 Mar 2023 12:34:07 +0200 Message-Id: <20230322103412.123943-2-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230322103412.123943-1-jouni.hogander@intel.com> References: <20230322103412.123943-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: [Intel-gfx] [PATCH v5 1/6] drm/i915/psr: Unify pre/post hooks X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" pre/post hooks are doing things differently. Unify them. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 31084d95711d..8dbf452d63c2 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1954,23 +1954,22 @@ static void _intel_psr_post_plane_update(const struct intel_atomic_state *state, crtc_state->uapi.encoder_mask) { struct intel_dp *intel_dp = enc_to_intel_dp(encoder); struct intel_psr *psr = &intel_dp->psr; + bool keep_disabled = false; mutex_lock(&psr->lock); - if (psr->sink_not_reliable) - goto exit; - drm_WARN_ON(&dev_priv->drm, psr->enabled && !crtc_state->active_planes); - /* Only enable if there is active planes */ - if (!psr->enabled && crtc_state->active_planes) + keep_disabled |= psr->sink_not_reliable; + keep_disabled |= !crtc_state->active_planes; + + if (!psr->enabled && !keep_disabled) intel_psr_enable_locked(intel_dp, crtc_state); /* Force a PSR exit when enabling CRC to avoid CRC timeouts */ if (crtc_state->crc_enabled && psr->enabled) psr_force_hw_tracking_exit(intel_dp); -exit: mutex_unlock(&psr->lock); } } From patchwork Wed Mar 22 10:34:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13183852 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 440ABC7619A for ; Wed, 22 Mar 2023 10:34:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A4B1010E8EE; Wed, 22 Mar 2023 10:34:44 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7526910E8EE for ; Wed, 22 Mar 2023 10:34:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1679481282; x=1711017282; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=6AJJLB6drYWMFFnRYru4YmOMYMLkye1znHwgkA3M9UU=; b=nOdJtLffiX3znz0lYeNXT4AGOVfa6IRZrk4QQUaW9VCNjtqso7Gnb6tN u6o5msBUa1HJ4/qeeaCbM0YAon5s/ow49UYbyzZ1Q5ZZJkK99sZfSgXRO 156ZqlGMmdfkAfp3xKIC3UKY/kF95E1yXrGJffYuAcJejJyzorH92/RaJ WFh+ZhjXFdMryAUk2l455KLsiSoLhR6XAcNcPb1RhO489h1bJ8VnBJfTS iZSep0E+wCUO9xEZtfXvrhYIr0tJqblrqINkvmRF5rNb1SdVADgdJRnhm VhW3HyZNe/nGIKhVZTfZat+FCh8VNfXmzMm+BdoTYhJF1p/9v4ZBTnfUr A==; X-IronPort-AV: E=McAfee;i="6600,9927,10656"; a="340716635" X-IronPort-AV: E=Sophos;i="5.98,281,1673942400"; d="scan'208";a="340716635" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 03:34:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10656"; a="746249861" X-IronPort-AV: E=Sophos;i="5.98,281,1673942400"; d="scan'208";a="746249861" Received: from swcompto-mobl1.amr.corp.intel.com (HELO jhogande-mobl1.ger.corp.intel.com) ([10.252.63.36]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 03:34:37 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org Date: Wed, 22 Mar 2023 12:34:08 +0200 Message-Id: <20230322103412.123943-3-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230322103412.123943-1-jouni.hogander@intel.com> References: <20230322103412.123943-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: [Intel-gfx] [PATCH v5 2/6] drm/i915/psr: Modify/fix Wa_16013835468 and prepare for Wa_14015648006 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Wa_16013835468 is a separate from Wa_14015648006 and needs to be applied for TGL onwards. Fix this by removing all the references to Wa_14015648006 and apply Wa_16013835468 according to Bspec. Also move workaround into separate function as a preparation for Wa_14015648006 implementation. Apply this workaround in post plane hook. Bspec: 55378 Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 45 ++++++++++++++++-------- 1 file changed, 30 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 8dbf452d63c2..e66677e0554b 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1173,18 +1173,6 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp, intel_dp->psr.psr2_sel_fetch_enabled ? IGNORE_PSR2_HW_TRACKING : 0); - /* - * Wa_16013835468 - * Wa_14015648006 - */ - if (IS_MTL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0) || - IS_DISPLAY_VER(dev_priv, 12, 13)) { - if (crtc_state->hw.adjusted_mode.crtc_vblank_start != - crtc_state->hw.adjusted_mode.crtc_vdisplay) - intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, 0, - wa_16013835468_bit_get(intel_dp)); - } - if (intel_dp->psr.psr2_enabled) { if (DISPLAY_VER(dev_priv) == 9) intel_de_rmw(dev_priv, CHICKEN_TRANS(cpu_transcoder), 0, @@ -1359,10 +1347,8 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp) /* * Wa_16013835468 - * Wa_14015648006 */ - if (IS_MTL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0) || - IS_DISPLAY_VER(dev_priv, 12, 13)) + if (DISPLAY_VER(dev_priv) >= 12) intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, wa_16013835468_bit_get(intel_dp), 0); @@ -1941,6 +1927,30 @@ void intel_psr_pre_plane_update(struct intel_atomic_state *state, } } +/* + * Wa_16013835468 + */ +static void wm_optimization_wa(struct intel_dp *intel_dp, + const struct intel_crtc_state *crtc_state) +{ + struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); + bool set_wa_bit = false; + + /* Wa_16013835468 */ + if (DISPLAY_VER(dev_priv) >= 12) + set_wa_bit |= crtc_state->hw.adjusted_mode.crtc_vblank_start != + crtc_state->hw.adjusted_mode.crtc_vdisplay; + + set_wa_bit &= intel_dp->psr.enabled; + + if (set_wa_bit) + intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, 0, + wa_16013835468_bit_get(intel_dp)); + else + intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, + wa_16013835468_bit_get(intel_dp), 0); +} + static void _intel_psr_post_plane_update(const struct intel_atomic_state *state, const struct intel_crtc_state *crtc_state) { @@ -1966,6 +1976,11 @@ static void _intel_psr_post_plane_update(const struct intel_atomic_state *state, if (!psr->enabled && !keep_disabled) intel_psr_enable_locked(intel_dp, crtc_state); + /* + * Wa_16013835468 + */ + wm_optimization_wa(intel_dp, crtc_state); + /* Force a PSR exit when enabling CRC to avoid CRC timeouts */ if (crtc_state->crc_enabled && psr->enabled) psr_force_hw_tracking_exit(intel_dp); From patchwork Wed Mar 22 10:34:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13183851 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DCF93C6FD1C for ; Wed, 22 Mar 2023 10:34:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 54A6210E8E8; Wed, 22 Mar 2023 10:34:44 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9C21E10E8F3 for ; Wed, 22 Mar 2023 10:34:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1679481282; x=1711017282; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; 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22 Mar 2023 03:34:39 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org Date: Wed, 22 Mar 2023 12:34:09 +0200 Message-Id: <20230322103412.123943-4-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230322103412.123943-1-jouni.hogander@intel.com> References: <20230322103412.123943-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: [Intel-gfx] [PATCH v5 3/6] drm/i915/psr: Implement Wa_14015648006 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" PSR WM optimization should be disabled based on any wm level being disabled. Also same WA should be applied for ICL as well. Bspec: 71580 v3 - Split patch v2 - set/clear chicken bit in post_plane_update - apply for ICL as well Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_psr.c | 10 +++++++++- drivers/gpu/drm/i915/display/skl_watermark.c | 7 +++++-- 3 files changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index c32bfba06ca1..60504c390408 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1152,6 +1152,7 @@ struct intel_crtc_state { bool has_psr2; bool enable_psr2_sel_fetch; bool req_psr2_sdp_prior_scanline; + bool wm_level_disabled; u32 dc3co_exitline; u16 su_y_granularity; struct drm_dp_vsc_sdp psr_vsc; diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index e66677e0554b..dfac546d983b 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1347,8 +1347,9 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp) /* * Wa_16013835468 + * Wa_14015648006 */ - if (DISPLAY_VER(dev_priv) >= 12) + if (DISPLAY_VER(dev_priv) >= 11) intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, wa_16013835468_bit_get(intel_dp), 0); @@ -1929,6 +1930,7 @@ void intel_psr_pre_plane_update(struct intel_atomic_state *state, /* * Wa_16013835468 + * Wa_14015648006 */ static void wm_optimization_wa(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state) @@ -1936,6 +1938,11 @@ static void wm_optimization_wa(struct intel_dp *intel_dp, struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); bool set_wa_bit = false; + /* Wa_14015648006 */ + if (IS_MTL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0) || + IS_DISPLAY_VER(dev_priv, 11, 13)) + set_wa_bit |= crtc_state->wm_level_disabled; + /* Wa_16013835468 */ if (DISPLAY_VER(dev_priv) >= 12) set_wa_bit |= crtc_state->hw.adjusted_mode.crtc_vblank_start != @@ -1978,6 +1985,7 @@ static void _intel_psr_post_plane_update(const struct intel_atomic_state *state, /* * Wa_16013835468 + * Wa_14015648006 */ wm_optimization_wa(intel_dp, crtc_state); diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index 50a9a6adbe32..afb751c024ba 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -2273,9 +2273,12 @@ static int skl_wm_check_vblank(struct intel_crtc_state *crtc_state) return level; /* - * FIXME PSR needs to toggle LATENCY_REPORTING_REMOVED_PIPE_* + * PSR needs to toggle LATENCY_REPORTING_REMOVED_PIPE_* * based on whether we're limited by the vblank duration. - * + */ + crtc_state->wm_level_disabled = level < i915->display.wm.num_levels - 1; + + /* * FIXME also related to skl+ w/a 1136 (also unimplemented as of * now) perhaps? */ From patchwork Wed Mar 22 10:34:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13183855 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 53D27C7619A for ; Wed, 22 Mar 2023 10:34:55 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4E06310E904; Wed, 22 Mar 2023 10:34:52 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6394F10E8EE for ; Wed, 22 Mar 2023 10:34:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1679481283; x=1711017283; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VMmY+gFqhw5bMQFguQ7zzGLCtHTK19lRmdxVxkfdLwI=; b=B7xy8I4CkNofpqwCUQnVvVvJyv51lzXyfmTkmVdg9MJ88lSONrFLtJL5 o5Zib89t/JSi9FsYSA5lrJQwvDrWLm1m8fIH0fIR0OiteYR3bFvlOiYw6 8wBtPhWHGFhtRgLUJwAOxr7X7gp7LHIAS/R+J98Ipbb8Nu+siRUD3xq7U BMJMZOYGr8qIdbYm10OqIE+o2/0DtHuqLakjbm08ajo1kYNYxFGUDGKn2 LiW56IGZAMa9oQib1DyxAfZUSsPkAgWlemtQjVROoEgqoVVvLF9IumMav MjX293TySBw1l2J1Yh1Q9z8mNOUfweu3texwVtzp0jf1x2vxeKrIixO6R w==; X-IronPort-AV: E=McAfee;i="6600,9927,10656"; a="340716639" X-IronPort-AV: E=Sophos;i="5.98,281,1673942400"; d="scan'208";a="340716639" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 03:34:43 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10656"; a="746249879" X-IronPort-AV: E=Sophos;i="5.98,281,1673942400"; d="scan'208";a="746249879" Received: from swcompto-mobl1.amr.corp.intel.com (HELO jhogande-mobl1.ger.corp.intel.com) ([10.252.63.36]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 03:34:42 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org Date: Wed, 22 Mar 2023 12:34:10 +0200 Message-Id: <20230322103412.123943-5-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230322103412.123943-1-jouni.hogander@intel.com> References: <20230322103412.123943-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: [Intel-gfx] [PATCH v5 4/6] drm/i915/psr: Add helpers for block count number handling X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add helpers to make it more clear how PSR2_CTL[Block Count Number] is configured. Signed-off-by: Jouni Högander Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_psr.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index dfac546d983b..4b7c946a9a25 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -519,6 +519,17 @@ static u32 intel_psr2_get_tp_time(struct intel_dp *intel_dp) return val; } +static int psr2_block_count_lines(struct intel_dp *intel_dp) +{ + return intel_dp->psr.io_wake_lines < 9 && + intel_dp->psr.fast_wake_lines < 9 ? 8 : 12; +} + +static int psr2_block_count(struct intel_dp *intel_dp) +{ + return psr2_block_count_lines(intel_dp) / 4; +} + static void hsw_activate_psr2(struct intel_dp *intel_dp) { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); @@ -536,11 +547,10 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp) val |= intel_psr2_get_tp_time(intel_dp); if (DISPLAY_VER(dev_priv) >= 12) { - if (intel_dp->psr.io_wake_lines < 9 && - intel_dp->psr.fast_wake_lines < 9) - val |= TGL_EDP_PSR2_BLOCK_COUNT_NUM_2; - else + if (psr2_block_count(intel_dp) > 2) val |= TGL_EDP_PSR2_BLOCK_COUNT_NUM_3; + else + val |= TGL_EDP_PSR2_BLOCK_COUNT_NUM_2; } /* Wa_22012278275:adl-p */ From patchwork Wed Mar 22 10:34:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13183853 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8298DC6FD1F for ; Wed, 22 Mar 2023 10:34:52 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F3B6A10E8F3; Wed, 22 Mar 2023 10:34:50 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 891FF10E8F3 for ; Wed, 22 Mar 2023 10:34:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1679481285; x=1711017285; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=OpIohCV9mSvEJbVx+JWExw1ShEEITey9w9M4p7itJnY=; b=ki8azed5w3K/VBLHW7BV8D2gBpyCcmS82wBnub8mEjNF7P3U85CEyh+x qVGmjdUssNh44rkIZ+6F8yxVv+MyLB1ZWNH2whOi+MpV4L7O9VVYbYB/z m6/oLPWlrVGSijtE055YhVECaKOXI0BIm4lozVEnIwZSVMCvG7TJMdfsx jobZQR9S/38YHyme7JpPzB7caGukPFMetx1qCEWDCH0KyoYC0e5qkM+ce sr/q66P6dPfaJ247X56CUeAbJTUvL6HYzP5CGdl1TctIeI53nElIVV58U 8PyO+h0IH6txnWi7EcCqVLt+s+0vgrUYPnNZmL2Z5c8GfzIPQxU83v4Mp Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10656"; a="340716642" X-IronPort-AV: E=Sophos;i="5.98,281,1673942400"; d="scan'208";a="340716642" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 03:34:45 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10656"; a="746249886" X-IronPort-AV: E=Sophos;i="5.98,281,1673942400"; d="scan'208";a="746249886" Received: from swcompto-mobl1.amr.corp.intel.com (HELO jhogande-mobl1.ger.corp.intel.com) ([10.252.63.36]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 03:34:44 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org Date: Wed, 22 Mar 2023 12:34:11 +0200 Message-Id: <20230322103412.123943-6-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230322103412.123943-1-jouni.hogander@intel.com> References: <20230322103412.123943-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: [Intel-gfx] [PATCH v5 5/6] drm/i915/psr: Check that vblank is long enough for psr2 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Ensure vblank >= psr2 vblank where Psr2 vblank = PSR2_CTL Block Count Number maximum line count. Bspec: 71580, 49274 v2: Use calculated block count number maximum line count Signed-off-by: Jouni Högander Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_psr.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 4b7c946a9a25..b53c71c06105 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -968,6 +968,15 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, return false; } + /* Vblank >= PSR2_CTL Block Count Number maximum line count */ + if (crtc_state->hw.adjusted_mode.crtc_vblank_end - + crtc_state->hw.adjusted_mode.crtc_vblank_start < + psr2_block_count_lines(intel_dp)) { + drm_dbg_kms(&dev_priv->drm, + "PSR2 not enabled, too short vblank time\n"); + return false; + } + if (HAS_PSR2_SEL_FETCH(dev_priv)) { if (!intel_psr2_sel_fetch_config_valid(intel_dp, crtc_state) && !HAS_PSR_HW_TRACKING(dev_priv)) { From patchwork Wed Mar 22 10:34:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13183854 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 236F2C6FD1C for ; Wed, 22 Mar 2023 10:34:54 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7238C10E8FA; Wed, 22 Mar 2023 10:34:51 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0670E10E8F3 for ; Wed, 22 Mar 2023 10:34:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1679481289; x=1711017289; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=hL4hmWCuxEVs9QYUlnsa28PnbX3lplR32gMcNCZXF/g=; b=bEzX5dpTJXHIuwArHtyWoTX1CjScFHGdAP6L6F/pa02u4emtnkaQ4ZyC wajrKD29kzXdxj6b9vveObBqMPJEyeoSmEIdqF+Tb7p8sz9PT5jhNzifM LIoRKnbalcQ5nVvbGejbRd0QqaeZ7eg2EP2kDBnOJ7K2nZ1glVHamFxDn dCX9ggAgdzlvKfAArJXwKPFbukYURx3JfXLihnL7Lc1qYx3kuonXYeVmz D6cGtSYI/KnJ9SoOjQoAHfaymWx4ho6Kbhfgik9o4xSm8WAbyPGIjIOIf 12elQFe0WHh8EVBEXor1dQw8P1HMJ2TKuLdKg8c0OjaVkVt8xitfg6bEN g==; X-IronPort-AV: E=McAfee;i="6600,9927,10656"; a="340716654" X-IronPort-AV: E=Sophos;i="5.98,281,1673942400"; d="scan'208";a="340716654" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 03:34:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10656"; a="746249895" X-IronPort-AV: E=Sophos;i="5.98,281,1673942400"; d="scan'208";a="746249895" Received: from swcompto-mobl1.amr.corp.intel.com (HELO jhogande-mobl1.ger.corp.intel.com) ([10.252.63.36]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 03:34:47 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org Date: Wed, 22 Mar 2023 12:34:12 +0200 Message-Id: <20230322103412.123943-7-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230322103412.123943-1-jouni.hogander@intel.com> References: <20230322103412.123943-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: [Intel-gfx] [PATCH v5 6/6] drm/i915/psr: Implement Display WA #1136 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Implement Display WA #1136 for SKL/BXT. Bspec: 21664 Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 17 +++++++++++++++++ drivers/gpu/drm/i915/display/skl_watermark.c | 5 ----- 2 files changed, 17 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index b53c71c06105..24c3f75bb9d8 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1950,6 +1950,7 @@ void intel_psr_pre_plane_update(struct intel_atomic_state *state, /* * Wa_16013835468 * Wa_14015648006 + * Display WA #1136: skl, bxt */ static void wm_optimization_wa(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state) @@ -1957,6 +1958,17 @@ static void wm_optimization_wa(struct intel_dp *intel_dp, struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); bool set_wa_bit = false; + /* + * Display WA #1136: skl, bxt + * skl/bxt do not have chicken bit: disable PSR + */ + if (DISPLAY_VER(dev_priv) <= 9) { + if (crtc_state->wm_level_disabled && + intel_dp->psr.enabled) + intel_psr_disable_locked(intel_dp); + return; + } + /* Wa_14015648006 */ if (IS_MTL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0) || IS_DISPLAY_VER(dev_priv, 11, 13)) @@ -1999,12 +2011,17 @@ static void _intel_psr_post_plane_update(const struct intel_atomic_state *state, keep_disabled |= psr->sink_not_reliable; keep_disabled |= !crtc_state->active_planes; + /* Display WA #1136: skl, bxt */ + keep_disabled |= DISPLAY_VER(dev_priv) <= 9 && + crtc_state->wm_level_disabled; + if (!psr->enabled && !keep_disabled) intel_psr_enable_locked(intel_dp, crtc_state); /* * Wa_16013835468 * Wa_14015648006 + * Display WA #1136: skl, bxt */ wm_optimization_wa(intel_dp, crtc_state); diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index afb751c024ba..ced61da8b496 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -2278,11 +2278,6 @@ static int skl_wm_check_vblank(struct intel_crtc_state *crtc_state) */ crtc_state->wm_level_disabled = level < i915->display.wm.num_levels - 1; - /* - * FIXME also related to skl+ w/a 1136 (also unimplemented as of - * now) perhaps? - */ - for (level++; level < i915->display.wm.num_levels; level++) { enum plane_id plane_id;