From patchwork Thu Mar 23 05:44:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13185022 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8585DC6FD1C for ; Thu, 23 Mar 2023 05:38:12 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id B5DFAED0; Thu, 23 Mar 2023 06:37:19 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz B5DFAED0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1679549889; bh=jSG2veXKUxcXyV1zpGUhKNlxMdGkTNUGl0TfqUCdrR0=; h=From:To:Subject:Date:In-Reply-To:References:CC:List-Id: List-Archive:List-Help:List-Owner:List-Post:List-Subscribe: List-Unsubscribe:From; b=hi9unKZ1sr0sZDQJRS2bg9CdXZApduzfLXgjgEhqhLpvcHPpyLoW4TJAIFKRP7PrE v2OGVS7E+uktFNlnSQG5KpE3ta2+d6dX/eFxgBFCc9mC+YcJvpkfO0XUTs6iuFDjXg GomtEdN+vOC1qDy9vs4IiwdT5A4bNkAcAIp1hcKs= Received: from mailman-core.alsa-project.org (mailman-core.alsa-project.org [10.254.200.10]) by alsa1.perex.cz (Postfix) with ESMTP id 3D023F805BE; Thu, 23 Mar 2023 06:33:16 +0100 (CET) Received: by alsa1.perex.cz (Postfix, from userid 50401) id EA9EFF802E8; Thu, 23 Mar 2023 06:31:30 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 1E42BF800C9 for ; Thu, 23 Mar 2023 06:29:56 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 1E42BF800C9 Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key, unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=YyG2Iom5 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1679549398; x=1711085398; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jSG2veXKUxcXyV1zpGUhKNlxMdGkTNUGl0TfqUCdrR0=; b=YyG2Iom5S7YNqmmSAu3JehZ0uBm9FTL8TDv5pIf/GbGQqXcPAY392LlU xdf2e2SOnLHNbDwlr+RqQ3Je+sbkbmy2OdNabkxdlTBo73mfPkG0Q+NLZ xvkH4Jkt/Iy6XslABGy1Iw23f5QcYnEu/B36hlH4oHRFf6ZQAdtDWFZ0X 63KALiatlMyKn2yFiBtGmOYpAafYBP3/GECEXJN/25LAcbCDcXG2ZG6gs knsKk8BfoVqZw7uqZIK2PX8ePSeL06zgHfhRcfK5RaXn71peVK9SuhfVC f+wqDXdmMt91HhbbD/7hIl00//9SNza89xKHm1PtY6oFRRQblqkXJZJ12 w==; X-IronPort-AV: E=McAfee;i="6600,9927,10657"; a="327779281" X-IronPort-AV: E=Sophos;i="5.98,283,1673942400"; d="scan'208";a="327779281" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:29:53 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10657"; a="675566986" X-IronPort-AV: E=Sophos;i="5.98,283,1673942400"; d="scan'208";a="675566986" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:29:50 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org, broonie@kernel.org Subject: [PATCH 01/20] ASoC: SOF: Intel: shim: add enum for ACE 2.0 IP used in LunarLake Date: Thu, 23 Mar 2023 13:44:33 +0800 Message-Id: <20230323054452.1543233-2-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> References: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: FVHXE3QG7GB4ZYAUE7UOHTM6S2C6JAXS X-Message-ID-Hash: FVHXE3QG7GB4ZYAUE7UOHTM6S2C6JAXS X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com, tiwai@suse.de X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart Add the new enum needed for SoundWire IP selection. The LunarLake PCI descriptors and DSP parts will be added at a later time. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Reviewed-by: Péter Ujfalusi Reviewed-by: Ranjani Sridharan Signed-off-by: Bard Liao Acked-by: Mark Brown --- sound/soc/sof/intel/shim.h | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/sof/intel/shim.h b/sound/soc/sof/intel/shim.h index 48428ccbcfe0..207df48e27cf 100644 --- a/sound/soc/sof/intel/shim.h +++ b/sound/soc/sof/intel/shim.h @@ -21,6 +21,7 @@ enum sof_intel_hw_ip_version { SOF_INTEL_CAVS_2_0, /* IceLake, JasperLake */ SOF_INTEL_CAVS_2_5, /* TigerLake, AlderLake */ SOF_INTEL_ACE_1_0, /* MeteorLake */ + SOF_INTEL_ACE_2_0, /* LunarLake */ }; /* From patchwork Thu Mar 23 05:44:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13185006 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3DBD6C6FD1C for ; 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X-IronPort-AV: E=McAfee;i="6600,9927,10657"; a="327779289" X-IronPort-AV: E=Sophos;i="5.98,283,1673942400"; d="scan'208";a="327779289" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:29:55 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10657"; a="675566989" X-IronPort-AV: E=Sophos;i="5.98,283,1673942400"; d="scan'208";a="675566989" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:29:53 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org, broonie@kernel.org Subject: [PATCH 02/20] soundwire: intel: add ACE2.x SHIM definitions Date: Thu, 23 Mar 2023 13:44:34 +0800 Message-Id: <20230323054452.1543233-3-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> References: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: Q5QZLQ5XUVE5LZLE57QE45WZ2ZKLF2G2 X-Message-ID-Hash: Q5QZLQ5XUVE5LZLE57QE45WZ2ZKLF2G2 X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com, tiwai@suse.de X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart With the HDaudio extended link integration, the SHIM and IP registers are split in blocks a) SHIM generic registers b) IP registers (same offsets for Cadence IP as before) c) SHIM vendor-specific registers Add offsets and definitions as defined in the hardware specifications. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Reviewed-by: Péter Ujfalusi Reviewed-by: Ranjani Sridharan Signed-off-by: Bard Liao --- include/linux/soundwire/sdw_intel.h | 75 +++++++++++++++++++++++++++++ 1 file changed, 75 insertions(+) diff --git a/include/linux/soundwire/sdw_intel.h b/include/linux/soundwire/sdw_intel.h index 207701aeeb47..8e6183e029fa 100644 --- a/include/linux/soundwire/sdw_intel.h +++ b/include/linux/soundwire/sdw_intel.h @@ -7,6 +7,10 @@ #include #include +/********************************************************************* + * cAVS and ACE1.x definitions + *********************************************************************/ + #define SDW_SHIM_BASE 0x2C000 #define SDW_ALH_BASE 0x2C800 #define SDW_SHIM_BASE_ACE 0x38000 @@ -101,6 +105,77 @@ #define SDW_ALH_STRMZCFG_DMAT GENMASK(7, 0) #define SDW_ALH_STRMZCFG_CHN GENMASK(19, 16) +/********************************************************************* + * ACE2.x definitions for SHIM registers - only accessible when the + * HDAudio extended link LCTL.SPA/CPA = 1. + *********************************************************************/ +/* x variable is link index */ +#define SDW_SHIM2_GENERIC_BASE(x) (0x00030000 + 0x8000 * (x)) +#define SDW_IP_BASE(x) (0x00030100 + 0x8000 * (x)) +#define SDW_SHIM2_VS_BASE(x) (0x00036000 + 0x8000 * (x)) + +/* SHIM2 Generic Registers */ +/* Read-only capabilities */ +#define SDW_SHIM2_LECAP 0x00 +#define SDW_SHIM2_LECAP_HDS BIT(0) /* unset -> Host mode */ +#define SDW_SHIM2_LECAP_MLC GENMASK(3, 1) /* Number of Lanes */ + +/* PCM Stream capabilities */ +#define SDW_SHIM2_PCMSCAP 0x10 +#define SDW_SHIM2_PCMSCAP_ISS GENMASK(3, 0) /* Input-only streams */ +#define SDW_SHIM2_PCMSCAP_OSS GENMASK(7, 4) /* Output-only streams */ +#define SDW_SHIM2_PCMSCAP_BSS GENMASK(12, 8) /* Bidirectional streams */ + +/* Read-only PCM Stream Channel Count, y variable is stream */ +#define SDW_SHIM2_PCMSYCHC(y) (0x14 + (0x4 * (y))) +#define SDW_SHIM2_PCMSYCHC_CS GENMASK(3, 0) /* Channels Supported */ + +/* PCM Stream Channel Map */ +#define SDW_SHIM2_PCMSYCHM(y) (0x16 + (0x4 * (y))) +#define SDW_SHIM2_PCMSYCHM_LCHAN GENMASK(3, 0) /* Lowest channel used by the FIFO port */ +#define SDW_SHIM2_PCMSYCHM_HCHAN GENMASK(7, 4) /* Lowest channel used by the FIFO port */ +#define SDW_SHIM2_PCMSYCHM_STRM GENMASK(13, 8) /* HDaudio stream tag */ +#define SDW_SHIM2_PCMSYCHM_DIR BIT(15) /* HDaudio stream direction */ + +/* SHIM2 vendor-specific registers */ +#define SDW_SHIM2_INTEL_VS_LVSCTL 0x04 +#define SDW_SHIM2_INTEL_VS_LVSCTL_FCG BIT(26) +#define SDW_SHIM2_INTEL_VS_LVSCTL_MLCS GENMASK(29, 27) +#define SDW_SHIM2_INTEL_VS_LVSCTL_DCGD BIT(30) +#define SDW_SHIM2_INTEL_VS_LVSCTL_ICGD BIT(31) + +#define SDW_SHIM2_MLCS_XTAL_CLK 0x0 +#define SDW_SHIM2_MLCS_CARDINAL_CLK 0x1 +#define SDW_SHIM2_MLCS_AUDIO_PLL_CLK 0x2 +#define SDW_SHIM2_MLCS_MCLK_INPUT_CLK 0x3 +#define SDW_SHIM2_MLCS_WOV_RING_OSC_CLK 0x4 + +#define SDW_SHIM2_INTEL_VS_WAKEEN 0x08 +#define SDW_SHIM2_INTEL_VS_WAKEEN_PWE BIT(0) + +#define SDW_SHIM2_INTEL_VS_WAKESTS 0x0A +#define SDW_SHIM2_INTEL_VS_WAKEEN_PWS BIT(0) + +#define SDW_SHIM2_INTEL_VS_IOCTL 0x0C +#define SDW_SHIM2_INTEL_VS_IOCTL_MIF BIT(0) +#define SDW_SHIM2_INTEL_VS_IOCTL_CO BIT(1) +#define SDW_SHIM2_INTEL_VS_IOCTL_COE BIT(2) +#define SDW_SHIM2_INTEL_VS_IOCTL_DO BIT(3) +#define SDW_SHIM2_INTEL_VS_IOCTL_DOE BIT(4) +#define SDW_SHIM2_INTEL_VS_IOCTL_BKE BIT(5) +#define SDW_SHIM2_INTEL_VS_IOCTL_WPDD BIT(6) +#define SDW_SHIM2_INTEL_VS_IOCTL_ODC BIT(7) +#define SDW_SHIM2_INTEL_VS_IOCTL_CIBD BIT(8) +#define SDW_SHIM2_INTEL_VS_IOCTL_DIBD BIT(9) +#define SDW_SHIM2_INTEL_VS_IOCTL_HAMIFD BIT(10) + +#define SDW_SHIM2_INTEL_VS_ACTMCTL 0x0E +#define SDW_SHIM2_INTEL_VS_ACTMCTL_DACTQE BIT(0) +#define SDW_SHIM2_INTEL_VS_ACTMCTL_DODS BIT(1) +#define SDW_SHIM2_INTEL_VS_ACTMCTL_DODSE BIT(2) +#define SDW_SHIM2_INTEL_VS_ACTMCTL_DOAIS GENMASK(4, 3) +#define SDW_SHIM2_INTEL_VS_ACTMCTL_DOAISE BIT(5) + /** * struct sdw_intel_stream_params_data: configuration passed during * the @params_stream callback, e.g. for interaction with DSP From patchwork Thu Mar 23 05:44:35 2023 Content-Type: text/plain; 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d="scan'208";a="675566992" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:29:55 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org, broonie@kernel.org Subject: [PATCH 03/20] soundwire: intel_ace2x: add empty new ops for LunarLake Date: Thu, 23 Mar 2023 13:44:35 +0800 Message-Id: <20230323054452.1543233-4-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> References: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: VUCQURWP4DGESLO4F5EIEH2LHPKPCWKE X-Message-ID-Hash: VUCQURWP4DGESLO4F5EIEH2LHPKPCWKE X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com, tiwai@suse.de X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart The register map and programming sequences for the ACE2.x IP are completely different and need to be abstracted with a different set of callbacks. This initial patch adds a new file, follow-up patches will add each required callback. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Reviewed-by: Péter Ujfalusi Reviewed-by: Ranjani Sridharan Signed-off-by: Bard Liao --- drivers/soundwire/Makefile | 2 +- drivers/soundwire/intel_ace2x.c | 19 +++++++++++++++++++ include/linux/soundwire/sdw_intel.h | 1 + 3 files changed, 21 insertions(+), 1 deletion(-) create mode 100644 drivers/soundwire/intel_ace2x.c diff --git a/drivers/soundwire/Makefile b/drivers/soundwire/Makefile index 8038e840ac5b..d7212777a927 100644 --- a/drivers/soundwire/Makefile +++ b/drivers/soundwire/Makefile @@ -20,7 +20,7 @@ soundwire-cadence-y := cadence_master.o obj-$(CONFIG_SOUNDWIRE_CADENCE) += soundwire-cadence.o #Intel driver -soundwire-intel-y := intel.o intel_auxdevice.o intel_init.o dmi-quirks.o \ +soundwire-intel-y := intel.o intel_ace2x.o intel_auxdevice.o intel_init.o dmi-quirks.o \ intel_bus_common.o obj-$(CONFIG_SOUNDWIRE_INTEL) += soundwire-intel.o diff --git a/drivers/soundwire/intel_ace2x.c b/drivers/soundwire/intel_ace2x.c new file mode 100644 index 000000000000..623e4fd7db91 --- /dev/null +++ b/drivers/soundwire/intel_ace2x.c @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) +// Copyright(c) 2023 Intel Corporation. All rights reserved. + +/* + * Soundwire Intel ops for LunarLake + */ + +#include +#include +#include +#include +#include +#include "cadence_master.h" +#include "bus.h" +#include "intel.h" + +const struct sdw_intel_hw_ops sdw_intel_lnl_hw_ops = { +}; +EXPORT_SYMBOL_NS(sdw_intel_lnl_hw_ops, SOUNDWIRE_INTEL); diff --git a/include/linux/soundwire/sdw_intel.h b/include/linux/soundwire/sdw_intel.h index 8e6183e029fa..66687e83a94f 100644 --- a/include/linux/soundwire/sdw_intel.h +++ b/include/linux/soundwire/sdw_intel.h @@ -419,5 +419,6 @@ struct sdw_intel_hw_ops { }; extern const struct sdw_intel_hw_ops sdw_intel_cnl_hw_ops; +extern const struct sdw_intel_hw_ops sdw_intel_lnl_hw_ops; #endif From patchwork Thu Mar 23 05:44:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13185008 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C7CAAC6FD1D for ; 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X-IronPort-AV: E=McAfee;i="6600,9927,10657"; a="327779310" X-IronPort-AV: E=Sophos;i="5.98,283,1673942400"; d="scan'208";a="327779310" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:30:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10657"; a="675566998" X-IronPort-AV: E=Sophos;i="5.98,283,1673942400"; d="scan'208";a="675566998" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:29:58 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org, broonie@kernel.org Subject: [PATCH 04/20] soundwire/ASOC: Intel: update offsets for LunarLake Date: Thu, 23 Mar 2023 13:44:36 +0800 Message-Id: <20230323054452.1543233-5-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> References: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: B6Z5LQ5LM5XPBREXJGTIY72AQT554ZE6 X-Message-ID-Hash: B6Z5LQ5LM5XPBREXJGTIY72AQT554ZE6 X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com, tiwai@suse.de X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart The previous settings are not applicable, use a flag to determine what the register layout is. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Reviewed-by: Péter Ujfalusi Reviewed-by: Ranjani Sridharan Signed-off-by: Bard Liao Acked-by: Mark Brown --- drivers/soundwire/intel.h | 2 ++ drivers/soundwire/intel_init.c | 14 ++++++++++---- include/linux/soundwire/sdw_intel.h | 2 ++ sound/soc/sof/intel/hda.c | 21 +++++++++++++++++---- 4 files changed, 31 insertions(+), 8 deletions(-) diff --git a/drivers/soundwire/intel.h b/drivers/soundwire/intel.h index 09d479f2c77b..51aa42a5a824 100644 --- a/drivers/soundwire/intel.h +++ b/drivers/soundwire/intel.h @@ -11,6 +11,7 @@ * @mmio_base: mmio base of SoundWire registers * @registers: Link IO registers base * @shim: Audio shim pointer + * @shim_vs: Audio vendor-specific shim pointer * @alh: ALH (Audio Link Hub) pointer * @irq: Interrupt line * @ops: Shim callback ops @@ -28,6 +29,7 @@ struct sdw_intel_link_res { void __iomem *mmio_base; /* not strictly needed, useful for debug */ void __iomem *registers; void __iomem *shim; + void __iomem *shim_vs; void __iomem *alh; int irq; const struct sdw_intel_ops *ops; diff --git a/drivers/soundwire/intel_init.c b/drivers/soundwire/intel_init.c index cbe56b993c6c..e0023af9e0e1 100644 --- a/drivers/soundwire/intel_init.c +++ b/drivers/soundwire/intel_init.c @@ -63,10 +63,16 @@ static struct sdw_intel_link_dev *intel_link_dev_register(struct sdw_intel_res * link = &ldev->link_res; link->hw_ops = res->hw_ops; link->mmio_base = res->mmio_base; - link->registers = res->mmio_base + SDW_LINK_BASE - + (SDW_LINK_SIZE * link_id); - link->shim = res->mmio_base + res->shim_base; - link->alh = res->mmio_base + res->alh_base; + if (!res->ext) { + link->registers = res->mmio_base + SDW_LINK_BASE + + (SDW_LINK_SIZE * link_id); + link->shim = res->mmio_base + res->shim_base; + link->alh = res->mmio_base + res->alh_base; + } else { + link->registers = res->mmio_base + SDW_IP_BASE(link_id); + link->shim = res->mmio_base + SDW_SHIM2_GENERIC_BASE(link_id); + link->shim_vs = res->mmio_base + SDW_SHIM2_VS_BASE(link_id); + } link->ops = res->ops; link->dev = res->dev; diff --git a/include/linux/soundwire/sdw_intel.h b/include/linux/soundwire/sdw_intel.h index 66687e83a94f..88eb5bf98140 100644 --- a/include/linux/soundwire/sdw_intel.h +++ b/include/linux/soundwire/sdw_intel.h @@ -323,6 +323,7 @@ struct sdw_intel_ctx { * DSP driver. The quirks are common for all links for now. * @shim_base: sdw shim base. * @alh_base: sdw alh base. + * @ext: extended HDaudio link support */ struct sdw_intel_res { const struct sdw_intel_hw_ops *hw_ops; @@ -337,6 +338,7 @@ struct sdw_intel_res { u32 clock_stop_quirks; u32 shim_base; u32 alh_base; + bool ext; }; /* diff --git a/sound/soc/sof/intel/hda.c b/sound/soc/sof/intel/hda.c index 81c697e20108..db103524be4f 100644 --- a/sound/soc/sof/intel/hda.c +++ b/sound/soc/sof/intel/hda.c @@ -198,6 +198,7 @@ static int hda_sdw_acpi_scan(struct snd_sof_dev *sdev) static int hda_sdw_probe(struct snd_sof_dev *sdev) { + const struct sof_intel_dsp_desc *chip; struct sof_intel_hda_dev *hdev; struct sdw_intel_res res; void *sdw; @@ -206,10 +207,22 @@ static int hda_sdw_probe(struct snd_sof_dev *sdev) memset(&res, 0, sizeof(res)); - res.hw_ops = &sdw_intel_cnl_hw_ops; - res.mmio_base = sdev->bar[HDA_DSP_BAR]; - res.shim_base = hdev->desc->sdw_shim_base; - res.alh_base = hdev->desc->sdw_alh_base; + chip = get_chip_info(sdev->pdata); + if (chip->hw_ip_version < SOF_INTEL_ACE_2_0) { + res.mmio_base = sdev->bar[HDA_DSP_BAR]; + res.hw_ops = &sdw_intel_cnl_hw_ops; + res.shim_base = hdev->desc->sdw_shim_base; + res.alh_base = hdev->desc->sdw_alh_base; + res.ext = false; + } else { + res.mmio_base = sdev->bar[HDA_DSP_HDA_BAR]; + /* + * the SHIM and SoundWire register offsets are link-specific + * and will be determined when adding auxiliary devices + */ + res.hw_ops = &sdw_intel_lnl_hw_ops; + res.ext = true; + } res.irq = sdev->ipc_irq; res.handle = hdev->info.handle; res.parent = sdev->dev; From patchwork Thu Mar 23 05:44:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13185009 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C92B8C6FD1C for ; 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X-IronPort-AV: E=McAfee;i="6600,9927,10657"; a="327779322" X-IronPort-AV: E=Sophos;i="5.98,283,1673942400"; d="scan'208";a="327779322" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:30:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10657"; a="675567014" X-IronPort-AV: E=Sophos;i="5.98,283,1673942400"; d="scan'208";a="675567014" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:30:00 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org, broonie@kernel.org Subject: [PATCH 05/20] soundwire: intel/cadence: set ip_offset at run-time Date: Thu, 23 Mar 2023 13:44:37 +0800 Message-Id: <20230323054452.1543233-6-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> References: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: 2Q43KA2WT56A3ZOPNWDD2GR5WAHXHZ7Y X-Message-ID-Hash: 2Q43KA2WT56A3ZOPNWDD2GR5WAHXHZ7Y X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com, tiwai@suse.de X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart Select relevant ip-offset depending on hardware version. This offset is used to access MCP_ or IP_MCP_ registers with a fixed offset. For existing platforms, the offset is exactly zero. Starting with LunarLake, the offset is 0x4000. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Reviewed-by: Péter Ujfalusi Reviewed-by: Ranjani Sridharan Signed-off-by: Bard Liao --- drivers/soundwire/cadence_master.h | 2 ++ drivers/soundwire/intel.h | 2 ++ drivers/soundwire/intel_auxdevice.c | 1 + drivers/soundwire/intel_init.c | 2 ++ 4 files changed, 7 insertions(+) diff --git a/drivers/soundwire/cadence_master.h b/drivers/soundwire/cadence_master.h index b653734085d9..b0f0bf90640b 100644 --- a/drivers/soundwire/cadence_master.h +++ b/drivers/soundwire/cadence_master.h @@ -14,6 +14,8 @@ */ #define CDNS_MCP_IP_MAX_CMD_LEN 32 +#define SDW_CADENCE_MCP_IP_OFFSET 0x4000 + /** * struct sdw_cdns_pdi: PDI (Physical Data Interface) instance * diff --git a/drivers/soundwire/intel.h b/drivers/soundwire/intel.h index 51aa42a5a824..1b23292bb8be 100644 --- a/drivers/soundwire/intel.h +++ b/drivers/soundwire/intel.h @@ -10,6 +10,7 @@ * @hw_ops: platform-specific ops * @mmio_base: mmio base of SoundWire registers * @registers: Link IO registers base + * @ip_offset: offset for MCP_IP registers * @shim: Audio shim pointer * @shim_vs: Audio vendor-specific shim pointer * @alh: ALH (Audio Link Hub) pointer @@ -28,6 +29,7 @@ struct sdw_intel_link_res { void __iomem *mmio_base; /* not strictly needed, useful for debug */ void __iomem *registers; + u32 ip_offset; void __iomem *shim; void __iomem *shim_vs; void __iomem *alh; diff --git a/drivers/soundwire/intel_auxdevice.c b/drivers/soundwire/intel_auxdevice.c index 5021be0f4158..b02cef4f4b66 100644 --- a/drivers/soundwire/intel_auxdevice.c +++ b/drivers/soundwire/intel_auxdevice.c @@ -144,6 +144,7 @@ static int intel_link_probe(struct auxiliary_device *auxdev, sdw->link_res = &ldev->link_res; cdns->dev = dev; cdns->registers = sdw->link_res->registers; + cdns->ip_offset = sdw->link_res->ip_offset; cdns->instance = sdw->instance; cdns->msg_count = 0; diff --git a/drivers/soundwire/intel_init.c b/drivers/soundwire/intel_init.c index e0023af9e0e1..43d339c6bcee 100644 --- a/drivers/soundwire/intel_init.c +++ b/drivers/soundwire/intel_init.c @@ -66,10 +66,12 @@ static struct sdw_intel_link_dev *intel_link_dev_register(struct sdw_intel_res * if (!res->ext) { link->registers = res->mmio_base + SDW_LINK_BASE + (SDW_LINK_SIZE * link_id); + link->ip_offset = 0; link->shim = res->mmio_base + res->shim_base; link->alh = res->mmio_base + res->alh_base; } else { link->registers = res->mmio_base + SDW_IP_BASE(link_id); + link->ip_offset = SDW_CADENCE_MCP_IP_OFFSET; link->shim = res->mmio_base + SDW_SHIM2_GENERIC_BASE(link_id); link->shim_vs = res->mmio_base + SDW_SHIM2_VS_BASE(link_id); } From patchwork Thu Mar 23 05:44:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13185010 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 66DE2C6FD1C for ; Thu, 23 Mar 2023 05:35:12 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 1FA47ED2; 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d="scan'208";a="327779336" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:30:05 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10657"; a="675567025" X-IronPort-AV: E=Sophos;i="5.98,283,1673942400"; d="scan'208";a="675567025" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:30:03 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org, broonie@kernel.org Subject: [PATCH 06/20] ASoC/soundwire: intel: pass hdac_bus pointer for link management Date: Thu, 23 Mar 2023 13:44:38 +0800 Message-Id: <20230323054452.1543233-7-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> References: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: VB2ACAHWO2TKPCFKWZUZ7TK6XQIGYYB5 X-Message-ID-Hash: VB2ACAHWO2TKPCFKWZUZ7TK6XQIGYYB5 X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com, tiwai@suse.de X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart The hdac_bus pointer is used to access the extended link information and handle power management. Pass it from the SOF driver down to the auxiliary devices. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Reviewed-by: Péter Ujfalusi Reviewed-by: Ranjani Sridharan Signed-off-by: Bard Liao Acked-by: Mark Brown --- drivers/soundwire/intel.h | 4 ++++ drivers/soundwire/intel_init.c | 2 ++ include/linux/soundwire/sdw_intel.h | 4 ++++ sound/soc/sof/intel/hda.c | 1 + 4 files changed, 11 insertions(+) diff --git a/drivers/soundwire/intel.h b/drivers/soundwire/intel.h index 1b23292bb8be..cf9db4906de4 100644 --- a/drivers/soundwire/intel.h +++ b/drivers/soundwire/intel.h @@ -4,6 +4,8 @@ #ifndef __SDW_INTEL_LOCAL_H #define __SDW_INTEL_LOCAL_H +struct hdac_bus; + /** * struct sdw_intel_link_res - Soundwire Intel link resource structure, * typically populated by the controller driver. @@ -23,6 +25,7 @@ * @link_mask: global mask needed for power-up/down sequences * @cdns: Cadence master descriptor * @list: used to walk-through all masters exposed by the same controller + * @hbus: hdac_bus pointer, needed for power management */ struct sdw_intel_link_res { const struct sdw_intel_hw_ops *hw_ops; @@ -42,6 +45,7 @@ struct sdw_intel_link_res { u32 link_mask; struct sdw_cdns *cdns; struct list_head list; + struct hdac_bus *hbus; }; struct sdw_intel { diff --git a/drivers/soundwire/intel_init.c b/drivers/soundwire/intel_init.c index 43d339c6bcee..c918d2b81cc3 100644 --- a/drivers/soundwire/intel_init.c +++ b/drivers/soundwire/intel_init.c @@ -84,6 +84,8 @@ static struct sdw_intel_link_dev *intel_link_dev_register(struct sdw_intel_res * link->shim_mask = &ctx->shim_mask; link->link_mask = ctx->link_mask; + link->hbus = res->hbus; + /* now follow the two-step init/add sequence */ ret = auxiliary_device_init(auxdev); if (ret < 0) { diff --git a/include/linux/soundwire/sdw_intel.h b/include/linux/soundwire/sdw_intel.h index 88eb5bf98140..c4281aa06e2e 100644 --- a/include/linux/soundwire/sdw_intel.h +++ b/include/linux/soundwire/sdw_intel.h @@ -269,6 +269,8 @@ struct sdw_intel_slave_id { struct sdw_slave_id id; }; +struct hdac_bus; + /** * struct sdw_intel_ctx - context allocated by the controller * driver probe @@ -324,6 +326,7 @@ struct sdw_intel_ctx { * @shim_base: sdw shim base. * @alh_base: sdw alh base. * @ext: extended HDaudio link support + * @hbus: hdac_bus pointer, needed for power management */ struct sdw_intel_res { const struct sdw_intel_hw_ops *hw_ops; @@ -339,6 +342,7 @@ struct sdw_intel_res { u32 shim_base; u32 alh_base; bool ext; + struct hdac_bus *hbus; }; /* diff --git a/sound/soc/sof/intel/hda.c b/sound/soc/sof/intel/hda.c index db103524be4f..22eba57bb3e6 100644 --- a/sound/soc/sof/intel/hda.c +++ b/sound/soc/sof/intel/hda.c @@ -229,6 +229,7 @@ static int hda_sdw_probe(struct snd_sof_dev *sdev) res.ops = &sdw_callback; res.dev = sdev->dev; res.clock_stop_quirks = sdw_clock_stop_quirks; + res.hbus = sof_to_bus(sdev); /* * ops and arg fields are not populated for now, From patchwork Thu Mar 23 05:44:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13185026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E84B3C6FD1C for ; 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X-IronPort-AV: E=McAfee;i="6600,9927,10657"; a="327779353" X-IronPort-AV: E=Sophos;i="5.98,283,1673942400"; d="scan'208";a="327779353" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:30:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10657"; a="675567039" X-IronPort-AV: E=Sophos;i="5.98,283,1673942400"; d="scan'208";a="675567039" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:30:05 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org, broonie@kernel.org Subject: [PATCH 07/20] soundwire: intel: add eml_lock in the interface for new platforms Date: Thu, 23 Mar 2023 13:44:39 +0800 Message-Id: <20230323054452.1543233-8-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> References: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: C67ENKQLBD5YWU4CEZED7QVL72Z7SUF7 X-Message-ID-Hash: C67ENKQLBD5YWU4CEZED7QVL72Z7SUF7 X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com, tiwai@suse.de X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart In existing Intel/SoundWire systems, all the SoundWire configuration is 'self-contained', with the 'shim_lock' mutex used to protect access to shared registers in multi-link configurations. With the move of part of the SoundWire registers to the HDaudio multi-link structure, we need a unified lock. The hda-mlink implementation provides an 'eml_lock' that is used to protect shared registers such as LCTL and LSYNC, we can pass it to the SoundWire side. There is no issue with possible dangling pointers since the SoundWire auxiliary devices are children of the PCI device, so the 'eml_lock' cannot be removed while the SoundWire side is in use. This patch only adds the interface for now. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Reviewed-by: Péter Ujfalusi Reviewed-by: Ranjani Sridharan Signed-off-by: Bard Liao --- include/linux/soundwire/sdw_intel.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/linux/soundwire/sdw_intel.h b/include/linux/soundwire/sdw_intel.h index c4281aa06e2e..bafc6f2554b0 100644 --- a/include/linux/soundwire/sdw_intel.h +++ b/include/linux/soundwire/sdw_intel.h @@ -327,6 +327,8 @@ struct sdw_intel_ctx { * @alh_base: sdw alh base. * @ext: extended HDaudio link support * @hbus: hdac_bus pointer, needed for power management + * @eml_lock: mutex protecting shared registers in the HDaudio multi-link + * space */ struct sdw_intel_res { const struct sdw_intel_hw_ops *hw_ops; @@ -343,6 +345,7 @@ struct sdw_intel_res { u32 alh_base; bool ext; struct hdac_bus *hbus; + struct mutex *eml_lock; }; /* From patchwork Thu Mar 23 05:44:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13185024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C29DFC6FD1D for ; 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X-IronPort-AV: E=McAfee;i="6600,9927,10657"; a="327779372" X-IronPort-AV: E=Sophos;i="5.98,283,1673942400"; d="scan'208";a="327779372" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:30:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10657"; a="675567055" X-IronPort-AV: E=Sophos;i="5.98,283,1673942400"; d="scan'208";a="675567055" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:30:08 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org, broonie@kernel.org Subject: [PATCH 08/20] ASoC: SOF: Intel: hda: retrieve SoundWire eml_lock and pass pointer Date: Thu, 23 Mar 2023 13:44:40 +0800 Message-Id: <20230323054452.1543233-9-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> References: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: GF7TUGSA4A2A4WI3FF6SLLTRMCKYTOW6 X-Message-ID-Hash: GF7TUGSA4A2A4WI3FF6SLLTRMCKYTOW6 X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com, tiwai@suse.de X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart Use new helper and interface to make sure the HDaudio and SoundWire parts use the same mutex when accessing shared registers. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Reviewed-by: Péter Ujfalusi Reviewed-by: Ranjani Sridharan Signed-off-by: Bard Liao Acked-by: Mark Brown --- sound/soc/sof/intel/hda.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/sound/soc/sof/intel/hda.c b/sound/soc/sof/intel/hda.c index 22eba57bb3e6..f8cd5a9ebad1 100644 --- a/sound/soc/sof/intel/hda.c +++ b/sound/soc/sof/intel/hda.c @@ -215,6 +215,15 @@ static int hda_sdw_probe(struct snd_sof_dev *sdev) res.alh_base = hdev->desc->sdw_alh_base; res.ext = false; } else { + /* + * retrieve eml_lock needed to protect shared registers + * in the HDaudio multi-link areas + */ + res.eml_lock = hdac_bus_eml_get_mutex(sof_to_bus(sdev), true, + AZX_REG_ML_LEPTR_ID_SDW); + if (!res.eml_lock) + return -ENODEV; + res.mmio_base = sdev->bar[HDA_DSP_HDA_BAR]; /* * the SHIM and SoundWire register offsets are link-specific From patchwork Thu Mar 23 05:44:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13185025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3F773C6FD1C for ; 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X-IronPort-AV: E=McAfee;i="6600,9927,10657"; a="327779386" X-IronPort-AV: E=Sophos;i="5.98,283,1673942400"; d="scan'208";a="327779386" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:30:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10657"; a="675567073" X-IronPort-AV: E=Sophos;i="5.98,283,1673942400"; d="scan'208";a="675567073" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:30:10 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org, broonie@kernel.org Subject: [PATCH 09/20] soundwire: intel_init: use eml_lock parameter Date: Thu, 23 Mar 2023 13:44:41 +0800 Message-Id: <20230323054452.1543233-10-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> References: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: 7ZE46IYFIVSZCAP2HJLJOOE6EXPAUBVA X-Message-ID-Hash: 7ZE46IYFIVSZCAP2HJLJOOE6EXPAUBVA X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com, tiwai@suse.de X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart Now that the ASoC/SOF/HDAudio parts has retrieved the mutex and set the parameter, we can use it to share the same synchronization across the two domains. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Reviewed-by: Péter Ujfalusi Reviewed-by: Ranjani Sridharan Signed-off-by: Bard Liao --- drivers/soundwire/intel_init.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/soundwire/intel_init.c b/drivers/soundwire/intel_init.c index c918d2b81cc3..534c8795e7e8 100644 --- a/drivers/soundwire/intel_init.c +++ b/drivers/soundwire/intel_init.c @@ -69,18 +69,19 @@ static struct sdw_intel_link_dev *intel_link_dev_register(struct sdw_intel_res * link->ip_offset = 0; link->shim = res->mmio_base + res->shim_base; link->alh = res->mmio_base + res->alh_base; + link->shim_lock = &ctx->shim_lock; } else { link->registers = res->mmio_base + SDW_IP_BASE(link_id); link->ip_offset = SDW_CADENCE_MCP_IP_OFFSET; link->shim = res->mmio_base + SDW_SHIM2_GENERIC_BASE(link_id); link->shim_vs = res->mmio_base + SDW_SHIM2_VS_BASE(link_id); + link->shim_lock = res->eml_lock; } link->ops = res->ops; link->dev = res->dev; link->clock_stop_quirks = res->clock_stop_quirks; - link->shim_lock = &ctx->shim_lock; link->shim_mask = &ctx->shim_mask; link->link_mask = ctx->link_mask; From patchwork Thu Mar 23 05:44:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13185011 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E1839C6FD1D for ; Thu, 23 Mar 2023 05:35:20 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 49506EDF; Thu, 23 Mar 2023 06:34:28 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 49506EDF DKIM-Signature: v=1; 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22 Mar 2023 22:30:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10657"; a="675567094" X-IronPort-AV: E=Sophos;i="5.98,283,1673942400"; d="scan'208";a="675567094" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:30:13 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org, broonie@kernel.org Subject: [PATCH 10/20] soundwire: intel_ace2x: add debugfs support Date: Thu, 23 Mar 2023 13:44:42 +0800 Message-Id: <20230323054452.1543233-11-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> References: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: ICOFGGM54QH4FOXP7LW54LM2QTT2CIGY X-Message-ID-Hash: ICOFGGM54QH4FOXP7LW54LM2QTT2CIGY X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com, tiwai@suse.de X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart Add access to registers in SHIM and SHIM_VS (vendor-specific) areas. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Reviewed-by: Péter Ujfalusi Reviewed-by: Ranjani Sridharan Signed-off-by: Bard Liao --- drivers/soundwire/Makefile | 3 +- drivers/soundwire/intel.h | 8 ++ drivers/soundwire/intel_ace2x.c | 2 + drivers/soundwire/intel_ace2x_debugfs.c | 147 ++++++++++++++++++++++++ 4 files changed, 159 insertions(+), 1 deletion(-) create mode 100644 drivers/soundwire/intel_ace2x_debugfs.c diff --git a/drivers/soundwire/Makefile b/drivers/soundwire/Makefile index d7212777a927..c57571c82e04 100644 --- a/drivers/soundwire/Makefile +++ b/drivers/soundwire/Makefile @@ -20,7 +20,8 @@ soundwire-cadence-y := cadence_master.o obj-$(CONFIG_SOUNDWIRE_CADENCE) += soundwire-cadence.o #Intel driver -soundwire-intel-y := intel.o intel_ace2x.o intel_auxdevice.o intel_init.o dmi-quirks.o \ +soundwire-intel-y := intel.o intel_ace2x.o intel_ace2x_debugfs.o \ + intel_auxdevice.o intel_init.o dmi-quirks.o \ intel_bus_common.o obj-$(CONFIG_SOUNDWIRE_INTEL) += soundwire-intel.o diff --git a/drivers/soundwire/intel.h b/drivers/soundwire/intel.h index cf9db4906de4..511932c55216 100644 --- a/drivers/soundwire/intel.h +++ b/drivers/soundwire/intel.h @@ -95,6 +95,14 @@ static inline void intel_writew(void __iomem *base, int offset, u16 value) (sdw)->link_res->hw_ops->cb) #define SDW_INTEL_OPS(sdw, cb) ((sdw)->link_res->hw_ops->cb) +#ifdef CONFIG_DEBUG_FS +void intel_ace2x_debugfs_init(struct sdw_intel *sdw); +void intel_ace2x_debugfs_exit(struct sdw_intel *sdw); +#else +static inline void intel_ace2x_debugfs_init(struct sdw_intel *sdw) {} +static inline void intel_ace2x_debugfs_exit(struct sdw_intel *sdw) {} +#endif + static inline void sdw_intel_debugfs_init(struct sdw_intel *sdw) { if (SDW_INTEL_CHECK_OPS(sdw, debugfs_init)) diff --git a/drivers/soundwire/intel_ace2x.c b/drivers/soundwire/intel_ace2x.c index 623e4fd7db91..1c47bb2adb93 100644 --- a/drivers/soundwire/intel_ace2x.c +++ b/drivers/soundwire/intel_ace2x.c @@ -15,5 +15,7 @@ #include "intel.h" const struct sdw_intel_hw_ops sdw_intel_lnl_hw_ops = { + .debugfs_init = intel_ace2x_debugfs_init, + .debugfs_exit = intel_ace2x_debugfs_exit, }; EXPORT_SYMBOL_NS(sdw_intel_lnl_hw_ops, SOUNDWIRE_INTEL); diff --git a/drivers/soundwire/intel_ace2x_debugfs.c b/drivers/soundwire/intel_ace2x_debugfs.c new file mode 100644 index 000000000000..3d24661ffd37 --- /dev/null +++ b/drivers/soundwire/intel_ace2x_debugfs.c @@ -0,0 +1,147 @@ +// SPDX-License-Identifier: GPL-2.0-only +// Copyright(c) 2023 Intel Corporation. All rights reserved. + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "bus.h" +#include "cadence_master.h" +#include "intel.h" + +/* + * debugfs + */ +#ifdef CONFIG_DEBUG_FS + +#define RD_BUF (2 * PAGE_SIZE) + +static ssize_t intel_sprintf(void __iomem *mem, bool l, + char *buf, size_t pos, unsigned int reg) +{ + int value; + + if (l) + value = intel_readl(mem, reg); + else + value = intel_readw(mem, reg); + + return scnprintf(buf + pos, RD_BUF - pos, "%4x\t%4x\n", reg, value); +} + +static int intel_reg_show(struct seq_file *s_file, void *data) +{ + struct sdw_intel *sdw = s_file->private; + void __iomem *s = sdw->link_res->shim; + void __iomem *vs_s = sdw->link_res->shim_vs; + ssize_t ret; + u32 pcm_cap; + int pcm_bd; + char *buf; + int j; + + buf = kzalloc(RD_BUF, GFP_KERNEL); + if (!buf) + return -ENOMEM; + + ret = scnprintf(buf, RD_BUF, "Register Value\n"); + ret += scnprintf(buf + ret, RD_BUF - ret, "\nShim\n"); + + ret += intel_sprintf(s, true, buf, ret, SDW_SHIM2_LECAP); + ret += intel_sprintf(s, false, buf, ret, SDW_SHIM2_PCMSCAP); + + pcm_cap = intel_readw(s, SDW_SHIM2_PCMSCAP); + pcm_bd = FIELD_GET(SDW_SHIM2_PCMSCAP_BSS, pcm_cap); + + for (j = 0; j < pcm_bd; j++) { + ret += intel_sprintf(s, false, buf, ret, + SDW_SHIM2_PCMSYCHM(j)); + ret += intel_sprintf(s, false, buf, ret, + SDW_SHIM2_PCMSYCHC(j)); + } + + ret += scnprintf(buf + ret, RD_BUF - ret, "\nVS CLK controls\n"); + ret += intel_sprintf(vs_s, true, buf, ret, SDW_SHIM2_INTEL_VS_LVSCTL); + + ret += scnprintf(buf + ret, RD_BUF - ret, "\nVS Wake registers\n"); + ret += intel_sprintf(vs_s, false, buf, ret, SDW_SHIM2_INTEL_VS_WAKEEN); + ret += intel_sprintf(vs_s, false, buf, ret, SDW_SHIM2_INTEL_VS_WAKESTS); + + ret += scnprintf(buf + ret, RD_BUF - ret, "\nVS IOCTL, ACTMCTL\n"); + ret += intel_sprintf(vs_s, false, buf, ret, SDW_SHIM2_INTEL_VS_IOCTL); + ret += intel_sprintf(vs_s, false, buf, ret, SDW_SHIM2_INTEL_VS_ACTMCTL); + + seq_printf(s_file, "%s", buf); + kfree(buf); + + return 0; +} +DEFINE_SHOW_ATTRIBUTE(intel_reg); + +static int intel_set_m_datamode(void *data, u64 value) +{ + struct sdw_intel *sdw = data; + struct sdw_bus *bus = &sdw->cdns.bus; + + if (value > SDW_PORT_DATA_MODE_STATIC_1) + return -EINVAL; + + /* Userspace changed the hardware state behind the kernel's back */ + add_taint(TAINT_USER, LOCKDEP_STILL_OK); + + bus->params.m_data_mode = value; + + return 0; +} +DEFINE_DEBUGFS_ATTRIBUTE(intel_set_m_datamode_fops, NULL, + intel_set_m_datamode, "%llu\n"); + +static int intel_set_s_datamode(void *data, u64 value) +{ + struct sdw_intel *sdw = data; + struct sdw_bus *bus = &sdw->cdns.bus; + + if (value > SDW_PORT_DATA_MODE_STATIC_1) + return -EINVAL; + + /* Userspace changed the hardware state behind the kernel's back */ + add_taint(TAINT_USER, LOCKDEP_STILL_OK); + + bus->params.s_data_mode = value; + + return 0; +} +DEFINE_DEBUGFS_ATTRIBUTE(intel_set_s_datamode_fops, NULL, + intel_set_s_datamode, "%llu\n"); + +void intel_ace2x_debugfs_init(struct sdw_intel *sdw) +{ + struct dentry *root = sdw->cdns.bus.debugfs; + + if (!root) + return; + + sdw->debugfs = debugfs_create_dir("intel-sdw", root); + + debugfs_create_file("intel-registers", 0400, sdw->debugfs, sdw, + &intel_reg_fops); + + debugfs_create_file("intel-m-datamode", 0200, sdw->debugfs, sdw, + &intel_set_m_datamode_fops); + + debugfs_create_file("intel-s-datamode", 0200, sdw->debugfs, sdw, + &intel_set_s_datamode_fops); + + sdw_cdns_debugfs_init(&sdw->cdns, sdw->debugfs); +} + +void intel_ace2x_debugfs_exit(struct sdw_intel *sdw) +{ + debugfs_remove_recursive(sdw->debugfs); +} +#endif /* CONFIG_DEBUG_FS */ From patchwork Thu Mar 23 05:44:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13185013 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4FB71C6FD1C for ; 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no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com, tiwai@suse.de X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart only power-up/down for now, the frequency is not set. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Reviewed-by: Péter Ujfalusi Reviewed-by: Ranjani Sridharan Signed-off-by: Bard Liao --- drivers/soundwire/intel_ace2x.c | 50 +++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/drivers/soundwire/intel_ace2x.c b/drivers/soundwire/intel_ace2x.c index 1c47bb2adb93..5b6a608e63ba 100644 --- a/drivers/soundwire/intel_ace2x.c +++ b/drivers/soundwire/intel_ace2x.c @@ -10,12 +10,62 @@ #include #include #include +#include #include "cadence_master.h" #include "bus.h" #include "intel.h" +static int intel_link_power_up(struct sdw_intel *sdw) +{ + int ret; + + mutex_lock(sdw->link_res->shim_lock); + + ret = hdac_bus_eml_sdw_power_up_unlocked(sdw->link_res->hbus, sdw->instance); + if (ret < 0) { + dev_err(sdw->cdns.dev, "%s: hdac_bus_eml_sdw_power_up failed: %d\n", + __func__, ret); + goto out; + } + + sdw->cdns.link_up = true; +out: + mutex_unlock(sdw->link_res->shim_lock); + + return ret; +} + +static int intel_link_power_down(struct sdw_intel *sdw) +{ + int ret; + + mutex_lock(sdw->link_res->shim_lock); + + sdw->cdns.link_up = false; + + ret = hdac_bus_eml_sdw_power_down_unlocked(sdw->link_res->hbus, sdw->instance); + if (ret < 0) { + dev_err(sdw->cdns.dev, "%s: hdac_bus_eml_sdw_power_down failed: %d\n", + __func__, ret); + + /* + * we leave the sdw->cdns.link_up flag as false since we've disabled + * the link at this point and cannot handle interrupts any longer. + */ + } + + mutex_unlock(sdw->link_res->shim_lock); + + return ret; +} + const struct sdw_intel_hw_ops sdw_intel_lnl_hw_ops = { .debugfs_init = intel_ace2x_debugfs_init, .debugfs_exit = intel_ace2x_debugfs_exit, + + .link_power_up = intel_link_power_up, + .link_power_down = intel_link_power_down, }; EXPORT_SYMBOL_NS(sdw_intel_lnl_hw_ops, SOUNDWIRE_INTEL); + +MODULE_IMPORT_NS(SND_SOC_SOF_HDA_MLINK); From patchwork Thu Mar 23 05:44:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13185012 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E1337C6FD1C for ; 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X-IronPort-AV: E=McAfee;i="6600,9927,10657"; a="327779424" X-IronPort-AV: E=Sophos;i="5.98,283,1673942400"; d="scan'208";a="327779424" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:30:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10657"; a="675567132" X-IronPort-AV: E=Sophos;i="5.98,283,1673942400"; d="scan'208";a="675567132" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:30:18 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org, broonie@kernel.org Subject: [PATCH 12/20] soundwire: intel_ace2x: set SYNCPRD before powering-up Date: Thu, 23 Mar 2023 13:44:44 +0800 Message-Id: <20230323054452.1543233-13-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> References: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: VLARTQMHJ64S5JJG4WEJKIPVZTOGXUI4 X-Message-ID-Hash: VLARTQMHJ64S5JJG4WEJKIPVZTOGXUI4 X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com, tiwai@suse.de X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart The registers used for multi-link synchronization are no longer in the SHIM but in the HDaudio multi-link capability space. Use helpers to configure the SYNCPRD value, and wait for SYNCPU to change after powering-up. Note that the SYNCPRD value is shared between all sublinks, for obvious reasons if those links are supposed to be synchronized. The value of SYNCPRD is programmed only once for all sublinks. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Reviewed-by: Péter Ujfalusi Reviewed-by: Ranjani Sridharan Signed-off-by: Bard Liao --- drivers/soundwire/intel_ace2x.c | 42 +++++++++++++++++++++++++++++++-- 1 file changed, 40 insertions(+), 2 deletions(-) diff --git a/drivers/soundwire/intel_ace2x.c b/drivers/soundwire/intel_ace2x.c index 5b6a608e63ba..01668246b7ba 100644 --- a/drivers/soundwire/intel_ace2x.c +++ b/drivers/soundwire/intel_ace2x.c @@ -17,17 +17,51 @@ static int intel_link_power_up(struct sdw_intel *sdw) { + struct sdw_bus *bus = &sdw->cdns.bus; + struct sdw_master_prop *prop = &bus->prop; + u32 *shim_mask = sdw->link_res->shim_mask; + unsigned int link_id = sdw->instance; + u32 syncprd; int ret; mutex_lock(sdw->link_res->shim_lock); - ret = hdac_bus_eml_sdw_power_up_unlocked(sdw->link_res->hbus, sdw->instance); + if (!*shim_mask) { + /* we first need to program the SyncPRD/CPU registers */ + dev_dbg(sdw->cdns.dev, "first link up, programming SYNCPRD\n"); + + if (prop->mclk_freq % 6000000) + syncprd = SDW_SHIM_SYNC_SYNCPRD_VAL_38_4; + else + syncprd = SDW_SHIM_SYNC_SYNCPRD_VAL_24; + + ret = hdac_bus_eml_sdw_set_syncprd_unlocked(sdw->link_res->hbus, syncprd); + if (ret < 0) { + dev_err(sdw->cdns.dev, "%s: hdac_bus_eml_sdw_set_syncprd failed: %d\n", + __func__, ret); + goto out; + } + } + + ret = hdac_bus_eml_sdw_power_up_unlocked(sdw->link_res->hbus, link_id); if (ret < 0) { dev_err(sdw->cdns.dev, "%s: hdac_bus_eml_sdw_power_up failed: %d\n", __func__, ret); goto out; } + if (!*shim_mask) { + /* SYNCPU will change once link is active */ + ret = hdac_bus_eml_sdw_wait_syncpu_unlocked(sdw->link_res->hbus); + if (ret < 0) { + dev_err(sdw->cdns.dev, "%s: hdac_bus_eml_sdw_wait_syncpu failed: %d\n", + __func__, ret); + goto out; + } + } + + *shim_mask |= BIT(link_id); + sdw->cdns.link_up = true; out: mutex_unlock(sdw->link_res->shim_lock); @@ -37,13 +71,17 @@ static int intel_link_power_up(struct sdw_intel *sdw) static int intel_link_power_down(struct sdw_intel *sdw) { + u32 *shim_mask = sdw->link_res->shim_mask; + unsigned int link_id = sdw->instance; int ret; mutex_lock(sdw->link_res->shim_lock); sdw->cdns.link_up = false; - ret = hdac_bus_eml_sdw_power_down_unlocked(sdw->link_res->hbus, sdw->instance); + *shim_mask &= ~BIT(link_id); + + ret = hdac_bus_eml_sdw_power_down_unlocked(sdw->link_res->hbus, link_id); if (ret < 0) { dev_err(sdw->cdns.dev, "%s: hdac_bus_eml_sdw_power_down failed: %d\n", __func__, ret); From patchwork Thu Mar 23 05:44:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13185014 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8DD44C6FD1C for ; Thu, 23 Mar 2023 05:36:11 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 63470ED5; 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d="scan'208";a="327779436" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:30:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10657"; a="675567149" X-IronPort-AV: E=Sophos;i="5.98,283,1673942400"; d="scan'208";a="675567149" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:30:21 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org, broonie@kernel.org Subject: [PATCH 13/20] soundwire: intel_ace2x: configure link PHY Date: Thu, 23 Mar 2023 13:44:45 +0800 Message-Id: <20230323054452.1543233-14-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> References: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: DRFIZT46KLZAJ7IH5RXXJYDRI7OGUBZZ X-Message-ID-Hash: DRFIZT46KLZAJ7IH5RXXJYDRI7OGUBZZ X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com, tiwai@suse.de X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart Unlike previous hardware generations, the glue-to-master transition is not managed by software, instead the transitions are managed as part of the power-up/down sequences controlled by SPA/CPA bits. The only thing that's required is to configure the link PHY for 'normal' operation instead of the PHY test mode. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Reviewed-by: Péter Ujfalusi Reviewed-by: Ranjani Sridharan Signed-off-by: Bard Liao --- drivers/soundwire/intel_ace2x.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/soundwire/intel_ace2x.c b/drivers/soundwire/intel_ace2x.c index 01668246b7ba..5deff32976f1 100644 --- a/drivers/soundwire/intel_ace2x.c +++ b/drivers/soundwire/intel_ace2x.c @@ -15,6 +15,22 @@ #include "bus.h" #include "intel.h" +/* + * shim vendor-specific (vs) ops + */ + +static void intel_shim_vs_init(struct sdw_intel *sdw) +{ + void __iomem *shim_vs = sdw->link_res->shim_vs; + u16 act = 0; + + u16p_replace_bits(&act, 0x1, SDW_SHIM2_INTEL_VS_ACTMCTL_DOAIS); + act |= SDW_SHIM2_INTEL_VS_ACTMCTL_DACTQE; + act |= SDW_SHIM2_INTEL_VS_ACTMCTL_DODS; + intel_writew(shim_vs, SDW_SHIM2_INTEL_VS_ACTMCTL, act); + usleep_range(10, 15); +} + static int intel_link_power_up(struct sdw_intel *sdw) { struct sdw_bus *bus = &sdw->cdns.bus; @@ -63,6 +79,9 @@ static int intel_link_power_up(struct sdw_intel *sdw) *shim_mask |= BIT(link_id); sdw->cdns.link_up = true; + + intel_shim_vs_init(sdw); + out: mutex_unlock(sdw->link_res->shim_lock); From patchwork Thu Mar 23 05:44:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13185015 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B7752C6FD1D for ; Thu, 23 Mar 2023 05:36:24 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 8851EEC1; Thu, 23 Mar 2023 06:35:32 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 8851EEC1 DKIM-Signature: v=1; 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22 Mar 2023 22:30:26 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10657"; a="675567177" X-IronPort-AV: E=Sophos;i="5.98,283,1673942400"; d="scan'208";a="675567177" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:30:23 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org, broonie@kernel.org Subject: [PATCH 14/20] soundwire: intel_ace2x: add DAI registration Date: Thu, 23 Mar 2023 13:44:46 +0800 Message-Id: <20230323054452.1543233-15-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> References: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: L5M7TX6KSUA2B72TXEBOSR2MNY43O5UB X-Message-ID-Hash: L5M7TX6KSUA2B72TXEBOSR2MNY43O5UB X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com, tiwai@suse.de X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart The code is similar to the previous implementation, the only difference is that the PDI descriptors are now in different areas. Using common helpers proves tricky with multiple changed registers, workarounds that are no longer necessary. It's simpler to duplicate the intel_register_dai() function rather than try to add multiple levels of abstraction and indirections. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Reviewed-by: Péter Ujfalusi Reviewed-by: Ranjani Sridharan Signed-off-by: Bard Liao --- drivers/soundwire/intel_ace2x.c | 161 ++++++++++++++++++++++++++++++++ 1 file changed, 161 insertions(+) diff --git a/drivers/soundwire/intel_ace2x.c b/drivers/soundwire/intel_ace2x.c index 5deff32976f1..d6d5e6e070f4 100644 --- a/drivers/soundwire/intel_ace2x.c +++ b/drivers/soundwire/intel_ace2x.c @@ -116,10 +116,171 @@ static int intel_link_power_down(struct sdw_intel *sdw) return ret; } +/* + * DAI operations + */ +static const struct snd_soc_dai_ops intel_pcm_dai_ops = { +}; + +static const struct snd_soc_component_driver dai_component = { + .name = "soundwire", +}; + +/* + * PDI routines + */ +static void intel_pdi_init(struct sdw_intel *sdw, + struct sdw_cdns_stream_config *config) +{ + void __iomem *shim = sdw->link_res->shim; + int pcm_cap; + + /* PCM Stream Capability */ + pcm_cap = intel_readw(shim, SDW_SHIM2_PCMSCAP); + + config->pcm_bd = FIELD_GET(SDW_SHIM2_PCMSCAP_BSS, pcm_cap); + config->pcm_in = FIELD_GET(SDW_SHIM2_PCMSCAP_ISS, pcm_cap); + config->pcm_out = FIELD_GET(SDW_SHIM2_PCMSCAP_ISS, pcm_cap); + + dev_dbg(sdw->cdns.dev, "PCM cap bd:%d in:%d out:%d\n", + config->pcm_bd, config->pcm_in, config->pcm_out); +} + +static int +intel_pdi_get_ch_cap(struct sdw_intel *sdw, unsigned int pdi_num) +{ + void __iomem *shim = sdw->link_res->shim; + + /* zero based values for channel count in register */ + return intel_readw(shim, SDW_SHIM2_PCMSYCHC(pdi_num)) + 1; +} + +static void intel_pdi_get_ch_update(struct sdw_intel *sdw, + struct sdw_cdns_pdi *pdi, + unsigned int num_pdi, + unsigned int *num_ch) +{ + int ch_count = 0; + int i; + + for (i = 0; i < num_pdi; i++) { + pdi->ch_count = intel_pdi_get_ch_cap(sdw, pdi->num); + ch_count += pdi->ch_count; + pdi++; + } + + *num_ch = ch_count; +} + +static void intel_pdi_stream_ch_update(struct sdw_intel *sdw, + struct sdw_cdns_streams *stream) +{ + intel_pdi_get_ch_update(sdw, stream->bd, stream->num_bd, + &stream->num_ch_bd); + + intel_pdi_get_ch_update(sdw, stream->in, stream->num_in, + &stream->num_ch_in); + + intel_pdi_get_ch_update(sdw, stream->out, stream->num_out, + &stream->num_ch_out); +} + +static int intel_create_dai(struct sdw_cdns *cdns, + struct snd_soc_dai_driver *dais, + enum intel_pdi_type type, + u32 num, u32 off, u32 max_ch) +{ + int i; + + if (!num) + return 0; + + for (i = off; i < (off + num); i++) { + dais[i].name = devm_kasprintf(cdns->dev, GFP_KERNEL, + "SDW%d Pin%d", + cdns->instance, i); + if (!dais[i].name) + return -ENOMEM; + + if (type == INTEL_PDI_BD || type == INTEL_PDI_OUT) { + dais[i].playback.channels_min = 1; + dais[i].playback.channels_max = max_ch; + } + + if (type == INTEL_PDI_BD || type == INTEL_PDI_IN) { + dais[i].capture.channels_min = 1; + dais[i].capture.channels_max = max_ch; + } + + dais[i].ops = &intel_pcm_dai_ops; + } + + return 0; +} + +static int intel_register_dai(struct sdw_intel *sdw) +{ + struct sdw_cdns_dai_runtime **dai_runtime_array; + struct sdw_cdns_stream_config config; + struct sdw_cdns *cdns = &sdw->cdns; + struct sdw_cdns_streams *stream; + struct snd_soc_dai_driver *dais; + int num_dai; + int ret; + int off = 0; + + /* Read the PDI config and initialize cadence PDI */ + intel_pdi_init(sdw, &config); + ret = sdw_cdns_pdi_init(cdns, config); + if (ret) + return ret; + + intel_pdi_stream_ch_update(sdw, &sdw->cdns.pcm); + + /* DAIs are created based on total number of PDIs supported */ + num_dai = cdns->pcm.num_pdi; + + dai_runtime_array = devm_kcalloc(cdns->dev, num_dai, + sizeof(struct sdw_cdns_dai_runtime *), + GFP_KERNEL); + if (!dai_runtime_array) + return -ENOMEM; + cdns->dai_runtime_array = dai_runtime_array; + + dais = devm_kcalloc(cdns->dev, num_dai, sizeof(*dais), GFP_KERNEL); + if (!dais) + return -ENOMEM; + + /* Create PCM DAIs */ + stream = &cdns->pcm; + + ret = intel_create_dai(cdns, dais, INTEL_PDI_IN, cdns->pcm.num_in, + off, stream->num_ch_in); + if (ret) + return ret; + + off += cdns->pcm.num_in; + ret = intel_create_dai(cdns, dais, INTEL_PDI_OUT, cdns->pcm.num_out, + off, stream->num_ch_out); + if (ret) + return ret; + + off += cdns->pcm.num_out; + ret = intel_create_dai(cdns, dais, INTEL_PDI_BD, cdns->pcm.num_bd, + off, stream->num_ch_bd); + if (ret) + return ret; + + return devm_snd_soc_register_component(cdns->dev, &dai_component, + dais, num_dai); +} + const struct sdw_intel_hw_ops sdw_intel_lnl_hw_ops = { .debugfs_init = intel_ace2x_debugfs_init, .debugfs_exit = intel_ace2x_debugfs_exit, + .register_dai = intel_register_dai, + .link_power_up = intel_link_power_up, .link_power_down = intel_link_power_down, }; From patchwork Thu Mar 23 05:44:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13185016 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 37A55C6FD1C for ; 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X-IronPort-AV: E=McAfee;i="6600,9927,10657"; a="327779462" X-IronPort-AV: E=Sophos;i="5.98,283,1673942400"; d="scan'208";a="327779462" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:30:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10657"; a="675567197" X-IronPort-AV: E=Sophos;i="5.98,283,1673942400"; d="scan'208";a="675567197" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:30:26 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org, broonie@kernel.org Subject: [PATCH 15/20] soundwire: intel_ace2x: add sync_arm/sync_go helpers Date: Thu, 23 Mar 2023 13:44:47 +0800 Message-Id: <20230323054452.1543233-16-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> References: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: IG4MFUT3YCAR3EMEUFX6OX6RTLPRFPAA X-Message-ID-Hash: IG4MFUT3YCAR3EMEUFX6OX6RTLPRFPAA X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com, tiwai@suse.de X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart Same functionality as before, but with the registers moved to the HDaudio multi-link area. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Reviewed-by: Péter Ujfalusi Reviewed-by: Ranjani Sridharan Signed-off-by: Bard Liao --- drivers/soundwire/intel_ace2x.c | 39 +++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/drivers/soundwire/intel_ace2x.c b/drivers/soundwire/intel_ace2x.c index d6d5e6e070f4..20b8806f7de6 100644 --- a/drivers/soundwire/intel_ace2x.c +++ b/drivers/soundwire/intel_ace2x.c @@ -116,6 +116,41 @@ static int intel_link_power_down(struct sdw_intel *sdw) return ret; } +static void intel_sync_arm(struct sdw_intel *sdw) +{ + unsigned int link_id = sdw->instance; + + mutex_lock(sdw->link_res->shim_lock); + + hdac_bus_eml_sdw_sync_arm_unlocked(sdw->link_res->hbus, link_id); + + mutex_unlock(sdw->link_res->shim_lock); +} + +static int intel_sync_go_unlocked(struct sdw_intel *sdw) +{ + int ret; + + ret = hdac_bus_eml_sdw_sync_go_unlocked(sdw->link_res->hbus); + if (ret < 0) + dev_err(sdw->cdns.dev, "%s: SyncGO clear failed: %d\n", __func__, ret); + + return ret; +} + +static int intel_sync_go(struct sdw_intel *sdw) +{ + int ret; + + mutex_lock(sdw->link_res->shim_lock); + + ret = intel_sync_go_unlocked(sdw); + + mutex_unlock(sdw->link_res->shim_lock); + + return ret; +} + /* * DAI operations */ @@ -283,6 +318,10 @@ const struct sdw_intel_hw_ops sdw_intel_lnl_hw_ops = { .link_power_up = intel_link_power_up, .link_power_down = intel_link_power_down, + + .sync_arm = intel_sync_arm, + .sync_go_unlocked = intel_sync_go_unlocked, + .sync_go = intel_sync_go, }; EXPORT_SYMBOL_NS(sdw_intel_lnl_hw_ops, SOUNDWIRE_INTEL); From patchwork Thu Mar 23 05:44:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13185017 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7EBDEC6FD1C for ; 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no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com, tiwai@suse.de X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart The sequences are so far identical, so the abstraction is a bit over-engineered. In time we will simplify if there is no need to special case or work-around programming sequences. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Reviewed-by: Péter Ujfalusi Reviewed-by: Ranjani Sridharan Signed-off-by: Bard Liao --- drivers/soundwire/intel_ace2x.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/soundwire/intel_ace2x.c b/drivers/soundwire/intel_ace2x.c index 20b8806f7de6..2e33e8a00b55 100644 --- a/drivers/soundwire/intel_ace2x.c +++ b/drivers/soundwire/intel_ace2x.c @@ -316,6 +316,12 @@ const struct sdw_intel_hw_ops sdw_intel_lnl_hw_ops = { .register_dai = intel_register_dai, + .check_clock_stop = intel_check_clock_stop, + .start_bus = intel_start_bus, + .start_bus_after_reset = intel_start_bus_after_reset, + .start_bus_after_clock_stop = intel_start_bus_after_clock_stop, + .stop_bus = intel_stop_bus, + .link_power_up = intel_link_power_up, .link_power_down = intel_link_power_down, From patchwork Thu Mar 23 05:44:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13185018 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 71C6BC6FD1D for ; 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no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com, tiwai@suse.de X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart The WAKEEN and WAKESTS registers were moved to the per-link SHIM_VS area. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Reviewed-by: Péter Ujfalusi Reviewed-by: Ranjani Sridharan Signed-off-by: Bard Liao --- drivers/soundwire/intel_ace2x.c | 38 +++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/drivers/soundwire/intel_ace2x.c b/drivers/soundwire/intel_ace2x.c index 2e33e8a00b55..fe950b3ea3bc 100644 --- a/drivers/soundwire/intel_ace2x.c +++ b/drivers/soundwire/intel_ace2x.c @@ -31,6 +31,41 @@ static void intel_shim_vs_init(struct sdw_intel *sdw) usleep_range(10, 15); } +static int intel_shim_check_wake(struct sdw_intel *sdw) +{ + void __iomem *shim_vs; + u16 wake_sts; + + shim_vs = sdw->link_res->shim_vs; + wake_sts = intel_readw(shim_vs, SDW_SHIM2_INTEL_VS_WAKESTS); + + return wake_sts & SDW_SHIM2_INTEL_VS_WAKEEN_PWS; +} + +static void intel_shim_wake(struct sdw_intel *sdw, bool wake_enable) +{ + void __iomem *shim_vs = sdw->link_res->shim_vs; + u16 wake_en; + u16 wake_sts; + + wake_en = intel_readw(shim_vs, SDW_SHIM2_INTEL_VS_WAKEEN); + + if (wake_enable) { + /* Enable the wakeup */ + wake_en |= SDW_SHIM2_INTEL_VS_WAKEEN_PWE; + intel_writew(shim_vs, SDW_SHIM2_INTEL_VS_WAKEEN, wake_en); + } else { + /* Disable the wake up interrupt */ + wake_en &= ~SDW_SHIM2_INTEL_VS_WAKEEN_PWE; + intel_writew(shim_vs, SDW_SHIM2_INTEL_VS_WAKEEN, wake_en); + + /* Clear wake status (W1C) */ + wake_sts = intel_readw(shim_vs, SDW_SHIM2_INTEL_VS_WAKESTS); + wake_sts |= SDW_SHIM2_INTEL_VS_WAKEEN_PWS; + intel_writew(shim_vs, SDW_SHIM2_INTEL_VS_WAKESTS, wake_sts); + } +} + static int intel_link_power_up(struct sdw_intel *sdw) { struct sdw_bus *bus = &sdw->cdns.bus; @@ -325,6 +360,9 @@ const struct sdw_intel_hw_ops sdw_intel_lnl_hw_ops = { .link_power_up = intel_link_power_up, .link_power_down = intel_link_power_down, + .shim_check_wake = intel_shim_check_wake, + .shim_wake = intel_shim_wake, + .sync_arm = intel_sync_arm, .sync_go_unlocked = intel_sync_go_unlocked, .sync_go = intel_sync_go, From patchwork Thu Mar 23 05:44:50 2023 Content-Type: text/plain; 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nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com, tiwai@suse.de X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart This is the last callback needed for all bus management routines on new hardware. Same concept as before, just different register. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Reviewed-by: Péter Ujfalusi Reviewed-by: Ranjani Sridharan Signed-off-by: Bard Liao --- drivers/soundwire/intel_ace2x.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/soundwire/intel_ace2x.c b/drivers/soundwire/intel_ace2x.c index fe950b3ea3bc..a12fee8a5bfa 100644 --- a/drivers/soundwire/intel_ace2x.c +++ b/drivers/soundwire/intel_ace2x.c @@ -186,6 +186,11 @@ static int intel_sync_go(struct sdw_intel *sdw) return ret; } +static bool intel_check_cmdsync_unlocked(struct sdw_intel *sdw) +{ + return hdac_bus_eml_sdw_check_cmdsync_unlocked(sdw->link_res->hbus); +} + /* * DAI operations */ @@ -366,6 +371,7 @@ const struct sdw_intel_hw_ops sdw_intel_lnl_hw_ops = { .sync_arm = intel_sync_arm, .sync_go_unlocked = intel_sync_go_unlocked, .sync_go = intel_sync_go, + .sync_check_cmdsync_unlocked = intel_check_cmdsync_unlocked, }; EXPORT_SYMBOL_NS(sdw_intel_lnl_hw_ops, SOUNDWIRE_INTEL); From patchwork Thu Mar 23 05:44:51 2023 Content-Type: text/plain; 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d="scan'208";a="675567269" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:30:36 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org, broonie@kernel.org Subject: [PATCH 19/20] soundwire: bus: add new manager callback to deal with peripheral enumeration Date: Thu, 23 Mar 2023 13:44:51 +0800 Message-Id: <20230323054452.1543233-20-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> References: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: ZQI5L32IEAWYUNMZYHFI3SPXUKKL45V5 X-Message-ID-Hash: ZQI5L32IEAWYUNMZYHFI3SPXUKKL45V5 X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com, tiwai@suse.de X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart When a peripheral reports as ATTACHED, the manager may need to follow a programming sequence, e.g. to assign DMA resources and/or assign a command queue for that peripheral. This patch adds an optional callback, which will be invoked every time the peripheral attaches. This might be overkill in some scenarios, and one could argue that this should be invoked only on the first attachment. The bus does not however track this first attachment with any existing state-mirroring variable, and using dev_num_sticky would not work across suspend-resume cycles. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Reviewed-by: Péter Ujfalusi Reviewed-by: Ranjani Sridharan Signed-off-by: Bard Liao --- drivers/soundwire/bus.c | 3 +++ include/linux/soundwire/sdw.h | 3 ++- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/soundwire/bus.c b/drivers/soundwire/bus.c index b6aca59c3130..35f49bcc53e5 100644 --- a/drivers/soundwire/bus.c +++ b/drivers/soundwire/bus.c @@ -716,6 +716,9 @@ static int sdw_assign_device_num(struct sdw_slave *slave) /* After xfer of msg, restore dev_num */ slave->dev_num = slave->dev_num_sticky; + if (bus->ops && bus->ops->new_peripheral_assigned) + bus->ops->new_peripheral_assigned(bus, dev_num); + return 0; } diff --git a/include/linux/soundwire/sdw.h b/include/linux/soundwire/sdw.h index ef645de13ae9..c076a3f879b3 100644 --- a/include/linux/soundwire/sdw.h +++ b/include/linux/soundwire/sdw.h @@ -846,6 +846,7 @@ struct sdw_defer { * @post_bank_switch: Callback for post bank switch * @read_ping_status: Read status from PING frames, reported with two bits per Device. * Bits 31:24 are reserved. + * @new_peripheral_assigned: Callback to handle enumeration of new peripheral. */ struct sdw_master_ops { int (*read_prop)(struct sdw_bus *bus); @@ -860,7 +861,7 @@ struct sdw_master_ops { int (*pre_bank_switch)(struct sdw_bus *bus); int (*post_bank_switch)(struct sdw_bus *bus); u32 (*read_ping_status)(struct sdw_bus *bus); - + void (*new_peripheral_assigned)(struct sdw_bus *bus, int dev_num); }; /** From patchwork Thu Mar 23 05:44:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 13185021 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 29335C6FD1D for ; Thu, 23 Mar 2023 05:38:00 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id B1C9FEC7; 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d="scan'208";a="327779515" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:30:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10657"; a="675567305" X-IronPort-AV: E=Sophos;i="5.98,283,1673942400"; d="scan'208";a="675567305" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2023 22:30:39 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org, broonie@kernel.org Subject: [PATCH 20/20] soundwire: intel_ace2x: add new_peripheral_assigned callback Date: Thu, 23 Mar 2023 13:44:52 +0800 Message-Id: <20230323054452.1543233-21-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> References: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: IHRAR2KMRDEPZ54AC25OESXODVT6HU7A X-Message-ID-Hash: IHRAR2KMRDEPZ54AC25OESXODVT6HU7A X-MailFrom: yung-chuan.liao@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com, tiwai@suse.de X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Pierre-Louis Bossart Add the abstraction needed to only program the LSDIID registers for the HDaudio extended links. It's perfectly fine to program this register multiple times in case devices lose sync and reattach. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Reviewed-by: Péter Ujfalusi Reviewed-by: Ranjani Sridharan Signed-off-by: Bard Liao --- drivers/soundwire/intel_ace2x.c | 12 ++++++++++++ drivers/soundwire/intel_auxdevice.c | 16 ++++++++++++++++ include/linux/soundwire/sdw_intel.h | 3 +++ 3 files changed, 31 insertions(+) diff --git a/drivers/soundwire/intel_ace2x.c b/drivers/soundwire/intel_ace2x.c index a12fee8a5bfa..65deb4345354 100644 --- a/drivers/soundwire/intel_ace2x.c +++ b/drivers/soundwire/intel_ace2x.c @@ -350,6 +350,16 @@ static int intel_register_dai(struct sdw_intel *sdw) dais, num_dai); } +static void intel_program_sdi(struct sdw_intel *sdw, int dev_num) +{ + int ret; + + ret = hdac_bus_eml_sdw_set_lsdiid(sdw->link_res->hbus, sdw->instance, dev_num); + if (ret < 0) + dev_err(sdw->cdns.dev, "%s: could not set lsdiid for link %d %d\n", + __func__, sdw->instance, dev_num); +} + const struct sdw_intel_hw_ops sdw_intel_lnl_hw_ops = { .debugfs_init = intel_ace2x_debugfs_init, .debugfs_exit = intel_ace2x_debugfs_exit, @@ -372,6 +382,8 @@ const struct sdw_intel_hw_ops sdw_intel_lnl_hw_ops = { .sync_go_unlocked = intel_sync_go_unlocked, .sync_go = intel_sync_go, .sync_check_cmdsync_unlocked = intel_check_cmdsync_unlocked, + + .program_sdi = intel_program_sdi, }; EXPORT_SYMBOL_NS(sdw_intel_lnl_hw_ops, SOUNDWIRE_INTEL); diff --git a/drivers/soundwire/intel_auxdevice.c b/drivers/soundwire/intel_auxdevice.c index b02cef4f4b66..6e02782ef211 100644 --- a/drivers/soundwire/intel_auxdevice.c +++ b/drivers/soundwire/intel_auxdevice.c @@ -60,6 +60,21 @@ static int generic_post_bank_switch(struct sdw_bus *bus) return sdw->link_res->hw_ops->post_bank_switch(sdw); } +static void generic_new_peripheral_assigned(struct sdw_bus *bus, int dev_num) +{ + struct sdw_cdns *cdns = bus_to_cdns(bus); + struct sdw_intel *sdw = cdns_to_intel(cdns); + + /* paranoia check, this should never happen */ + if (dev_num < INTEL_DEV_NUM_IDA_MIN || dev_num > SDW_MAX_DEVICES) { + dev_err(bus->dev, "%s: invalid dev_num %d\n", __func__, dev_num); + return; + } + + if (sdw->link_res->hw_ops->program_sdi) + sdw->link_res->hw_ops->program_sdi(sdw, dev_num); +} + static int sdw_master_read_intel_prop(struct sdw_bus *bus) { struct sdw_master_prop *prop = &bus->prop; @@ -117,6 +132,7 @@ static struct sdw_master_ops sdw_intel_ops = { .pre_bank_switch = generic_pre_bank_switch, .post_bank_switch = generic_post_bank_switch, .read_ping_status = cdns_read_ping_status, + .new_peripheral_assigned = generic_new_peripheral_assigned, }; /* diff --git a/include/linux/soundwire/sdw_intel.h b/include/linux/soundwire/sdw_intel.h index bafc6f2554b0..1a8f32059cd8 100644 --- a/include/linux/soundwire/sdw_intel.h +++ b/include/linux/soundwire/sdw_intel.h @@ -399,6 +399,7 @@ struct sdw_intel; * @sync_go: helper for multi-link synchronization * @sync_check_cmdsync_unlocked: helper for multi-link synchronization * and bank switch - shim_lock is assumed to be locked at higher level + * @program_sdi: helper for codec command/control based on dev_num */ struct sdw_intel_hw_ops { void (*debugfs_init)(struct sdw_intel *sdw); @@ -425,6 +426,8 @@ struct sdw_intel_hw_ops { int (*sync_go_unlocked)(struct sdw_intel *sdw); int (*sync_go)(struct sdw_intel *sdw); bool (*sync_check_cmdsync_unlocked)(struct sdw_intel *sdw); + + void (*program_sdi)(struct sdw_intel *sdw, int dev_num); }; extern const struct sdw_intel_hw_ops sdw_intel_cnl_hw_ops;