From patchwork Wed Jan 30 09:25:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 10787995 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3D66D13BF for ; Wed, 30 Jan 2019 09:26:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2811C29901 for ; Wed, 30 Jan 2019 09:26:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1AEB52A706; Wed, 30 Jan 2019 09:26:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C03FD29901 for ; Wed, 30 Jan 2019 09:26:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729907AbfA3J0F (ORCPT ); Wed, 30 Jan 2019 04:26:05 -0500 Received: from mail-lj1-f196.google.com ([209.85.208.196]:38739 "EHLO mail-lj1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730386AbfA3J0F (ORCPT ); Wed, 30 Jan 2019 04:26:05 -0500 Received: by mail-lj1-f196.google.com with SMTP id c19-v6so20077806lja.5 for ; Wed, 30 Jan 2019 01:26:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=4t+z/x5ZFWXMeamEqMXRzLt3yGmU7q6+MRtoFdrT2VE=; b=Y3myKes+gxWNkcfAI6QlqeljhfazFl4FVUr7zgi2zjFssXdLou4XCtv9iyRcQfjMBo danj+g7oKEVv5jaBgeYbYE0AFDMclqQKchSENq0harvG6z6FFTCLXxuRhGOP6LelXCCI bOkquouAPdEYlX+mrqOGSivq6oUBI4qwsfG7c= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=4t+z/x5ZFWXMeamEqMXRzLt3yGmU7q6+MRtoFdrT2VE=; b=He6eDy1LyLYb5yFAzOtYvHANcgnFdqn4qyJkfWH4CqfnVs6WmUZJiexrlmWf7OKGJc pLD1UHS+zp/ohyeZaz3b37FOqVm0RyKJUd649uyhAwvwFoZQecz3Q8m+Xc7E2gVrKgaJ wqCmflAoSkKl9sd3BhBHMrf1NtwHS6rkW0gLulyh3Aod8E5RU/71nBXBz+V4DCuV82DE qSBgNbmnCeMnhY5WNo9fKpnLpf2b2kwTbtQTYEsxS3bwBKyvwgbkwyjywPTIhYAWc5c2 Yjtm7kaOwp7+zusVp2CQD3KzfGtpeD/0LZ5yH6dRJq1Hwc9XZRZruCAAnn5d+E7rtvJt lCrw== X-Gm-Message-State: AJcUukfjhK8QFluGkG6zPsajf1E94nDlWAYxHykPrV7ZzSmjC7a/0vY7 7D3nsPnfTUySJevLl7iaje5GMg== X-Google-Smtp-Source: ALg8bN4T1rw+m0ZaghyWTJmbI6MGMDxrPDkLqk42BKLBQpDG3mTFH4kCEeR2c/5V6nYL8/um4BoumQ== X-Received: by 2002:a2e:6503:: with SMTP id z3-v6mr23891860ljb.153.1548840362017; Wed, 30 Jan 2019 01:26:02 -0800 (PST) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id d24-v6sm183525ljg.2.2019.01.30.01.26.00 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 30 Jan 2019 01:26:00 -0800 (PST) From: Linus Walleij To: Mark Brown , linux-spi@vger.kernel.org Cc: linux-gpio@vger.kernel.org, Bartosz Golaszewski , linuxarm@huawei.com, Linus Walleij , Lukas Wunner , Stefan Wahren , Martin Sperl , Chris Boot Subject: [PATCH] RFT: spi: bcm2835: Convert to use CS GPIO descriptors Date: Wed, 30 Jan 2019 10:25:51 +0100 Message-Id: <20190130092551.14856-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This converts the BCM2835 SPI master driver to use GPIO descriptors for chip select handling. The BCM2835 driver was relying on the core to drive the CS high/low so very small changes were needed for this part. If it managed to request the CS from the device tree node, all is pretty straight forward. However for native GPIOs this driver has a quite unorthodox loopback to request some GPIOs from the SoC GPIO chip by looking it up from the device tree using gpiochip_find() and then offseting hard into its numberspace. This has been augmented a bit by using gpiochip_request_own_desc() but this code really needs to be verified. If "native CS" is actually an SoC GPIO, why is it even done this way? Should this GPIO not just be defined in the device tree like any other CS GPIO? I'm confused. Cc: Lukas Wunner Cc: Stefan Wahren Cc: Martin Sperl Cc: Chris Boot Signed-off-by: Linus Walleij --- I would very much appreciate if someone took this for a ride on top of the SPI tree (or linux-next) and see if all still works as expected. --- drivers/spi/spi-bcm2835.c | 42 ++++++++++++++++++++++++--------------- 1 file changed, 26 insertions(+), 16 deletions(-) diff --git a/drivers/spi/spi-bcm2835.c b/drivers/spi/spi-bcm2835.c index 35aebdfd3b4e..464cbfe70778 100644 --- a/drivers/spi/spi-bcm2835.c +++ b/drivers/spi/spi-bcm2835.c @@ -33,7 +33,8 @@ #include #include #include -#include +#include +#include /* FIXME: using chip internals */ #include #include @@ -881,12 +882,17 @@ static int bcm2835_spi_setup(struct spi_device *spi) { int err; struct gpio_chip *chip; + enum gpiod_flags flags; /* * sanity checking the native-chipselects */ if (spi->mode & SPI_NO_CS) return 0; - if (gpio_is_valid(spi->cs_gpio)) + /* + * The SPI core has successfully requested the CS GPIO line from the + * device tree, so we are done. + */ + if (spi->cs_gpiod) return 0; if (spi->chip_select > 1) { /* error in the case of native CS requested with CS > 1 @@ -897,7 +903,15 @@ static int bcm2835_spi_setup(struct spi_device *spi) "setup: only two native chip-selects are supported\n"); return -EINVAL; } - /* now translate native cs to GPIO */ + + /* + * Translate native CS to GPIO + * + * FIXME: poking around in the gpiolib internals like this is + * not very good practice. Find a way to locate the real problem + * and fix it. Why is the GPIO descriptor in spi->cs_gpiod + * sometimes not assigned correctly? Erroneous device trees? + */ /* get the gpio chip for the base */ chip = gpiochip_find("pinctrl-bcm2835", chip_match_name); @@ -905,21 +919,16 @@ static int bcm2835_spi_setup(struct spi_device *spi) return 0; /* and calculate the real CS */ - spi->cs_gpio = chip->base + 8 - spi->chip_select; + flags = (spi->mode & SPI_CS_HIGH) ? GPIOD_OUT_LOW : GPIOD_OUT_HIGH; + spi->cs_gpiod = gpiochip_request_own_desc(chip, 8 + spi->chip_select, + DRV_NAME, + flags); + if (IS_ERR(spi->cs_gpiod)) + return PTR_ERR(spi->cs_gpiod); /* and set up the "mode" and level */ - dev_info(&spi->dev, "setting up native-CS%i as GPIO %i\n", - spi->chip_select, spi->cs_gpio); - - /* set up GPIO as output and pull to the correct level */ - err = gpio_direction_output(spi->cs_gpio, - (spi->mode & SPI_CS_HIGH) ? 0 : 1); - if (err) { - dev_err(&spi->dev, - "could not set CS%i gpio %i as output: %i", - spi->chip_select, spi->cs_gpio, err); - return err; - } + dev_info(&spi->dev, "FIXME: setting up native-CS%i as GPIO\n", + spi->chip_select); return 0; } @@ -939,6 +948,7 @@ static int bcm2835_spi_probe(struct platform_device *pdev) platform_set_drvdata(pdev, master); + master->use_gpio_descriptors = true; master->mode_bits = BCM2835_SPI_MODE_BITS; master->bits_per_word_mask = SPI_BPW_MASK(8); master->num_chipselect = 3;