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a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org Add binding description for mediatek,mt8365-wdt Acked-by: Krzysztof Kozlowski Signed-off-by: Alexandre Mergnat Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Matthias Brugger Reviewed-by: Guenter Roeck --- Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml index 55b34461df1b..66cacea8e47f 100644 --- a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml @@ -38,6 +38,7 @@ properties: - mediatek,mt7623-wdt - mediatek,mt7629-wdt - mediatek,mt8173-wdt + - mediatek,mt8365-wdt - mediatek,mt8516-wdt - const: mediatek,mt6589-wdt From patchwork Wed Mar 29 08:54:23 2023 Content-Type: text/plain; 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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id f9-20020adff989000000b002cea392f000sm29571964wrr.69.2023.03.29.01.54.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Mar 2023 01:54:55 -0700 (PDT) From: Alexandre Mergnat Date: Wed, 29 Mar 2023 10:54:23 +0200 Subject: [PATCH v3 02/17] dt-bindings: pinctrl: mediatek,mt8365-pinctrl: add drive strength property MIME-Version: 1.0 Message-Id: <20230203-evk-board-support-v3-2-0003e80e0095@baylibre.com> References: <20230203-evk-board-support-v3-0-0003e80e0095@baylibre.com> In-Reply-To: <20230203-evk-board-support-v3-0-0003e80e0095@baylibre.com> To: Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Chaotian Jing , Ulf Hansson , Wenbin Mei , Linus Walleij , Zhiyong Tao , =?utf-8?q?Bernhard_Rosenkr=C3=A4nze?= =?utf-8?q?r?= Cc: linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-mmc@vger.kernel.org, linux-gpio@vger.kernel.org, Alexandre Bailon , Fabien Parent , Amjad Ouled-Ameur , Alexandre Mergnat X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1062; i=amergnat@baylibre.com; h=from:subject:message-id; bh=Q6KYTQGi9BQ9506wErkVzgHSmMBN0a0BRBzstC8ybEY=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkI/zblB4RGAHNE+u3bmnkO8ILb2ZIXB3T7xVpT6WS AvCMQQiJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZCP82wAKCRArRkmdfjHURdonD/ 4yZPAZubkiDP1QhAA7kBXJXeh6TssL0PBYQYI9ScFAJ4ISeajBVhKdTCmJdSUjutkauaKljkPXKFg/ Z2seGD/nqR51iUPHQJgr0xVDGXRbxiAb9OLoTrJRvc9uuF/ix3cnYm7YVsztKhrl5NsQXVJFEARrV6 HJ0IsrsUVWY6NuDP8AjBfkh5oT94Eav+5qc9XZUUODVYbyJImZ0tziN0Ur3ThHE2380AJgkzwfca6r RWkvqMQ6+URxaN+RH5IdCYzatDuUPsNpGu0yiVov5+BYQ6/z2SSEU61hH3dnl4VD4fv0EAD50cRAd6 roaptS0VbansANLDMzHDEuCfPKdspW2z8ZX4H7/49VlhXeHQNcNFZ1bW9igmGdWBCuEGZI/JkFkit+ MwhYBgN1EScGnRBSnCGBMOKuc3yT0d09cSt4+x81XlOuVvrQgiR2OXYyv1j4slaTKAL0IJrtEudidr 0PsmjsHSgb4VgJYrw4Y9p6fciKflZA+CEJYoqJ4JH//hY26+n4402DWQZXTaP77Qo0nz22EP2CMdaO 4UQ8hQHR9ATr4gRcIM0LEIJHt8oYdOzjsDOGjotuk1u/YkkXhJb1tMKIVkhSGgddZCbpN+3V617Y+1 yYVAnIj7Y9WDcw6huhoKs0osDpE9M8Ik/wp68pPWGwyHUHSdIgfcJ6PHvIng== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org This SoC is able to drive the following output current: - 2 mA - 4 mA - 6 mA - 8 mA - 10 mA - 12 mA - 14 mA - 16 mA Then drive-strength property is set with enum to reflect its HW capability. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Alexandre Mergnat Reviewed-by: Matthias Brugger Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml index 4b96884a1afc..101871ec6693 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml @@ -79,6 +79,9 @@ patternProperties: bias-pull-down: true + drive-strength: + enum: [2, 4, 6, 8, 10, 12, 14, 16] + input-enable: true input-disable: true From patchwork Wed Mar 29 08:54:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 13192128 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15E61C761A6 for ; Wed, 29 Mar 2023 08:55:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230175AbjC2IzG (ORCPT ); Wed, 29 Mar 2023 04:55:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47982 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229642AbjC2IzB (ORCPT ); Wed, 29 Mar 2023 04:55:01 -0400 Received: from mail-wr1-x42e.google.com (mail-wr1-x42e.google.com [IPv6:2a00:1450:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5A7D82685 for ; Wed, 29 Mar 2023 01:54:58 -0700 (PDT) Received: by mail-wr1-x42e.google.com with SMTP id y14so14859512wrq.4 for ; Wed, 29 Mar 2023 01:54:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; t=1680080097; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=kNx2krEh3GR3v59eA5d/S4AlPBNoFLuljf92QUi2ejM=; b=jPm9y4ljsawaBeFj5F7LMvDCBmvdtx6PlXEX8lqzGaeU2EISdGrvg16xrjEaxKbctm ZXpvLlrxFqEz/K4lL4+IDYYuJlGdqpamtKdL+0ZEKCZgi5VHi1yww/i5PaozgPmIVu9t u9opCPPXJWSPRgJVDrUj51wCqbwphc8jr83Zg2ajc1d5O5cF2QQCbNLRPE3hI075xkcB UPEYH9aadgtzLQJbdGXnGux9FqxX4TsqIFMYD6F8/zcO0TZ/L7TSvFMFVYOjMOkCL9OI DF5hviMX8ntTkZF3Qv1I6/AUpXqTovgmGZ/XHxo4m3J1pDzfvsDE2dytHJcdsmS0m335 ShOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680080097; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=kNx2krEh3GR3v59eA5d/S4AlPBNoFLuljf92QUi2ejM=; b=rIXAWqKnkmRklrH5KEs1RGRcbVgiYXz/E5zeCI2ZHPVVpvq8qZsI8cv7+W1tIzY4Qw MazyNoFhHTD4NO7BFDAKYWOcrEWUpKYe1lhsZignil1H+xJfnKdo/l/zmFSOAQMiidaN KnD9jwXjUXV+xxuh4IiR1A6++3SHS6WNmLC7nUvuMwbT4dv5Cl2g2wGM1SK80JIqwRaM l6mbp+ryKaHxTk8JrFsO5a1C+EpYkjmR+yJ03OuHfjTerwdTr85uhs3UggV0enOgOizI KDBRRa5NzFNGe+XzLT9O/G9kfKjW2e3aqUG54GaUzMfObA96lLT4ct40ejKksOeD6rt0 P3EA== X-Gm-Message-State: AAQBX9d4yrRWydEKJf2n5X0Epmr+iZjGATxd78IO6qkbfxmaUaWj94D3 BNxZMhgkvc/YV4Cc8qkwbepsQQ== X-Google-Smtp-Source: AKy350aFRjNPuJXKKq4EDNBFTYSpZ6D99D0pqfq5XSz7GM1tk6SuQ0SbJ2SfqJYZiRp2Qalm7T710A== X-Received: by 2002:adf:e345:0:b0:2cf:e436:f722 with SMTP id n5-20020adfe345000000b002cfe436f722mr12998147wrj.64.1680080096741; Wed, 29 Mar 2023 01:54:56 -0700 (PDT) Received: from [127.0.1.1] (158.22.5.93.rev.sfr.net. [93.5.22.158]) by smtp.googlemail.com with ESMTPSA id f9-20020adff989000000b002cea392f000sm29571964wrr.69.2023.03.29.01.54.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Mar 2023 01:54:56 -0700 (PDT) From: amergnat@baylibre.com Date: Wed, 29 Mar 2023 10:54:24 +0200 Subject: [PATCH v3 03/17] arm64: dts: mediatek: Increase the size BL31 reserved memory MIME-Version: 1.0 Message-Id: <20230203-evk-board-support-v3-3-0003e80e0095@baylibre.com> References: <20230203-evk-board-support-v3-0-0003e80e0095@baylibre.com> In-Reply-To: <20230203-evk-board-support-v3-0-0003e80e0095@baylibre.com> To: Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Chaotian Jing , Ulf Hansson , Wenbin Mei , Linus Walleij , Zhiyong Tao , =?utf-8?q?Bernhard_Rosenkr=C3=A4nze?= =?utf-8?q?r?= Cc: linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-mmc@vger.kernel.org, linux-gpio@vger.kernel.org, Alexandre Bailon , Fabien Parent , Amjad Ouled-Ameur , Alexandre Mergnat X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1058; i=amergnat@baylibre.com; h=from:subject:message-id; bh=HPwc58g3z+L52Qm0m/2eTO5SapHSsiq1rcTGcyvoHu8=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkI/zbGOq1v5cJTzOx4VQqqVcFyWzaznM8GG7ojT63 4kmPt+qJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZCP82wAKCRArRkmdfjHURZVkD/ 9iniNBwUP4IUKNBTyOt9NBBNewNHRps9eKJnfOy5f4M4IvCGe+FQWglNA2qQcwhWd0QU6W19kFiWWf ZnKapDkcntJMvQ+UoCjOMSsx06L6xNyWiJh3gMRjBriWzBAc+3LmqqxUcGnR3Po/uRnEIyzJ5G5Hlw CvTXISp9PZR7uM3YlmJU4UGVSZLZ9FW1HTWVWryQI4RgzFDRQwGuRNgLni3E3Stq9BnbTMTLPYhmNh DFZn96kdgPqiyxtDX8NzcvVZm1+ZAE96+6Ak8qwz8jHBw+Y4d6mfyjvb/FLc61mNhNp/5NI5iARJ1i 82R3r9/N2L0bnuZV1mwvoIjCl5h+YYgKyrUqlcY+ZZfw9cBYGsFRQnWVSzm4fUGUY59KcCI49dgzwU 5S2amSdfUmgyXAM6yYvFEd2PInOBmT8RIOBfzScOrQUeMefOuY+I/GsXWaTa3FrHaCqe/6iHbwhxs+ gco6rhMS3sDv2AWBboWYU8/6e+NH1PgQeyf+YP4MCORwSW5K8c5Zk/2kKXYRd9fMR6Xbgi4gUAJy3K 44pxhNPzOJlY4Z1R9RHqvs9YE0ra2t4kUPuN3M2rhCR48FQFBq1HY/iR/d3ee5JvGkUPVuodWOoCtN HqEWEBVHwnDq7itKJsmjvEtwLE282wRfJScKpHgKXWghXdXwYsTqOV99/8pw== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org From: Alexandre Bailon The reserved size for BL31 is too small. This has been highlighted by the MPU that now restrict access to BL31 memory to secure world only. This increase the size of the reserved memory. Signed-off-by: Alexandre Bailon Signed-off-by: Alexandre Mergnat Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts index b68aee8f229f..fc7f6d8ae173 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts +++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts @@ -65,10 +65,10 @@ reserved-memory { #size-cells = <2>; ranges; - /* 128 KiB reserved for ARM Trusted Firmware (BL31) */ + /* 192 KiB reserved for ARM Trusted Firmware (BL31) */ bl31_secmon_reserved: secmon@43000000 { no-map; - reg = <0 0x43000000 0 0x20000>; + reg = <0 0x43000000 0 0x30000>; }; /* 12 MiB reserved for OP-TEE (BL32) From patchwork Wed Mar 29 08:54:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 13192129 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE6BDC6FD18 for ; Wed, 29 Mar 2023 08:55:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229878AbjC2IzN (ORCPT ); Wed, 29 Mar 2023 04:55:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48150 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231324AbjC2IzD (ORCPT ); Wed, 29 Mar 2023 04:55:03 -0400 Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [IPv6:2a00:1450:4864:20::432]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4FF6D2733 for ; Wed, 29 Mar 2023 01:54:59 -0700 (PDT) Received: by mail-wr1-x432.google.com with SMTP id l12so14827890wrm.10 for ; Wed, 29 Mar 2023 01:54:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; t=1680080098; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ATWUkGY0rkoW9/CgGtrKNQxtJXv5++4UqGKLRPMmmVc=; b=wKa5VoLbY7nZX4cerBA9g8o4pUyxKCPIJIME3KqZsAumyefKFx8aAQ+nGC1395e4PE B1pcFgd7xfWku94gLvFznFTP+QzmmQfQiz8y/WJIUL5EKMtHEunDZUrHu2rFNWLXUOO6 SOQFqIq//36Wg9uSl5n+xmTln/9luQ2LnQF1JxUUNsrbDT9jogl7vKt1u7e9XN7AGCPf C+OEEVLsrYqLW3EpqwiflyNNuu/ZymqIXSs34fmCMt8XtKeRtqp6MxMLOWv9L28Emla+ cl7sgX/NAp6E6xFQyKFKDKnXCjaAWNUlLt4gaRQHJV+5fG0JxeOnIE5fcwh0CqiljZWF GCAg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680080098; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ATWUkGY0rkoW9/CgGtrKNQxtJXv5++4UqGKLRPMmmVc=; b=mHTTgM0bEZlmwoA+ZTLnqUAxEP0HhTT+gMNETUkk7TOLX8kiaSHZrim68Bb88K64n7 zodR5LL480/1NRYVg8ZiR9CKKK35iL8HaJ4eR4LnL380WyOl59LDCXCJeBBfA/kGGAMr QZpuEzWOFDtRx6tuTJjvM/DiLSaA24Yr3ILkACxc5pm+AkdcBhK1OfBLZFOczW2L2vaK zQl8yevecD6NHqs2Lyf8ocx13P+O5JzTwQqqQCPsUInOYsFcuqzvb5/1NU/DtCW0tu3z RlPeMHjLwkKW/DwdaNXjV6wB+LAnZilzWgN8wyEDXdzWJZfyWMWLxocSUFq0SCM0iCqh RFKQ== X-Gm-Message-State: AAQBX9dF44qgkjlrBBP4ONL0ItwW21phWrn4WpILKkZpmDpvHc1Ttz/l CnxHwL9YxvWYvsBkQ/iw9R1NpQ== X-Google-Smtp-Source: AKy350aD7dfmZtKemoDfCOm5oTETwMGjJVGeCHKT3vQmUYIgv0Np0HEcosx9I8CiYzMLzgDaEnddWg== X-Received: by 2002:a05:6000:12c3:b0:2ce:9f35:b645 with SMTP id l3-20020a05600012c300b002ce9f35b645mr15049960wrx.20.1680080097870; Wed, 29 Mar 2023 01:54:57 -0700 (PDT) Received: from [127.0.1.1] (158.22.5.93.rev.sfr.net. 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Signed-off-by: Alexandre Mergnat Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index 553c7516406a..e018df6844f6 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -162,6 +162,13 @@ syscfg_pctl: syscfg-pctl@10005000 { reg = <0 0x10005000 0 0x1000>; }; + watchdog: watchdog@10007000 { + compatible = "mediatek,mt8365-wdt", + "mediatek,mt6589-wdt"; + reg = <0 0x10007000 0 0x100>; + #reset-cells = <1>; + }; + pio: pinctrl@1000b000 { compatible = "mediatek,mt8365-pinctrl"; reg = <0 0x1000b000 0 0x1000>; From patchwork Wed Mar 29 08:54:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 13192130 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA252C761A6 for ; Wed, 29 Mar 2023 08:55:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230202AbjC2IzO (ORCPT ); Wed, 29 Mar 2023 04:55:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48272 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231335AbjC2IzD (ORCPT ); Wed, 29 Mar 2023 04:55:03 -0400 Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [IPv6:2a00:1450:4864:20::431]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6CFDF35B5 for ; Wed, 29 Mar 2023 01:54:59 -0700 (PDT) Received: by mail-wr1-x431.google.com with SMTP id r29so14816761wra.13 for ; Wed, 29 Mar 2023 01:54:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; t=1680080099; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=CgOmy+BLPLEddIB43+A5Yvfipk4ArtxV/+MDGYvcCLA=; b=s6ibz8YJKPnK8PU2PuDAmTE9SEfIy0d6/gT4UqkHlVhnX6ZNrWzpj1EKjnHkxQ1bRu 8YY4aZ/HPgkLbTvisv/BwWqKl8NQWsQeuHDU2cNLH+pKyOlJI9bGqfw5/3gveuIb9RZy V9EZaw7itVIYp5eZVvhKuGX5113ZfDIsZkRZEzQysIvmtQ4R8Nt6KRoZ70YToXmCPf+a 3wczup2C+sxc229fIAV4nbkGMjpoMB+qyOLR1vtZGfGp6Oi44rwo5s21Tc+io+sxGPiL 5hIa0u3XEzI8k+8uRuJ4B2kvPYsPv02T9mWtM7n2EcbtN8iyudQrnl/4VvfUKUsNH+mh /T7A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680080099; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CgOmy+BLPLEddIB43+A5Yvfipk4ArtxV/+MDGYvcCLA=; b=xBzTiNJ+Eir01ofqsWqCne7uBcHaiZEiaGWzslI5eXTFVjwfx3YajgS1is9Q2i0eSM j08P2CFitXsVmkQmYa8uPQlYtg7LCDCpfne9CXtGjTbS/VdDbaU/y4uDLCKuWH5Foxzj kPkBVHy0sRfv2m2/vi2SJs4OBAOZzAjCQqzkrbNEkygG7E8rvJupkAxmi9v4Dd19poEX +qlKia6s280d0OOsJkPL6eE3q0Gq5jQmhJCaDw0bnIgitTY1kEuONTZBpXzRZ9+jXpyT W74GfVkwjIlbt0Oj8w3t0HLzXShonYLdbAZixqMdznPzsQ6cBn+3vxwMRnI9LVfRtyao aslw== X-Gm-Message-State: AAQBX9ddLvpzjf8Ckcuve+WAXCLbBYyI5zfa45RX3liIEKtn5u1FTWLW 3FpFhqH8+4PCd5s1oXaIfhroRw== X-Google-Smtp-Source: AKy350ZroUjVxdSMQACq3zm1JGb8yEx8JUYN6yBNNoZlF3983Am9k7VcnPo9sL9HKQqKG2yZUXLSQA== X-Received: by 2002:adf:e443:0:b0:2c7:6bb:fb7a with SMTP id t3-20020adfe443000000b002c706bbfb7amr15406921wrm.54.1680080099000; Wed, 29 Mar 2023 01:54:59 -0700 (PDT) Received: from [127.0.1.1] (158.22.5.93.rev.sfr.net. [93.5.22.158]) by smtp.googlemail.com with ESMTPSA id f9-20020adff989000000b002cea392f000sm29571964wrr.69.2023.03.29.01.54.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Mar 2023 01:54:58 -0700 (PDT) From: amergnat@baylibre.com Date: Wed, 29 Mar 2023 10:54:26 +0200 Subject: [PATCH v3 05/17] arm64: dts: mediatek: add mt6357 device-tree MIME-Version: 1.0 Message-Id: <20230203-evk-board-support-v3-5-0003e80e0095@baylibre.com> References: <20230203-evk-board-support-v3-0-0003e80e0095@baylibre.com> In-Reply-To: <20230203-evk-board-support-v3-0-0003e80e0095@baylibre.com> To: Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Chaotian Jing , Ulf Hansson , Wenbin Mei , Linus Walleij , Zhiyong Tao , =?utf-8?q?Bernhard_Rosenkr=C3=A4nze?= =?utf-8?q?r?= Cc: linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-mmc@vger.kernel.org, linux-gpio@vger.kernel.org, Alexandre Bailon , Fabien Parent , Amjad Ouled-Ameur , Alexandre Mergnat X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=8658; i=amergnat@baylibre.com; h=from:subject:message-id; bh=cjlFe/L6NnXNP1tz2P+XiSRqqudSy8JlvvArqvoZcmI=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkI/zcZEuXWEttTyCiFRzQRY2KLQj4sWnWNnwsmyHf /AhzCE2JAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZCP83AAKCRArRkmdfjHURSRAEA Cc0rki0JFyGuTv5j0D3E8MbBtEJFMzpEXh6dUx9nKS4/LUvGY9Q+pEhPUhqzciKlhCowg/suZQjdyz 9ZFTcgJDbAPYJ5NutMM9QxAaKdsaJmIn240hvi0rAZyk08w2THbQbi/8HuUFc1Xnr70Mt6MYZDl48/ rOywCHaUQDr0ihvTTZTkfnVh9IeHFjFBpVJob8/PiptrLM0srI7XgUFqd8he0JGcYNO2wFfWTukPvc wQ/GJfrlkbSkQxOJaJ7kplbKH+eIXlJmYskSTx4j12sGKHrogTvAY7flPVhzoUrmRyQ+jaFjoyQckE zns0TmSvTyQsVH+nx88auOotYiMVN1tcMbsivSsI+7xCRy1POKvckdoK89xrGVxEdb3xuhUrj/IQoc JaMGAJJSXc9T7hWmyUOrluNXGqnHuoCBYsFl0gjHWDLYHkRf8vA3yWAyhG0lOIM269CqaOAofLuFhR KEupyD10fAQ6m4NKxdgk0ZfqJoHzSzrDVzfIPhm1CatQuXRM8V6gluL/xNTMWEmBwxRn+4C9huVGHN cMZv5hBfZ+By22N4Y/xeT9lxKjqxoRqxW6SP7gIK+s6gfuQWvdj9nZcft6Nm2SKPqjMT00tUx6WULb yR8/f6Rq6AVEj2SM/fiuPt1SM+1nfBjGAMI6sA6LxQsRXC77GNkmTHJfD5Ag== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org From: Fabien Parent This new device-tree add the regulators, rtc and keys support for the MT6357 PMIC. Signed-off-by: Fabien Parent Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt6357.dtsi | 282 +++++++++++++++++++++++++++++++ 1 file changed, 282 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt6357.dtsi b/arch/arm64/boot/dts/mediatek/mt6357.dtsi new file mode 100644 index 000000000000..3330a03c2f74 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt6357.dtsi @@ -0,0 +1,282 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (c) 2020 MediaTek Inc. + * Copyright (c) 2023 BayLibre Inc. + */ + +#include + +&pwrap { + mt6357_pmic: pmic { + compatible = "mediatek,mt6357"; + + regulators { + mt6357_vproc_reg: buck-vproc { + regulator-name = "vproc"; + regulator-min-microvolt = <518750>; + regulator-max-microvolt = <1312500>; + regulator-ramp-delay = <6250>; + regulator-enable-ramp-delay = <220>; + regulator-always-on; + }; + + mt6357_vcore_reg: buck-vcore { + regulator-name = "vcore"; + regulator-min-microvolt = <518750>; + regulator-max-microvolt = <1312500>; + regulator-ramp-delay = <6250>; + regulator-enable-ramp-delay = <220>; + regulator-always-on; + }; + + mt6357_vmodem_reg: buck-vmodem { + regulator-name = "vmodem"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1193750>; + regulator-ramp-delay = <6250>; + regulator-enable-ramp-delay = <220>; + }; + + mt6357_vs1_reg: buck-vs1 { + regulator-name = "vs1"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <2200000>; + regulator-ramp-delay = <12500>; + regulator-enable-ramp-delay = <220>; + regulator-always-on; + }; + + mt6357_vpa_reg: buck-vpa { + regulator-name = "vpa"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3650000>; + regulator-ramp-delay = <50000>; + regulator-enable-ramp-delay = <220>; + }; + + mt6357_vfe28_reg: ldo-vfe28 { + compatible = "regulator-fixed"; + regulator-name = "vfe28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <264>; + }; + + mt6357_vxo22_reg: ldo-vxo22 { + regulator-name = "vxo22"; + regulator-min-microvolt = <2200000>; + regulator-max-microvolt = <2400000>; + regulator-enable-ramp-delay = <110>; + }; + + mt6357_vrf18_reg: ldo-vrf18 { + compatible = "regulator-fixed"; + regulator-name = "vrf18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <110>; + }; + + mt6357_vrf12_reg: ldo-vrf12 { + compatible = "regulator-fixed"; + regulator-name = "vrf12"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-enable-ramp-delay = <110>; + }; + + mt6357_vefuse_reg: ldo-vefuse { + regulator-name = "vefuse"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <264>; + }; + + mt6357_vcn33_bt_reg: ldo-vcn33-bt { + regulator-name = "vcn33-bt"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3500000>; + regulator-enable-ramp-delay = <264>; + }; + + mt6357_vcn33_wifi_reg: ldo-vcn33-wifi { + regulator-name = "vcn33-wifi"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3500000>; + regulator-enable-ramp-delay = <264>; + }; + + mt6357_vcn28_reg: ldo-vcn28 { + compatible = "regulator-fixed"; + regulator-name = "vcn28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <264>; + }; + + mt6357_vcn18_reg: ldo-vcn18 { + compatible = "regulator-fixed"; + regulator-name = "vcn18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <264>; + }; + + mt6357_vcama_reg: ldo-vcama { + regulator-name = "vcama"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <264>; + }; + + mt6357_vcamd_reg: ldo-vcamd { + regulator-name = "vcamd"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <264>; + }; + + mt6357_vcamio_reg: ldo-vcamio18 { + compatible = "regulator-fixed"; + regulator-name = "vcamio"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <264>; + }; + + mt6357_vldo28_reg: ldo-vldo28 { + regulator-name = "vldo28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3000000>; + regulator-enable-ramp-delay = <264>; + }; + + mt6357_vsram_others_reg: ldo-vsram-others { + regulator-name = "vsram-others"; + regulator-min-microvolt = <518750>; + regulator-max-microvolt = <1312500>; + regulator-ramp-delay = <6250>; + regulator-enable-ramp-delay = <110>; + regulator-always-on; + }; + + mt6357_vsram_proc_reg: ldo-vsram-proc { + regulator-name = "vsram-proc"; + regulator-min-microvolt = <518750>; + regulator-max-microvolt = <1312500>; + regulator-ramp-delay = <6250>; + regulator-enable-ramp-delay = <110>; + regulator-always-on; + }; + + mt6357_vaux18_reg: ldo-vaux18 { + compatible = "regulator-fixed"; + regulator-name = "vaux18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <264>; + }; + + mt6357_vaud28_reg: ldo-vaud28 { + compatible = "regulator-fixed"; + regulator-name = "vaud28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <264>; + }; + + mt6357_vio28_reg: ldo-vio28 { + compatible = "regulator-fixed"; + regulator-name = "vio28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <264>; + }; + + mt6357_vio18_reg: ldo-vio18 { + compatible = "regulator-fixed"; + regulator-name = "vio18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <264>; + regulator-always-on; + }; + + mt6357_vdram_reg: ldo-vdram { + regulator-name = "vdram"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1200000>; + regulator-enable-ramp-delay = <3300>; + }; + + mt6357_vmc_reg: ldo-vmc { + regulator-name = "vmc"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <44>; + }; + + mt6357_vmch_reg: ldo-vmch { + regulator-name = "vmch"; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <44>; + }; + + mt6357_vemc_reg: ldo-vemc { + regulator-name = "vemc"; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <44>; + regulator-always-on; + }; + + mt6357_vsim1_reg: ldo-vsim1 { + regulator-name = "vsim1"; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <3100000>; + regulator-enable-ramp-delay = <264>; + }; + + mt6357_vsim2_reg: ldo-vsim2 { + regulator-name = "vsim2"; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <3100000>; + regulator-enable-ramp-delay = <264>; + }; + + mt6357_vibr_reg: ldo-vibr { + regulator-name = "vibr"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <44>; + }; + + mt6357_vusb33_reg: ldo-vusb33 { + regulator-name = "vusb33"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3100000>; + regulator-enable-ramp-delay = <264>; + }; + }; + + rtc { + compatible = "mediatek,mt6357-rtc"; + }; + + keys { + compatible = "mediatek,mt6357-keys"; + + key-power { + linux,keycodes = ; + wakeup-source; + }; + + key-home { + linux,keycodes = ; + wakeup-source; + }; + + }; + }; +}; From patchwork Wed Mar 29 08:54:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 13192131 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D665DC761A6 for ; Wed, 29 Mar 2023 08:55:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231314AbjC2IzX (ORCPT ); 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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id f9-20020adff989000000b002cea392f000sm29571964wrr.69.2023.03.29.01.54.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Mar 2023 01:54:59 -0700 (PDT) From: Alexandre Mergnat Date: Wed, 29 Mar 2023 10:54:27 +0200 Subject: [PATCH v3 06/17] arm64: dts: mediatek: add pwrap support to mt8365 SoC MIME-Version: 1.0 Message-Id: <20230203-evk-board-support-v3-6-0003e80e0095@baylibre.com> References: <20230203-evk-board-support-v3-0-0003e80e0095@baylibre.com> In-Reply-To: <20230203-evk-board-support-v3-0-0003e80e0095@baylibre.com> To: Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Chaotian Jing , Ulf Hansson , Wenbin Mei , Linus Walleij , Zhiyong Tao , =?utf-8?q?Bernhard_Rosenkr=C3=A4nze?= =?utf-8?q?r?= Cc: linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-mmc@vger.kernel.org, linux-gpio@vger.kernel.org, Alexandre Bailon , Fabien Parent , Amjad Ouled-Ameur , Alexandre Mergnat X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1126; i=amergnat@baylibre.com; h=from:subject:message-id; bh=Ay42OqgaWXvHkBRm3v2vHFu33Ywvrn6P8agKkr3sTyA=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkI/zcx8eMVGJOaH7KITHH1a/93g25ff5aNwraFW5C H2SwKpOJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZCP83AAKCRArRkmdfjHURfNjEA CUT9/wBAHlA652cq3MF4x2dcUTdIqyBnrdlzHUyA6XXI+4fkuTT6Dp9y9lJwNhF6JYdUM/4F0+03wa eZQIGESAlZ14lE0A/YhobEfW+ZPGWjOcTpFg9JM125YacFOXXwHRQIW4oSYIfIt1fm9MgptEXuX3a5 axWlnc57w1loWLZ9QKEEsF3KwS7mlaMeRyr4Fr+fMvPqRyKDL5fwYAKiCY2OK6CqEJYtdd59KB+hkS bXh7CWFkVTJpeDtcqryZwkbY22zs7gKe7UzZUBORIYXUFsqcpJuwXjpEbXWNMw5xYhx5Npxkcij4ES MUb8xt4CUCTX1/LaPd78oSpUQF+JVvWte2KV/qaEmcsFA4WWDkL5bnYYiJUrTln+amy8vkgJm55txQ KhKJCFyIuOs2QmoLQlnjOgTpBqQTRG4vPaooD6StLWW6wfgJtNFLyH03zP0Gdfeo6OeliK86/J+GDY +nlTO41FutAeGc1LuyqKa/X8znvJ4KPuPnRGemO5wQNxcLJt1m/yUYragSFKAVXAfdq8hSgeS9iOLe iKcK/+t1R+S0xHMwj1bjHOobNj2V0DcTj3LGUr/jZF2felDdBV0uhTnOQCmMeiRuqgkDJ1gLt5J8i6 LGVwP7CuiByV0hAZn7C6sunGcK+2z8LuK32i5nAZ88t+wTqFZOrLUlP+HOlw== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org In order to use the PMIC, the pwrap support should be added to allow communication between the SoC and the PMIC. Signed-off-by: Alexandre Mergnat Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index e018df6844f6..687011353f69 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -186,6 +186,18 @@ apmixedsys: syscon@1000c000 { #clock-cells = <1>; }; + pwrap: pwrap@1000d000 { + compatible = "mediatek,mt8365-pwrap"; + reg = <0 0x1000d000 0 0x1000>; + reg-names = "pwrap"; + interrupts = ; + clocks = <&infracfg CLK_IFR_PWRAP_SPI>, + <&infracfg CLK_IFR_PMIC_AP>, + <&infracfg CLK_IFR_PWRAP_SYS>, + <&infracfg CLK_IFR_PWRAP_TMR>; + clock-names = "spi", "wrap", "sys", "tmr"; + }; + keypad: keypad@10010000 { compatible = "mediatek,mt6779-keypad"; reg = <0 0x10010000 0 0x1000>; From patchwork Wed Mar 29 08:54:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 13192132 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D8250C74A5B for ; Wed, 29 Mar 2023 08:55:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230060AbjC2Iz3 (ORCPT ); Wed, 29 Mar 2023 04:55:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49082 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231360AbjC2IzO (ORCPT ); Wed, 29 Mar 2023 04:55:14 -0400 Received: from mail-wr1-x430.google.com (mail-wr1-x430.google.com [IPv6:2a00:1450:4864:20::430]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E62B74490 for ; Wed, 29 Mar 2023 01:55:02 -0700 (PDT) Received: by mail-wr1-x430.google.com with SMTP id l12so14828052wrm.10 for ; Wed, 29 Mar 2023 01:55:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; t=1680080101; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=hQkdLJH1pptyvVBYIMjpYp2X0cm5UeAwV0k97lbZ02w=; b=6Uuhw4SZ8KNxmIU4Rt6ZpiMUKZYxMhTqOoR37sn8PGHMs2isNDy4uGLZzF2o0uw8pX ulMW0V2DVv+YVbH/uadcHuLAIybTZ80u2nWIbGvQ82p9tRhhtJzNZefQCtSBkI09LFSv Fw5pYDVuhn6noZc0ATKT5gfy/xdQUIW6a7cvRqeLbNxet/Ae+TS8tqt1cP7F5ke2fQKV Qy+Dhtfkwt7wM2HDrIRZQgFWb2KIzAWu622SP6/9uqbOgDW6uRt4AoM6s/82RDnVBMfm JyjzX4gQaUvewZ3ot4mRo2TrXKdUHcAt81Pz3QUJJR/WcQNdw3RvmqpujxIxDN1ylX8c M5mA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680080101; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hQkdLJH1pptyvVBYIMjpYp2X0cm5UeAwV0k97lbZ02w=; b=MZuKr+DB7aJ92jA1I2x1QG5Nq2x8zWFlUBFwhhu4o1zGPMwaBijIROzON0UYbgrnW8 lSEYNOC5IgpAL9NUvDArAoAzno0Q1F4BGi5YBiCnEIxnvF12n4C+eNk2aU/XTEGiBpTY STvdH6A0FI/oRYdfMBR9FrEOCjuh8S1NlIJviwv76h8E1ioSeGMbnLXoDS9pL6Q77ajl rqd138e32A58IFKDPIkfp0GxLRmxGNRZ0Yy5X2lseEzUE1SyekCfJKwD2u/7sOt/6SwD Nto55bN4zZKJ1stpPnQ+fGiXhNCPYdUM/EQwprblinUoLcKxFL9B3eE1r8IZmAjHBSOi 06bA== X-Gm-Message-State: AAQBX9dNxAsii7D47zgMENgYk/njTek0/8IWr2CLCN9816oVZH1AmhQg HuKlUVotVQGs2GjXLfB3q5H4Xw== X-Google-Smtp-Source: AKy350b9G7J+QMoUbPNcQRlgqmiJdoa79V18SfeBWC1Bcrw810jNbJYGDf9D5khfb8hEy430C3xiOQ== X-Received: by 2002:a05:6000:b:b0:2d8:2b0f:c3a3 with SMTP id h11-20020a056000000b00b002d82b0fc3a3mr13618009wrx.70.1680080101142; Wed, 29 Mar 2023 01:55:01 -0700 (PDT) Received: from [127.0.1.1] (158.22.5.93.rev.sfr.net. [93.5.22.158]) by smtp.googlemail.com with ESMTPSA id f9-20020adff989000000b002cea392f000sm29571964wrr.69.2023.03.29.01.55.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Mar 2023 01:55:00 -0700 (PDT) From: Alexandre Mergnat Date: Wed, 29 Mar 2023 10:54:28 +0200 Subject: [PATCH v3 07/17] arm64: dts: mediatek: add mt6357 PMIC support for mt8365-evk MIME-Version: 1.0 Message-Id: <20230203-evk-board-support-v3-7-0003e80e0095@baylibre.com> References: <20230203-evk-board-support-v3-0-0003e80e0095@baylibre.com> In-Reply-To: <20230203-evk-board-support-v3-0-0003e80e0095@baylibre.com> To: Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Chaotian Jing , Ulf Hansson , Wenbin Mei , Linus Walleij , Zhiyong Tao , =?utf-8?q?Bernhard_Rosenkr=C3=A4nze?= =?utf-8?q?r?= Cc: linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-mmc@vger.kernel.org, linux-gpio@vger.kernel.org, Alexandre Bailon , Fabien Parent , Amjad Ouled-Ameur , Alexandre Mergnat X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=981; i=amergnat@baylibre.com; h=from:subject:message-id; bh=mvWYCtO8a3agAvj56gAEer+sR1kkD5/63RgRdiDwnr0=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkI/zc5pYmoGfGivEZISvH9w1c8+Z+7eWhfM/jDpzW Ninyz5SJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZCP83AAKCRArRkmdfjHURXZBD/ 0ZeMwkwsyHSmIA1GlE8JTHKFWbSo0pJ3pPUOCIo2CUyT/yItznGYDlyObZc49myC0vxLcl68loZzO7 UyxRVrsGTguL5Bc0yzUPCnT8ffQKJfSPwETPqLV0eU2llN9f2QKtF7wDTBCAvpVL7zuanJIu5NIMHq ABjyLu152Sql/V65zGgIuutyMITg3mAWgtZMbfgh8TgDsKxwUicXqgMReAOgvoyzOvwEJqKGMhva7b Yb9VC+wEJnUBXD6ZLZ2qW4FD5/0UnZzyIJeYhA32jwpmIuK2egTPJsMPokhBd80H7jvI+Ipxurt9mS so81b2DU0fOvUHADDl40PBo4MhLGeoZYRcb41AbEg565THDP3tfrmvoLi/vWBE70cmjwuXMcLN3tUM bQsoMEtClp7e3WewMIIjQrU2aAmPQygHwegCTaBgl6I9NS8wOL4Ajz2yWqNU0+fGbgpVbyYD25Ixhv IBoaDsY9VEAWH0TLj+3XCXHQ29A2isO6Bg2lAzKhIFjZWVZ75MlJ+O0aCEYav+wNIza9GSD7LHun9i NRhtBBrxW+Pdcc6kHW+uQp2qS8D1fwu6C4TG2EaYBvpNCSXnXGteyPB2jJV7SsIYTtzgLCDaOmyHVj UqmMa0bwvQKZ8+FXXRdKuywJoDdTU+ivaZvQ61GFkLuletdlbBrq+rUXy6yg== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org This power management system chip integration helps to manage regulators and keys. Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts index fc7f6d8ae173..2f88562c638a 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts +++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts @@ -12,6 +12,7 @@ #include #include #include "mt8365.dtsi" +#include "mt6357.dtsi" / { model = "MediaTek MT8365 Open Platform EVK"; @@ -96,6 +97,13 @@ &i2c0 { #size-cells = <0>; }; +&mt6357_pmic { + interrupt-parent = <&pio>; + interrupts = <145 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <2>; +}; + &pio { gpio_keys: gpio-keys-pins { pins { From patchwork Wed Mar 29 08:54:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 13192134 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65E9CC77B6E for ; Wed, 29 Mar 2023 08:55:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231364AbjC2Izc (ORCPT ); Wed, 29 Mar 2023 04:55:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49164 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231374AbjC2IzO (ORCPT ); Wed, 29 Mar 2023 04:55:14 -0400 Received: from mail-wr1-x42c.google.com (mail-wr1-x42c.google.com [IPv6:2a00:1450:4864:20::42c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EBB534480 for ; Wed, 29 Mar 2023 01:55:03 -0700 (PDT) Received: by mail-wr1-x42c.google.com with SMTP id q19so11776396wrc.5 for ; Wed, 29 Mar 2023 01:55:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; t=1680080102; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=rqk2Qvzyu9t26WJXQRSFQuOT876R213e4teZaPnt7S8=; b=tmNiVZKfDBwqaBjMYSt5jShG37Ea9DVxMpWLfF7figFH4xvPOL7KVQy4Nusib8WljY uKoBreQmjqeLYrvBVliUdUPa7n2myiW9timavJDUYNbbeEwhjOKiN3rGPfjAmTCUOvYB oMmKw7scLBYaXG+Jc5hTuaWNrHA+Bb09uveaj0DHBTo/MAGenOE+Is6mMjZmfNfkUVBY PUGPCudIuV/RS1VOAxKSvBboIChnBLviJ8TuCEMpzqrZfFsqKc50RP/7pDk3s8XpOoit BEeRQmuyQKNgySmIl2zvtVMpw10f6V4JdUus+1UG/Uua2fYr7ZhPHkwXgORPaN+G0mKt yooQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680080102; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rqk2Qvzyu9t26WJXQRSFQuOT876R213e4teZaPnt7S8=; b=xC1MR+DqSvw55cEJDnFNcHGq9R2XzT6GMI5/G9d2lZSCQWHffXvQViN756z9SQh2A9 5w2MbkRzXg/AN6+O+aKa+smZcPEHZlhzP4H8scU+qNpcSBbx2o+lY1KHOkOhhS3zupMb MNSmy11xaqUwYZlKUPo3qmA//5ND+Q9Tl3z0GHH6ZeFmfEPsDYt9SFPQqSmbpmfOmNL5 6H4uCS8ZL02tbVNKbecDGo208x875V3BlegmbxNMnaf91RQEfycfN2hcMhRfF2UChven Jg+gSST8hcQrUkYO5t1OtzUf+hZfyCzYcba6XS8GIoeGOEm/hoj7m7aT3+CWtVTvsTlx tMAg== X-Gm-Message-State: AAQBX9eVsKttr1+u5p+YVUh26DLYgPdqMcqr/2x4W3qGznORE6FQZrdg K0oyG0sWGKKRGviOhmaoQw6SPQ== X-Google-Smtp-Source: AKy350a+VmyKNKmoU0vGdq+Qx0GzPI8sMXzMn4Y8hAv8s7tgu+syjGsstEfJI0RmmKig0w7ptX4beQ== X-Received: by 2002:a05:6000:2:b0:2cf:e3e3:5b01 with SMTP id h2-20020a056000000200b002cfe3e35b01mr13030662wrx.56.1680080102276; Wed, 29 Mar 2023 01:55:02 -0700 (PDT) Received: from [127.0.1.1] (158.22.5.93.rev.sfr.net. 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a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org There are three ports of MSDC (MMC and SD Controller), which are: - MSDC0: EMMC5.1 - MSDC1: SD3.0/SDIO3.0 - MSDC2: SDIO3.0+ Signed-off-by: Alexandre Mergnat Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 39 ++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index 687011353f69..a67eeca28da5 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -399,6 +399,45 @@ usb_host: usb@11200000 { }; }; + mmc0: mmc@11230000 { + compatible = "mediatek,mt8365-mmc", "mediatek,mt8183-mmc"; + reg = <0 0x11230000 0 0x1000>, + <0 0x11cd0000 0 0x1000>; + interrupts = ; + clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>, + <&infracfg CLK_IFR_MSDC0_HCLK>, + <&infracfg CLK_IFR_MSDC0_SRC>; + clock-names = "source", "hclk", "source_cg"; + status = "disabled"; + }; + + mmc1: mmc@11240000 { + compatible = "mediatek,mt8365-mmc", "mediatek,mt8183-mmc"; + reg = <0 0x11240000 0 0x1000>, + <0 0x11c90000 0 0x1000>; + interrupts = ; + clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>, + <&infracfg CLK_IFR_MSDC1_HCLK>, + <&infracfg CLK_IFR_MSDC1_SRC>; + clock-names = "source", "hclk", "source_cg"; + status = "disabled"; + }; + + mmc2: mmc@11250000 { + compatible = "mediatek,mt8365-mmc", "mediatek,mt8183-mmc"; + reg = <0 0x11250000 0 0x1000>, + <0 0x11c60000 0 0x1000>; + interrupts = ; + clocks = <&topckgen CLK_TOP_MSDC50_2_SEL>, + <&infracfg CLK_IFR_MSDC2_HCLK>, + <&infracfg CLK_IFR_MSDC2_SRC>, + <&infracfg CLK_IFR_MSDC2_BK>, + <&infracfg CLK_IFR_AP_MSDC0>; + clock-names = "source", "hclk", "source_cg", + "bus_clk", "sys_cg"; + status = "disabled"; + }; + u3phy: t-phy@11cc0000 { compatible = "mediatek,mt8365-tphy", "mediatek,generic-tphy-v2"; #address-cells = <1>; From patchwork Wed Mar 29 08:54:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 13192133 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A370AC74A5B for ; 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a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org - Add EMMC support on mmc0 (internal memory) - Add SD-UHS support on mmc1 (external memory) Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 138 ++++++++++++++++++++++++++++ 1 file changed, 138 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts index 2f88562c638a..b5d018686cbe 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts +++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts @@ -97,6 +97,42 @@ &i2c0 { #size-cells = <0>; }; +&mmc0 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_default_pins>; + pinctrl-1 = <&mmc0_uhs_pins>; + bus-width = <8>; + max-frequency = <200000000>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + cap-mmc-hw-reset; + no-sdio; + no-sd; + hs400-ds-delay = <0x12012>; + vmmc-supply = <&mt6357_vemc_reg>; + vqmmc-supply = <&mt6357_vio18_reg>; + assigned-clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL>; + non-removable; + status = "okay"; +}; + +&mmc1 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc1_default_pins>; + pinctrl-1 = <&mmc1_uhs_pins>; + cd-gpios = <&pio 76 GPIO_ACTIVE_LOW>; + bus-width = <4>; + max-frequency = <200000000>; + cap-sd-highspeed; + sd-uhs-sdr50; + sd-uhs-sdr104; + vmmc-supply = <&mt6357_vmch_reg>; + vqmmc-supply = <&mt6357_vio18_reg>; + status = "okay"; +}; + &mt6357_pmic { interrupt-parent = <&pio>; interrupts = <145 IRQ_TYPE_LEVEL_HIGH>; @@ -123,6 +159,108 @@ pins { }; }; + mmc0_default_pins: mmc0-default-pins { + clk-pins { + pinmux = ; + bias-pull-down; + }; + + cmd-dat-pins { + pinmux = , + , + , + , + , + , + , + , + ; + input-enable; + bias-pull-up; + }; + + rst-pins { + pinmux = ; + bias-pull-up; + }; + }; + + mmc0_uhs_pins: mmc0-uhs-pins { + clk-pins { + pinmux = ; + drive-strength = ; + bias-pull-down = ; + }; + + cmd-dat-pins { + pinmux = , + , + , + , + , + , + , + , + ; + input-enable; + drive-strength = ; + bias-pull-up = ; + }; + + ds-pins { + pinmux = ; + drive-strength = ; + bias-pull-down = ; + }; + + rst-pins { + pinmux = ; + drive-strength = ; + bias-pull-up; + }; + }; + + mmc1_default_pins: mmc1-default-pins { + cd-pins { + pinmux = ; + bias-pull-up; + }; + + clk-pins { + pinmux = ; + bias-pull-down = ; + }; + + cmd-dat-pins { + pinmux = , + , + , + , + ; + input-enable; + bias-pull-up = ; + }; + }; + + mmc1_uhs_pins: mmc1-uhs-pins { + clk-pins { + pinmux = ; + drive-strength = ; + bias-pull-down = ; + }; + + cmd-dat-pins { + pinmux = , + , + , + , + ; + input-enable; + drive-strength = ; + bias-pull-up = ; + }; + }; + uart0_pins: uart0-pins { pins { pinmux = , From patchwork Wed Mar 29 08:54:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 13192135 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0835EC761A6 for ; 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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id f9-20020adff989000000b002cea392f000sm29571964wrr.69.2023.03.29.01.55.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Mar 2023 01:55:04 -0700 (PDT) From: amergnat@baylibre.com Date: Wed, 29 Mar 2023 10:54:31 +0200 Subject: [PATCH v3 10/17] arm64: dts: mediatek: set vmc regulator as always on MIME-Version: 1.0 Message-Id: <20230203-evk-board-support-v3-10-0003e80e0095@baylibre.com> References: <20230203-evk-board-support-v3-0-0003e80e0095@baylibre.com> In-Reply-To: <20230203-evk-board-support-v3-0-0003e80e0095@baylibre.com> To: Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Chaotian Jing , Ulf Hansson , Wenbin Mei , Linus Walleij , Zhiyong Tao , =?utf-8?q?Bernhard_Rosenkr=C3=A4nze?= =?utf-8?q?r?= Cc: linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-mmc@vger.kernel.org, linux-gpio@vger.kernel.org, Alexandre Bailon , Fabien Parent , Amjad Ouled-Ameur , Alexandre Mergnat X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=733; i=amergnat@baylibre.com; h=from:subject:message-id; bh=9K3Z9ZHZRcpHgGgX6of5yD1IBErtg5bxp3QfwtuyWKQ=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkI/zcANh6NbaBSLSGX7UyNKUYZh38g0bh6bGpblto fYtesxaJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZCP83AAKCRArRkmdfjHURYGbD/ 9jIzNron9cdGretzk3TABJ8IvjGER4c8zIv3L7b/Y3BrMhT62nJUgKQhwKbQbkFFBBHzDkQaiuSZid j/ejgvMj8esHOIEijk9aJPuYtKU+GAChZvQycwnxI0XVlsSl3xX2QzWai0zGhDnk6ysK6lZ+4bnmio QqMDshGzFMYfyBaSUK3M41uyvQOqsPYK0yK0FBMqy9jneZK+5Gz3Nwxrd3TEy1cnLeAK4pctBOL8Kc DVLmugqHTkVeu39hXVZ0LdcQ39NbAe5/NS60xZSOoRjHAlfyo5jm15XEVG6miOwN9SpxpTJalW6Rt2 D8fEzR+n4ipk1HdnlWDE6bxYMiZ6Sbcqqxh6w5IPO1xfDo2+fk0Cr1JQAVlB1h/X+cjF4pyLSauYG2 hT1Npr5Ak+jOJ3SQV4O7P8j0sVjodB/WTLB4GMSJUnuQCZ6K0lVMzTz1o0MU7tgXlmiuBXpXOEF/De csyHKqRto6rThWwm0QQQCb4BuDRT9XF0M916JYpVndOXALa6rKsfQ/yfJVIKF6nmm4SfA1WOTz82hU xKIloRVIZq8rbobpIhiIy8dyyCoDAvnsQui7NGpO7y+NYT8cb9QDQiPXdSdnytS6+HvwlLMs28Froj dLf+NXBO9zXiZGJYWzTysxJkANPZWkbEuIftbS4bKPeLMx1sSsQmr9dnqA8w== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org From: Fabien Parent MSDC1 IP block is powered by VMC. Make sure it is always on. Signed-off-by: Fabien Parent Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts index b5d018686cbe..22ec332fe9c9 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts +++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts @@ -140,6 +140,11 @@ &mt6357_pmic { #interrupt-cells = <2>; }; +/* Needed by MSDC1 */ +&mt6357_vmc_reg { + regulator-always-on; +}; + &pio { gpio_keys: gpio-keys-pins { pins { From patchwork Wed Mar 29 08:54:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 13192136 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 73392C761A6 for ; Wed, 29 Mar 2023 08:55:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230142AbjC2Izw (ORCPT ); Wed, 29 Mar 2023 04:55:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49754 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231405AbjC2IzX (ORCPT ); Wed, 29 Mar 2023 04:55:23 -0400 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [IPv6:2a00:1450:4864:20::32e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 85D1140D3 for ; Wed, 29 Mar 2023 01:55:07 -0700 (PDT) Received: by mail-wm1-x32e.google.com with SMTP id o24-20020a05600c511800b003ef59905f26so9049731wms.2 for ; Wed, 29 Mar 2023 01:55:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; t=1680080105; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=vfv77BVZkJVCikonyTsjNYks4OjSzyX47Vy4hDh/Sg0=; b=6SQOn3AJXk0D5Kmi5TeP8s87oZ3KX+eIQfpKDAuDtGetLDd9+GVbBxu4RqkbYL8PHE DfVRGafoTh26zXW+hO1Frc4nH4o3B6J6VH1tYwtwNURXrES+YzDKk99tSeWDlliCqwzq zUjdWynxSFX0vAiT8DiuQRVAcQlqJrOy4fHil/9G9VZnThrzNNGk2rRGIZax8sItmxVZ mFOktn0S90ci9viYPO0tkYCC1tQy1oRQUbhucGHnZ88doT3Aupn3OP5uNpgwM5GK6tz9 Zeoo15TMG0l1qb4Os2mOV1uTiHn/b0L9LaKoJSip+Cd5CO7+fzzYnPd1jLzlAE+2lKTu a3AQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680080105; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vfv77BVZkJVCikonyTsjNYks4OjSzyX47Vy4hDh/Sg0=; b=S1d5VoDYwOQqfazHBpC9KMZJWlgX2fyOFW5O641QS04rvZltOCFQm2SXYq3HmTvOOk nn5e5NH5ccJeEww4F3+IwHRuVd5NNH//3QLk+bVNV1PNDtn8pk6hHJpbZl0f1nhb7+VT hbaWdalPcbPmi3c2cyYXtoJot10Wk4ysfdIEig+Z1xyiv1bzey534DBBmhbuH+vABq9+ v2TEouNxpELZIfegsd2PX/V1aiUv0jhdlutedkVf8n7dtzLJCJzVRf8eqVzxQY2NBhCU KdW69aL1oBYIlubjl22nCDtNaiQgpboRzBfkCVwbgvIg05iL0FejV1DUbLPzfz7gT/YB JFDg== X-Gm-Message-State: AO0yUKXXywaJphjuS+TFS0u433+MglH8+FTsyLgMUZW950vICDMdhvCR ZPF5gH/EPVVGl2YjIUaYARtKYQ== X-Google-Smtp-Source: AK7set/NurkZ3bIlLrAgkr2Y6JZgLdOtnj5zDBVm+jrx0GGKfsz6ayM5R8SktVJ0Y4FoVQt2ebs1jQ== X-Received: by 2002:a05:600c:20f:b0:3eb:5ab3:b6d0 with SMTP id 15-20020a05600c020f00b003eb5ab3b6d0mr14323525wmi.6.1680080105715; Wed, 29 Mar 2023 01:55:05 -0700 (PDT) Received: from [127.0.1.1] (158.22.5.93.rev.sfr.net. [93.5.22.158]) by smtp.googlemail.com with ESMTPSA id f9-20020adff989000000b002cea392f000sm29571964wrr.69.2023.03.29.01.55.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Mar 2023 01:55:05 -0700 (PDT) From: Alexandre Mergnat Date: Wed, 29 Mar 2023 10:54:32 +0200 Subject: [PATCH v3 11/17] arm64: dts: mediatek: add usb controller support for mt8365-evk MIME-Version: 1.0 Message-Id: <20230203-evk-board-support-v3-11-0003e80e0095@baylibre.com> References: <20230203-evk-board-support-v3-0-0003e80e0095@baylibre.com> In-Reply-To: <20230203-evk-board-support-v3-0-0003e80e0095@baylibre.com> To: Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Chaotian Jing , Ulf Hansson , Wenbin Mei , Linus Walleij , Zhiyong Tao , =?utf-8?q?Bernhard_Rosenkr=C3=A4nze?= =?utf-8?q?r?= Cc: linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-mmc@vger.kernel.org, linux-gpio@vger.kernel.org, Alexandre Bailon , Fabien Parent , Amjad Ouled-Ameur , Alexandre Mergnat X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1190; i=amergnat@baylibre.com; h=from:subject:message-id; bh=C4mUGelmedcnsN+galzBspSPAKiY8Y1mIDOmQThfXX8=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkI/zcIyxSg+PaknWT166wpFSYZfFQS1WkE9JumQvN r/47U5WJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZCP83AAKCRArRkmdfjHUReesD/ 9Qb6O84sJevPXhmoLp2Gww0rkY/wGRPEGhBPMtfdiR5LM+AiXe24K1XkDzxLktmXzK+/9Fa7OA0yo7 hvMCbtYq4McT6FnpWYmbHBx1MBvi4w/TimSalwDbqWhAWeRcKF1o3mwtOjqsoonDX1659VvaLRpd1D j/eSGdU/OM+1SXVft/W+cCmln8toeVaxzbtErhbJY1f9BUuUK4fA+jvrAUIeUxGy6md37tS2OiczNz 4GCQaCo6lBbBmBY/LiG7VphksjdUyITtup1O2TLYY2Mj+5B2gcryHrDTiS9nhj6ICXuMzenIQ8n55k i9Q0iGBKds6nxmpkP+qfFKnNR4J+LabVedbbscReeTzGmy3gLOwAQc/Y3b/uJTYARd7o8yz0FBW+KV o0AOU4XAd+dHvn+HxQuUoYDqhrcYFZJB+sH6ukVGQ/7SWl4xSOefWZ8M/Z0gXFNW7zTpqTgXJp8COd a22ukHnSgKftyzmwPEuHIuANmIs/jMxvNmlguRvAtyNn5bBzUERa9RdVmhsc4LhBI9/rp8HxC6VH66 ygLXqfqP5SLBN7Y5yIawKtk/ssllkPGTtdlfVqoRYMO04qvkJDhaik6aoH+bu0WQ1ufMBOtAE2jvj0 nCt6N/VUzwEzbBt5zSb7HBBAGaKzBGwVpyhM0/g0NhfugxFDEwgoszrw6cdA== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org This patch add support for SuperSpeed USB, in OTG mode, on micro connector. It also add support for the Extensible Host Controller Interface USB. Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts index 22ec332fe9c9..868ee0d160e4 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts +++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts @@ -319,6 +319,28 @@ &pwm { status = "okay"; }; +&ssusb { + pinctrl-0 = <&usb_pins>; + pinctrl-names = "default"; + maximum-speed = "high-speed"; + usb-role-switch; + dr_mode = "otg"; + vusb33-supply = <&mt6357_vusb33_reg>; + status = "okay"; + + connector { + compatible = "gpio-usb-b-connector", "usb-b-connector"; + type = "micro"; + id-gpios = <&pio 17 GPIO_ACTIVE_HIGH>; + vbus-supply = <&usb_otg_vbus>; + }; +}; + +&usb_host { + vusb33-supply = <&mt6357_vusb33_reg>; + status = "okay"; +}; + &uart0 { pinctrl-0 = <&uart0_pins>; pinctrl-names = "default"; From patchwork Wed Mar 29 08:54:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 13192137 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B8B7DC77B6E for ; Wed, 29 Mar 2023 08:55:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231209AbjC2Izx (ORCPT ); Wed, 29 Mar 2023 04:55:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49068 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231357AbjC2IzX (ORCPT ); Wed, 29 Mar 2023 04:55:23 -0400 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [IPv6:2a00:1450:4864:20::333]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8119C4C1B for ; Wed, 29 Mar 2023 01:55:08 -0700 (PDT) Received: by mail-wm1-x333.google.com with SMTP id d11-20020a05600c3acb00b003ef6e6754c5so5513341wms.5 for ; Wed, 29 Mar 2023 01:55:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; t=1680080107; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=OoTSIHWCMaC55e5uUwc/Xt3kUwKDqCkH1f0U1BWd1Rg=; b=cM1dYwxKoMoBPx4ir88db9bhtpRtAuAwvkrO1K2goIG09KJORNvZDhjjo26vPGEK7A tx07C4sDpHEpspDdm7DePNtX/yvzaW1AcAaj956grg7Ss5Zu0ptJ6nbdFgdnuUW/NiC8 ssG1kbKpcppz/3L7cvkY6v6FiFZyX5uJ7uzo3qpVg/Ce6ATKmhyoxU/6tLQcXR1XzPvf ooAssGlJ25T9eLa7rfUXjwABJr5sQJV6Zg4van4Rb0ik7H4igGY1qhzq2X6YNSSpZYpf mnG0TS84+sNw/umm3h8lrmLWQHcd7l+ptNuzOZSWjHE5ECIrBZND8AGyVMxp/aJQ0OFd /3CA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680080107; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OoTSIHWCMaC55e5uUwc/Xt3kUwKDqCkH1f0U1BWd1Rg=; b=ycwh6XuRKzcq4dYlGDfEj6M2GlU3ymgeSZSNF1ebzAvLH29Iy7cYzkwH/B6ml2+sgc IZHuijTkvB4jAYqf1GH7KGgDvGEcUBCCpX/HB80KhPcgYEc6IgBbbIwXnT0uHgi0Lln1 Y4vxbC0DrzY288vBgV1P42pr830LWEC7YzWMVoKdsBUT317np3zqJ0A7TMXJVmeK9Xxo lkMtBz8hUVjxzn44bCvWcxtDkVXvsdPPb6XBjuBdTV71cq/Lkk8Atf69vX2SrGmUo6XA UL5WuWtywwPcsccCcGkOF0b23HUDXNepDxSkFCX423QCF2u9xRQqvrL8v7CE0lXxOW4s tSpw== X-Gm-Message-State: AO0yUKWgkg+urzVNeqxp4Dp2mZXAmdThSwUHJeb3xDMwOsI8eBImCX// qHayL/rh3IIV5R7+G0ffP83qWQ== X-Google-Smtp-Source: AK7set86EYENK4NSOAScRj3krY9Lf0QXLGnpUu/f6vUEdOr1Dk5CcEjrVpKpFJzz0cui5O75amYE1w== X-Received: by 2002:a1c:7319:0:b0:3ed:31fa:f563 with SMTP id d25-20020a1c7319000000b003ed31faf563mr13248678wmb.20.1680080106823; Wed, 29 Mar 2023 01:55:06 -0700 (PDT) Received: from [127.0.1.1] (158.22.5.93.rev.sfr.net. [93.5.22.158]) by smtp.googlemail.com with ESMTPSA id f9-20020adff989000000b002cea392f000sm29571964wrr.69.2023.03.29.01.55.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Mar 2023 01:55:06 -0700 (PDT) From: Alexandre Mergnat Date: Wed, 29 Mar 2023 10:54:33 +0200 Subject: [PATCH v3 12/17] arm64: dts: mediatek: add ethernet support for mt8365 SoC MIME-Version: 1.0 Message-Id: <20230203-evk-board-support-v3-12-0003e80e0095@baylibre.com> References: <20230203-evk-board-support-v3-0-0003e80e0095@baylibre.com> In-Reply-To: <20230203-evk-board-support-v3-0-0003e80e0095@baylibre.com> To: Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Chaotian Jing , Ulf Hansson , Wenbin Mei , Linus Walleij , Zhiyong Tao , =?utf-8?q?Bernhard_Rosenkr=C3=A4nze?= =?utf-8?q?r?= Cc: linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-mmc@vger.kernel.org, linux-gpio@vger.kernel.org, Alexandre Bailon , Fabien Parent , Amjad Ouled-Ameur , Alexandre Mergnat X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1363; i=amergnat@baylibre.com; h=from:subject:message-id; bh=7cNEQ8Z3d2N18bBB0ySn0ca/dVK3FcA8H0h1LVefyV8=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkI/zcQ2qKeCqrMP79V92+YPoOhtlDtftApPNzGkg1 h7TrO5aJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZCP83AAKCRArRkmdfjHURV3xEA CSZoyscKEYe7T0Ft3YDPl9VOZdvmX7yZyAEWVJhJzppyb+HSz55wTp/dK6K4/pDgWPFiDbwjBMP2q6 d0kIXSdFnhCj39ysnro6ODeo1eOA5LOdGXmtusno+AxlJV1/UWe9QrRSa8BKEk6vfsIm+E8LbnXl5g 4mVExdV/iF1G6trhPMEC7stxu51G+/R/NtEyQyqUHFYg1ZbAOnnXz0uLsaYO2+FBVWdp/HMAPj4cQo pLFJoN6WOII2P07Q2zxJpTjmUmfnzL/1kvDxLwrbGVORNEQpBEpd5x/HVffMko7QpqQEociMMxu14d X3nznrGUwMMvPIZItAOVJvqDPh9qBRoAMFE6FxcPa7VfJ5zVwdUy7FbkNccmtJbPuJxL6l0Ji4MDss AQMCHekt9oagccrLYS0pspSaaeasktOsm59qcD403dys/j9gMinoHanal4YCtZG6u5ZpMOHFZGYBJF zIsO88urfOIeBY2WGcLLLifHEZwcgUmQoBsggt2iHjhlQiiTMyZ1f+1ubHnMym4KGk+TaG5qPPbAy5 o3yEYKY+4BZEIyofINuqS3JrFWzowGZBgRh5N8dgZILCzIC76qB7h/L+8VqNo03gXXAniUdoMxNL5l cGQJ0WY1xPx89aOQzi+PWAm9KpoZs7L/ffDiRx4HHIVB1/HztjCbKuo2ES0w== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org This IP is a 10/100 MAC controller compliant with IEEE 802.3 standards. It supports power management with Energy Efficient Ethernet and Wake-on-LAN specification. Flow control is provided for half-duplex and full-duplex mode. For packet transmission and reception, the controller supports IPv4/UDP/TCP checksum offload and VLAN tag insertion. Signed-off-by: Alexandre Mergnat Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index a67eeca28da5..394a5a61be59 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -438,6 +438,18 @@ mmc2: mmc@11250000 { status = "disabled"; }; + ethernet: ethernet@112a0000 { + compatible = "mediatek,mt8365-eth"; + reg = <0 0x112a0000 0 0x1000>; + mediatek,pericfg = <&infracfg>; + interrupts = ; + clocks = <&topckgen CLK_TOP_ETH_SEL>, + <&infracfg CLK_IFR_NIC_AXI>, + <&infracfg CLK_IFR_NIC_SLV_AXI>; + clock-names = "core", "reg", "trans"; + status = "disabled"; + }; + u3phy: t-phy@11cc0000 { compatible = "mediatek,mt8365-tphy", "mediatek,generic-tphy-v2"; #address-cells = <1>; From patchwork Wed Mar 29 08:54:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 13192140 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C7276C77B74 for ; Wed, 29 Mar 2023 08:56:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230481AbjC2Iz7 (ORCPT ); Wed, 29 Mar 2023 04:55:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50576 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231432AbjC2Izj (ORCPT ); Wed, 29 Mar 2023 04:55:39 -0400 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [IPv6:2a00:1450:4864:20::334]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 633871995 for ; Wed, 29 Mar 2023 01:55:10 -0700 (PDT) Received: by mail-wm1-x334.google.com with SMTP id o24-20020a05600c511800b003ef59905f26so9049815wms.2 for ; Wed, 29 Mar 2023 01:55:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; t=1680080108; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Tc0tvFfRXISHKnCDd1o9x7ZirUcZ+kLbNssiFkvaiEo=; b=0w7dcK8QqyDtRT/8IraSXznp84ASDFAs2r/m2hfTxe5wFTfAuYv6Xc4GZftHGgSvtd oXjSgNWQthqlmrv9ortHiRrpdZ4N3d7HERiDn+JyqLeomP9jASoTAH6xp+QTHR/X/XzJ EGOs9rUjrSGwfBkWpRIBShcD4k0mta8Hx6XOigof9yUEO3Th3H/0kc8OgoP/lnD77Bjw OwQ2yVz9z9ffyfMMfZTqbrjpLXM9qkI1L2W8pmeYsNMQe3QNWJPGRZd9g1vhzkNqWmlz CVQnsW5VblH7U0tO5dqQbgKFK+vWzgKL6tH1sitDxML61JTsebhNOWTGtRFHziTD8ozC Ts9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680080108; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Tc0tvFfRXISHKnCDd1o9x7ZirUcZ+kLbNssiFkvaiEo=; b=e/ejrzD4T4AK6E8Y4KpUHpuu5SsC6qwtmdeoNMqa8t0lY1FmOlzVHKpX4y3O2IKU/c nB2kk5nGyIx19yZF6CW3e6arn0sP0J6rXIQ9apIEIQ8gSRXipcwXjrhHERGceURu9UJ7 /8k5pXGZtoq6R9/pW7onxQicl6iK0AkAM/yAwYU5g0CqV+A5lxY8YL5rlMhd31tkuMjG 0vBIk+SxcFICnoiIhEeh1Sox6b+JQZ3jPq91yBJI7HFTn3hU8TZDQUxwwgYN86Bg+YoE L8IRoREzE1I4Sz7FatUhFbekh/I3YRoVLH+G/cy3lCwM8Hqa05dNUmo5i1Zu1MpfxB9T CiAw== X-Gm-Message-State: AO0yUKWq29+I8HGjHE0KOQcH0T1ry0rgilFHj2MvQ368uuCgY0bIGwkg k7alfjJfm2jcLowJ1ODzkDr5lg== X-Google-Smtp-Source: AK7set9iLPnqzlkJP27bD71VhJuqsetDy3oUBZyGG+iJbiqKddZU/Sc+nQfuu8h42LeKmA7Ib+1bxA== X-Received: by 2002:a7b:c3c7:0:b0:3ea:f75d:4626 with SMTP id t7-20020a7bc3c7000000b003eaf75d4626mr14067428wmj.38.1680080107999; Wed, 29 Mar 2023 01:55:07 -0700 (PDT) Received: from [127.0.1.1] (158.22.5.93.rev.sfr.net. [93.5.22.158]) by smtp.googlemail.com with ESMTPSA id f9-20020adff989000000b002cea392f000sm29571964wrr.69.2023.03.29.01.55.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Mar 2023 01:55:07 -0700 (PDT) From: Alexandre Mergnat Date: Wed, 29 Mar 2023 10:54:34 +0200 Subject: [PATCH v3 13/17] arm64: dts: mediatek: add ethernet support for mt8365-evk MIME-Version: 1.0 Message-Id: <20230203-evk-board-support-v3-13-0003e80e0095@baylibre.com> References: <20230203-evk-board-support-v3-0-0003e80e0095@baylibre.com> In-Reply-To: <20230203-evk-board-support-v3-0-0003e80e0095@baylibre.com> To: Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Chaotian Jing , Ulf Hansson , Wenbin Mei , Linus Walleij , Zhiyong Tao , =?utf-8?q?Bernhard_Rosenkr=C3=A4nze?= =?utf-8?q?r?= Cc: linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-mmc@vger.kernel.org, linux-gpio@vger.kernel.org, Alexandre Bailon , Fabien Parent , Amjad Ouled-Ameur , Alexandre Mergnat X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2430; i=amergnat@baylibre.com; h=from:subject:message-id; bh=/sWnZn5I2Q2gVnzorBAXHY3JwcCKjkzGjd4XBmHmgDY=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkI/zcNeBQfaPCLdrn1gPlj5P0kizCnmtupqihg/t+ +Z4ADtyJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZCP83AAKCRArRkmdfjHURUWwD/ 41cgFLnCf6V+fkBD6PXpyBrWc6crMUZVp6jIndN/sOnPmLI03fFu1jnsk6iFGXJHkaeQ1C1YrW7Khr 4gDEzInZuDj+PIQASI8R441Z526VbUoByRUGhRFwjhFEOD1NagoPltEEpR0xphX+4DuR4rxKA2GRhd V0+tx8cE4GNMMbmOcJ3crFuMgnnIKsEVTOo8AxxUxuvQ+6E3t4BiIS8zOb35aPdlkYbPF6AC18kP9R vDCKMaDMpmj9QZZhUxVmFC3gb/mLJOdISqQkPP02cjFC24vxfCovTtVxBoUtJdRcM6/mYeP+WNG9Z9 nvwWnvR8gWqGgYtK1G/ZKXUvcOr73OSHDrT5DafHEUCpkVetP79eaJTqLduDXOk76KbFRa2JtoFlG+ /VfNpP+VvNx+IuxlHv6MvaVyBRYUINoHWfjaGuwRI/NndPZ+1YbjWYw5FQKyrmBtAyV3Hk+UMGv9/C +IM8dR0EcQUW5vxHJrk0jCuBDLlDqgPuZjOqlzgDZKiGrNvx/LrcmTuwls2QBZYsWrv2jY8pyaM26Z fsMfuOdhQqc0wsVTntL1Dl959Evc8iEQROx9EKyQAG75GPu1cjTU0LxkQ01F3ynfFrt8cjVAqkN5hV gR3wFfp3eD7B6/e9u2fGQGTRSbmuNV1tBEp589EvTN0RBQ0cWFmFz4POyjiQ== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org - Enable "vibr" and "vsim2" regulators to power the ethernet chip. Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 57 +++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts index 868ee0d160e4..1820daad6da3 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts +++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts @@ -88,6 +88,28 @@ optee_reserved: optee@43200000 { }; }; +ðernet { + pinctrl-names = "default"; + pinctrl-0 = <ðernet_pins>; + phy-handle = <ð_phy>; + phy-mode = "rmii"; + /* + * Ethernet and HDMI (DSI0) are sharing pins. + * Only one can be enabled at a time and require the physical switch + * SW2101 to be set on LAN position + */ + status = "disabled"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + eth_phy: ethernet-phy@0 { + reg = <0>; + }; + }; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins>; @@ -140,12 +162,47 @@ &mt6357_pmic { #interrupt-cells = <2>; }; +/* Needed by analog switch (multiplexer), HDMI and ethernet */ +&mt6357_vibr_reg { + regulator-always-on; +}; + /* Needed by MSDC1 */ &mt6357_vmc_reg { regulator-always-on; }; +/* Needed by ethernet */ +&mt6357_vsim2_reg { + regulator-always-on; +}; + &pio { + ethernet_pins: ethernet-pins { + phy_reset_pins { + pinmux = ; + }; + + rmii_pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + }; + gpio_keys: gpio-keys-pins { pins { pinmux = ; From patchwork Wed Mar 29 08:54:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 13192139 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 60485C761A6 for ; Wed, 29 Mar 2023 08:56:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230101AbjC2Iz6 (ORCPT ); Wed, 29 Mar 2023 04:55:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48154 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231158AbjC2Iz3 (ORCPT ); Wed, 29 Mar 2023 04:55:29 -0400 Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [IPv6:2a00:1450:4864:20::435]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7F1984C30 for ; Wed, 29 Mar 2023 01:55:09 -0700 (PDT) Received: by mail-wr1-x435.google.com with SMTP id l12so14828441wrm.10 for ; Wed, 29 Mar 2023 01:55:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; t=1680080109; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=RaQQlVVIoxOU6TqfrFJ+lVhpnQLiZR5hTcBoQn1zAF4=; b=14LgrvXb93pcxdiKRp8jWxGjngm6XDWzpsH3lY9q0okYQZ/ORVz804xdiuYRRIrZ3W DEX9qbErrDi1ZNfzKACV71rrciT6x5OYEk7Ok6WZT9CpSWbll5TwhN9W/nfWIwJa938j +Lq0yVM9V0ABsSy/PqSugW4XrUpwhrvUZtJpyhRco4l3sU+o36pAEL3UXfdMyOSz3hIt 3Rw155qO0oCTiozn8pWUXsBnIKrcQUWMgtq1NTU1GwjFl/ntrLlZtiQEf3yqmHNAKbP8 7dQlVPmSaROvQU7WXc0PJT9lIYXLvROFkG5zowAFDtyRYA0aevWGKC34VOEjfnrlU6g3 P3Eg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680080109; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RaQQlVVIoxOU6TqfrFJ+lVhpnQLiZR5hTcBoQn1zAF4=; b=FZxeMBG+XzM9lWIKuQNCVtSgUp2hpMIDgac7mTlEBhUss8CMwTRIwhS6njMJlZgoKg p6TpwpX3zkAqu4dwkKw6fawkt/vjjfqQeY+PrSv6K/4y/A5ck+iUuhj1iXvoeutMMpC8 fTgP0xIqi/jDUnOJlDA/MJXojeT3/8p4NKxLsKpK4b/+ohtGlUG2f3iA+YzWVSAZcxWH dJrM1TEesA94xsV95r/I/eBneb8si/MQD49RCGtM1F5YJxLagP0s9K51V4wFOyQYdC5X txNX1ucaxYRwalzzqrInm0g3EkIceleI0o8YRL7HTwCghzZTRkbNVLbtUTM7gFub8a2v 2S7Q== X-Gm-Message-State: AAQBX9e1D4OrNJ8nk6rhEwjjOpdZ5XAlGVylTsWPL0NOY+MGHjRwtTY+ 3eAaEZ0jK86eUfb2BC4eEOpeaA== X-Google-Smtp-Source: AKy350ZZliyPaqooFuppqqg2/DsSnh9Bxa6DNxbgwJrsU6knkvhi1VU0jHFRf0cX6pfwLbWeAwukOw== X-Received: by 2002:adf:f201:0:b0:2e4:34b:92ad with SMTP id p1-20020adff201000000b002e4034b92admr525518wro.64.1680080109030; Wed, 29 Mar 2023 01:55:09 -0700 (PDT) Received: from [127.0.1.1] (158.22.5.93.rev.sfr.net. [93.5.22.158]) by smtp.googlemail.com with ESMTPSA id f9-20020adff989000000b002cea392f000sm29571964wrr.69.2023.03.29.01.55.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Mar 2023 01:55:08 -0700 (PDT) From: Alexandre Mergnat Date: Wed, 29 Mar 2023 10:54:35 +0200 Subject: [PATCH v3 14/17] arm64: dts: mediatek: add OPP support for mt8365 SoC MIME-Version: 1.0 Message-Id: <20230203-evk-board-support-v3-14-0003e80e0095@baylibre.com> References: <20230203-evk-board-support-v3-0-0003e80e0095@baylibre.com> In-Reply-To: <20230203-evk-board-support-v3-0-0003e80e0095@baylibre.com> To: Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Chaotian Jing , Ulf Hansson , Wenbin Mei , Linus Walleij , Zhiyong Tao , =?utf-8?q?Bernhard_Rosenkr=C3=A4nze?= =?utf-8?q?r?= Cc: linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-mmc@vger.kernel.org, linux-gpio@vger.kernel.org, Alexandre Bailon , Fabien Parent , Amjad Ouled-Ameur , Alexandre Mergnat X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3612; i=amergnat@baylibre.com; h=from:subject:message-id; bh=c7vCtSe/WVuWGbMdmeJCSd1Y1OoLrA8MO/iUibZvpck=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkI/zcVAd04GxdvqrTsshWoMC0P7pVbCtaqpw6neH6 gd1tDuqJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZCP83AAKCRArRkmdfjHURerWD/ 99fkruLqpde97Gh1UYS1jyEF41IRtXrAWgi4oLczd/OUaX66pUklUQQ+e5MkhREu9y+vfGJ8458iWL CI+nrtd/fB4QGtNu+9PU7+ACIama1KcADk9hCMbaJo0Khb3dnBuliCaXAz6wZkjvXX9pJOW7hHlErc 03uBPoALBsJOaRSdi3II6RJnC+e8JKCriw0O7wp2uX5Jq4Vd6Ztx/JDFaFyJlZ/Vn0GcTCNY0m12fY k8Ilx7k4TY8Hp0shQif0js5jXgWwaKm/Isqyecd+eXrkUuDE+/40G4BssuJZX4oAyihPK+1e4QsyeK yGnZnNiIIMfJaWnAxNsxBDtAYK6txvUFIahe8G0HxLDKXsKKK0mEitI25ZQytdq934k+0uBIBvZFDg X0s3dL9s5umf0KxCSkpuibTuY2eK0Vjlo7GdWtKRCCdPjuT5H+EAHm6IgS+qzLwc41FYUKJKhmk8s8 QTLgwR0+jPzUzTNaxx5+Egzy75Lb7Ce5TNu5nU5bwrrdVN2UiMbHfjFyFemMHeL6Le5z0/cI4boDA8 9+/m3qig1NT651s4Iy0YCZ9+MxGLa4JNaD4de3qKYMVqLDG8QUDCYl3AArvLH3yOpJ2hs7lVn02Qr+ zZcuOZPglZCXsF+7ngx6ZxfDJOZ8veiLBFbSVfndghxU/2QDirkMLK5A9aDw== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org In order to have cpufreq support, this patch adds generic Operating Performance Points support. Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 85 ++++++++++++++++++++++++++++++++ 1 file changed, 85 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index 394a5a61be59..c3ea3cc97a47 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -20,6 +20,75 @@ cpus { #address-cells = <1>; #size-cells = <0>; + cluster0_opp: opp-table-0 { + compatible = "operating-points-v2"; + opp-shared; + opp-850000000 { + opp-hz = /bits/ 64 <850000000>; + opp-microvolt = <650000>; + }; + opp-918000000 { + opp-hz = /bits/ 64 <918000000>; + opp-microvolt = <668750>; + }; + opp-987000000 { + opp-hz = /bits/ 64 <987000000>; + opp-microvolt = <687500>; + }; + opp-1056000000 { + opp-hz = /bits/ 64 <1056000000>; + opp-microvolt = <706250>; + }; + opp-1125000000 { + opp-hz = /bits/ 64 <1125000000>; + opp-microvolt = <725000>; + }; + opp-1216000000 { + opp-hz = /bits/ 64 <1216000000>; + opp-microvolt = <750000>; + }; + opp-1308000000 { + opp-hz = /bits/ 64 <1308000000>; + opp-microvolt = <775000>; + }; + opp-1400000000 { + opp-hz = /bits/ 64 <1400000000>; + opp-microvolt = <800000>; + }; + opp-1466000000 { + opp-hz = /bits/ 64 <1466000000>; + opp-microvolt = <825000>; + }; + opp-1533000000 { + opp-hz = /bits/ 64 <1533000000>; + opp-microvolt = <850000>; + }; + opp-1633000000 { + opp-hz = /bits/ 64 <1633000000>; + opp-microvolt = <887500>; + }; + opp-1700000000 { + opp-hz = /bits/ 64 <1700000000>; + opp-microvolt = <912500>; + }; + opp-1767000000 { + opp-hz = /bits/ 64 <1767000000>; + opp-microvolt = <937500>; + }; + opp-1834000000 { + opp-hz = /bits/ 64 <1834000000>; + opp-microvolt = <962500>; + }; + opp-1917000000 { + opp-hz = /bits/ 64 <1917000000>; + opp-microvolt = <993750>; + }; + opp-2001000000 { + opp-hz = /bits/ 64 <2001000000>; + opp-microvolt = <1025000>; + }; + }; + cpu-map { cluster0 { core0 { @@ -50,6 +119,10 @@ cpu0: cpu@0 { d-cache-line-size = <64>; d-cache-sets = <256>; next-level-cache = <&l2>; + clocks = <&mcucfg CLK_MCU_BUS_SEL>, + <&apmixedsys CLK_APMIXED_MAINPLL>; + clock-names = "cpu", "intermediate"; + operating-points-v2 = <&cluster0_opp>; }; cpu1: cpu@1 { @@ -65,6 +138,10 @@ cpu1: cpu@1 { d-cache-line-size = <64>; d-cache-sets = <256>; next-level-cache = <&l2>; + clocks = <&mcucfg CLK_MCU_BUS_SEL>, + <&apmixedsys CLK_APMIXED_MAINPLL>; + clock-names = "cpu", "intermediate", "armpll"; + operating-points-v2 = <&cluster0_opp>; }; cpu2: cpu@2 { @@ -80,6 +157,10 @@ cpu2: cpu@2 { d-cache-line-size = <64>; d-cache-sets = <256>; next-level-cache = <&l2>; + clocks = <&mcucfg CLK_MCU_BUS_SEL>, + <&apmixedsys CLK_APMIXED_MAINPLL>; + clock-names = "cpu", "intermediate", "armpll"; + operating-points-v2 = <&cluster0_opp>; }; cpu3: cpu@3 { @@ -95,6 +176,10 @@ cpu3: cpu@3 { d-cache-line-size = <64>; d-cache-sets = <256>; next-level-cache = <&l2>; + clocks = <&mcucfg CLK_MCU_BUS_SEL>, + <&apmixedsys CLK_APMIXED_MAINPLL>; + clock-names = "cpu", "intermediate", "armpll"; + operating-points-v2 = <&cluster0_opp>; }; l2: l2-cache { From patchwork Wed Mar 29 08:54:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 13192138 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A08DC77B6F for ; Wed, 29 Mar 2023 08:55:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229717AbjC2Iz4 (ORCPT ); Wed, 29 Mar 2023 04:55:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50172 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230379AbjC2Izb (ORCPT ); Wed, 29 Mar 2023 04:55:31 -0400 Received: from mail-wr1-x42c.google.com (mail-wr1-x42c.google.com [IPv6:2a00:1450:4864:20::42c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A65E349D1 for ; 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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id f9-20020adff989000000b002cea392f000sm29571964wrr.69.2023.03.29.01.55.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Mar 2023 01:55:09 -0700 (PDT) From: Alexandre Mergnat Date: Wed, 29 Mar 2023 10:54:36 +0200 Subject: [PATCH v3 15/17] arm64: dts: mediatek: add cpufreq support for mt8365-evk MIME-Version: 1.0 Message-Id: <20230203-evk-board-support-v3-15-0003e80e0095@baylibre.com> References: <20230203-evk-board-support-v3-0-0003e80e0095@baylibre.com> In-Reply-To: <20230203-evk-board-support-v3-0-0003e80e0095@baylibre.com> To: Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Chaotian Jing , Ulf Hansson , Wenbin Mei , Linus Walleij , Zhiyong Tao , =?utf-8?q?Bernhard_Rosenkr=C3=A4nze?= =?utf-8?q?r?= Cc: linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-mmc@vger.kernel.org, linux-gpio@vger.kernel.org, Alexandre Bailon , Fabien Parent , Amjad Ouled-Ameur , Alexandre Mergnat X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1070; i=amergnat@baylibre.com; h=from:subject:message-id; bh=Z2Oft9Ecb3H2vKhjmkmQxcbqKZ2Y712Mk7ceRLy9+1Q=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkI/zcHv+n9+SgMIsZtBX98ZGYamPG8zt91y3/5fJp Vd7lMw2JAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZCP83AAKCRArRkmdfjHURc36D/ wMDS2x7THMMHHgg3ChRl85Kk6ZKzh2Fut6DuJr3RECqAihMlzkEXYwVzQhyxmhmRvm1KFHs6vcXPNI MJTFEQmLNZfs0PkyqTfkGfLQACnQar4EiZl1ekgYyIrkYl1hDOtsHyKFkuhqH4CgDspoBHQko4lJX8 2IVRkhb58uKtC6GlZ9K1DcfhakQLhIs/XOCJe+V4INWO1tgI0y0ITaWNfiNSQmegenKv9bUUF/AJWx vwKSC6MeDjJ3b0i+AXT0sB/SygL8WkZHs4Va3g7Xmm7+br1cO+foR+rVZEAf8OX1w2LuevuH/5QSXl YX/ffPVhSvGPe4rzhen4GmM+V15d4rHOFr834rUq9VXUWSxo8MhBjQ5JhiLxj7ZuGWROPjfYecNgBt cwpsjHklfHbrGlPm8qufiLeNqOHlym5jwT7ziHEYo4ozw9Tr8wbCQo8SwNH9gRMCEilo4BFm+RFkn+ zAP8hwGBi4jmXfDbEcMtNS3imwpst/o77WrEeLyGSrE3QoNAuvtmmOzSfjCPuJeJpOwczhO75vOBnh kHIlGuR1XhRG0vBzSR1Y82Pn2MAX70iUI228wIBA7BPfe3cCfVUWATnvCcjPZUK3qYWjQmuckm+JnR AlkVwWXv3FrUp7Wm52QErOvycncL9OQ9SCcGJCA0lDiIb68v+Zmvy1cmLO8Q== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org In order to have cpufreq support, this patch adds proc-supply and sram-supply for each CPU. Signed-off-by: Alexandre Mergnat Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts index 1820daad6da3..edf3a4b6a76e 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts +++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts @@ -88,6 +88,26 @@ optee_reserved: optee@43200000 { }; }; +&cpu0 { + proc-supply = <&mt6357_vproc_reg>; + sram-supply = <&mt6357_vsram_proc_reg>; +}; + +&cpu1 { + proc-supply = <&mt6357_vproc_reg>; + sram-supply = <&mt6357_vsram_proc_reg>; +}; + +&cpu2 { + proc-supply = <&mt6357_vproc_reg>; + sram-supply = <&mt6357_vsram_proc_reg>; +}; + +&cpu3 { + proc-supply = <&mt6357_vproc_reg>; + sram-supply = <&mt6357_vsram_proc_reg>; +}; + ðernet { pinctrl-names = "default"; pinctrl-0 = <ðernet_pins>; From patchwork Wed Mar 29 08:54:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 13192141 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D2097C74A5B for ; Wed, 29 Mar 2023 08:56:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231409AbjC2I4X (ORCPT ); Wed, 29 Mar 2023 04:56:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48466 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231153AbjC2Izk (ORCPT ); Wed, 29 Mar 2023 04:55:40 -0400 Received: from mail-wr1-x42c.google.com (mail-wr1-x42c.google.com [IPv6:2a00:1450:4864:20::42c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B12B44EE1 for ; Wed, 29 Mar 2023 01:55:11 -0700 (PDT) Received: by mail-wr1-x42c.google.com with SMTP id e18so14841333wra.9 for ; Wed, 29 Mar 2023 01:55:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; t=1680080111; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=+dNu/yHcKe6XE6P0BXTDhxax+BTFAlj51fPshovNp84=; b=dKS1xTQikBkAUWbUbeweB1ty6gQOw+SeO0EHFM5IRhAHfnBlSFyqc66JDBGwE8rpeU DBQUZ5svqAPbxxsNgJfUPBeBlaeI2DbgH7OPmBEVgozVYxKhhBpP/+HeWNdQdObBmBrp YC+jBA7THSDU55qqaU3NsuTqmdBPVj3N7DZtmd77woHo8fqQtNJvKB/gtEyS4HsQ50aI WgPBQHVeEcRX0lQl4uFLsJ3G4EDUEu8g4Hi4etlghnqGBUOd9ElfZ3f5i5uJ4xFPyPDM aXZofS+s8/9jFRv7Zt4VViWfyEpQROVWcPEGE84SUaFTHvJzogQLCg81jmREgjL/O6Z5 Z1AA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680080111; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+dNu/yHcKe6XE6P0BXTDhxax+BTFAlj51fPshovNp84=; b=LLBybs5a7PhZu37lgTE7Ul9fLigupdj6t1VETVAjXsNIrnY8RB3F3jXB7HJnWMp4ql 9rbIneryLxPjekGockN0A0VBhhFckPDRWJKTeBsjfIMhgoooaxHsp0G4q66Tc/AUxak2 SeESJnfK3O+GEduNAkRH5niCCo2YlyuClC2xxUTr343UKwpJeWD7ctj96bm3EUT1joce mNlR5LjM7b8rNJXyoWU4BLIc0G9eZKVoBNrj8SH7WAGHRhd4b50ot5nnlvjimxcsAPp8 DBuPPM+sV58tc2aTAaLxXP+0CBaJB2iAKNiIFirWyhtr5Reql0F06jwWEObVNP1bdhLc ADzg== X-Gm-Message-State: AAQBX9cNfZpSNw2FLWKZl0hwyy2Nhe2/EgSIexGn3KwlyvhkDTTQKeD7 5YVpBbKaZECUjzIxA5pwpvzA3A== X-Google-Smtp-Source: AKy350Yop67dGlqTahEGHCkmUG4PMP+3YKBPdodkLoUj/Dtd3ftOlu+EiCPbc8oNU3rF7KipQ1oUYA== X-Received: by 2002:a5d:564c:0:b0:2de:bb7c:ea16 with SMTP id j12-20020a5d564c000000b002debb7cea16mr10684242wrw.37.1680080111205; Wed, 29 Mar 2023 01:55:11 -0700 (PDT) Received: from [127.0.1.1] (158.22.5.93.rev.sfr.net. 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Plus, register range should be 0x100 instead of 0x10. Finally, interrupt polarity of systimer is LEVEL_HIGH. Fix the above properties accordingly. Signed-off-by: Amjad Ouled-Ameur Signed-off-by: Alexandre Mergnat Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index c3ea3cc97a47..959d8533c24c 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -575,9 +575,9 @@ system_clk: dummy13m { }; systimer: timer@10017000 { - compatible = "mediatek,mt8365-systimer", "mediatek,mt6795-systimer"; - reg = <0 0x10017000 0 0x10>; - interrupts = ; + compatible = "mediatek,mt8365-systimer", "mediatek,mt6765-timer"; + reg = <0 0x10017000 0 0x100>; + interrupts = ; clocks = <&system_clk>; clock-names = "clk13m"; }; From patchwork Wed Mar 29 08:54:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 13192142 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 960E3C74A5B for ; Wed, 29 Mar 2023 08:56:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231423AbjC2I43 (ORCPT ); Wed, 29 Mar 2023 04:56:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49752 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231350AbjC2Izv (ORCPT ); Wed, 29 Mar 2023 04:55:51 -0400 Received: from mail-wr1-x433.google.com (mail-wr1-x433.google.com [IPv6:2a00:1450:4864:20::433]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A44DC40E3 for ; Wed, 29 Mar 2023 01:55:15 -0700 (PDT) Received: by mail-wr1-x433.google.com with SMTP id q19so11776874wrc.5 for ; Wed, 29 Mar 2023 01:55:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; t=1680080112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=k+n7kTmZSLyy6JZOnafgLqENkBorz7cVoGb/c2ijGPg=; b=vZZKjgfgUkaAmm9eDa/n0yIPp/jvrZ8rqxyyVarmS9MeQTQuWX+9QtAws347nXlLsq 9hIswfhbaOqCvvgku69nubwSIS2vxcyy3NpfkWJAcG33bZLRAatBAyrLEy8u5n1P0kjF +TSopNQpv4t5BvVsIwJxFsHvTqaZhHGrt7q0fqKnfMHiWCpFM3frNvSDSddWylBvplRE xnm64vTf5/2nwhoboYtoz7sZ/o0wrtlty5pr6e3Zut4ZD1DqgKZUejA47I8IX3mTygjM QwC5E+Hk3i8USpOCzXSWDpilwCpimYsxnwl7FOoB1RYDbjKxZ13PfNVusfiGkBDfgNh0 EC+Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680080112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=k+n7kTmZSLyy6JZOnafgLqENkBorz7cVoGb/c2ijGPg=; b=pXX4aaiz7xAyqbbb7jV39pNIVf72I2GYL3MbGTUufAeik5ynuiznRcF8fw00MNDn2z eDte5zBSqvxd6RWVZwC7w05CO5LBYfcA+jYTZMH+6r8ztrcVCBFtfeDwCtBntQaPG85U R6g8s7T6ii//rKoVdx+cIvsQG8KbOgXH7HGz/djxy8cZe5H4YoxnX4lhRyK4o4g80umF yHVmUscImNeq4qmY00JFEKZo5g/bqeDOgi2c7YlTUuub2rT2zPnbrytWkazTh5SsHE0Z j7kfRLlK3la0y9M+K9qxNCNhUcNPwbGO9B4BZmC8SVYS8+70zi30a1ErlazNcZ14m/vE hAzg== X-Gm-Message-State: AAQBX9ffvdx5eh/W+fjbuN+6YGQM+APcxVbRxXMwTCsP/DjgxGg+EXqF BiGKRoRU1299ZIo00v6IpRm20A== X-Google-Smtp-Source: AKy350beAHR2vBXDYS1dhRBIKKbrEnZiLQ/0TwuX8udPaiMplnlJkeIrKmdL2bitTYxYcDqOr5pgGw== X-Received: by 2002:a05:6000:114f:b0:2ce:e571:5cc3 with SMTP id d15-20020a056000114f00b002cee5715cc3mr1068616wrx.28.1680080112211; Wed, 29 Mar 2023 01:55:12 -0700 (PDT) Received: from [127.0.1.1] (158.22.5.93.rev.sfr.net. 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(Multi-Core-Deep-Idle) - MCDI_CLUSTER. - DPIDLE. (Deep-Idle) Signed-off-by: Amjad Ouled-Ameur Signed-off-by: Alexandre Mergnat Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 35 ++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index 959d8533c24c..b5f5c77f7f84 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -112,6 +112,7 @@ cpu0: cpu@0 { reg = <0x0>; #cooling-cells = <2>; enable-method = "psci"; + cpu-idle-states = <&CPU_MCDI &CLUSTER_MCDI &CLUSTER_DPIDLE>; i-cache-size = <0x8000>; i-cache-line-size = <64>; i-cache-sets = <256>; @@ -131,6 +132,7 @@ cpu1: cpu@1 { reg = <0x1>; #cooling-cells = <2>; enable-method = "psci"; + cpu-idle-states = <&CPU_MCDI &CLUSTER_MCDI &CLUSTER_DPIDLE>; i-cache-size = <0x8000>; i-cache-line-size = <64>; i-cache-sets = <256>; @@ -150,6 +152,7 @@ cpu2: cpu@2 { reg = <0x2>; #cooling-cells = <2>; enable-method = "psci"; + cpu-idle-states = <&CPU_MCDI &CLUSTER_MCDI &CLUSTER_DPIDLE>; i-cache-size = <0x8000>; i-cache-line-size = <64>; i-cache-sets = <256>; @@ -169,6 +172,7 @@ cpu3: cpu@3 { reg = <0x3>; #cooling-cells = <2>; enable-method = "psci"; + cpu-idle-states = <&CPU_MCDI &CLUSTER_MCDI &CLUSTER_DPIDLE>; i-cache-size = <0x8000>; i-cache-line-size = <64>; i-cache-sets = <256>; @@ -182,6 +186,37 @@ cpu3: cpu@3 { operating-points-v2 = <&cluster0_opp>; }; + idle-states { + entry-method = "psci"; + + CPU_MCDI: cpu-mcdi { + compatible = "arm,idle-state"; + local-timer-stop; + arm,psci-suspend-param = <0x00010001>; + entry-latency-us = <300>; + exit-latency-us = <200>; + min-residency-us = <1000>; + }; + + CLUSTER_MCDI: cluster-mcdi { + compatible = "arm,idle-state"; + local-timer-stop; + arm,psci-suspend-param = <0x01010001>; + entry-latency-us = <350>; + exit-latency-us = <250>; + min-residency-us = <1200>; + }; + + CLUSTER_DPIDLE: cluster-dpidle { + compatible = "arm,idle-state"; + local-timer-stop; + arm,psci-suspend-param = <0x01010004>; + entry-latency-us = <300>; + exit-latency-us = <800>; + min-residency-us = <3300>; + }; + }; + l2: l2-cache { compatible = "cache"; cache-level = <2>;