From patchwork Fri Mar 31 21:58:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Halaney X-Patchwork-Id: 13196637 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26CA3C76196 for ; Fri, 31 Mar 2023 21:59:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231858AbjCaV7i (ORCPT ); Fri, 31 Mar 2023 17:59:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55746 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231837AbjCaV7f (ORCPT ); Fri, 31 Mar 2023 17:59:35 -0400 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 89A1024437 for ; Fri, 31 Mar 2023 14:58:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1680299905; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=rCiyg9dGBB6UNsno9U8qc2bm6rLIrDesgavseN/0KQA=; b=MphePYqVzunN0IIh48DSki9QkeoqZKkqnPnmpIWZOfG8oUcq9FTA3VE72z0Fw7JVk6HIJZ dC7+893N4ga9Omo+KlJtnFRM84R9hgAdJ7oH8sJoqO9CijUst0Mcl2WGkiOwfDNk+r4GbN UxMizQzfiAb5WxjKUzNqngrpi+2BgIo= Received: from mail-oo1-f71.google.com (mail-oo1-f71.google.com [209.85.161.71]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-508-od2AXx3-OKGVkGbzkAetjw-1; Fri, 31 Mar 2023 17:58:23 -0400 X-MC-Unique: od2AXx3-OKGVkGbzkAetjw-1 Received: by mail-oo1-f71.google.com with SMTP id x19-20020a4a4113000000b0053b4ee58e0fso6466001ooa.17 for ; Fri, 31 Mar 2023 14:58:23 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680299903; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rCiyg9dGBB6UNsno9U8qc2bm6rLIrDesgavseN/0KQA=; b=HCGGH59gPR61MIY5axqux7Yl7AB06MLSLYWQw9CFSG2ID7D88vYyY+f6QniEbV0Opo nrffMO8GpxCsjcgBxkjxaIvI07WdLpxdpO2bIA9+Fs00ssEs+oF6CifUZ7dk8B/aKcaO n++hSR6Tinc8xv16kj5T/PJOw3Uf20QrKGQGQkTcctCgWObEwpMhycYaoDC/JtqUp9jR dpf7MjtVadeLEI1aj/CQAiI6C1Iy1XywLOqnzmChEtAqGXv37fJsdLUzWQDx0uy4Es1x aThR5SiMeYACz8tK7hVOUa2+FZ5UxEuxUfrIOHJ+dQb2lFyOHwLh9bOXu6aaxlgElqpU ORLA== X-Gm-Message-State: AAQBX9dN9A73KHQFDX2CyTTc6bQzAYgYi0Fx5HA6Q33c7EWJMxQULmTz tXImZa148fkudom8AnSFGu8nZCDRvlumgHpk3b1QwLTZcVNawFfP/Imgbg5S2KO1pdlJpCCROdN ENw5Ka/DRoxjckbD/ETBX X-Received: by 2002:aca:2102:0:b0:389:7b6b:7a3d with SMTP id 2-20020aca2102000000b003897b6b7a3dmr3094790oiz.45.1680299903093; Fri, 31 Mar 2023 14:58:23 -0700 (PDT) X-Google-Smtp-Source: AKy350YHcYwEaPVb0PTs80nVmJ1lYDlQIT7UZ7m71p1JiRK2YwqEicxxTtQZwuTV/I6TW/X77Zlb9Q== X-Received: by 2002:aca:2102:0:b0:389:7b6b:7a3d with SMTP id 2-20020aca2102000000b003897b6b7a3dmr3094773oiz.45.1680299902865; Fri, 31 Mar 2023 14:58:22 -0700 (PDT) Received: from halaney-x13s.attlocal.net (104-53-165-62.lightspeed.stlsmo.sbcglobal.net. [104.53.165.62]) by smtp.gmail.com with ESMTPSA id g11-20020a4a894b000000b0053bb2ae3a78sm1299277ooi.24.2023.03.31.14.58.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Mar 2023 14:58:22 -0700 (PDT) From: Andrew Halaney To: linux-kernel@vger.kernel.org Cc: agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, richardcochran@gmail.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, netdev@vger.kernel.org, bmasney@redhat.com, echanude@redhat.com, ncai@quicinc.com, jsuraj@qti.qualcomm.com, hisunil@quicinc.com, Andrew Halaney Subject: [PATCH v3 1/3] clk: qcom: gcc-sc8280xp: Add EMAC GDSCs Date: Fri, 31 Mar 2023 16:58:02 -0500 Message-Id: <20230331215804.783439-2-ahalaney@redhat.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230331215804.783439-1-ahalaney@redhat.com> References: <20230331215804.783439-1-ahalaney@redhat.com> MIME-Version: 1.0 Content-type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add the EMAC GDSCs to allow the EMAC hardware to be enabled. Acked-by: Stephen Boyd Reviewed-by: Konrad Dybcio Signed-off-by: Andrew Halaney --- Changes since v2: * Add Konrad's Reviewed-by Changes since v1: * Add Stephen's Acked-by * Explicitly tested on x13s laptop with no noticeable side effect (Konrad) drivers/clk/qcom/gcc-sc8280xp.c | 18 ++++++++++++++++++ include/dt-bindings/clock/qcom,gcc-sc8280xp.h | 2 ++ 2 files changed, 20 insertions(+) diff --git a/drivers/clk/qcom/gcc-sc8280xp.c b/drivers/clk/qcom/gcc-sc8280xp.c index b3198784e1c3..04a99dbaa57e 100644 --- a/drivers/clk/qcom/gcc-sc8280xp.c +++ b/drivers/clk/qcom/gcc-sc8280xp.c @@ -6873,6 +6873,22 @@ static struct gdsc usb30_sec_gdsc = { .pwrsts = PWRSTS_RET_ON, }; +static struct gdsc emac_0_gdsc = { + .gdscr = 0xaa004, + .pd = { + .name = "emac_0_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, +}; + +static struct gdsc emac_1_gdsc = { + .gdscr = 0xba004, + .pd = { + .name = "emac_1_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, +}; + static struct clk_regmap *gcc_sc8280xp_clocks[] = { [GCC_AGGRE_NOC_PCIE0_TUNNEL_AXI_CLK] = &gcc_aggre_noc_pcie0_tunnel_axi_clk.clkr, [GCC_AGGRE_NOC_PCIE1_TUNNEL_AXI_CLK] = &gcc_aggre_noc_pcie1_tunnel_axi_clk.clkr, @@ -7351,6 +7367,8 @@ static struct gdsc *gcc_sc8280xp_gdscs[] = { [USB30_MP_GDSC] = &usb30_mp_gdsc, [USB30_PRIM_GDSC] = &usb30_prim_gdsc, [USB30_SEC_GDSC] = &usb30_sec_gdsc, + [EMAC_0_GDSC] = &emac_0_gdsc, + [EMAC_1_GDSC] = &emac_1_gdsc, }; static const struct clk_rcg_dfs_data gcc_dfs_clocks[] = { diff --git a/include/dt-bindings/clock/qcom,gcc-sc8280xp.h b/include/dt-bindings/clock/qcom,gcc-sc8280xp.h index cb2fb638825c..721105ea4fad 100644 --- a/include/dt-bindings/clock/qcom,gcc-sc8280xp.h +++ b/include/dt-bindings/clock/qcom,gcc-sc8280xp.h @@ -492,5 +492,7 @@ #define USB30_MP_GDSC 9 #define USB30_PRIM_GDSC 10 #define USB30_SEC_GDSC 11 +#define EMAC_0_GDSC 12 +#define EMAC_1_GDSC 13 #endif From patchwork Fri Mar 31 21:58:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Halaney X-Patchwork-Id: 13196638 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26C47C77B70 for ; Fri, 31 Mar 2023 22:00:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233353AbjCaWAB (ORCPT ); Fri, 31 Mar 2023 18:00:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56472 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233488AbjCaV7w (ORCPT ); Fri, 31 Mar 2023 17:59:52 -0400 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6379524430 for ; Fri, 31 Mar 2023 14:58:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1680299916; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=dtvlaUsuOBNnhs3AQ92aPIaKuLGL5kAklD70GeG4yxs=; b=DcZ3/+lYYesFJUhx+TWCSne3IFbmuLBY877XxV19YowqJQd2Ig4zrC61omCwmoYfK8jBI8 4am/p0oAk+/Kv4tocqnzVW9Y2qHs8oQDSWNP8oCEw+0gRSgj9Sb2Nj1qMRA9j60iK2FY+P Lx3ZXOn+C+5pkPmRuwhYnbl9R4wWiiQ= Received: from mail-oo1-f71.google.com (mail-oo1-f71.google.com [209.85.161.71]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-316-TTnWay7jO8eQAMfNUESRyg-1; Fri, 31 Mar 2023 17:58:27 -0400 X-MC-Unique: TTnWay7jO8eQAMfNUESRyg-1 Received: by mail-oo1-f71.google.com with SMTP id v44-20020a4a8c6f000000b00540f15070bfso710441ooj.4 for ; Fri, 31 Mar 2023 14:58:26 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680299906; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=dtvlaUsuOBNnhs3AQ92aPIaKuLGL5kAklD70GeG4yxs=; b=Cv11NdelREN6jJDMFF9wsffAbajsfHdWjEiNmz5Q0ye0ZxSsPFxvNG1IBdSXzMPkZw CI/eQi4EhVnnUUKpl2Nq6Zb1TyOScp4/YD02YPCE4OMVGfVJhmu0C3i72RAL8ix4QjlS tVj5jURGGeBWb0bZ4S482Ghf0snVpR/SVBgplDL/BqgoDuSUg+tKIicQhrTglt2IvzKT HOQ9Nm5RW1c1TEajEjVmlgCwEJEcCm/ky5crfrj40/4dNcdVtoQYfFWVMvu/JaBapegY K3w6UEqmqNWavH5jgTBSNUIjc8NO1JXfSLzAf6XJBPui6yALZh5XZP3FnnDEtkWsOof3 wkeA== X-Gm-Message-State: AO0yUKVdI8Wgam8KVMYEF06lLQ2uT1+eDBcLjiCghkWC0O9OYrJ6f9bZ I21ngJCN7WtUL2NrdDag8uR7p6IKlIeG6298xjEfK7nYxrtpRxIWLR2KXLC/3kFlBG0U9YTePaC lHyfPz3NVqD9EmHczIhMB X-Received: by 2002:a4a:5291:0:b0:520:331d:9514 with SMTP id d139-20020a4a5291000000b00520331d9514mr13579896oob.1.1680299906451; Fri, 31 Mar 2023 14:58:26 -0700 (PDT) X-Google-Smtp-Source: AK7set+TK42AynW8tKNUKi0xOljXNnE7dxT5w546BuQvwYGmXJyefwQ/4guiX20WF0fdgNHrp69cag== X-Received: by 2002:a4a:5291:0:b0:520:331d:9514 with SMTP id d139-20020a4a5291000000b00520331d9514mr13579889oob.1.1680299906227; Fri, 31 Mar 2023 14:58:26 -0700 (PDT) Received: from halaney-x13s.attlocal.net (104-53-165-62.lightspeed.stlsmo.sbcglobal.net. [104.53.165.62]) by smtp.gmail.com with ESMTPSA id g11-20020a4a894b000000b0053bb2ae3a78sm1299277ooi.24.2023.03.31.14.58.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Mar 2023 14:58:25 -0700 (PDT) From: Andrew Halaney To: linux-kernel@vger.kernel.org Cc: agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, richardcochran@gmail.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, netdev@vger.kernel.org, bmasney@redhat.com, echanude@redhat.com, ncai@quicinc.com, jsuraj@qti.qualcomm.com, hisunil@quicinc.com, Andrew Halaney Subject: [PATCH v3 2/3] arm64: dts: qcom: sc8280xp: Add ethernet nodes Date: Fri, 31 Mar 2023 16:58:03 -0500 Message-Id: <20230331215804.783439-3-ahalaney@redhat.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230331215804.783439-1-ahalaney@redhat.com> References: <20230331215804.783439-1-ahalaney@redhat.com> MIME-Version: 1.0 Content-type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org This platform has 2 MACs integrated in it, go ahead and describe them. Signed-off-by: Andrew Halaney Reviewed-by: Konrad Dybcio --- Changes since v2: * Fix spacing (Konrad) Changes since v1: * None arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 59 ++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 42bfa9fa5b96..f28ea86b128d 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -761,6 +761,65 @@ soc: soc@0 { ranges = <0 0 0 0 0x10 0>; dma-ranges = <0 0 0 0 0x10 0>; + ethernet0: ethernet@20000 { + compatible = "qcom,sc8280xp-ethqos"; + reg = <0x0 0x00020000 0x0 0x10000>, + <0x0 0x00036000 0x0 0x100>; + reg-names = "stmmaceth", "rgmii"; + + clocks = <&gcc GCC_EMAC0_AXI_CLK>, + <&gcc GCC_EMAC0_SLV_AHB_CLK>, + <&gcc GCC_EMAC0_PTP_CLK>, + <&gcc GCC_EMAC0_RGMII_CLK>; + clock-names = "stmmaceth", + "pclk", + "ptp_ref", + "rgmii"; + + interrupts = , + ; + interrupt-names = "macirq", "eth_lpi"; + iommus = <&apps_smmu 0x4c0 0xf>; + power-domains = <&gcc EMAC_0_GDSC>; + + snps,tso; + snps,pbl = <32>; + rx-fifo-depth = <4096>; + tx-fifo-depth = <4096>; + + status = "disabled"; + }; + + ethernet1: ethernet@23000000 { + compatible = "qcom,sc8280xp-ethqos"; + reg = <0x0 0x23000000 0x0 0x10000>, + <0x0 0x23016000 0x0 0x100>; + reg-names = "stmmaceth", "rgmii"; + + clocks = <&gcc GCC_EMAC1_AXI_CLK>, + <&gcc GCC_EMAC1_SLV_AHB_CLK>, + <&gcc GCC_EMAC1_PTP_CLK>, + <&gcc GCC_EMAC1_RGMII_CLK>; + clock-names = "stmmaceth", + "pclk", + "ptp_ref", + "rgmii"; + + interrupts = , + ; + interrupt-names = "macirq", "eth_lpi"; + + iommus = <&apps_smmu 0x40 0xf>; + power-domains = <&gcc EMAC_1_GDSC>; + + snps,tso; + snps,pbl = <32>; + rx-fifo-depth = <4096>; + tx-fifo-depth = <4096>; + + status = "disabled"; + }; + gcc: clock-controller@100000 { compatible = "qcom,gcc-sc8280xp"; reg = <0x0 0x00100000 0x0 0x1f0000>; From patchwork Fri Mar 31 21:58:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Halaney X-Patchwork-Id: 13196639 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0F1D0C77B60 for ; Fri, 31 Mar 2023 22:00:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233423AbjCaWAE (ORCPT ); Fri, 31 Mar 2023 18:00:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56302 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233484AbjCaV7w (ORCPT ); Fri, 31 Mar 2023 17:59:52 -0400 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A4A2524419 for ; Fri, 31 Mar 2023 14:58:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1680299911; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=q+CnpU0/48fSQtYvxmbymRW1jKLUmorpaHw1MMzDa7k=; b=SpZtZuB6FZVZ08UDuVUZOKaKa4U5Sg6I36449QYbNKQRbcMJJ4Sys8HTqDYmLmzJgwZPZE /V7X0CO46FQaj8vlmoQhMDHAHYlo9PdQNLng5oHVQ9OqBe151wKkLsU8hpMrTlP8bquiuf 3MjFqet83uXLJuGRD79FpT0KzBleUVg= Received: from mail-oo1-f72.google.com (mail-oo1-f72.google.com [209.85.161.72]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-417-niISJgWqMSCCiuu1mKdkAQ-1; Fri, 31 Mar 2023 17:58:29 -0400 X-MC-Unique: niISJgWqMSCCiuu1mKdkAQ-1 Received: by mail-oo1-f72.google.com with SMTP id w6-20020a4aa986000000b0053bb0591efaso6577484oom.21 for ; Fri, 31 Mar 2023 14:58:29 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680299909; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=q+CnpU0/48fSQtYvxmbymRW1jKLUmorpaHw1MMzDa7k=; b=u0NSmc6l+7sUPX75VUbFLTIyOAx0GHRiWxGGnkAhGZuA58JbmClPoawOaRaC4pMHga /VAVfZJpu/wmMJuBWxVVx+pQO7INqt6VSfSl5BIgqVvhRJ9Qd0vLk9tHfjGinoGr+ebN cTZToKNF3wJINfPXz2JQdwye8GQx8zVrIhhcvro15odW2i9KDddzWkq4XL6zw3NyQ7ct HdzknSe7w/DpzmXuA2Egsb9rsEBE4UjklMVWZ6p24F4cjT7ci2rJepBhniGum+hxEXmS SNEbb12GhKsyiISvn/uR2ViFH62NxhIcweCfpYMgXaiKJabjk6vUOXLRUKAX1sJ1s/UG 7XJg== X-Gm-Message-State: AO0yUKUzM+Ya6c0mcFR8JS/z6lTw3f85cYSzjsoTu9LYQlCZujHeByBJ 7bD0G+O4nyxp2b3DRysBaXK4JvuR4biFxKXQIHVD5GLyZnGuKi17GittsOY7pQqgbaIguA0+pvi 5+FNB2s3bzsyhmzMd0jav X-Received: by 2002:a05:6808:8e5:b0:378:9c51:3ea2 with SMTP id d5-20020a05680808e500b003789c513ea2mr12195554oic.36.1680299909050; Fri, 31 Mar 2023 14:58:29 -0700 (PDT) X-Google-Smtp-Source: AK7set/tNJN7xl/+0xgmcgEKcIKPSAd2qaVAouJocdF0W82AdKRS+C+55nmCFb1ZijmhWP1e4rqAqA== X-Received: by 2002:a05:6808:8e5:b0:378:9c51:3ea2 with SMTP id d5-20020a05680808e500b003789c513ea2mr12195551oic.36.1680299908769; Fri, 31 Mar 2023 14:58:28 -0700 (PDT) Received: from halaney-x13s.attlocal.net (104-53-165-62.lightspeed.stlsmo.sbcglobal.net. [104.53.165.62]) by smtp.gmail.com with ESMTPSA id g11-20020a4a894b000000b0053bb2ae3a78sm1299277ooi.24.2023.03.31.14.58.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Mar 2023 14:58:28 -0700 (PDT) From: Andrew Halaney To: linux-kernel@vger.kernel.org Cc: agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, richardcochran@gmail.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, netdev@vger.kernel.org, bmasney@redhat.com, echanude@redhat.com, ncai@quicinc.com, jsuraj@qti.qualcomm.com, hisunil@quicinc.com, Andrew Halaney Subject: [PATCH v3 3/3] arm64: dts: qcom: sa8540p-ride: Add ethernet nodes Date: Fri, 31 Mar 2023 16:58:04 -0500 Message-Id: <20230331215804.783439-4-ahalaney@redhat.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230331215804.783439-1-ahalaney@redhat.com> References: <20230331215804.783439-1-ahalaney@redhat.com> MIME-Version: 1.0 Content-type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Enable both the MACs found on the board. ethernet0 and ethernet1 both ultimately go to a series of on board switches which aren't managed by this processor. ethernet0 is connected to a Marvell 88EA1512 phy via RGMII. That goes to the series of switches via SGMII on the "media" side of the phy. RGMII_SGMII mode is enabled via devicetree register descriptions. The switch on the "media" side has auto-negotiation disabled, so configuration from userspace similar to: ethtool -s eth0 autoneg off speed 1000 duplex full is necessary to get traffic flowing on that interface. ethernet1 is in a mac2mac/fixed-link configuration going to the same series of switches directly via RGMII. Signed-off-by: Andrew Halaney --- Changes since v1 and v2: * None arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 181 ++++++++++++++++++++++ 1 file changed, 181 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts index 40db5aa0803c..eb230265aa45 100644 --- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts @@ -28,6 +28,65 @@ aliases { chosen { stdout-path = "serial0:115200n8"; }; + + mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use = <1>; + snps,rx-sched-sp; + + queue0 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x0>; + snps,route-up; + snps,priority = <0x1>; + }; + + queue1 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x1>; + snps,route-ptp; + }; + + queue2 { + snps,avb-algorithm; + snps,map-to-dma-channel = <0x2>; + snps,route-avcp; + }; + + queue3 { + snps,avb-algorithm; + snps,map-to-dma-channel = <0x3>; + snps,priority = <0xc>; + }; + }; + + mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use = <1>; + snps,tx-sched-sp; + + queue0 { + snps,dcb-algorithm; + }; + + queue1 { + snps,dcb-algorithm; + }; + + queue2 { + snps,avb-algorithm; + snps,send_slope = <0x1000>; + snps,idle_slope = <0x1000>; + snps,high_credit = <0x3e800>; + snps,low_credit = <0xffc18000>; + }; + + queue3 { + snps,avb-algorithm; + snps,send_slope = <0x1000>; + snps,idle_slope = <0x1000>; + snps,high_credit = <0x3e800>; + snps,low_credit = <0xffc18000>; + }; + }; }; &apps_rsc { @@ -151,6 +210,68 @@ vreg_l8g: ldo8 { }; }; +ðernet0 { + snps,mtl-rx-config = <&mtl_rx_setup>; + snps,mtl-tx-config = <&mtl_tx_setup>; + + max-speed = <1000>; + phy-handle = <&rgmii_phy>; + phy-mode = "rgmii-txid"; + + pinctrl-names = "default"; + pinctrl-0 = <ðernet0_default>; + + status = "okay"; + + mdio { + #address-cells = <0x1>; + #size-cells = <0x0>; + + compatible = "snps,dwmac-mdio"; + + /* Marvell 88EA1512 */ + rgmii_phy: phy@8 { + reg = <0x8>; + + interrupt-parent = <&tlmm>; + interrupts-extended = <&tlmm 127 IRQ_TYPE_EDGE_FALLING>; + + reset-gpios = <&pmm8540c_gpios 1 GPIO_ACTIVE_LOW>; + reset-assert-us = <11000>; + reset-deassert-us = <70000>; + + device_type = "ethernet-phy"; + + /* Set to RGMII_SGMII mode and soft reset. Turn off auto-negotiation + * from userspace to talk to the switch on the SGMII side of things + */ + marvell,reg-init = + /* Set MODE[2:0] to RGMII_SGMII */ + <0x12 0x14 0xfff8 0x4>, + /* Soft reset required after changing MODE[2:0] */ + <0x12 0x14 0x7fff 0x8000>; + }; + }; +}; + +ðernet1 { + snps,mtl-rx-config = <&mtl_rx_setup>; + snps,mtl-tx-config = <&mtl_tx_setup>; + + max-speed = <1000>; + phy-mode = "rgmii-txid"; + + pinctrl-names = "default"; + pinctrl-0 = <ðernet1_default>; + + status = "okay"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_default>; @@ -316,6 +437,66 @@ &xo_board_clk { /* PINCTRL */ &tlmm { + ethernet0_default: ethernet0-default-state { + mdc-pins { + pins = "gpio175"; + function = "rgmii_0"; + drive-strength = <16>; + bias-pull-up; + }; + + mdio-pins { + pins = "gpio176"; + function = "rgmii_0"; + drive-strength = <16>; + bias-pull-up; + }; + + rgmii-tx-pins { + pins = "gpio183", "gpio184", "gpio185", "gpio186", "gpio187", "gpio188"; + function = "rgmii_0"; + drive-strength = <16>; + bias-pull-up; + }; + + rgmii-rx-pins { + pins = "gpio177", "gpio178", "gpio179", "gpio180", "gpio181", "gpio182"; + function = "rgmii_0"; + drive-strength = <16>; + bias-disable; + }; + }; + + ethernet1_default: ethernet1-default-state { + mdc-pins { + pins = "gpio97"; + function = "rgmii_1"; + drive-strength = <16>; + bias-pull-up; + }; + + mdio-pins { + pins = "gpio98"; + function = "rgmii_1"; + drive-strength = <16>; + bias-pull-up; + }; + + rgmii-tx-pins { + pins = "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110"; + function = "rgmii_1"; + drive-strength = <16>; + bias-pull-up; + }; + + rgmii-rx-pins { + pins = "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104"; + function = "rgmii_1"; + drive-strength = <16>; + bias-disable; + }; + }; + i2c0_default: i2c0-default-state { /* To USB7002T-I/KDXVA0 USB hub (SIP1 only) */ pins = "gpio135", "gpio136";