From patchwork Tue Apr 11 20:20:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Halaney X-Patchwork-Id: 13208237 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 761B2C76196 for ; Tue, 11 Apr 2023 20:21:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229879AbjDKUVb (ORCPT ); Tue, 11 Apr 2023 16:21:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35434 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229805AbjDKUVZ (ORCPT ); Tue, 11 Apr 2023 16:21:25 -0400 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ED9801BF6 for ; Tue, 11 Apr 2023 13:20:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1681244432; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=bAO/yBZf8skBWnF2ClvjjOWitw4YoPtRAkhOVp1lGw0=; b=Q4bedb/7a3LKsSrTPyCUIyvfq7wsdMwWQf23ghFl/SlMImJzgTptuNDPusVpzg5tqTq1ri aGa4Wec58ru49yi6eL4xbGhy+hYbl8w3SApu72eK352m4FHeuuuhKUGnBT/lvCK0kS7Xm/ Lpg/upRgy4otii0Z7IcpZNGyDknmFcQ= Received: from mail-oa1-f69.google.com (mail-oa1-f69.google.com [209.85.160.69]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-394-qUgJaYeyNvGIy8Pxf1sLXA-1; Tue, 11 Apr 2023 16:20:30 -0400 X-MC-Unique: qUgJaYeyNvGIy8Pxf1sLXA-1 Received: by mail-oa1-f69.google.com with SMTP id 586e51a60fabf-185df6e76cbso1349fac.2 for ; Tue, 11 Apr 2023 13:20:30 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1681244429; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bAO/yBZf8skBWnF2ClvjjOWitw4YoPtRAkhOVp1lGw0=; b=bgT/NUNROhwnXM852JY3bGzvAHieLRuN3CJYS6zKGDh7go/UcHNNMUp0Akq//JnFij WRpdeNHfTMU00ivVLSzaJELPBaPZPRug6yEULx04/uPbCcR8e/336fpjyxLIfDhHrtj3 +P6tqPQUDqaMrlDNxt0HUpH4wlHgITgmhE+q+Zqt4MEMdUdTU6VTZP8/UyK5FNTaCNQK Ohe4JSEtrD8O+AYNIudIDyv0oo9doNG22s69d+JbbJEvEEoQ5y2E8Cz6B90dQ0MMpjZD 2Dtz19Kqy2oJbUEJPkDBu7uiPkcD3haMrvhPWdh0UQq6Fqef6gLb+uV6A3R8dODEecV/ qBMw== X-Gm-Message-State: AAQBX9eqGEpNZw9d5XCz2BJCZ87qj95HoUfAkZ2r0uRbKa4tfqvAJugE ru0IozXOCxEi7jyYmhOBdoQA7z0CjvHd6uF+B+WEtbTwoUA8vwOcN/hH+ehIGbKgd60m3IMYL8j sI4pA5xYwLMoPv+bxu+9C X-Received: by 2002:a05:6808:4049:b0:389:545c:a95f with SMTP id cz9-20020a056808404900b00389545ca95fmr6886866oib.42.1681244429491; Tue, 11 Apr 2023 13:20:29 -0700 (PDT) X-Google-Smtp-Source: AKy350YPR2LQHlTHzQQP2ZpyFnVktCdGOPlwiTBCMdxQEi+/a+dGbDPEWLWzMrMEgK9DEToYfgi+wg== X-Received: by 2002:a05:6808:4049:b0:389:545c:a95f with SMTP id cz9-20020a056808404900b00389545ca95fmr6886857oib.42.1681244429281; Tue, 11 Apr 2023 13:20:29 -0700 (PDT) Received: from halaney-x13s.attlocal.net (104-53-165-62.lightspeed.stlsmo.sbcglobal.net. [104.53.165.62]) by smtp.gmail.com with ESMTPSA id a6-20020a056808120600b003874631e249sm5976710oil.36.2023.04.11.13.20.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Apr 2023 13:20:28 -0700 (PDT) From: Andrew Halaney To: linux-kernel@vger.kernel.org Cc: agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, richardcochran@gmail.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, netdev@vger.kernel.org, bmasney@redhat.com, echanude@redhat.com, ncai@quicinc.com, jsuraj@qti.qualcomm.com, hisunil@quicinc.com, Andrew Halaney Subject: [PATCH v4 1/3] clk: qcom: gcc-sc8280xp: Add EMAC GDSCs Date: Tue, 11 Apr 2023 15:20:07 -0500 Message-Id: <20230411202009.460650-2-ahalaney@redhat.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230411202009.460650-1-ahalaney@redhat.com> References: <20230411202009.460650-1-ahalaney@redhat.com> MIME-Version: 1.0 Content-type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add the EMAC GDSCs to allow the EMAC hardware to be enabled. Acked-by: Stephen Boyd Reviewed-by: Konrad Dybcio Signed-off-by: Andrew Halaney --- Changes since v3: * None Changes since v2: * Add Konrad's Reviewed-by Changes since v1: * Add Stephen's Acked-by * Explicitly tested on x13s laptop with no noticeable side effect (Konrad) drivers/clk/qcom/gcc-sc8280xp.c | 18 ++++++++++++++++++ include/dt-bindings/clock/qcom,gcc-sc8280xp.h | 2 ++ 2 files changed, 20 insertions(+) diff --git a/drivers/clk/qcom/gcc-sc8280xp.c b/drivers/clk/qcom/gcc-sc8280xp.c index b3198784e1c3..04a99dbaa57e 100644 --- a/drivers/clk/qcom/gcc-sc8280xp.c +++ b/drivers/clk/qcom/gcc-sc8280xp.c @@ -6873,6 +6873,22 @@ static struct gdsc usb30_sec_gdsc = { .pwrsts = PWRSTS_RET_ON, }; +static struct gdsc emac_0_gdsc = { + .gdscr = 0xaa004, + .pd = { + .name = "emac_0_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, +}; + +static struct gdsc emac_1_gdsc = { + .gdscr = 0xba004, + .pd = { + .name = "emac_1_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, +}; + static struct clk_regmap *gcc_sc8280xp_clocks[] = { [GCC_AGGRE_NOC_PCIE0_TUNNEL_AXI_CLK] = &gcc_aggre_noc_pcie0_tunnel_axi_clk.clkr, [GCC_AGGRE_NOC_PCIE1_TUNNEL_AXI_CLK] = &gcc_aggre_noc_pcie1_tunnel_axi_clk.clkr, @@ -7351,6 +7367,8 @@ static struct gdsc *gcc_sc8280xp_gdscs[] = { [USB30_MP_GDSC] = &usb30_mp_gdsc, [USB30_PRIM_GDSC] = &usb30_prim_gdsc, [USB30_SEC_GDSC] = &usb30_sec_gdsc, + [EMAC_0_GDSC] = &emac_0_gdsc, + [EMAC_1_GDSC] = &emac_1_gdsc, }; static const struct clk_rcg_dfs_data gcc_dfs_clocks[] = { diff --git a/include/dt-bindings/clock/qcom,gcc-sc8280xp.h b/include/dt-bindings/clock/qcom,gcc-sc8280xp.h index cb2fb638825c..721105ea4fad 100644 --- a/include/dt-bindings/clock/qcom,gcc-sc8280xp.h +++ b/include/dt-bindings/clock/qcom,gcc-sc8280xp.h @@ -492,5 +492,7 @@ #define USB30_MP_GDSC 9 #define USB30_PRIM_GDSC 10 #define USB30_SEC_GDSC 11 +#define EMAC_0_GDSC 12 +#define EMAC_1_GDSC 13 #endif From patchwork Tue Apr 11 20:20:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Halaney X-Patchwork-Id: 13208236 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DBB11C7619A for ; Tue, 11 Apr 2023 20:21:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229866AbjDKUVa (ORCPT ); Tue, 11 Apr 2023 16:21:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35498 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229708AbjDKUVZ (ORCPT ); Tue, 11 Apr 2023 16:21:25 -0400 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 010AD2697 for ; Tue, 11 Apr 2023 13:20:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1681244436; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=duEXMDyF/EtgpxnHO/bBxdC6yz9S9tmp+T6Qy1WmeS4=; b=TFf6n/vQaaGCKGMUhgleuC28LLIwho1QNG4x3bnC8V8z+IHBqcPOEfqUUNGiCHlVQOY/li itaCgd/GXGdSvbqOlaD+lVZM8IW0/+rFB7anGk3Or+rr/c5BGAMP6aWlm+w78zUwwWtLmw GpJhdYVDwSk2vrCWMMO/lL7lJrNiY0g= Received: from mail-oi1-f197.google.com (mail-oi1-f197.google.com [209.85.167.197]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-160-b4A92WmzO_OIQ9HSyAkKqA-1; Tue, 11 Apr 2023 16:20:35 -0400 X-MC-Unique: b4A92WmzO_OIQ9HSyAkKqA-1 Received: by mail-oi1-f197.google.com with SMTP id cz12-20020a056808404c00b0038bea079888so370549oib.13 for ; Tue, 11 Apr 2023 13:20:35 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1681244434; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=duEXMDyF/EtgpxnHO/bBxdC6yz9S9tmp+T6Qy1WmeS4=; b=g2Dd/fmvu6Lxxh9ydavj+Fsdw8UF7FYEtHoNfcMk6Favnpi8nzJNiZo1l29POuhySJ AHf7sxuR6DBtWPVKn+T8wLHqwfae3QR/ZUSU38YYTO0pOSNVLnGTVnn2SvOzkR+Drbds Cs+7mk2Kr3Gzv3mj4IDqFos0H/yvm092Voy2Y0TcA/y38aDaHbxm9kDdysP7/gMUd4vx XLqzh7Q/1aIniqkBpZDtIdJvAzUFXdU1Ojq7LQ29eDpmRzUf6G2EzoQknR0cwC6peqc0 /usPlnckxSVl6xdfkLH+0uk/uAMeXgsKKo2zNWn9HjCV117rC0IpKkb0nR105OC1zDiR 5WwA== X-Gm-Message-State: AAQBX9dfe2QBOxYgqhca5hWY4VIU8mIqOqUoPtS893iSoDAqsat9rHIC nYTjc8Ewg0lSRFMrtuhmebihWaihvRrd2xg0srwuCVJfTRkZxJxKj//ecuhXsjXhQT0Kdb92yTo MG/elwoix6ZtS70yI+7Ck1TapWYxt X-Received: by 2002:aca:6747:0:b0:389:9288:10d2 with SMTP id b7-20020aca6747000000b00389928810d2mr76529oiy.16.1681244434167; Tue, 11 Apr 2023 13:20:34 -0700 (PDT) X-Google-Smtp-Source: AKy350Zc96doUcjOMfzOi3ZogSaGPPBtELzM3DJb9RQUve+/jbfBfj22kPzUHaF6DBtl7f0+EtBgZA== X-Received: by 2002:aca:6747:0:b0:389:9288:10d2 with SMTP id b7-20020aca6747000000b00389928810d2mr76514oiy.16.1681244433884; Tue, 11 Apr 2023 13:20:33 -0700 (PDT) Received: from halaney-x13s.attlocal.net (104-53-165-62.lightspeed.stlsmo.sbcglobal.net. [104.53.165.62]) by smtp.gmail.com with ESMTPSA id a6-20020a056808120600b003874631e249sm5976710oil.36.2023.04.11.13.20.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Apr 2023 13:20:33 -0700 (PDT) From: Andrew Halaney To: linux-kernel@vger.kernel.org Cc: agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, richardcochran@gmail.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, netdev@vger.kernel.org, bmasney@redhat.com, echanude@redhat.com, ncai@quicinc.com, jsuraj@qti.qualcomm.com, hisunil@quicinc.com, Andrew Halaney Subject: [PATCH v4 2/3] arm64: dts: qcom: sc8280xp: Add ethernet nodes Date: Tue, 11 Apr 2023 15:20:08 -0500 Message-Id: <20230411202009.460650-3-ahalaney@redhat.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230411202009.460650-1-ahalaney@redhat.com> References: <20230411202009.460650-1-ahalaney@redhat.com> MIME-Version: 1.0 Content-type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org This platform has 2 MACs integrated in it, go ahead and describe them. Reviewed-by: Konrad Dybcio Signed-off-by: Andrew Halaney --- Changes since v3: * Order soc node via unit address (Konrad) * Add Reviewed-by (Konrad) Changes since v2: * Fix spacing (Konrad) Changes since v1: * None arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 59 ++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 42bfa9fa5b96..fdac7f0b05ee 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -761,6 +761,35 @@ soc: soc@0 { ranges = <0 0 0 0 0x10 0>; dma-ranges = <0 0 0 0 0x10 0>; + ethernet0: ethernet@20000 { + compatible = "qcom,sc8280xp-ethqos"; + reg = <0x0 0x00020000 0x0 0x10000>, + <0x0 0x00036000 0x0 0x100>; + reg-names = "stmmaceth", "rgmii"; + + clocks = <&gcc GCC_EMAC0_AXI_CLK>, + <&gcc GCC_EMAC0_SLV_AHB_CLK>, + <&gcc GCC_EMAC0_PTP_CLK>, + <&gcc GCC_EMAC0_RGMII_CLK>; + clock-names = "stmmaceth", + "pclk", + "ptp_ref", + "rgmii"; + + interrupts = , + ; + interrupt-names = "macirq", "eth_lpi"; + iommus = <&apps_smmu 0x4c0 0xf>; + power-domains = <&gcc EMAC_0_GDSC>; + + snps,tso; + snps,pbl = <32>; + rx-fifo-depth = <4096>; + tx-fifo-depth = <4096>; + + status = "disabled"; + }; + gcc: clock-controller@100000 { compatible = "qcom,gcc-sc8280xp"; reg = <0x0 0x00100000 0x0 0x1f0000>; @@ -4681,6 +4710,36 @@ dispcc1: clock-controller@22100000 { status = "disabled"; }; + + ethernet1: ethernet@23000000 { + compatible = "qcom,sc8280xp-ethqos"; + reg = <0x0 0x23000000 0x0 0x10000>, + <0x0 0x23016000 0x0 0x100>; + reg-names = "stmmaceth", "rgmii"; + + clocks = <&gcc GCC_EMAC1_AXI_CLK>, + <&gcc GCC_EMAC1_SLV_AHB_CLK>, + <&gcc GCC_EMAC1_PTP_CLK>, + <&gcc GCC_EMAC1_RGMII_CLK>; + clock-names = "stmmaceth", + "pclk", + "ptp_ref", + "rgmii"; + + interrupts = , + ; + interrupt-names = "macirq", "eth_lpi"; + + iommus = <&apps_smmu 0x40 0xf>; + power-domains = <&gcc EMAC_1_GDSC>; + + snps,tso; + snps,pbl = <32>; + rx-fifo-depth = <4096>; + tx-fifo-depth = <4096>; + + status = "disabled"; + }; }; sound: sound { From patchwork Tue Apr 11 20:20:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Halaney X-Patchwork-Id: 13208238 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0C708C76196 for ; Tue, 11 Apr 2023 20:22:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229685AbjDKUWG (ORCPT ); Tue, 11 Apr 2023 16:22:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35562 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229536AbjDKUWF (ORCPT ); Tue, 11 Apr 2023 16:22:05 -0400 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 89254173C for ; Tue, 11 Apr 2023 13:20:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1681244439; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=9CbNbfXQG0WclGD5BV599nJw4B75FNHTW0PN9HLKZOY=; b=LdGRXmADwJs8ej7Jo16HkQxcwVvZt7N5Qbnt3D2pItG+J6zj9xXzJi9twUEzigods86Wqc 9FjM+ye63jNAgCn62vj66rKe1qgQyd2fFvgPIRyXId/s2LNVMuIONniTXcnVex6HOHlPdR fntohVD7oOHFA0AMs0Xd9M2VpoZOy0Y= Received: from mail-oo1-f69.google.com (mail-oo1-f69.google.com [209.85.161.69]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-612-LJhGeLszO1GtQL_6VHHMhA-1; Tue, 11 Apr 2023 16:20:38 -0400 X-MC-Unique: LJhGeLszO1GtQL_6VHHMhA-1 Received: by mail-oo1-f69.google.com with SMTP id a43-20020a4a98ae000000b00525456d55f7so3067281ooj.14 for ; Tue, 11 Apr 2023 13:20:38 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1681244437; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9CbNbfXQG0WclGD5BV599nJw4B75FNHTW0PN9HLKZOY=; b=7tHkRuMrOeOSBzZ8Ac/QEl4z9T8WJdL29bx6L6doXDpzwbnHzgIwH5TvdtjJnlIVUj A2TKtRhqSWc18prVcYxm4dKBItMe0kgFLVIwS/Y6zyhyP0KyLPiKilPkHDq4SLOXEvFN QgP3Q54DJVtyR8+oeBHDRLPcZbn57a8C5fJ9hSM8nxICAf1p+qAbIIit0qpBoOjvIlQ5 HWxbj8tB3QMdpZskt6IO8Fl7BwI3VIijI3QzhU3KWR4182whGOwd3DyOUMm5gls5NIjH QkBCyEhgY7LfJaJ6kPLwE1+K6A2FLVG6Eungdy5O5j4d3kTp+FrtnPZhmS1/KFv4It/H R1FQ== X-Gm-Message-State: AAQBX9f4ExXwJVLoP0OjdJ2ITIvcHULnKPbh5l0eZYe/PzqPVSUh2Sg9 EPhM9+frfq3ULGHyzQiYCpv1zXDlc3rh63X0Rs4nNl5c+mnQuMk34S5aun/rkHLlg/1DNWMu/PY SjzwPf4clBZ2QFCO3FOos X-Received: by 2002:a05:6808:128e:b0:386:9886:534d with SMTP id a14-20020a056808128e00b003869886534dmr5040842oiw.12.1681244437498; Tue, 11 Apr 2023 13:20:37 -0700 (PDT) X-Google-Smtp-Source: AKy350YXFMxrpFFGf7DO58T+7bmiaMO7le6Kc1zq448JrPjYDEvWHVjS9TtQOdK+m0R8jI6mN8Cf/g== X-Received: by 2002:a05:6808:128e:b0:386:9886:534d with SMTP id a14-20020a056808128e00b003869886534dmr5040828oiw.12.1681244437189; Tue, 11 Apr 2023 13:20:37 -0700 (PDT) Received: from halaney-x13s.attlocal.net (104-53-165-62.lightspeed.stlsmo.sbcglobal.net. [104.53.165.62]) by smtp.gmail.com with ESMTPSA id a6-20020a056808120600b003874631e249sm5976710oil.36.2023.04.11.13.20.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Apr 2023 13:20:36 -0700 (PDT) From: Andrew Halaney To: linux-kernel@vger.kernel.org Cc: agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, richardcochran@gmail.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, netdev@vger.kernel.org, bmasney@redhat.com, echanude@redhat.com, ncai@quicinc.com, jsuraj@qti.qualcomm.com, hisunil@quicinc.com, Andrew Halaney Subject: [PATCH v4 3/3] arm64: dts: qcom: sa8540p-ride: Add ethernet nodes Date: Tue, 11 Apr 2023 15:20:09 -0500 Message-Id: <20230411202009.460650-4-ahalaney@redhat.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230411202009.460650-1-ahalaney@redhat.com> References: <20230411202009.460650-1-ahalaney@redhat.com> MIME-Version: 1.0 Content-type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Enable both the MACs found on the board. ethernet0 and ethernet1 both ultimately go to a series of on board switches which aren't managed by this processor. ethernet0 is connected to a Marvell 88EA1512 phy via RGMII. That goes to the series of switches via SGMII on the "media" side of the phy. RGMII_SGMII mode is enabled via devicetree register descriptions. The switch on the "media" side has auto-negotiation disabled, so configuration from userspace similar to: ethtool -s eth0 autoneg off speed 1000 duplex full is necessary to get traffic flowing on that interface. ethernet1 is in a mac2mac/fixed-link configuration going to the same series of switches directly via RGMII. Signed-off-by: Andrew Halaney --- Changes since v3: * Compatible goes first in node (Krzysztof) Changes since v1 and v2: * None arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 180 ++++++++++++++++++++++ 1 file changed, 180 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts index 40db5aa0803c..caad955969bc 100644 --- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts @@ -28,6 +28,65 @@ aliases { chosen { stdout-path = "serial0:115200n8"; }; + + mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use = <1>; + snps,rx-sched-sp; + + queue0 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x0>; + snps,route-up; + snps,priority = <0x1>; + }; + + queue1 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x1>; + snps,route-ptp; + }; + + queue2 { + snps,avb-algorithm; + snps,map-to-dma-channel = <0x2>; + snps,route-avcp; + }; + + queue3 { + snps,avb-algorithm; + snps,map-to-dma-channel = <0x3>; + snps,priority = <0xc>; + }; + }; + + mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use = <1>; + snps,tx-sched-sp; + + queue0 { + snps,dcb-algorithm; + }; + + queue1 { + snps,dcb-algorithm; + }; + + queue2 { + snps,avb-algorithm; + snps,send_slope = <0x1000>; + snps,idle_slope = <0x1000>; + snps,high_credit = <0x3e800>; + snps,low_credit = <0xffc18000>; + }; + + queue3 { + snps,avb-algorithm; + snps,send_slope = <0x1000>; + snps,idle_slope = <0x1000>; + snps,high_credit = <0x3e800>; + snps,low_credit = <0xffc18000>; + }; + }; }; &apps_rsc { @@ -151,6 +210,67 @@ vreg_l8g: ldo8 { }; }; +ðernet0 { + snps,mtl-rx-config = <&mtl_rx_setup>; + snps,mtl-tx-config = <&mtl_tx_setup>; + + max-speed = <1000>; + phy-handle = <&rgmii_phy>; + phy-mode = "rgmii-txid"; + + pinctrl-names = "default"; + pinctrl-0 = <ðernet0_default>; + + status = "okay"; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <0x1>; + #size-cells = <0x0>; + + /* Marvell 88EA1512 */ + rgmii_phy: phy@8 { + reg = <0x8>; + + interrupt-parent = <&tlmm>; + interrupts-extended = <&tlmm 127 IRQ_TYPE_EDGE_FALLING>; + + reset-gpios = <&pmm8540c_gpios 1 GPIO_ACTIVE_LOW>; + reset-assert-us = <11000>; + reset-deassert-us = <70000>; + + device_type = "ethernet-phy"; + + /* Set to RGMII_SGMII mode and soft reset. Turn off auto-negotiation + * from userspace to talk to the switch on the SGMII side of things + */ + marvell,reg-init = + /* Set MODE[2:0] to RGMII_SGMII */ + <0x12 0x14 0xfff8 0x4>, + /* Soft reset required after changing MODE[2:0] */ + <0x12 0x14 0x7fff 0x8000>; + }; + }; +}; + +ðernet1 { + snps,mtl-rx-config = <&mtl_rx_setup>; + snps,mtl-tx-config = <&mtl_tx_setup>; + + max-speed = <1000>; + phy-mode = "rgmii-txid"; + + pinctrl-names = "default"; + pinctrl-0 = <ðernet1_default>; + + status = "okay"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_default>; @@ -316,6 +436,66 @@ &xo_board_clk { /* PINCTRL */ &tlmm { + ethernet0_default: ethernet0-default-state { + mdc-pins { + pins = "gpio175"; + function = "rgmii_0"; + drive-strength = <16>; + bias-pull-up; + }; + + mdio-pins { + pins = "gpio176"; + function = "rgmii_0"; + drive-strength = <16>; + bias-pull-up; + }; + + rgmii-tx-pins { + pins = "gpio183", "gpio184", "gpio185", "gpio186", "gpio187", "gpio188"; + function = "rgmii_0"; + drive-strength = <16>; + bias-pull-up; + }; + + rgmii-rx-pins { + pins = "gpio177", "gpio178", "gpio179", "gpio180", "gpio181", "gpio182"; + function = "rgmii_0"; + drive-strength = <16>; + bias-disable; + }; + }; + + ethernet1_default: ethernet1-default-state { + mdc-pins { + pins = "gpio97"; + function = "rgmii_1"; + drive-strength = <16>; + bias-pull-up; + }; + + mdio-pins { + pins = "gpio98"; + function = "rgmii_1"; + drive-strength = <16>; + bias-pull-up; + }; + + rgmii-tx-pins { + pins = "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110"; + function = "rgmii_1"; + drive-strength = <16>; + bias-pull-up; + }; + + rgmii-rx-pins { + pins = "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104"; + function = "rgmii_1"; + drive-strength = <16>; + bias-disable; + }; + }; + i2c0_default: i2c0-default-state { /* To USB7002T-I/KDXVA0 USB hub (SIP1 only) */ pins = "gpio135", "gpio136";