From patchwork Sun Apr 16 08:45:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Xiwen via B4 Relay X-Patchwork-Id: 13212734 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A1970C77B72 for ; Sun, 16 Apr 2023 08:47:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230312AbjDPIrQ (ORCPT ); Sun, 16 Apr 2023 04:47:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55832 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230382AbjDPIrO (ORCPT ); Sun, 16 Apr 2023 04:47:14 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 44E11E57; Sun, 16 Apr 2023 01:47:10 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id AF8C56190F; Sun, 16 Apr 2023 08:47:09 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPS id 0D5B7C4339B; Sun, 16 Apr 2023 08:47:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1681634829; bh=G2tLPQgRxtDu3DlqJOjUZMbxuxbA9j8nbZJ62Yt8Xr4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=quSujSV5SRGcbu5FnypcHkDYxJZ2JJzk88WueGkBl5M07uTwzyp8V7lYf+i5XOFaK bgDV9QzMLMgf+SohzeTHSusewe9l6sfF2yX+NuRUcsnr4oLIXWFoSIvo/gs95H00J+ D/i4GlElcpVmtuhgHQheCU6Tr7x5lGgHDs7r4T9ZGkOuo3pyAn9bf1/HqYo3DPZ9Ln eMpQjkzzVI84tVmCdDew1coMw1+m6+xJzCv7OdMFp2nqZilIXZ8w2neo3bOC1ZkB11 5H2NYbizlPsJuvsqtBHj1bw5ZydCPXdjA0QShx1aJ7Keaf7GItvV5brW4Msw51pblW /amllMfSzCfVw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id E1EE0C77B76; Sun, 16 Apr 2023 08:47:08 +0000 (UTC) From: Yang Xiwen via B4 Relay Date: Sun, 16 Apr 2023 16:45:59 +0800 Subject: [PATCH RFC v3 1/4] mmc: dw_mmc: hi3798cv200: rename to dw_mmc-histb MIME-Version: 1.0 Message-Id: <20230415-mmc-hi3798mv200-v3-1-00e2368c0709@outlook.com> References: <20230415-mmc-hi3798mv200-v3-0-00e2368c0709@outlook.com> In-Reply-To: <20230415-mmc-hi3798mv200-v3-0-00e2368c0709@outlook.com> To: Ulf Hansson , Jaehoon Chung , Rob Herring , Krzysztof Kozlowski , Yang Xiwen Cc: tianshuliang , Jiancheng Xue , Shawn Guo , David Yang , linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1681634825; l=7027; i=forbidden405@outlook.com; s=20230415; h=from:subject:message-id; bh=eoErTepi3JKctxpmeTvJxlWPwF/xYjRv313AFyJJwn4=; b=y0NeX5NkHIJ7zRiwuGVugBgoYztu8Wabh2bQU0QL52cRhjCGEcaEeE8jWE9B3H1DkGsy6oUHQ 92n931hGqjVAN2PhejzZZHjxYGd2kvdW2UA0SwQZb2bE5kq7a/+8MEj X-Developer-Key: i=forbidden405@outlook.com; a=ed25519; pk=hfdpPU3AXR+t7fdv58tXCD4UzRNq+fop2TMJezFlAhM= X-Endpoint-Received: by B4 Relay for forbidden405@outlook.com/20230415 with auth_id=44 X-Original-From: Yang Xiwen Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org From: Yang Xiwen Rename to dw_mmc-histb and introduce a mechanism similar to dw-mmc_exynos to support more devices in a single driver. It is a preparation for introducing extension for Hi3798MV200. Signed-off-by: Yang Xiwen --- drivers/mmc/host/Kconfig | 8 +-- drivers/mmc/host/Makefile | 2 +- .../host/{dw_mmc-hi3798cv200.c => dw_mmc-histb.c} | 79 ++++++++++++++-------- 3 files changed, 57 insertions(+), 32 deletions(-) diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index 4745fe217ade3..0aef4d845b743 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -779,14 +779,14 @@ config MMC_DW_EXYNOS Synopsys DesignWare Memory Card Interface driver. Select this option for platforms based on Exynos4 and Exynos5 SoC's. -config MMC_DW_HI3798CV200 - tristate "Hi3798CV200 specific extensions for Synopsys DW Memory Card Interface" +config MMC_DW_HISTB + tristate "HiSTB specific extensions for Synopsys DW Memory Card Interface" depends on MMC_DW select MMC_DW_PLTFM help - This selects support for HiSilicon Hi3798CV200 SoC specific extensions to the + This selects support for HiSilicon HiSTB SoC specific extensions to the Synopsys DesignWare Memory Card Interface driver. Select this option - for platforms based on HiSilicon Hi3798CV200 SoC. + for platforms based on HiSilicon HiSTB SoC. config MMC_DW_K3 tristate "K3 specific extensions for Synopsys DW Memory Card Interface" diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile index a693fa3d3f1cc..0373741afebf1 100644 --- a/drivers/mmc/host/Makefile +++ b/drivers/mmc/host/Makefile @@ -50,7 +50,7 @@ obj-$(CONFIG_MMC_DW) += dw_mmc.o obj-$(CONFIG_MMC_DW_PLTFM) += dw_mmc-pltfm.o obj-$(CONFIG_MMC_DW_BLUEFIELD) += dw_mmc-bluefield.o obj-$(CONFIG_MMC_DW_EXYNOS) += dw_mmc-exynos.o -obj-$(CONFIG_MMC_DW_HI3798CV200) += dw_mmc-hi3798cv200.o +obj-$(CONFIG_MMC_DW_HISTB) += dw_mmc-histb.o obj-$(CONFIG_MMC_DW_K3) += dw_mmc-k3.o obj-$(CONFIG_MMC_DW_PCI) += dw_mmc-pci.o obj-$(CONFIG_MMC_DW_ROCKCHIP) += dw_mmc-rockchip.o diff --git a/drivers/mmc/host/dw_mmc-hi3798cv200.c b/drivers/mmc/host/dw_mmc-histb.c similarity index 69% rename from drivers/mmc/host/dw_mmc-hi3798cv200.c rename to drivers/mmc/host/dw_mmc-histb.c index 6f22fe0540879..106e586bcff4b 100644 --- a/drivers/mmc/host/dw_mmc-hi3798cv200.c +++ b/drivers/mmc/host/dw_mmc-histb.c @@ -18,14 +18,29 @@ #define ALL_INT_CLR 0x1ffff -struct hi3798cv200_priv { +enum dw_mci_histb_type { + DW_MCI_TYPE_HI3798CV200, +}; + +static struct dw_mci_histb_compat { + const char * const compatible; + enum dw_mci_histb_type ctrl_type; +} histb_compat[] = { + { + .compatible = "hisilicon,hi3798cv200-dw-mshc", + .ctrl_type = DW_MCI_TYPE_HI3798CV200, + }, +}; + +struct dw_mci_histb_priv { + enum dw_mci_histb_type ctrl_type; struct clk *sample_clk; struct clk *drive_clk; }; -static void dw_mci_hi3798cv200_set_ios(struct dw_mci *host, struct mmc_ios *ios) +static void dw_mci_histb_set_ios(struct dw_mci *host, struct mmc_ios *ios) { - struct hi3798cv200_priv *priv = host->priv; + struct dw_mci_histb_priv *priv = host->priv; u32 val; val = mci_readl(host, UHS_REG); @@ -62,7 +77,7 @@ static int dw_mci_hi3798cv200_execute_tuning(struct dw_mci_slot *slot, { static const int degrees[] = { 0, 45, 90, 135, 180, 225, 270, 315 }; struct dw_mci *host = slot->host; - struct hi3798cv200_priv *priv = host->priv; + struct dw_mci_histb_priv *priv = host->priv; int raise_point = -1, fall_point = -1; int err, prev_err = -1; int found = 0; @@ -118,15 +133,21 @@ static int dw_mci_hi3798cv200_execute_tuning(struct dw_mci_slot *slot, return err; } -static int dw_mci_hi3798cv200_init(struct dw_mci *host) +static int dw_mci_histb_init(struct dw_mci *host) { - struct hi3798cv200_priv *priv; - int ret; + struct dw_mci_histb_priv *priv; + struct device_node *np = host->dev->of_node; + int ret, idx; priv = devm_kzalloc(host->dev, sizeof(*priv), GFP_KERNEL); if (!priv) return -ENOMEM; + for (idx = 0; idx < ARRAY_SIZE(histb_compat); idx++) { + if (of_device_is_compatible(np, histb_compat[idx].compatible)) + priv->ctrl_type = histb_compat[idx].ctrl_type; + } + priv->sample_clk = devm_clk_get(host->dev, "ciu-sample"); if (IS_ERR(priv->sample_clk)) { dev_err(host->dev, "failed to get ciu-sample clock\n"); @@ -161,20 +182,29 @@ static int dw_mci_hi3798cv200_init(struct dw_mci *host) static const struct dw_mci_drv_data hi3798cv200_data = { .common_caps = MMC_CAP_CMD23, - .init = dw_mci_hi3798cv200_init, - .set_ios = dw_mci_hi3798cv200_set_ios, + .init = dw_mci_histb_init, + .set_ios = dw_mci_histb_set_ios, .execute_tuning = dw_mci_hi3798cv200_execute_tuning, }; -static int dw_mci_hi3798cv200_probe(struct platform_device *pdev) +static const struct of_device_id dw_mci_histb_match[] = { + { .compatible = "hisilicon,hi3798cv200-dw-mshc", .data = &hi3798cv200_data }, + {}, +}; + +static int dw_mci_histb_probe(struct platform_device *pdev) { - return dw_mci_pltfm_register(pdev, &hi3798cv200_data); + const struct of_device_id *match; + + match = of_match_node(dw_mci_histb_match, pdev->dev.of_node); + + return dw_mci_pltfm_register(pdev, match->data); } -static int dw_mci_hi3798cv200_remove(struct platform_device *pdev) +static int dw_mci_histb_remove(struct platform_device *pdev) { struct dw_mci *host = platform_get_drvdata(pdev); - struct hi3798cv200_priv *priv = host->priv; + struct dw_mci_histb_priv *priv = host->priv; clk_disable_unprepare(priv->drive_clk); clk_disable_unprepare(priv->sample_clk); @@ -184,23 +214,18 @@ static int dw_mci_hi3798cv200_remove(struct platform_device *pdev) return 0; } -static const struct of_device_id dw_mci_hi3798cv200_match[] = { - { .compatible = "hisilicon,hi3798cv200-dw-mshc", }, - {}, -}; - -MODULE_DEVICE_TABLE(of, dw_mci_hi3798cv200_match); -static struct platform_driver dw_mci_hi3798cv200_driver = { - .probe = dw_mci_hi3798cv200_probe, - .remove = dw_mci_hi3798cv200_remove, +MODULE_DEVICE_TABLE(of, dw_mci_histb_match); +static struct platform_driver dw_mci_histb_driver = { + .probe = dw_mci_histb_probe, + .remove = dw_mci_histb_remove, .driver = { - .name = "dwmmc_hi3798cv200", + .name = "dwmmc_histb", .probe_type = PROBE_PREFER_ASYNCHRONOUS, - .of_match_table = dw_mci_hi3798cv200_match, + .of_match_table = dw_mci_histb_match, }, }; -module_platform_driver(dw_mci_hi3798cv200_driver); +module_platform_driver(dw_mci_histb_driver); -MODULE_DESCRIPTION("HiSilicon Hi3798CV200 Specific DW-MSHC Driver Extension"); +MODULE_DESCRIPTION("HiSilicon HiSTB Specific DW-MSHC Driver Extension"); MODULE_LICENSE("GPL v2"); -MODULE_ALIAS("platform:dwmmc_hi3798cv200"); +MODULE_ALIAS("platform:dwmmc_histb"); From patchwork Sun Apr 16 08:46:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Xiwen via B4 Relay X-Patchwork-Id: 13212731 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE5ADC77B76 for ; Sun, 16 Apr 2023 08:47:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230366AbjDPIrN (ORCPT ); Sun, 16 Apr 2023 04:47:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55832 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230301AbjDPIrL (ORCPT ); Sun, 16 Apr 2023 04:47:11 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4D586E7D; Sun, 16 Apr 2023 01:47:10 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id BDE0960C17; Sun, 16 Apr 2023 08:47:09 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPS id 235EAC4339E; Sun, 16 Apr 2023 08:47:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1681634829; bh=I1zVuCbwHLpIyH1CupVPrNbprfDrqjzfxLYjmXNkoeE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=N2o6YaB/Knc2DvFH6zU/01Fzz0lyZY8ZIfrzvELgLMOond7oowZWgmGgo16nhqlH6 D/LQ4HdSji2pT9HILzT2kkA3pEWCbR9OElY8tM66EaHdG62ylOlWTIbWqBRsUiIfhq q5hFJfhtlBs7ZeLJvsNRponsWGfpMyf8i7mmucq73S4QQuDwVuq2fHCvDWQ0h7BiX9 y06+6QDr4aare/JuUMjLzsnLGaXSNf7a+asXk/tdqDaDBvPi/8KDZCU/NAsgHlQ/5l JuUJqfQV+uVUF9K8MLoYkhtg+t//Rwnn+uOAO7vUVX5R4Up1LLbTp6EyBqJYjXOfoQ rAKTqBMiJ21KA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 03834C77B72; Sun, 16 Apr 2023 08:47:09 +0000 (UTC) From: Yang Xiwen via B4 Relay Date: Sun, 16 Apr 2023 16:46:00 +0800 Subject: [PATCH RFC v3 2/4] mmc: dw_mmc: histb: add support for hi3798mv200 MIME-Version: 1.0 Message-Id: <20230415-mmc-hi3798mv200-v3-2-00e2368c0709@outlook.com> References: <20230415-mmc-hi3798mv200-v3-0-00e2368c0709@outlook.com> In-Reply-To: <20230415-mmc-hi3798mv200-v3-0-00e2368c0709@outlook.com> To: Ulf Hansson , Jaehoon Chung , Rob Herring , Krzysztof Kozlowski , Yang Xiwen Cc: tianshuliang , Jiancheng Xue , Shawn Guo , David Yang , linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1681634825; l=5756; i=forbidden405@outlook.com; s=20230415; h=from:subject:message-id; bh=BbS/l7vrq8NmARY0G9T42pzQupVXhImCLr1VN3mh6sA=; b=hVdN+BcMBcu0fG/JOPubm0H5EuF5VmxWbxkXK1J3ub5lkFtjVDWPU2Ta+py9uhZHEyg/cZ0Cq L2lrjN+jOCcDw4QzOdw5ysZFqxWBGTwmIY5Vd1jZBTE8a7ouqDzMQV2 X-Developer-Key: i=forbidden405@outlook.com; a=ed25519; pk=hfdpPU3AXR+t7fdv58tXCD4UzRNq+fop2TMJezFlAhM= X-Endpoint-Received: by B4 Relay for forbidden405@outlook.com/20230415 with auth_id=44 X-Original-From: Yang Xiwen Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org From: Yang Xiwen Add support for Hi3798MV200 specific extension. Signed-off-by: Yang Xiwen --- drivers/mmc/host/dw_mmc-histb.c | 110 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 109 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/dw_mmc-histb.c b/drivers/mmc/host/dw_mmc-histb.c index 106e586bcff4b..039b6df0e8c4d 100644 --- a/drivers/mmc/host/dw_mmc-histb.c +++ b/drivers/mmc/host/dw_mmc-histb.c @@ -16,10 +16,14 @@ #include "dw_mmc.h" #include "dw_mmc-pltfm.h" +#define SDMMC_TUNING_CTRL 0x118 +#define SDMMC_TUNING_FIND_EDGE BIT(5) + #define ALL_INT_CLR 0x1ffff enum dw_mci_histb_type { DW_MCI_TYPE_HI3798CV200, + DW_MCI_TYPE_HI3798MV200, }; static struct dw_mci_histb_compat { @@ -29,6 +33,9 @@ static struct dw_mci_histb_compat { { .compatible = "hisilicon,hi3798cv200-dw-mshc", .ctrl_type = DW_MCI_TYPE_HI3798CV200, + }, { + .compatible = "hisilicon,hi3798mv200-dw-mshc", + .ctrl_type = DW_MCI_TYPE_HI3798MV200, }, }; @@ -36,6 +43,7 @@ struct dw_mci_histb_priv { enum dw_mci_histb_type ctrl_type; struct clk *sample_clk; struct clk *drive_clk; + struct clk *sap_dll_mode_clk; }; static void dw_mci_histb_set_ios(struct dw_mci *host, struct mmc_ios *ios) @@ -68,7 +76,10 @@ static void dw_mci_histb_set_ios(struct dw_mci *host, struct mmc_ios *ios) if (ios->timing == MMC_TIMING_MMC_HS || ios->timing == MMC_TIMING_LEGACY) clk_set_phase(priv->drive_clk, 180); - else if (ios->timing == MMC_TIMING_MMC_HS200) + else if (ios->timing == MMC_TIMING_MMC_DDR52) { + clk_set_phase(priv->drive_clk, 90); + clk_set_phase(priv->sample_clk, 45); + } else if (ios->timing == MMC_TIMING_MMC_HS200) clk_set_phase(priv->drive_clk, 135); } @@ -133,6 +144,75 @@ static int dw_mci_hi3798cv200_execute_tuning(struct dw_mci_slot *slot, return err; } +static int dw_mci_hi3798mv200_execute_tuning_mix_mode(struct dw_mci_slot *slot, + u32 opcode) +{ + static const int degrees[] = { 0, 45, 90, 135, 180, 225, 270, 315 }; + struct dw_mci *host = slot->host; + struct dw_mci_histb_priv *priv = host->priv; + int raise_point = -1, fall_point = -1; + int err, prev_err = -1; + int found = 0; + int regval; + int i; + + clk_disable(priv->sap_dll_mode_clk); + for (i = 0; i < ARRAY_SIZE(degrees); i++) { + clk_set_phase(priv->sample_clk, degrees[i]); + mci_writel(host, RINTSTS, ALL_INT_CLR); + + err = mmc_send_tuning(slot->mmc, opcode, NULL); + if (err) + found = 1; + else { + regval = mci_readl(host, TUNING_CTRL); + if (regval & SDMMC_TUNING_FIND_EDGE) + found = 1; + }; + + if (i > 0) { + if (err && !prev_err) + fall_point = i - 1; + if (!err && prev_err) + raise_point = i; + } + + if (raise_point != -1 && fall_point != -1) + goto tuning_out; + + prev_err = err; + err = 0; + } + +tuning_out: + clk_enable(priv->sap_dll_mode_clk); + if (found) { + if (raise_point == -1) + raise_point = 0; + if (fall_point == -1) + fall_point = ARRAY_SIZE(degrees) - 1; + if (fall_point < raise_point) { + if ((raise_point + fall_point) > + (ARRAY_SIZE(degrees) - 1)) + i = fall_point / 2; + else + i = (raise_point + ARRAY_SIZE(degrees) - 1) / 2; + } else { + i = (raise_point + fall_point) / 2; + } + + clk_set_phase(priv->sample_clk, degrees[i]); + dev_dbg(host->dev, "Tuning clk_sample[%d, %d], set[%d]\n", + raise_point, fall_point, degrees[i]); + } else { + dev_err(host->dev, "No valid clk_sample shift! use default\n"); + err = -EINVAL; + } + + mci_writel(host, RINTSTS, ALL_INT_CLR); + return err; +} + static int dw_mci_histb_init(struct dw_mci *host) { struct dw_mci_histb_priv *priv; @@ -160,6 +240,14 @@ static int dw_mci_histb_init(struct dw_mci *host) return PTR_ERR(priv->drive_clk); } + if (priv->ctrl_type == DW_MCI_TYPE_HI3798MV200) { + priv->sap_dll_mode_clk = devm_clk_get(host->dev, "sap-dll-mode"); + if (IS_ERR(priv->sap_dll_mode_clk)) { + dev_err(host->dev, "failed to get sap-dll-mode clock\n"); + return PTR_ERR(priv->sap_dll_mode_clk); + } + } + ret = clk_prepare_enable(priv->sample_clk); if (ret) { dev_err(host->dev, "failed to enable ciu-sample clock\n"); @@ -172,9 +260,19 @@ static int dw_mci_histb_init(struct dw_mci *host) goto disable_sample_clk; } + if (priv->ctrl_type == DW_MCI_TYPE_HI3798MV200) { + ret = clk_prepare_enable(priv->sap_dll_mode_clk); + if (ret) { + dev_err(host->dev, "failed to disable tuning mode"); + goto disable_drive_clk; + } + } + host->priv = priv; return 0; +disable_drive_clk: + clk_disable_unprepare(priv->drive_clk); disable_sample_clk: clk_disable_unprepare(priv->sample_clk); return ret; @@ -187,8 +285,16 @@ static const struct dw_mci_drv_data hi3798cv200_data = { .execute_tuning = dw_mci_hi3798cv200_execute_tuning, }; +static const struct dw_mci_drv_data hi3798mv200_data = { + .common_caps = MMC_CAP_CMD23, + .init = dw_mci_histb_init, + .set_ios = dw_mci_histb_set_ios, + .execute_tuning = dw_mci_hi3798mv200_execute_tuning_mix_mode, +}; + static const struct of_device_id dw_mci_histb_match[] = { { .compatible = "hisilicon,hi3798cv200-dw-mshc", .data = &hi3798cv200_data }, + { .compatible = "hisilicon,hi3798mv200-dw-mshc", .data = &hi3798mv200_data }, {}, }; @@ -208,6 +314,8 @@ static int dw_mci_histb_remove(struct platform_device *pdev) clk_disable_unprepare(priv->drive_clk); clk_disable_unprepare(priv->sample_clk); + if (priv->ctrl_type == DW_MCI_TYPE_HI3798MV200) + clk_disable_unprepare(priv->sap_dll_mode_clk); dw_mci_pltfm_remove(pdev); From patchwork Sun Apr 16 08:46:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Xiwen via B4 Relay X-Patchwork-Id: 13212732 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3D859C77B78 for ; Sun, 16 Apr 2023 08:47:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230164AbjDPIrO (ORCPT ); Sun, 16 Apr 2023 04:47:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55946 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230351AbjDPIrM (ORCPT ); Sun, 16 Apr 2023 04:47:12 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 44C88E4E; Sun, 16 Apr 2023 01:47:10 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id C925061900; Sun, 16 Apr 2023 08:47:09 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPS id 2A69BC4339C; Sun, 16 Apr 2023 08:47:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1681634829; bh=V9sTFQERjNMBCKlK+chFi8htr5xGiz1UWzM0Jgp/e/o=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=J5hlXRSgKB3xfI0sxujOqVopyqDR1n8rZ9QWipR4jNHyJ10devrmhBNZ4w/4s75Wd hcLWYqqs1AFnUWTRXKJskGJtV32Cj1nYGQ6kky8+jzZ5xYpH/kWzf3ssLs9DieCv1X F9bJPCYEAwQogGeXB9KdvrilINIro6pCFFBPmP01ToDi1HpF3A3Kz4Avp5BTQ/b0Ks 4i26wWiKL1lrghUiQdxYfhit3o9TGsrrocQJlbUvcgswhN2Rbo6u0YBmp0nK4idBdG UntScXEKRlTk+Ae6DaNLDjVX8RnZxF/b9gEwsmyE5XJz9x/onZLuJJlRAnPqKVQIT3 q5iW4RUh9HPcA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 16E60C7619A; Sun, 16 Apr 2023 08:47:09 +0000 (UTC) From: Yang Xiwen via B4 Relay Date: Sun, 16 Apr 2023 16:46:01 +0800 Subject: [PATCH RFC v3 3/4] dt-binding: mmc: hi3798cv200-dw-mshc: convert to YAML and rename to histb-dw-mshc MIME-Version: 1.0 Message-Id: <20230415-mmc-hi3798mv200-v3-3-00e2368c0709@outlook.com> References: <20230415-mmc-hi3798mv200-v3-0-00e2368c0709@outlook.com> In-Reply-To: <20230415-mmc-hi3798mv200-v3-0-00e2368c0709@outlook.com> To: Ulf Hansson , Jaehoon Chung , Rob Herring , Krzysztof Kozlowski , Yang Xiwen Cc: tianshuliang , Jiancheng Xue , Shawn Guo , David Yang , linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1681634825; l=4079; i=forbidden405@outlook.com; s=20230415; h=from:subject:message-id; bh=cbsKBjsjU3CIDW9tEpwhQdbd51tcFrBuqYrGKC8a2uw=; b=+tEngQQj4AT/9BBPyp2Xl5avlbKqAfcwtJ9fHwKRWQnVBkEa7/cSpYh5zRfac0rNOk/QhG7MH J45Jp0OEig5DE4kO7cP9c4c1RuDIfARPcg1b8Mc4nXkuP04H2Ddhw4i X-Developer-Key: i=forbidden405@outlook.com; a=ed25519; pk=hfdpPU3AXR+t7fdv58tXCD4UzRNq+fop2TMJezFlAhM= X-Endpoint-Received: by B4 Relay for forbidden405@outlook.com/20230415 with auth_id=44 X-Original-From: Yang Xiwen Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org From: Yang Xiwen The renaming is due to the fact that it is now supporting SoCs other than Hi3798CV200. Signed-off-by: Yang Xiwen --- .../bindings/mmc/hi3798cv200-dw-mshc.txt | 40 ------------- .../devicetree/bindings/mmc/histb-dw-mshc.yaml | 69 ++++++++++++++++++++++ 2 files changed, 69 insertions(+), 40 deletions(-) diff --git a/Documentation/devicetree/bindings/mmc/hi3798cv200-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/hi3798cv200-dw-mshc.txt deleted file mode 100644 index a0693b7145f2a..0000000000000 --- a/Documentation/devicetree/bindings/mmc/hi3798cv200-dw-mshc.txt +++ /dev/null @@ -1,40 +0,0 @@ -* Hisilicon Hi3798CV200 specific extensions to the Synopsys Designware Mobile - Storage Host Controller - -Read synopsys-dw-mshc.txt for more details - -The Synopsys designware mobile storage host controller is used to interface -a SoC with storage medium such as eMMC or SD/MMC cards. This file documents -differences between the core Synopsys dw mshc controller properties described -by synopsys-dw-mshc.txt and the properties used by the Hisilicon Hi3798CV200 -specific extensions to the Synopsys Designware Mobile Storage Host Controller. - -Required Properties: -- compatible: Should contain "hisilicon,hi3798cv200-dw-mshc". -- clocks: A list of phandle + clock-specifier pairs for the clocks listed - in clock-names. -- clock-names: Should contain the following: - "ciu" - The ciu clock described in synopsys-dw-mshc.txt. - "biu" - The biu clock described in synopsys-dw-mshc.txt. - "ciu-sample" - Hi3798CV200 extended phase clock for ciu sampling. - "ciu-drive" - Hi3798CV200 extended phase clock for ciu driving. - -Example: - - emmc: mmc@9830000 { - compatible = "hisilicon,hi3798cv200-dw-mshc"; - reg = <0x9830000 0x10000>; - interrupts = ; - clocks = <&crg HISTB_MMC_CIU_CLK>, - <&crg HISTB_MMC_BIU_CLK>, - <&crg HISTB_MMC_SAMPLE_CLK>, - <&crg HISTB_MMC_DRV_CLK>; - clock-names = "ciu", "biu", "ciu-sample", "ciu-drive"; - fifo-depth = <256>; - clock-frequency = <200000000>; - cap-mmc-highspeed; - mmc-ddr-1_8v; - mmc-hs200-1_8v; - non-removable; - bus-width = <8>; - }; diff --git a/Documentation/devicetree/bindings/mmc/histb-dw-mshc.yaml b/Documentation/devicetree/bindings/mmc/histb-dw-mshc.yaml new file mode 100644 index 0000000000000..4711ad293b9e8 --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/histb-dw-mshc.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mmc/histb-dw-mshc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: + Hisilicon HiSTB SoC specific extensions to the Synopsys Designware Mobile + Storage Host Controller + +maintainers: + - Yang Xiwen + +description: + The Synopsys designware mobile storage host controller is used to interface a + SoC with storage medium such as eMMC or SD/MMC cards. + +properties: + compatible: + enum: + - hisilicon,hi3798cv200-dw-mshc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 4 + + clock-names: + items: + - const: ciu + - const: biu + - const: ciu-sample + - const: ciu-drive + +unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +allOf: + - $ref: synopsys-dw-mshc-common.yaml# + +examples: + - | + emmc: mmc@9830000 { + compatible = "hisilicon,hi3798cv200-dw-mshc"; + reg = <0x9830000 0x10000>; + interrupts = <35>; + clocks = <&crg 1>, + <&crg 2>, + <&crg 3>, + <&crg 4>; + clock-names = "ciu", "biu", "ciu-sample", "ciu-drive"; + fifo-depth = <256>; + clock-frequency = <200000000>; + cap-mmc-highspeed; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + non-removable; + bus-width = <8>; + }; From patchwork Sun Apr 16 08:46:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Xiwen via B4 Relay X-Patchwork-Id: 13212733 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 92A1BC77B7C for ; Sun, 16 Apr 2023 08:47:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230349AbjDPIrP (ORCPT ); Sun, 16 Apr 2023 04:47:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55952 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230380AbjDPIrO (ORCPT ); Sun, 16 Apr 2023 04:47:14 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4E05A10C4; Sun, 16 Apr 2023 01:47:10 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id DA13961920; Sun, 16 Apr 2023 08:47:09 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPS id 43036C433A4; Sun, 16 Apr 2023 08:47:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1681634829; bh=EQQXcjijUBA91sk7bWhgGNYpJ3hJiVVDLZWTBPGYot4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=nZy1ZNZOLXoy/ztAxG+WOCbeaqpvQMC7XJSaZLcqcbSSPGdRNixvknQDmYqsnZOJQ 28VifdVl533Bqn9eD6NOIyLTwD9snu8CW9obuRl1Hwcllx4L17s2SP5xnn2ONmujRQ JhZCr/jC5OkC+5baC2IbXwMTltC/pnPqBydnCN7OWlsHuV9JHp7HupJiUGN7vWHzE5 mSBpN1AIcwOZb5OXS/qTDKJszspIpoiIIM9geOr3E2FSOWB8NriDGqzydgl/7lu10d dkkqaJWWXYFjH8p4br8kjBYEfiVqlWWc/hAG7HU7IVpqqB+Lf+MjISGovEBgQHeVKV R5+yEfvHh4SRg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 32351C77B78; Sun, 16 Apr 2023 08:47:09 +0000 (UTC) From: Yang Xiwen via B4 Relay Date: Sun, 16 Apr 2023 16:46:02 +0800 Subject: [PATCH RFC v3 4/4] dt-binding: mmc: histb-dw-mshc: Add Hi3798MV200 compatible string MIME-Version: 1.0 Message-Id: <20230415-mmc-hi3798mv200-v3-4-00e2368c0709@outlook.com> References: <20230415-mmc-hi3798mv200-v3-0-00e2368c0709@outlook.com> In-Reply-To: <20230415-mmc-hi3798mv200-v3-0-00e2368c0709@outlook.com> To: Ulf Hansson , Jaehoon Chung , Rob Herring , Krzysztof Kozlowski , Yang Xiwen Cc: tianshuliang , Jiancheng Xue , Shawn Guo , David Yang , linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1681634825; l=1381; i=forbidden405@outlook.com; s=20230415; h=from:subject:message-id; bh=DChNXTsR5GdTAljXgm4pZiZ+L6iJZkFwTbHaR8G7CCs=; b=cuUE0RIRK/e2Gjbkq1dM5lB6Bv4YLFUYjY64ZF9NFtIvDFaT730d5GuJMXA8yTcQ51bpXfdCd wyE36bSoLPpA6Bxg9v/nKCcBd5zTMPr9TYZy8VXE3kA0GqY8zcwQv3k X-Developer-Key: i=forbidden405@outlook.com; a=ed25519; pk=hfdpPU3AXR+t7fdv58tXCD4UzRNq+fop2TMJezFlAhM= X-Endpoint-Received: by B4 Relay for forbidden405@outlook.com/20230415 with auth_id=44 X-Original-From: Yang Xiwen Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org From: Yang Xiwen Add Hi3798MV200 compatible string and an extra clock for it. Signed-off-by: Yang Xiwen --- Documentation/devicetree/bindings/mmc/histb-dw-mshc.yaml | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/histb-dw-mshc.yaml b/Documentation/devicetree/bindings/mmc/histb-dw-mshc.yaml index 4711ad293b9e8..bcc8ea393981f 100644 --- a/Documentation/devicetree/bindings/mmc/histb-dw-mshc.yaml +++ b/Documentation/devicetree/bindings/mmc/histb-dw-mshc.yaml @@ -19,6 +19,7 @@ properties: compatible: enum: - hisilicon,hi3798cv200-dw-mshc + - hisilicon,hi3798mv200-dw-mshc reg: maxItems: 1 @@ -28,13 +29,16 @@ properties: clocks: minItems: 4 + maxItems: 5 clock-names: + minItems: 4 items: - const: ciu - const: biu - const: ciu-sample - const: ciu-drive + - const: sap-dll-mode unevaluatedProperties: false @@ -47,6 +51,18 @@ required: allOf: - $ref: synopsys-dw-mshc-common.yaml# + - if: + properties: + compatible: + contains: + const: hisilicon,hi3798mv200-dw-mshc + then: + properties: + clocks: + minItems: 5 + + clock-names: + minItems: 5 examples: - |