From patchwork Fri Apr 21 03:14:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mason Huo X-Patchwork-Id: 13219434 X-Patchwork-Delegate: mail@conchuod.ie Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3B469C77B73 for ; Fri, 21 Apr 2023 03:15:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=AJ1MzOyhEKfMXaI2p5pKmr+fmJdKRtO4706KAQ5tPf4=; b=29h3LQx0YtdqQg gbfLtngMjHmF4+bwvcudfvLexcb+Ur6rSSXBk3xrqnoZG9FjizL2SKARLSDx2lPAi1eW+8Jc+qZJd eNmqiHqB5e2X+cVBTo5/wZBQRnQMFOSFc+bHTsS+E88v7ksko+4YHXnnzNKNR74K5uSGGvFHBcqUy REgyxOLf9gmN/3AbjrCzRCoPY1rrQUYcKwh2C5xrdXz2t7jWx8N+u+ML+jK7sutx69PEEjbKYi9kc IAHyBBWXf1SUO8msCqcu0U5V+IalafdDRbcq4KDxl75U/n1e417cC2lWp1X3gFtsqHba7bT9+n36W 5cE/6cbgE41sKN3yr//A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pphEp-009W60-2h; Fri, 21 Apr 2023 03:15:07 +0000 Received: from fd01.gateway.ufhost.com ([61.152.239.71]) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pphEg-009W26-2X for linux-riscv@lists.infradead.org; Fri, 21 Apr 2023 03:15:02 +0000 Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 07F0224E00A; Fri, 21 Apr 2023 11:14:34 +0800 (CST) Received: from EXMBX067.cuchost.com (172.16.6.67) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 21 Apr 2023 11:14:33 +0800 Received: from localhost.localdomain (113.72.144.253) by EXMBX067.cuchost.com (172.16.6.67) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 21 Apr 2023 11:14:33 +0800 From: Mason Huo To: "Rafael J. Wysocki" , Viresh Kumar , Emil Renner Berthing , "Rob Herring" , Krzysztof Kozlowski , Conor Dooley , "Paul Walmsley" , Palmer Dabbelt , Albert Ou CC: Shengyu Qu , , , , , Mason Huo Subject: [PATCH v3 1/3] riscv: dts: starfive: Enable axp15060 pmic for cpufreq Date: Fri, 21 Apr 2023 11:14:29 +0800 Message-ID: <20230421031431.23010-2-mason.huo@starfivetech.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230421031431.23010-1-mason.huo@starfivetech.com> References: <20230421031431.23010-1-mason.huo@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [113.72.144.253] X-ClientProxiedBy: EXCAS061.cuchost.com (172.16.6.21) To EXMBX067.cuchost.com (172.16.6.67) X-YovoleRuleAgent: yovoleflag X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230420_201459_091865_940651AD X-CRM114-Status: UNSURE ( 8.99 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The VisionFive 2 board has an embedded pmic axp15060, which supports the cpu DVFS through the dcdc2 regulator. This patch enables axp15060 pmic and configs the dcdc2. Signed-off-by: Mason Huo --- .../dts/starfive/jh7110-starfive-visionfive-2.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index 2a6d81609284..cca1c8040801 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -114,6 +114,20 @@ &i2c5 { pinctrl-names = "default"; pinctrl-0 = <&i2c5_pins>; status = "okay"; + + axp15060: pmic@36 { + compatible = "x-powers,axp15060"; + reg = <0x36>; + + regulators { + vdd_cpu: dcdc2 { + regulator-always-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1540000>; + regulator-name = "vdd-cpu"; + }; + }; + }; }; &i2c6 { From patchwork Fri Apr 21 03:14:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mason Huo X-Patchwork-Id: 13219431 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 05F0AC7618E for ; Fri, 21 Apr 2023 03:15:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=dKwWuRbYEjJeZBJdJMGcyoYXlg+sYIEutwmV00CfcbE=; b=P74oFiNXIIhCa9 qluQqfPAHD0nVJxeCcTuY/UPAiptL/wVOpsdVpxRWyIj20Vv/6Gqe/GapjbVy9TvF9CAcSdghv/L2 Lk1zxcUNrxeaEmF0u3HGmzASEY7n2Q6ioaS8w/+PdAqeQwRmOWmcmVa5R5K6fATHz+tHy0mcjWvMh M+XNvJr1oP/wfhdCE/RkWiuNNw6PHkYCwZVDdmbujocvQ8Cn/0ir6URcrzoR6698Bb6Couc2TH+wM ue9VsH8+vqfvG+a4Br/LPZtvCcx7qIfx51wtiPldwjBp9chTGGEMrr4dvIfVrGbvgg/Qwt0O7ZUmP E1CVwGuVFx6TROepLtFA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pphEp-009W5P-13; Fri, 21 Apr 2023 03:15:07 +0000 Received: from fd01.gateway.ufhost.com ([61.152.239.71]) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pphEg-009W25-2X for linux-riscv@lists.infradead.org; Fri, 21 Apr 2023 03:15:02 +0000 Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id BD01A24E11A; Fri, 21 Apr 2023 11:14:34 +0800 (CST) Received: from EXMBX067.cuchost.com (172.16.6.67) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 21 Apr 2023 11:14:34 +0800 Received: from localhost.localdomain (113.72.144.253) by EXMBX067.cuchost.com (172.16.6.67) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 21 Apr 2023 11:14:33 +0800 From: Mason Huo To: "Rafael J. Wysocki" , Viresh Kumar , Emil Renner Berthing , "Rob Herring" , Krzysztof Kozlowski , Conor Dooley , "Paul Walmsley" , Palmer Dabbelt , Albert Ou CC: Shengyu Qu , , , , , Mason Huo Subject: [PATCH v3 2/3] cpufreq: dt-platdev: Add JH7110 SOC to the allowlist Date: Fri, 21 Apr 2023 11:14:30 +0800 Message-ID: <20230421031431.23010-3-mason.huo@starfivetech.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230421031431.23010-1-mason.huo@starfivetech.com> References: <20230421031431.23010-1-mason.huo@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [113.72.144.253] X-ClientProxiedBy: EXCAS061.cuchost.com (172.16.6.21) To EXMBX067.cuchost.com (172.16.6.67) X-YovoleRuleAgent: yovoleflag X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230420_201458_959962_01CC28CC X-CRM114-Status: GOOD ( 10.07 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add the compatible strings for supporting the generic cpufreq driver on the StarFive JH7110 SoC. Signed-off-by: Mason Huo --- drivers/cpufreq/cpufreq-dt-platdev.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c index e85703651098..79537d0ed7cf 100644 --- a/drivers/cpufreq/cpufreq-dt-platdev.c +++ b/drivers/cpufreq/cpufreq-dt-platdev.c @@ -86,6 +86,8 @@ static const struct of_device_id allowlist[] __initconst = { { .compatible = "st-ericsson,u9500", }, { .compatible = "st-ericsson,u9540", }, + { .compatible = "starfive,jh7110", }, + { .compatible = "ti,omap2", }, { .compatible = "ti,omap4", }, { .compatible = "ti,omap5", }, From patchwork Fri Apr 21 03:14:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mason Huo X-Patchwork-Id: 13219433 X-Patchwork-Delegate: mail@conchuod.ie Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DB5BFC77B78 for ; Fri, 21 Apr 2023 03:15:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=UwwfwDX2ZJljPolJ5884UTqjIPohIne02RFiPuL+T4w=; b=3tRRDlm5mwkGnW ABM92mg+q5Eszx0AZEGf/e3+P+DyyGp/u7Q1HUBQh3hpCHDSLMkjtsURZ0jYe0SBnHv3J+Hiu59eq VQaH+YMU8wLDVsPvoho6W7fHxHQBRZWojyXElFwwmY/WVREa7dEEDRdVayBLjJ/JiQ2XHMBQ56h0s MutzUjjL597503IqwvpJCi01nMhqApDCLFo5l2iVz/Lb7QvFI2FMF2DrKxUEMqXLTQ5Ea+0i82zZR bDbzCN0orX2ZC5Qh9ubxiA5E/odDyr9LHB6gNJh38+xRvFF/cMsJ2tKk+3eAbeC3xUBSBaSvgFjLQ axDmhjluXt7vffPd5wmA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pphEl-009W4T-2Z; Fri, 21 Apr 2023 03:15:03 +0000 Received: from ex01.ufhost.com ([61.152.239.75]) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pphEg-009W22-0d for linux-riscv@lists.infradead.org; Fri, 21 Apr 2023 03:15:00 +0000 Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 80DD824E0AE; Fri, 21 Apr 2023 11:14:35 +0800 (CST) Received: from EXMBX067.cuchost.com (172.16.6.67) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 21 Apr 2023 11:14:35 +0800 Received: from localhost.localdomain (113.72.144.253) by EXMBX067.cuchost.com (172.16.6.67) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 21 Apr 2023 11:14:34 +0800 From: Mason Huo To: "Rafael J. Wysocki" , Viresh Kumar , Emil Renner Berthing , "Rob Herring" , Krzysztof Kozlowski , Conor Dooley , "Paul Walmsley" , Palmer Dabbelt , Albert Ou CC: Shengyu Qu , , , , , Mason Huo Subject: [PATCH v3 3/3] riscv: dts: starfive: Add cpu scaling for JH7110 SoC Date: Fri, 21 Apr 2023 11:14:31 +0800 Message-ID: <20230421031431.23010-4-mason.huo@starfivetech.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230421031431.23010-1-mason.huo@starfivetech.com> References: <20230421031431.23010-1-mason.huo@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [113.72.144.253] X-ClientProxiedBy: EXCAS061.cuchost.com (172.16.6.21) To EXMBX067.cuchost.com (172.16.6.67) X-YovoleRuleAgent: yovoleflag X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230420_201458_554997_607C0476 X-CRM114-Status: UNSURE ( 8.75 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add the operating-points-v2 to support cpu scaling on StarFive JH7110 SoC. It supports up to 4 cpu frequency loads. Signed-off-by: Mason Huo --- .../jh7110-starfive-visionfive-2.dtsi | 16 +++++++++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 33 +++++++++++++++++++ 2 files changed, 49 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index cca1c8040801..43a9dbb839d2 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -227,3 +227,19 @@ &uart0 { pinctrl-0 = <&uart0_pins>; status = "okay"; }; + +&U74_1 { + cpu-supply = <&vdd_cpu>; +}; + +&U74_2 { + cpu-supply = <&vdd_cpu>; +}; + +&U74_3 { + cpu-supply = <&vdd_cpu>; +}; + +&U74_4 { + cpu-supply = <&vdd_cpu>; +}; diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index 4c5fdb905da8..7eef88d2cedb 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -53,6 +53,9 @@ U74_1: cpu@1 { next-level-cache = <&ccache>; riscv,isa = "rv64imafdc_zba_zbb"; tlb-split; + operating-points-v2 = <&cpu_opp>; + clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>; + clock-names = "cpu"; cpu1_intc: interrupt-controller { compatible = "riscv,cpu-intc"; @@ -79,6 +82,9 @@ U74_2: cpu@2 { next-level-cache = <&ccache>; riscv,isa = "rv64imafdc_zba_zbb"; tlb-split; + operating-points-v2 = <&cpu_opp>; + clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>; + clock-names = "cpu"; cpu2_intc: interrupt-controller { compatible = "riscv,cpu-intc"; @@ -105,6 +111,9 @@ U74_3: cpu@3 { next-level-cache = <&ccache>; riscv,isa = "rv64imafdc_zba_zbb"; tlb-split; + operating-points-v2 = <&cpu_opp>; + clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>; + clock-names = "cpu"; cpu3_intc: interrupt-controller { compatible = "riscv,cpu-intc"; @@ -131,6 +140,9 @@ U74_4: cpu@4 { next-level-cache = <&ccache>; riscv,isa = "rv64imafdc_zba_zbb"; tlb-split; + operating-points-v2 = <&cpu_opp>; + clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>; + clock-names = "cpu"; cpu4_intc: interrupt-controller { compatible = "riscv,cpu-intc"; @@ -164,6 +176,27 @@ core4 { }; }; + cpu_opp: opp-table-0 { + compatible = "operating-points-v2"; + opp-shared; + opp-375000000 { + opp-hz = /bits/ 64 <375000000>; + opp-microvolt = <800000>; + }; + opp-500000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <800000>; + }; + opp-750000000 { + opp-hz = /bits/ 64 <750000000>; + opp-microvolt = <800000>; + }; + opp-1500000000 { + opp-hz = /bits/ 64 <1500000000>; + opp-microvolt = <1040000>; + }; + }; + gmac0_rgmii_rxin: gmac0-rgmii-rxin-clock { compatible = "fixed-clock"; clock-output-names = "gmac0_rgmii_rxin";