From patchwork Sat Apr 22 01:06:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brett Creeley X-Patchwork-Id: 13220856 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 974C5C77B7C for ; Sat, 22 Apr 2023 01:07:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234105AbjDVBHS (ORCPT ); Fri, 21 Apr 2023 21:07:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37438 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233235AbjDVBHO (ORCPT ); Fri, 21 Apr 2023 21:07:14 -0400 Received: from NAM12-DM6-obe.outbound.protection.outlook.com (mail-dm6nam12on2067.outbound.protection.outlook.com [40.107.243.67]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EC4AB1725; Fri, 21 Apr 2023 18:07:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=kTWfUbkZKNqUqnusPaHFvTa2CHhXdcemOQybda2wILxM1GXykiEhTpiqsFDzbR7ToNv5As9P7KqYj0Xr2URznNabEuzTf3nCf9FeF7q/NIXlKY3l1WOHly0gXUOoXSa4DcsZ4QER5qBxMRITRbHrPWZF9WSvifk3u071E88bSpoVIh/iX/xES/xrHWCFVlS73qEMHJA+9k8Uboyyn1Hg2iRWWEJxgZmJDEF+o8efWuN1+l5KmOo7BPdCxpQVzOLq9vmrRMeq6+zItbP177tufEX0GmUsiSyH//IjSfXqSmfkBQvYKoGyAvFEbw3bKvIwcz4hmMABR/SszZ9D+Eh33g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=N6V1P9rkIbCpK8eONpnvUT7o85HvbP8W/SFqap/xVxM=; b=UthdQEPW4bQxKNHRiya09toAGOWZTenoWl2RyMBqQm0/GWWQ1tVOO6nDf0Yj4S6nEM4JqZbuuQVoz2xokSi4BdtoKIEpLRSQ2t7QSLQc1ckcc/4w8fqIySVJjOoEADiBrVcs241eqkFNU7zK8HSiN3ThzlVjygUYEWOO4YRcJqJ+yNdABa9uU9Sc5nDZejXTaOte6hwE0M8agOb5X5LqrYW3rK32UbViNdCHfR8BYinYQqLPJOWQQF2ODZDWDkuC7gZZpUsQlj1fFUCkU9uznRK9g9/NbgU8DA4qFWSRWiG1ojKhBeWZyYn3Zo8z29O6XGS0w0rGNdtsq4z0iFXB1g== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=vger.kernel.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=N6V1P9rkIbCpK8eONpnvUT7o85HvbP8W/SFqap/xVxM=; b=08LZTT6jiJKiNjWhXkhZ6DirYg4lgTPy+iGfY5DQXNgmzjTRqiT1+zGTLGQcLO0m+Q9V6vj9h96Rp//d2FkGqIqDkbT9VnMEN/xmoIVMk2T9qgViAcknPuObIE4ATQ2iC03oNq+GMI7nDh4ZmlTNO+nD6++rts15KDjWESSXjzc= Received: from BN9PR03CA0336.namprd03.prod.outlook.com (2603:10b6:408:f6::11) by MN2PR12MB4407.namprd12.prod.outlook.com (2603:10b6:208:260::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6319.21; Sat, 22 Apr 2023 01:07:08 +0000 Received: from BN8NAM11FT063.eop-nam11.prod.protection.outlook.com (2603:10b6:408:f6:cafe::5e) by BN9PR03CA0336.outlook.office365.com (2603:10b6:408:f6::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6319.25 via Frontend Transport; Sat, 22 Apr 2023 01:07:08 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT063.mail.protection.outlook.com (10.13.177.110) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6319.27 via Frontend Transport; Sat, 22 Apr 2023 01:07:08 +0000 Received: from driver-dev1.pensando.io (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Fri, 21 Apr 2023 20:07:06 -0500 From: Brett Creeley To: , , , , , , CC: , , Subject: [PATCH v9 vfio 1/7] vfio: Commonize combine_ranges for use in other VFIO drivers Date: Fri, 21 Apr 2023 18:06:36 -0700 Message-ID: <20230422010642.60720-2-brett.creeley@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230422010642.60720-1-brett.creeley@amd.com> References: <20230422010642.60720-1-brett.creeley@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT063:EE_|MN2PR12MB4407:EE_ X-MS-Office365-Filtering-Correlation-Id: e80fa840-38f9-4350-f27f-08db42cde4ff X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: fn7l4WWRHJsxXgxsaCl98YobxLCXDGZfD9fKyIRNZ7HhfF18+DWSeJv6VuAhqJVUSz1QsQ1mnANgodx+MgOOirIFr6etme/GLkGxJrCZaG3mDzls8ojrTZtn/x0R7Wz6RwGT5x+4SmzFR6gKutOjGLnzjhRaJlhYLJQKixAEtUtrndCLVfrTNUmb/bsXS/rddY5K6HeOU688Tp0bSJoZty/3+6kmDewzYKMwjDHs0+uRMzYfaEtIuh578LXvARDZETSqaKAI4fkufeHJgC2F86NAZBTWIySdmlhxm4bOTMnjrqDfL5agO8GFBWt+zvnID//FvYqxuYLi3X3wXi9VOBVC3pksxRhzaSOyLARsA6FZN2LpeYGaydp8beLCqPFuDX37LN823kJkfMqZmp5J0kTVb8uJx6eEZe4++JcGTFmjz6LenneFjrke71maqVcUjfjitfNN97xrnVg6I2LU2eRWLsJp5zxUnOHgIpYhSZg3vm7mgoZEjCxOBGrMMmalhs4JfCVy63wRW/EY2vfls+xd4F+/jKqUaKPGn51RRZgt6mIqDG8DRepTqz+MDOUB7Z5FL4oUS42XP/fK45DflrENYShuM2vZwM32Kw/pz/FZrfTCwaLtnsHQfkhX87aQgHgcgyzx/HmYgYg2r8N/VegG2RaOSGrHZn9Skm8QlUFzzmGCzNxqDxct3emtB5TIazfAuqHmoz/nBxKIzM5/CgF/Y+9xi92w7nhy75ZXASU= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(376002)(346002)(39860400002)(136003)(396003)(451199021)(46966006)(36840700001)(40470700004)(2616005)(82310400005)(66899021)(36756003)(336012)(426003)(47076005)(36860700001)(83380400001)(40480700001)(40460700003)(2906002)(54906003)(5660300002)(44832011)(8936002)(8676002)(6666004)(478600001)(316002)(4326008)(82740400003)(1076003)(26005)(81166007)(110136005)(41300700001)(356005)(70586007)(70206006)(86362001)(186003)(16526019)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Apr 2023 01:07:08.0296 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e80fa840-38f9-4350-f27f-08db42cde4ff X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT063.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4407 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Currently only Mellanox uses the combine_ranges function. The new pds_vfio driver also needs this function. So, move it to a common location for other vendor drivers to use. Also, Simon Harmon noticed that RCT ordering was not followed for vfio_combin_iova_ranges(), so fix that. Cc: Yishai Hadas Signed-off-by: Brett Creeley Signed-off-by: Shannon Nelson Reviewed-by: Jason Gunthorpe Reviewed-by: Simon Horman --- drivers/vfio/pci/mlx5/cmd.c | 48 +------------------------------------ drivers/vfio/vfio_main.c | 47 ++++++++++++++++++++++++++++++++++++ include/linux/vfio.h | 3 +++ 3 files changed, 51 insertions(+), 47 deletions(-) diff --git a/drivers/vfio/pci/mlx5/cmd.c b/drivers/vfio/pci/mlx5/cmd.c index deed156e6165..7f6c51992a15 100644 --- a/drivers/vfio/pci/mlx5/cmd.c +++ b/drivers/vfio/pci/mlx5/cmd.c @@ -732,52 +732,6 @@ void mlx5fv_cmd_clean_migf_resources(struct mlx5_vf_migration_file *migf) mlx5vf_cmd_dealloc_pd(migf); } -static void combine_ranges(struct rb_root_cached *root, u32 cur_nodes, - u32 req_nodes) -{ - struct interval_tree_node *prev, *curr, *comb_start, *comb_end; - unsigned long min_gap; - unsigned long curr_gap; - - /* Special shortcut when a single range is required */ - if (req_nodes == 1) { - unsigned long last; - - curr = comb_start = interval_tree_iter_first(root, 0, ULONG_MAX); - while (curr) { - last = curr->last; - prev = curr; - curr = interval_tree_iter_next(curr, 0, ULONG_MAX); - if (prev != comb_start) - interval_tree_remove(prev, root); - } - comb_start->last = last; - return; - } - - /* Combine ranges which have the smallest gap */ - while (cur_nodes > req_nodes) { - prev = NULL; - min_gap = ULONG_MAX; - curr = interval_tree_iter_first(root, 0, ULONG_MAX); - while (curr) { - if (prev) { - curr_gap = curr->start - prev->last; - if (curr_gap < min_gap) { - min_gap = curr_gap; - comb_start = prev; - comb_end = curr; - } - } - prev = curr; - curr = interval_tree_iter_next(curr, 0, ULONG_MAX); - } - comb_start->last = comb_end->last; - interval_tree_remove(comb_end, root); - cur_nodes--; - } -} - static int mlx5vf_create_tracker(struct mlx5_core_dev *mdev, struct mlx5vf_pci_core_device *mvdev, struct rb_root_cached *ranges, u32 nnodes) @@ -800,7 +754,7 @@ static int mlx5vf_create_tracker(struct mlx5_core_dev *mdev, int i; if (num_ranges > max_num_range) { - combine_ranges(ranges, nnodes, max_num_range); + vfio_combine_iova_ranges(ranges, nnodes, max_num_range); num_ranges = max_num_range; } diff --git a/drivers/vfio/vfio_main.c b/drivers/vfio/vfio_main.c index 43bd6b76e2b6..ad8a3f948f05 100644 --- a/drivers/vfio/vfio_main.c +++ b/drivers/vfio/vfio_main.c @@ -864,6 +864,53 @@ static int vfio_ioctl_device_feature_migration(struct vfio_device *device, return 0; } +void vfio_combine_iova_ranges(struct rb_root_cached *root, u32 cur_nodes, + u32 req_nodes) +{ + struct interval_tree_node *prev, *curr, *comb_start, *comb_end; + unsigned long min_gap, curr_gap; + + /* Special shortcut when a single range is required */ + if (req_nodes == 1) { + unsigned long last; + + comb_start = interval_tree_iter_first(root, 0, ULONG_MAX); + curr = comb_start; + while (curr) { + last = curr->last; + prev = curr; + curr = interval_tree_iter_next(curr, 0, ULONG_MAX); + if (prev != comb_start) + interval_tree_remove(prev, root); + } + comb_start->last = last; + return; + } + + /* Combine ranges which have the smallest gap */ + while (cur_nodes > req_nodes) { + prev = NULL; + min_gap = ULONG_MAX; + curr = interval_tree_iter_first(root, 0, ULONG_MAX); + while (curr) { + if (prev) { + curr_gap = curr->start - prev->last; + if (curr_gap < min_gap) { + min_gap = curr_gap; + comb_start = prev; + comb_end = curr; + } + } + prev = curr; + curr = interval_tree_iter_next(curr, 0, ULONG_MAX); + } + comb_start->last = comb_end->last; + interval_tree_remove(comb_end, root); + cur_nodes--; + } +} +EXPORT_SYMBOL_GPL(vfio_combine_iova_ranges); + /* Ranges should fit into a single kernel page */ #define LOG_MAX_RANGES \ (PAGE_SIZE / sizeof(struct vfio_device_feature_dma_logging_range)) diff --git a/include/linux/vfio.h b/include/linux/vfio.h index 93134b023968..10db5aa3e985 100644 --- a/include/linux/vfio.h +++ b/include/linux/vfio.h @@ -241,6 +241,9 @@ int vfio_mig_get_next_state(struct vfio_device *device, enum vfio_device_mig_state new_fsm, enum vfio_device_mig_state *next_fsm); +void vfio_combine_iova_ranges(struct rb_root_cached *root, u32 cur_nodes, + u32 req_nodes); + /* * External user API */ From patchwork Sat Apr 22 01:06:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brett Creeley X-Patchwork-Id: 13220857 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 274FFC77B61 for ; Sat, 22 Apr 2023 01:07:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234117AbjDVBHV (ORCPT ); Fri, 21 Apr 2023 21:07:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37440 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233915AbjDVBHP (ORCPT ); Fri, 21 Apr 2023 21:07:15 -0400 Received: from NAM12-BN8-obe.outbound.protection.outlook.com (mail-bn8nam12on2044.outbound.protection.outlook.com [40.107.237.44]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 28DEF1727; Fri, 21 Apr 2023 18:07:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=bEfdDEHhrlTrYvp0yYse/MDeRt+k7TFmdyayhppvlSWdqSCeVla+U32R3FUjMujSrUFWmiLABDqv8isKdiznmKaRUnax1V0J67LjS+shQFWrEFRm5FWIs+3+ozsQQvXiM5VbdXgZl1MNJTxnF89dxfZkYJQC1uDEsSUl6qzGJzj7+WuNhH8NksmTotqMLLQf3Za5Jxqolrs+9oXbFB+obLZP/MTsj9YL5UkVnrG6gXt9bGG5feUWBtqwmnxtzN7WrO6zjWTZpGwlJeJGmc1Rn/zSn6NIVh6+4E9sr/UdWeV2QJ/YSVuBF+G4WyAj8Y8XoZvBZguphPOGT63b75hExQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=wkw3Y/dalVq9PbonM9EQsefpr/ggrfIAEWPLjJvPV4Y=; b=AA2UOOS9ysWsOAia3EaVj6U1rGoh8YjfpjllwRhcN1zvgMU7xlP1wXlQuSpHKWPN+lXIK4CplwmRYKp3QTRXsK6eDxFkTvNaKJC1u27KRMuFId/0KNdsVTWo8K+BfOJ4sAzrfaX/9Wc8uT/LHRFIGeTFqKmGI5CT0WMfnCYFmt1zHxZfmF4OUOHbSSSOGaFvSXM/P2RCnZAhgZWC14mggcpuY26pxbUghUzmxOVmyRT/fwl6WYBcpEIk2aQ0xh4TSZV55DZuEV4VC+QUbol3Yf8OmKmVvSH00YtuAiPkR99kNpR/iC0mIyX4cNKYZgFmzJ3tKEb2Ul+vJXyRCsNivg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=vger.kernel.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=wkw3Y/dalVq9PbonM9EQsefpr/ggrfIAEWPLjJvPV4Y=; b=wUKK5BJuMz4tvc11QQ6BF8DLR3rMV65csuqks0UxaPgOp9Xq2h8RcMSCQEpShLBkKRX9PA9OJUqnzlU/JHqCyN1JrAZPnbnwdoc+0yJKeN1qsv2HNMWGszbejlnemYm2olxbhsR34L3DDw4sMlxQjsoSTdRUzABwAOHHHVGwqpQ= Received: from BN8PR03CA0025.namprd03.prod.outlook.com (2603:10b6:408:94::38) by SA1PR12MB8967.namprd12.prod.outlook.com (2603:10b6:806:38b::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6319.22; Sat, 22 Apr 2023 01:07:11 +0000 Received: from BN8NAM11FT099.eop-nam11.prod.protection.outlook.com (2603:10b6:408:94:cafe::e0) by BN8PR03CA0025.outlook.office365.com (2603:10b6:408:94::38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6319.25 via Frontend Transport; Sat, 22 Apr 2023 01:07:10 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT099.mail.protection.outlook.com (10.13.177.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6319.27 via Frontend Transport; Sat, 22 Apr 2023 01:07:10 +0000 Received: from driver-dev1.pensando.io (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Fri, 21 Apr 2023 20:07:08 -0500 From: Brett Creeley To: , , , , , , CC: , , Subject: [PATCH v9 vfio 2/7] vfio/pds: Initial support for pds_vfio VFIO driver Date: Fri, 21 Apr 2023 18:06:37 -0700 Message-ID: <20230422010642.60720-3-brett.creeley@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230422010642.60720-1-brett.creeley@amd.com> References: <20230422010642.60720-1-brett.creeley@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT099:EE_|SA1PR12MB8967:EE_ X-MS-Office365-Filtering-Correlation-Id: 66f55d3e-6d53-4e5c-f2d2-08db42cde676 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: RSu6sx07JnA2sxciiK8UdJdvjPfpDNaPnZwrwI9vYQY/cFzM1dEjSZkYzywoavEfePTpl9pQ04eoyCXKY1qwvVkEFPh43IW178/N8iWs20KH8WH94dxr4qNHQUNbCiaKnhpxzyZhA+fcKmE1yfPMij3P+A4D+6jA4T/WhbmaiWigxr+0Qzps3o43fybQ0UqHXd2r6m2+iG7Z1GouiFLH+8lm7XKphTvT0/XAgB6KNIVeJefcUuZjYPr7A/w4PGTMpU0Y+sWigA0htDQ5FD8ymK5l+pNIGhH3EdR1+g0/opSP0K0pUduxkLAmzHygaxITNVvJMjOHj95X4goP5ARsRAW2Ek4ov5LXsA9chNXwYifO3MxPlgZEKxmBOHC4GaoBoMXGxT6pNzyW26KQ5KWQeW3gWTT2UgnXCCP6nWIFNlbLj99jYKjvPTlGI68DUfAZP8dIjblhoW5bSMxRJ+7GciLb39Z+Ew61BmDbMfDeGEUmgA/KeTfrnmD8GCCUYp/mpThu6y44ESV7JEpdcl7kTgrxQrqllnuqWiF//kT72VtbDRoV4NVTTirtLqDQ1AtNGvTG0KwGDYhCTeaKp7Ae7eeW3RC9xAUtXVlxbNwrVkKgn8Nk0MwK41+5HVt9uCLmbA3xfAQMJ15aSvb1VuLjPi2dwnIhk7LReu2LpsYx8JXzwc8jXjk2oUm999W+rHqlm4Q535h+UNQdRykl561WT4u9CP+nbf1riO/kc+BY25g= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(136003)(376002)(346002)(396003)(39860400002)(451199021)(46966006)(40470700004)(36840700001)(316002)(110136005)(54906003)(70206006)(70586007)(4326008)(16526019)(1076003)(40460700003)(26005)(47076005)(186003)(36860700001)(336012)(426003)(2616005)(83380400001)(40480700001)(82310400005)(41300700001)(5660300002)(8676002)(8936002)(478600001)(6666004)(86362001)(82740400003)(36756003)(81166007)(2906002)(44832011)(356005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Apr 2023 01:07:10.4872 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 66f55d3e-6d53-4e5c-f2d2-08db42cde676 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT099.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB8967 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org This is the initial framework for the new pds_vfio device driver. This does the very basics of registering the PDS PCI device and configuring it as a VFIO PCI device. With this change, the VF device can be bound to the pds_vfio driver on the host and presented to the VM as the VF's device type. Signed-off-by: Brett Creeley Signed-off-by: Shannon Nelson --- drivers/vfio/pci/Makefile | 2 + drivers/vfio/pci/pds/Makefile | 8 ++++ drivers/vfio/pci/pds/pci_drv.c | 72 ++++++++++++++++++++++++++++++ drivers/vfio/pci/pds/vfio_dev.c | 77 +++++++++++++++++++++++++++++++++ drivers/vfio/pci/pds/vfio_dev.h | 20 +++++++++ 5 files changed, 179 insertions(+) create mode 100644 drivers/vfio/pci/pds/Makefile create mode 100644 drivers/vfio/pci/pds/pci_drv.c create mode 100644 drivers/vfio/pci/pds/vfio_dev.c create mode 100644 drivers/vfio/pci/pds/vfio_dev.h diff --git a/drivers/vfio/pci/Makefile b/drivers/vfio/pci/Makefile index 24c524224da5..45167be462d8 100644 --- a/drivers/vfio/pci/Makefile +++ b/drivers/vfio/pci/Makefile @@ -11,3 +11,5 @@ obj-$(CONFIG_VFIO_PCI) += vfio-pci.o obj-$(CONFIG_MLX5_VFIO_PCI) += mlx5/ obj-$(CONFIG_HISI_ACC_VFIO_PCI) += hisilicon/ + +obj-$(CONFIG_PDS_VFIO_PCI) += pds/ diff --git a/drivers/vfio/pci/pds/Makefile b/drivers/vfio/pci/pds/Makefile new file mode 100644 index 000000000000..e1a55ae0f079 --- /dev/null +++ b/drivers/vfio/pci/pds/Makefile @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0 +# Copyright (c) 2023 Advanced Micro Devices, Inc. + +obj-$(CONFIG_PDS_VFIO_PCI) += pds_vfio.o + +pds_vfio-y := \ + pci_drv.o \ + vfio_dev.o diff --git a/drivers/vfio/pci/pds/pci_drv.c b/drivers/vfio/pci/pds/pci_drv.c new file mode 100644 index 000000000000..3856a4e78c8d --- /dev/null +++ b/drivers/vfio/pci/pds/pci_drv.c @@ -0,0 +1,72 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Copyright(c) 2023 Advanced Micro Devices, Inc. */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include + +#include + +#include "vfio_dev.h" + +#define PDS_VFIO_DRV_DESCRIPTION "AMD/Pensando VFIO Device Driver" +#define PCI_VENDOR_ID_PENSANDO 0x1dd8 + +static int +pds_vfio_pci_probe(struct pci_dev *pdev, + const struct pci_device_id *id) +{ + struct pds_vfio_pci_device *pds_vfio; + int err; + + pds_vfio = vfio_alloc_device(pds_vfio_pci_device, vfio_coredev.vdev, + &pdev->dev, pds_vfio_ops_info()); + if (IS_ERR(pds_vfio)) + return PTR_ERR(pds_vfio); + + dev_set_drvdata(&pdev->dev, &pds_vfio->vfio_coredev); + + err = vfio_pci_core_register_device(&pds_vfio->vfio_coredev); + if (err) + goto out_put_vdev; + + return 0; + +out_put_vdev: + vfio_put_device(&pds_vfio->vfio_coredev.vdev); + return err; +} + +static void +pds_vfio_pci_remove(struct pci_dev *pdev) +{ + struct pds_vfio_pci_device *pds_vfio = pds_vfio_pci_drvdata(pdev); + + vfio_pci_core_unregister_device(&pds_vfio->vfio_coredev); + vfio_put_device(&pds_vfio->vfio_coredev.vdev); +} + +static const struct pci_device_id +pds_vfio_pci_table[] = { + { PCI_DRIVER_OVERRIDE_DEVICE_VFIO(PCI_VENDOR_ID_PENSANDO, 0x1003) }, /* Ethernet VF */ + { 0, } +}; +MODULE_DEVICE_TABLE(pci, pds_vfio_pci_table); + +static struct pci_driver +pds_vfio_pci_driver = { + .name = KBUILD_MODNAME, + .id_table = pds_vfio_pci_table, + .probe = pds_vfio_pci_probe, + .remove = pds_vfio_pci_remove, + .driver_managed_dma = true, +}; + +module_pci_driver(pds_vfio_pci_driver); + +MODULE_DESCRIPTION(PDS_VFIO_DRV_DESCRIPTION); +MODULE_AUTHOR("Advanced Micro Devices, Inc."); +MODULE_LICENSE("GPL"); diff --git a/drivers/vfio/pci/pds/vfio_dev.c b/drivers/vfio/pci/pds/vfio_dev.c new file mode 100644 index 000000000000..0f70efec01e1 --- /dev/null +++ b/drivers/vfio/pci/pds/vfio_dev.c @@ -0,0 +1,77 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Copyright(c) 2023 Advanced Micro Devices, Inc. */ + +#include +#include + +#include "vfio_dev.h" + +struct pds_vfio_pci_device * +pds_vfio_pci_drvdata(struct pci_dev *pdev) +{ + struct vfio_pci_core_device *core_device = dev_get_drvdata(&pdev->dev); + + return container_of(core_device, struct pds_vfio_pci_device, + vfio_coredev); +} + +static int +pds_vfio_init_device(struct vfio_device *vdev) +{ + struct pds_vfio_pci_device *pds_vfio = + container_of(vdev, struct pds_vfio_pci_device, + vfio_coredev.vdev); + struct pci_dev *pdev = to_pci_dev(vdev->dev); + int err; + + err = vfio_pci_core_init_dev(vdev); + if (err) + return err; + + pds_vfio->vf_id = pci_iov_vf_id(pdev); + pds_vfio->pci_id = PCI_DEVID(pdev->bus->number, pdev->devfn); + + return 0; +} + +static int +pds_vfio_open_device(struct vfio_device *vdev) +{ + struct pds_vfio_pci_device *pds_vfio = + container_of(vdev, struct pds_vfio_pci_device, + vfio_coredev.vdev); + int err; + + err = vfio_pci_core_enable(&pds_vfio->vfio_coredev); + if (err) + return err; + + vfio_pci_core_finish_enable(&pds_vfio->vfio_coredev); + + return 0; +} + +static const struct vfio_device_ops +pds_vfio_ops = { + .name = "pds-vfio", + .init = pds_vfio_init_device, + .release = vfio_pci_core_release_dev, + .open_device = pds_vfio_open_device, + .close_device = vfio_pci_core_close_device, + .ioctl = vfio_pci_core_ioctl, + .device_feature = vfio_pci_core_ioctl_feature, + .read = vfio_pci_core_read, + .write = vfio_pci_core_write, + .mmap = vfio_pci_core_mmap, + .request = vfio_pci_core_request, + .match = vfio_pci_core_match, + .bind_iommufd = vfio_iommufd_physical_bind, + .unbind_iommufd = vfio_iommufd_physical_unbind, + .attach_ioas = vfio_iommufd_physical_attach_ioas, +}; + +const struct vfio_device_ops * +pds_vfio_ops_info(void) +{ + return &pds_vfio_ops; +} diff --git a/drivers/vfio/pci/pds/vfio_dev.h b/drivers/vfio/pci/pds/vfio_dev.h new file mode 100644 index 000000000000..66cfcab5b5bf --- /dev/null +++ b/drivers/vfio/pci/pds/vfio_dev.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright(c) 2023 Advanced Micro Devices, Inc. */ + +#ifndef _VFIO_DEV_H_ +#define _VFIO_DEV_H_ + +#include +#include + +struct pds_vfio_pci_device { + struct vfio_pci_core_device vfio_coredev; + + int vf_id; + int pci_id; +}; + +const struct vfio_device_ops *pds_vfio_ops_info(void); +struct pds_vfio_pci_device *pds_vfio_pci_drvdata(struct pci_dev *pdev); + +#endif /* _VFIO_DEV_H_ */ From patchwork Sat Apr 22 01:06:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brett Creeley X-Patchwork-Id: 13220858 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 49F2BC77B7C for ; Sat, 22 Apr 2023 01:07:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234127AbjDVBHZ (ORCPT ); Fri, 21 Apr 2023 21:07:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37462 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234107AbjDVBHS (ORCPT ); Fri, 21 Apr 2023 21:07:18 -0400 Received: from NAM10-BN7-obe.outbound.protection.outlook.com (mail-bn7nam10on2056.outbound.protection.outlook.com [40.107.92.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F14E51725; Fri, 21 Apr 2023 18:07:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=TY5ypDxq5bbcfMr9nI8DMQVAf/3yAA/qrIUpgBb0yZlt8JZwIRrReLW0CSf4oIpezNoJIVeh+E8Kn7y70EALNe0SVVt4PXDdmcisGcFpScGX1thSy/9QHgkc1K4D8aECV+A549kUODMXJZlBf0Et4slgnBwH+iI9WkBErQ5My1A5pflUmYzoxZqylPq1ov4IQQp8OsDWWmjQ62nI+NmcFflJRTKU/52CtmwmJHR14kT/wej6D9KcbURbbSsTvnjGrxB0RYJcSn5qTkkeqby/j3xoPH0XjvMlGkg/m8/pZ9QBlzRZ25poAMdiDKjmSHLFlR4VhZdIbsHwB/2dwi8B/A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=3qghWjfthKkBM5V5uU4oyRi5Y0wIoOPp/olQE6Dg0wQ=; b=aeuUsLwLd03wzSeEk6KRLu+91sV6uMWuY/SDyFVDQdYnKog/9MjFw0cEohaPaQSRkU6FY6W/VPHxh42d9utISCdiilCz3+CxzUyf7seB2WO8WYqkn+130EsSN1507i2Qbkl5hb2vbNMz4s0ZAcrB62WpW3wlatz63OqAQytaGOv7qAGUiK+zJOofH/YXdwu7ofoSQAHilIlmsGNnScJ28gbjJhj6BItAliPNBYNgOnT3HdbaQOtAZO/4+XXnR1hfttyYxXZHdehsPoxvCs/M3ErqEwNdTmX8KH6MXyxdfUZL+GsiZUM+5Bz0tUUeRZQ5gLjhvSKUyRzlnE1AJM9Y4A== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=vger.kernel.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=3qghWjfthKkBM5V5uU4oyRi5Y0wIoOPp/olQE6Dg0wQ=; b=JvEJTUgZnbaEfTY1pnz4izOkgNZrYb+m3QktalEloyxePZRflbgl8e4BbcZEFiHUlSCbmMRvRinxKgqrDA0dh/kzXFnet7x9v5CwAAxO8bAt8RLNITFJAF8cg4+5Vr3dy3qV0rmEChZM0eY4bftHsE3QILXDfHxJpl3OsVCLyP8= Received: from BN8PR04CA0043.namprd04.prod.outlook.com (2603:10b6:408:d4::17) by CH3PR12MB8330.namprd12.prod.outlook.com (2603:10b6:610:12c::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6319.22; Sat, 22 Apr 2023 01:07:12 +0000 Received: from BN8NAM11FT092.eop-nam11.prod.protection.outlook.com (2603:10b6:408:d4:cafe::ea) by BN8PR04CA0043.outlook.office365.com (2603:10b6:408:d4::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6319.27 via Frontend Transport; Sat, 22 Apr 2023 01:07:12 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT092.mail.protection.outlook.com (10.13.176.180) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6319.27 via Frontend Transport; Sat, 22 Apr 2023 01:07:12 +0000 Received: from driver-dev1.pensando.io (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Fri, 21 Apr 2023 20:07:11 -0500 From: Brett Creeley To: , , , , , , CC: , , Subject: [PATCH v9 vfio 3/7] vfio/pds: register with the pds_core PF Date: Fri, 21 Apr 2023 18:06:38 -0700 Message-ID: <20230422010642.60720-4-brett.creeley@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230422010642.60720-1-brett.creeley@amd.com> References: <20230422010642.60720-1-brett.creeley@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT092:EE_|CH3PR12MB8330:EE_ X-MS-Office365-Filtering-Correlation-Id: f521dd34-45a5-488b-5c3f-08db42cde7aa X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: jPNda+nTEmlR4RLdZNhQ84B/uXHtmvCD/FqMRt2N/XIIr5M0/snnAZr/Vsd5fDdx7PTY76SEAT40evamVOIJObUVi0UBAcLMy5cwHc3xcZChYmCO7Dq1kcE8PvlRmFAf/zlxz8tT465tsh9NO5V4gaJbPq82MQPphZnbdRySsY4ANky7xoBZmChUU3wYx98Z8knxZA7ynB8EfveRZ19dFS+fPUHOIaO9ljN+f55eGE/wRr4AEvvSLPKVVGofA9h+0JAV98Ln/kyuWfP/TZJvUjDz811JSqeauJa0Y92olwLhVYQWgpbwJSPODuOyUnhjGTOrLfDza9UXvPPYhVvcHtljQl4Pkonj2swQwM1fsjscapCkNSzPjelfBxRKdJnEG9bqlJv66eXjozuzYvl/bxfi3bXMRV3ry22k995e0nz4f6tefH7ttzyGWJ6dbbVtYhjYGYKPz1EGzGlfePDEzIbvO4v/ppZLfWmbu53ZFz2YrmzmwKydS28lQAbaaPFd3nEUux1txZF9N8LARhWmqkzMX3gs2TrKGwIW+EAsF7VHLKCCPX3Dp/EV8h5E5YDdfq9s4G55c4v912x9pGqB3hF+32Kkmev7hSUDRJIveX030uh/E5b4L4jc44dgZNeocJ1PatpUDQBShNPw/LAtrLVH3BflL9ImjT+tN2MnPZ6xfuqqGqVDaFPRznnsUQNin4CZPQQKnu1+qV4paqUs3V/LPLoW2usuds49w/H+Yec= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(376002)(396003)(136003)(346002)(39860400002)(451199021)(40470700004)(36840700001)(46966006)(44832011)(2906002)(82740400003)(356005)(81166007)(40460700003)(86362001)(82310400005)(40480700001)(478600001)(110136005)(316002)(41300700001)(70206006)(70586007)(4326008)(26005)(54906003)(8676002)(1076003)(6666004)(36756003)(36860700001)(186003)(16526019)(47076005)(8936002)(83380400001)(336012)(426003)(5660300002)(2616005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Apr 2023 01:07:12.5018 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f521dd34-45a5-488b-5c3f-08db42cde7aa X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT092.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8330 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org The pds_core driver will supply adminq services, so find the PF and register with the DSC services. Use the following commands to enable a VF: echo 1 > /sys/bus/pci/drivers/pds_core/$PF_BDF/sriov_numvfs Signed-off-by: Brett Creeley Signed-off-by: Shannon Nelson --- drivers/vfio/pci/pds/Makefile | 1 + drivers/vfio/pci/pds/cmds.c | 47 +++++++++++++++++++++++++++++++++ drivers/vfio/pci/pds/cmds.h | 10 +++++++ drivers/vfio/pci/pds/pci_drv.c | 19 +++++++++++++ drivers/vfio/pci/pds/pci_drv.h | 9 +++++++ drivers/vfio/pci/pds/vfio_dev.c | 11 ++++++++ drivers/vfio/pci/pds/vfio_dev.h | 6 +++++ include/linux/pds/pds_lm.h | 11 ++++++++ 8 files changed, 114 insertions(+) create mode 100644 drivers/vfio/pci/pds/cmds.c create mode 100644 drivers/vfio/pci/pds/cmds.h create mode 100644 drivers/vfio/pci/pds/pci_drv.h create mode 100644 include/linux/pds/pds_lm.h diff --git a/drivers/vfio/pci/pds/Makefile b/drivers/vfio/pci/pds/Makefile index e1a55ae0f079..87581111fa17 100644 --- a/drivers/vfio/pci/pds/Makefile +++ b/drivers/vfio/pci/pds/Makefile @@ -4,5 +4,6 @@ obj-$(CONFIG_PDS_VFIO_PCI) += pds_vfio.o pds_vfio-y := \ + cmds.o \ pci_drv.o \ vfio_dev.o diff --git a/drivers/vfio/pci/pds/cmds.c b/drivers/vfio/pci/pds/cmds.c new file mode 100644 index 000000000000..29a350cb5df5 --- /dev/null +++ b/drivers/vfio/pci/pds/cmds.c @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Copyright(c) 2023 Advanced Micro Devices, Inc. */ + +#include +#include + +#include +#include +#include +#include + +#include "vfio_dev.h" +#include "cmds.h" + +int +pds_vfio_register_client_cmd(struct pds_vfio_pci_device *pds_vfio) +{ + struct pci_dev *pdev = pds_vfio_to_pci_dev(pds_vfio); + char devname[PDS_DEVNAME_LEN]; + int ci; + + snprintf(devname, sizeof(devname), + "%s.%d-%u", PDS_LM_DEV_NAME, pci_domain_nr(pdev->bus), + pds_vfio->pci_id); + + ci = pds_client_register(pci_physfn(pdev), devname); + if (ci <= 0) + return ci; + + pds_vfio->client_id = ci; + + return 0; +} + +void +pds_vfio_unregister_client_cmd(struct pds_vfio_pci_device *pds_vfio) +{ + struct pci_dev *pdev = pds_vfio_to_pci_dev(pds_vfio); + int err; + + err = pds_client_unregister(pci_physfn(pdev), pds_vfio->client_id); + if (err) + dev_err(&pdev->dev, "unregister from DSC failed: %pe\n", + ERR_PTR(err)); + + pds_vfio->client_id = 0; +} diff --git a/drivers/vfio/pci/pds/cmds.h b/drivers/vfio/pci/pds/cmds.h new file mode 100644 index 000000000000..4c592afccf89 --- /dev/null +++ b/drivers/vfio/pci/pds/cmds.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright(c) 2023 Advanced Micro Devices, Inc. */ + +#ifndef _CMDS_H_ +#define _CMDS_H_ + +int pds_vfio_register_client_cmd(struct pds_vfio_pci_device *pds_vfio); +void pds_vfio_unregister_client_cmd(struct pds_vfio_pci_device *pds_vfio); + +#endif /* _CMDS_H_ */ diff --git a/drivers/vfio/pci/pds/pci_drv.c b/drivers/vfio/pci/pds/pci_drv.c index 3856a4e78c8d..dca7d457bd8c 100644 --- a/drivers/vfio/pci/pds/pci_drv.c +++ b/drivers/vfio/pci/pds/pci_drv.c @@ -8,9 +8,13 @@ #include #include +#include #include +#include #include "vfio_dev.h" +#include "pci_drv.h" +#include "cmds.h" #define PDS_VFIO_DRV_DESCRIPTION "AMD/Pensando VFIO Device Driver" #define PCI_VENDOR_ID_PENSANDO 0x1dd8 @@ -28,13 +32,27 @@ pds_vfio_pci_probe(struct pci_dev *pdev, return PTR_ERR(pds_vfio); dev_set_drvdata(&pdev->dev, &pds_vfio->vfio_coredev); + pds_vfio->pdsc = pdsc_get_pf_struct(pdev); + if (IS_ERR_OR_NULL(pds_vfio->pdsc)) { + err = PTR_ERR(pds_vfio->pdsc) ?: -ENODEV; + goto out_put_vdev; + } err = vfio_pci_core_register_device(&pds_vfio->vfio_coredev); if (err) goto out_put_vdev; + err = pds_vfio_register_client_cmd(pds_vfio); + if (err) { + dev_err(&pdev->dev, "failed to register as client: %pe\n", + ERR_PTR(err)); + goto out_unregister_coredev; + } + return 0; +out_unregister_coredev: + vfio_pci_core_unregister_device(&pds_vfio->vfio_coredev); out_put_vdev: vfio_put_device(&pds_vfio->vfio_coredev.vdev); return err; @@ -45,6 +63,7 @@ pds_vfio_pci_remove(struct pci_dev *pdev) { struct pds_vfio_pci_device *pds_vfio = pds_vfio_pci_drvdata(pdev); + pds_vfio_unregister_client_cmd(pds_vfio); vfio_pci_core_unregister_device(&pds_vfio->vfio_coredev); vfio_put_device(&pds_vfio->vfio_coredev.vdev); } diff --git a/drivers/vfio/pci/pds/pci_drv.h b/drivers/vfio/pci/pds/pci_drv.h new file mode 100644 index 000000000000..e79bed12ed14 --- /dev/null +++ b/drivers/vfio/pci/pds/pci_drv.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright(c) 2023 Advanced Micro Devices, Inc. */ + +#ifndef _PCI_DRV_H +#define _PCI_DRV_H + +#include + +#endif /* _PCI_DRV_H */ diff --git a/drivers/vfio/pci/pds/vfio_dev.c b/drivers/vfio/pci/pds/vfio_dev.c index 0f70efec01e1..228b27a0aa60 100644 --- a/drivers/vfio/pci/pds/vfio_dev.c +++ b/drivers/vfio/pci/pds/vfio_dev.c @@ -6,6 +6,12 @@ #include "vfio_dev.h" +struct pci_dev * +pds_vfio_to_pci_dev(struct pds_vfio_pci_device *pds_vfio) +{ + return pds_vfio->vfio_coredev.pdev; +} + struct pds_vfio_pci_device * pds_vfio_pci_drvdata(struct pci_dev *pdev) { @@ -31,6 +37,11 @@ pds_vfio_init_device(struct vfio_device *vdev) pds_vfio->vf_id = pci_iov_vf_id(pdev); pds_vfio->pci_id = PCI_DEVID(pdev->bus->number, pdev->devfn); + dev_dbg(&pdev->dev, "%s: PF %#04x VF %#04x (%d) vf_id %d domain %d pds_vfio %p\n", + __func__, pci_dev_id(pdev->physfn), + pds_vfio->pci_id, pds_vfio->pci_id, pds_vfio->vf_id, + pci_domain_nr(pdev->bus), pds_vfio); + return 0; } diff --git a/drivers/vfio/pci/pds/vfio_dev.h b/drivers/vfio/pci/pds/vfio_dev.h index 66cfcab5b5bf..92e8ff241ca8 100644 --- a/drivers/vfio/pci/pds/vfio_dev.h +++ b/drivers/vfio/pci/pds/vfio_dev.h @@ -7,14 +7,20 @@ #include #include +struct pdsc; + struct pds_vfio_pci_device { struct vfio_pci_core_device vfio_coredev; + struct pdsc *pdsc; int vf_id; int pci_id; + u16 client_id; }; const struct vfio_device_ops *pds_vfio_ops_info(void); struct pds_vfio_pci_device *pds_vfio_pci_drvdata(struct pci_dev *pdev); +struct pci_dev *pds_vfio_to_pci_dev(struct pds_vfio_pci_device *pds_vfio); + #endif /* _VFIO_DEV_H_ */ diff --git a/include/linux/pds/pds_lm.h b/include/linux/pds/pds_lm.h new file mode 100644 index 000000000000..26d17efeff28 --- /dev/null +++ b/include/linux/pds/pds_lm.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright(c) 2023 Advanced Micro Devices, Inc */ + +#ifndef _PDS_LM_H_ +#define _PDS_LM_H_ + +#include "pds_common.h" + +#define PDS_LM_DEV_NAME PDS_CORE_DRV_NAME "." PDS_DEV_TYPE_LM_STR + +#endif /* _PDS_LM_H_ */ From patchwork Sat Apr 22 01:06:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brett Creeley X-Patchwork-Id: 13220861 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8E4E8C7EE20 for ; Sat, 22 Apr 2023 01:07:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234148AbjDVBHq (ORCPT ); Fri, 21 Apr 2023 21:07:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38028 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234138AbjDVBHg (ORCPT ); Fri, 21 Apr 2023 21:07:36 -0400 Received: from NAM10-MW2-obe.outbound.protection.outlook.com (mail-mw2nam10on2061.outbound.protection.outlook.com [40.107.94.61]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 44EBC268D; Fri, 21 Apr 2023 18:07:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=g9Fa0Z5M/lsB3rCrFne8CwzjTEgzQS3hF7mX1N4IqTmxlTdvQyLE4cjJ28CTYsKoYh195vHV5xyakVnc8a/bAecZpwSUOwdyq92qONcMv3QJO4UcUbGm02GK9CaP+1IiM/5Cb2Gk+BRHgwhDwBaYkJ8SZCWk3z3aKV5Le9jIg0juuwQNBiAdRuLtsfYI8QNh+Gs7qAUGm7xRojcXnzFu1nlRLj0d9/ytB1QrtxYzSkVvtqZaUAzgK7HKuyGx9yLXbLGQCMLqyvoXCTiL0X2IBmyctH9HK2paof2jdC8WFAjgvW3Bdirh+zTQV4bnDNo8AqBOJUoh4VWDCQS6A3bL2g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=NCtnbogc7SWqb/0JaQrg5HRLKm0KmsW25GfiEYYy4ro=; b=E1baAAx8S0s8o1DEPw864ts+9he27scZI1JFovFxBCdYdTTvc6I5vJofnA+qYf6NfgMfqABvlb9ViH3iBSZxUYu58tfM/FLf+QW1ELsYv0nA54WxXU5+XsgalRFle7vZbbMv8tfOUxkrYANkWstfV9niZUTDBq9s4QSVl3THmB0PnyL2WgP6i5Tvgi3EH0hU9UwJQTs/8hVqzKpLh6FVb0Ab8rcXHoREZU83/ZuM3Ex2MS+XpO+aizhZSSx0hTET1J3mJmz2U+B/9saX4K982M7nKi1qsFX0yjIlMMHVFpi74klln7f7MrflWUxbyj9654WlMHfvTYcl2QQMYFWhVg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=vger.kernel.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=NCtnbogc7SWqb/0JaQrg5HRLKm0KmsW25GfiEYYy4ro=; b=4BHu2+8Cw/NMsPRsBPihDimIpYZGdlzK+tJ4674+mDfg2Mpyj1RhyGGk0fEJwFvZ7P+iZxh5XnIRUKaiGaf9/ImLkc9g/mjcp4XMhBsXCCi5Mqba8DG9rnR+VHKlhkDmdaxldfoVVudhfD/6R4/t9Om8a7kR8VkLrvjXPHEN+yA= Received: from BN9PR03CA0908.namprd03.prod.outlook.com (2603:10b6:408:107::13) by SJ2PR12MB8036.namprd12.prod.outlook.com (2603:10b6:a03:4c1::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6298.45; Sat, 22 Apr 2023 01:07:15 +0000 Received: from BN8NAM11FT074.eop-nam11.prod.protection.outlook.com (2603:10b6:408:107:cafe::f6) by BN9PR03CA0908.outlook.office365.com (2603:10b6:408:107::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6319.27 via Frontend Transport; Sat, 22 Apr 2023 01:07:15 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT074.mail.protection.outlook.com (10.13.176.154) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6319.27 via Frontend Transport; Sat, 22 Apr 2023 01:07:15 +0000 Received: from driver-dev1.pensando.io (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Fri, 21 Apr 2023 20:07:13 -0500 From: Brett Creeley To: , , , , , , CC: , , Subject: [PATCH v9 vfio 4/7] vfio/pds: Add VFIO live migration support Date: Fri, 21 Apr 2023 18:06:39 -0700 Message-ID: <20230422010642.60720-5-brett.creeley@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230422010642.60720-1-brett.creeley@amd.com> References: <20230422010642.60720-1-brett.creeley@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT074:EE_|SJ2PR12MB8036:EE_ X-MS-Office365-Filtering-Correlation-Id: 5a886db4-c663-43b2-cf96-08db42cde93d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: WgM+mxX9hQeRNZfQjt2Y7db1cYisM1bB4za4QGcr2i19NnAzC4rIfrRoKAXcIBIVr4WQLRKmPckXecX3V3t8A5ODJBODnA8+/D6y3AjCkNg/IYVPBVUFsVnQNh41KifGBAKnx/FWdnmGxVUKgF4r111yNXkr4J1IjPUYKyXNC29Km/5NGzxvYtLvY5UbivkHNcksuzP64IxMwumGPoiCiq+yBHr07bOMuff+pw7UzPzao22unzTJk8ESf3QE3qJgriCT8pFRF2FK4hqRbpMXMeTapsTF5/kINHtHmQjIBVRHTgO6o9HBVoA9TrDDflyO8alp8zTGcQBcKLq9qf4lWlaT67qHSojWym+7uoxiktT4azbIM9U2FsM/+c2cbmdEX+o38NCI1yTXCLh9vBkE36cg61XD8/8lnUpgqU4jEoW9THfHZsY0StSND6KgVAq7OdukvQDrN2PImGr05WpbYrAGHevvya2w0/tZOrGg9sTO92eGj0OH6pNACHeulUUlNDpdTZ1sH4BouDKEWxq0VeFmQloRIEB34bmvy744j0szAqX2NFWG5jDhy9EpN6TzLgsGubDHCIREY6t3E+TMUc90bC7ofjeKOvEZ3Z3HxyVDOSlDLp4y3AkAoeSfiMxwQqwsWVU6l7KS6q2iVp4zKrk/6GpeuWi6phsCUmWlwXERB4Q09e4sQZAAVKt0VMaeGGUEsn+MJfCtIKtQu+3wrSa4LzkugBqcxzTxrxTXlKM= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(39860400002)(376002)(136003)(396003)(346002)(451199021)(40470700004)(46966006)(36840700001)(478600001)(6666004)(8936002)(8676002)(316002)(82740400003)(41300700001)(4326008)(70586007)(40480700001)(70206006)(54906003)(110136005)(81166007)(356005)(40460700003)(186003)(30864003)(2906002)(16526019)(83380400001)(1076003)(26005)(426003)(336012)(47076005)(82310400005)(36756003)(36860700001)(5660300002)(86362001)(2616005)(44832011)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Apr 2023 01:07:15.1615 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5a886db4-c663-43b2-cf96-08db42cde93d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT074.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB8036 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Add live migration support via the VFIO subsystem. The migration implementation aligns with the definition from uapi/vfio.h and uses the pds_core PF's adminq for device configuration. The ability to suspend, resume, and transfer VF device state data is included along with the required admin queue command structures and implementations. PDS_LM_CMD_SUSPEND and PDS_LM_CMD_SUSPEND_STATUS are added to support the VF device suspend operation. PDS_LM_CMD_RESUME is added to support the VF device resume operation. PDS_LM_CMD_STATUS is added to determine the exact size of the VF device state data. PDS_LM_CMD_SAVE is added to get the VF device state data. PDS_LM_CMD_RESTORE is added to restore the VF device with the previously saved data from PDS_LM_CMD_SAVE. PDS_LM_CMD_HOST_VF_STATUS is added to notify the device when a migration is in/not-in progress from the host's perspective. Signed-off-by: Brett Creeley Signed-off-by: Shannon Nelson --- drivers/vfio/pci/pds/Makefile | 1 + drivers/vfio/pci/pds/cmds.c | 316 +++++++++++++++++++++++ drivers/vfio/pci/pds/cmds.h | 8 +- drivers/vfio/pci/pds/lm.c | 437 ++++++++++++++++++++++++++++++++ drivers/vfio/pci/pds/lm.h | 41 +++ drivers/vfio/pci/pds/pci_drv.c | 15 ++ drivers/vfio/pci/pds/vfio_dev.c | 127 +++++++++- drivers/vfio/pci/pds/vfio_dev.h | 11 + include/linux/pds/pds_adminq.h | 12 + include/linux/pds/pds_lm.h | 206 +++++++++++++++ 10 files changed, 1172 insertions(+), 2 deletions(-) create mode 100644 drivers/vfio/pci/pds/lm.c create mode 100644 drivers/vfio/pci/pds/lm.h diff --git a/drivers/vfio/pci/pds/Makefile b/drivers/vfio/pci/pds/Makefile index 87581111fa17..dbaf613d3794 100644 --- a/drivers/vfio/pci/pds/Makefile +++ b/drivers/vfio/pci/pds/Makefile @@ -5,5 +5,6 @@ obj-$(CONFIG_PDS_VFIO_PCI) += pds_vfio.o pds_vfio-y := \ cmds.o \ + lm.o \ pci_drv.o \ vfio_dev.o diff --git a/drivers/vfio/pci/pds/cmds.c b/drivers/vfio/pci/pds/cmds.c index 29a350cb5df5..b51873dace96 100644 --- a/drivers/vfio/pci/pds/cmds.c +++ b/drivers/vfio/pci/pds/cmds.c @@ -3,6 +3,7 @@ #include #include +#include #include #include @@ -12,6 +13,35 @@ #include "vfio_dev.h" #include "cmds.h" +#define SUSPEND_TIMEOUT_S 5 +#define SUSPEND_CHECK_INTERVAL_MS 1 + +static int +pds_vfio_client_adminq_cmd(struct pds_vfio_pci_device *pds_vfio, + union pds_core_adminq_cmd *req, + size_t req_len, + union pds_core_adminq_comp *resp, + u64 flags) +{ + union pds_core_adminq_cmd cmd = {}; + size_t cp_len; + int err; + + /* Wrap the client request */ + cmd.client_request.opcode = PDS_AQ_CMD_CLIENT_CMD; + cmd.client_request.client_id = cpu_to_le16(pds_vfio->client_id); + cp_len = min_t(size_t, req_len, sizeof(cmd.client_request.client_cmd)); + memcpy(cmd.client_request.client_cmd, req, cp_len); + + err = pdsc_adminq_post(pds_vfio->pdsc, &cmd, resp, + !!(flags & PDS_AQ_FLAG_FASTPOLL)); + if (err && err != -EAGAIN) + dev_info(pds_vfio_to_dev(pds_vfio), "client admin cmd failed: %pe\n", + ERR_PTR(err)); + + return err; +} + int pds_vfio_register_client_cmd(struct pds_vfio_pci_device *pds_vfio) { @@ -45,3 +75,289 @@ pds_vfio_unregister_client_cmd(struct pds_vfio_pci_device *pds_vfio) pds_vfio->client_id = 0; } + +static int +pds_vfio_suspend_wait_device_cmd(struct pds_vfio_pci_device *pds_vfio) +{ + union pds_core_adminq_cmd cmd = { + .lm_suspend_status.opcode = PDS_LM_CMD_SUSPEND_STATUS, + .lm_suspend_status.vf_id = cpu_to_le16(pds_vfio->vf_id), + }; + struct device *dev = pds_vfio_to_dev(pds_vfio); + union pds_core_adminq_comp comp = {}; + unsigned long time_limit; + unsigned long time_start; + unsigned long time_done; + int err; + + time_start = jiffies; + time_limit = time_start + HZ * SUSPEND_TIMEOUT_S; + do { + err = pds_vfio_client_adminq_cmd(pds_vfio, &cmd, sizeof(cmd), + &comp, PDS_AQ_FLAG_FASTPOLL); + if (err != -EAGAIN) + break; + + msleep(SUSPEND_CHECK_INTERVAL_MS); + } while (time_before(jiffies, time_limit)); + + time_done = jiffies; + dev_dbg(dev, "%s: vf%u: Suspend comp received in %d msecs\n", + __func__, pds_vfio->vf_id, + jiffies_to_msecs(time_done - time_start)); + + /* Check the results */ + if (time_after_eq(time_done, time_limit)) { + dev_err(dev, "%s: vf%u: Suspend comp timeout\n", __func__, + pds_vfio->vf_id); + err = -ETIMEDOUT; + } + + return err; +} + +int +pds_vfio_suspend_device_cmd(struct pds_vfio_pci_device *pds_vfio) +{ + union pds_core_adminq_cmd cmd = { + .lm_suspend.opcode = PDS_LM_CMD_SUSPEND, + .lm_suspend.vf_id = cpu_to_le16(pds_vfio->vf_id), + }; + struct device *dev = pds_vfio_to_dev(pds_vfio); + union pds_core_adminq_comp comp = {}; + int err; + + dev_dbg(dev, "vf%u: Suspend device\n", pds_vfio->vf_id); + + err = pds_vfio_client_adminq_cmd(pds_vfio, &cmd, sizeof(cmd), + &comp, PDS_AQ_FLAG_FASTPOLL); + if (err) { + dev_err(dev, "vf%u: Suspend failed: %pe\n", + pds_vfio->vf_id, ERR_PTR(err)); + return err; + } + + return pds_vfio_suspend_wait_device_cmd(pds_vfio); +} + +int +pds_vfio_resume_device_cmd(struct pds_vfio_pci_device *pds_vfio) +{ + union pds_core_adminq_cmd cmd = { + .lm_resume.opcode = PDS_LM_CMD_RESUME, + .lm_resume.vf_id = cpu_to_le16(pds_vfio->vf_id), + }; + struct device *dev = pds_vfio_to_dev(pds_vfio); + union pds_core_adminq_comp comp = {}; + + dev_dbg(dev, "vf%u: Resume device\n", pds_vfio->vf_id); + + return pds_vfio_client_adminq_cmd(pds_vfio, &cmd, sizeof(cmd), + &comp, 0); +} + +int +pds_vfio_get_lm_status_cmd(struct pds_vfio_pci_device *pds_vfio, u64 *size) +{ + union pds_core_adminq_cmd cmd = { + .lm_status.opcode = PDS_LM_CMD_STATUS, + .lm_status.vf_id = cpu_to_le16(pds_vfio->vf_id), + }; + struct device *dev = pds_vfio_to_dev(pds_vfio); + union pds_core_adminq_comp comp = {}; + int err; + + dev_dbg(dev, "vf%u: Get migration status\n", + pds_vfio->vf_id); + + err = pds_vfio_client_adminq_cmd(pds_vfio, &cmd, sizeof(cmd), + &comp, 0); + if (err) + return err; + + *size = le64_to_cpu(comp.lm_status.size); + return 0; +} + +static int +pds_vfio_dma_map_lm_file(struct device *dev, enum dma_data_direction dir, + struct pds_vfio_lm_file *lm_file) +{ + struct pds_lm_sg_elem *sgl, *sge; + struct scatterlist *sg; + dma_addr_t sgl_addr; + size_t sgl_size; + int err; + int i; + + if (!lm_file) + return -EINVAL; + + /* dma map file pages */ + err = dma_map_sgtable(dev, &lm_file->sg_table, dir, 0); + if (err) + return err; + + lm_file->num_sge = lm_file->sg_table.nents; + + /* alloc sgl */ + sgl_size = lm_file->num_sge * sizeof(struct pds_lm_sg_elem); + sgl = kzalloc(sgl_size, GFP_KERNEL); + if (!sgl) { + err = -ENOMEM; + goto err_alloc_sgl; + } + + sgl_addr = dma_map_single(dev, sgl, sgl_size, DMA_TO_DEVICE); + if (dma_mapping_error(dev, sgl_addr)) { + err = -EIO; + goto err_map_sgl; + } + + lm_file->sgl = sgl; + lm_file->sgl_addr = sgl_addr; + + /* fill sgl */ + sge = sgl; + for_each_sgtable_dma_sg(&lm_file->sg_table, sg, i) { + sge->addr = cpu_to_le64(sg_dma_address(sg)); + sge->len = cpu_to_le32(sg_dma_len(sg)); + dev_dbg(dev, "addr = %llx, len = %u\n", sge->addr, sge->len); + sge++; + } + + return 0; + +err_map_sgl: + kfree(sgl); +err_alloc_sgl: + dma_unmap_sgtable(dev, &lm_file->sg_table, dir, 0); + return err; +} + +static void +pds_vfio_dma_unmap_lm_file(struct device *dev, enum dma_data_direction dir, + struct pds_vfio_lm_file *lm_file) +{ + if (!lm_file) + return; + + /* free sgl */ + if (lm_file->sgl) { + dma_unmap_single(dev, lm_file->sgl_addr, + lm_file->num_sge * sizeof(struct pds_lm_sg_elem), + DMA_TO_DEVICE); + kfree(lm_file->sgl); + lm_file->sgl = NULL; + lm_file->sgl_addr = DMA_MAPPING_ERROR; + lm_file->num_sge = 0; + } + + /* dma unmap file pages */ + dma_unmap_sgtable(dev, &lm_file->sg_table, dir, 0); +} + +int +pds_vfio_get_lm_state_cmd(struct pds_vfio_pci_device *pds_vfio) +{ + union pds_core_adminq_cmd cmd = { + .lm_save.opcode = PDS_LM_CMD_SAVE, + .lm_save.vf_id = cpu_to_le16(pds_vfio->vf_id), + }; + struct pci_dev *pdev = pds_vfio_to_pci_dev(pds_vfio); + struct device *pdsc_dev = &pci_physfn(pdev)->dev; + union pds_core_adminq_comp comp = {}; + struct pds_vfio_lm_file *lm_file; + int err; + + dev_dbg(&pdev->dev, "vf%u: Get migration state\n", pds_vfio->vf_id); + + lm_file = pds_vfio->save_file; + + err = pds_vfio_dma_map_lm_file(pdsc_dev, DMA_FROM_DEVICE, lm_file); + if (err) { + dev_err(&pdev->dev, "failed to map save migration file: %pe\n", + ERR_PTR(err)); + return err; + } + + cmd.lm_save.sgl_addr = cpu_to_le64(lm_file->sgl_addr); + cmd.lm_save.num_sge = cpu_to_le32(lm_file->num_sge); + + err = pds_vfio_client_adminq_cmd(pds_vfio, &cmd, sizeof(cmd), + &comp, 0); + if (err) + dev_err(&pdev->dev, "failed to get migration state: %pe\n", + ERR_PTR(err)); + + pds_vfio_dma_unmap_lm_file(pdsc_dev, DMA_FROM_DEVICE, lm_file); + + return err; +} + +int +pds_vfio_set_lm_state_cmd(struct pds_vfio_pci_device *pds_vfio) +{ + union pds_core_adminq_cmd cmd = { + .lm_restore.opcode = PDS_LM_CMD_RESTORE, + .lm_restore.vf_id = cpu_to_le16(pds_vfio->vf_id), + }; + struct pci_dev *pdev = pds_vfio_to_pci_dev(pds_vfio); + struct device *pdsc_dev = &pci_physfn(pdev)->dev; + union pds_core_adminq_comp comp = {}; + struct pds_vfio_lm_file *lm_file; + int err; + + dev_dbg(&pdev->dev, "vf%u: Set migration state\n", pds_vfio->vf_id); + + lm_file = pds_vfio->restore_file; + + err = pds_vfio_dma_map_lm_file(pdsc_dev, DMA_TO_DEVICE, lm_file); + if (err) { + dev_err(&pdev->dev, "failed to map restore migration file: %pe\n", + ERR_PTR(err)); + return err; + } + + cmd.lm_restore.sgl_addr = cpu_to_le64(lm_file->sgl_addr); + cmd.lm_restore.num_sge = cpu_to_le32(lm_file->num_sge); + + err = pds_vfio_client_adminq_cmd(pds_vfio, &cmd, sizeof(cmd), + &comp, 0); + if (err) + dev_err(&pdev->dev, "failed to set migration state: %pe\n", + ERR_PTR(err)); + + pds_vfio_dma_unmap_lm_file(pdsc_dev, DMA_TO_DEVICE, lm_file); + + return err; +} + +void +pds_vfio_send_host_vf_lm_status_cmd(struct pds_vfio_pci_device *pds_vfio, + enum pds_lm_host_vf_status vf_status) +{ + union pds_core_adminq_cmd cmd = { + .lm_host_vf_status.opcode = PDS_LM_CMD_HOST_VF_STATUS, + .lm_host_vf_status.vf_id = cpu_to_le16(pds_vfio->vf_id), + .lm_host_vf_status.status = vf_status, + }; + struct device *dev = pds_vfio_to_dev(pds_vfio); + union pds_core_adminq_comp comp = {}; + int err; + + dev_dbg(dev, "vf%u: Set host VF LM status: %u", + pds_vfio->vf_id, vf_status); + if (vf_status != PDS_LM_STA_IN_PROGRESS && + vf_status != PDS_LM_STA_NONE) { + dev_warn(dev, "Invalid host VF migration status, %d\n", + vf_status); + return; + } + + err = pds_vfio_client_adminq_cmd(pds_vfio, &cmd, sizeof(cmd), + &comp, 0); + if (err) + dev_warn(dev, "failed to send host VF migration status: %pe\n", + ERR_PTR(err)); +} diff --git a/drivers/vfio/pci/pds/cmds.h b/drivers/vfio/pci/pds/cmds.h index 4c592afccf89..3d8a5508c733 100644 --- a/drivers/vfio/pci/pds/cmds.h +++ b/drivers/vfio/pci/pds/cmds.h @@ -6,5 +6,11 @@ int pds_vfio_register_client_cmd(struct pds_vfio_pci_device *pds_vfio); void pds_vfio_unregister_client_cmd(struct pds_vfio_pci_device *pds_vfio); - +int pds_vfio_suspend_device_cmd(struct pds_vfio_pci_device *pds_vfio); +int pds_vfio_resume_device_cmd(struct pds_vfio_pci_device *pds_vfio); +int pds_vfio_get_lm_status_cmd(struct pds_vfio_pci_device *pds_vfio, u64 *size); +int pds_vfio_get_lm_state_cmd(struct pds_vfio_pci_device *pds_vfio); +int pds_vfio_set_lm_state_cmd(struct pds_vfio_pci_device *pds_vfio); +void pds_vfio_send_host_vf_lm_status_cmd(struct pds_vfio_pci_device *pds_vfio, + enum pds_lm_host_vf_status vf_status); #endif /* _CMDS_H_ */ diff --git a/drivers/vfio/pci/pds/lm.c b/drivers/vfio/pci/pds/lm.c new file mode 100644 index 000000000000..4e736f415df2 --- /dev/null +++ b/drivers/vfio/pci/pds/lm.c @@ -0,0 +1,437 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Copyright(c) 2023 Advanced Micro Devices, Inc. */ + +#include +#include +#include +#include +#include +#include + +#include "vfio_dev.h" +#include "cmds.h" + +static struct pds_vfio_lm_file * +pds_vfio_get_lm_file(const struct file_operations *fops, int flags, u64 size) +{ + struct pds_vfio_lm_file *lm_file = NULL; + unsigned long long npages; + struct page **pages; + int err = 0; + + if (!size) + return NULL; + + /* Alloc file structure */ + lm_file = kzalloc(sizeof(*lm_file), GFP_KERNEL); + if (!lm_file) + return NULL; + + /* Create file */ + lm_file->filep = anon_inode_getfile("pds_vfio_lm", fops, lm_file, flags); + if (!lm_file->filep) + goto err_get_file; + + stream_open(lm_file->filep->f_inode, lm_file->filep); + mutex_init(&lm_file->lock); + + lm_file->size = size; + + /* Allocate memory for file pages */ + npages = DIV_ROUND_UP_ULL(lm_file->size, PAGE_SIZE); + + pages = kcalloc(npages, sizeof(*pages), GFP_KERNEL); + if (!pages) + goto err_alloc_pages; + + for (unsigned long long i = 0; i < npages; i++) { + pages[i] = alloc_page(GFP_KERNEL); + if (!pages[i]) + goto err_alloc_page; + } + + lm_file->pages = pages; + lm_file->npages = npages; + lm_file->alloc_size = npages * PAGE_SIZE; + + /* Create scatterlist of file pages to use for DMA mapping later */ + err = sg_alloc_table_from_pages(&lm_file->sg_table, pages, npages, + 0, size, GFP_KERNEL); + if (err) + goto err_alloc_sg_table; + + /* prevent file from being released before we are done with it */ + get_file(lm_file->filep); + + return lm_file; + +err_alloc_sg_table: +err_alloc_page: + /* free allocated pages */ + for (unsigned long long i = 0; i < npages && pages[i]; i++) + __free_page(pages[i]); + kfree(pages); +err_alloc_pages: + fput(lm_file->filep); + mutex_destroy(&lm_file->lock); +err_get_file: + kfree(lm_file); + + return NULL; +} + +static void +pds_vfio_put_lm_file(struct pds_vfio_lm_file *lm_file) +{ + mutex_lock(&lm_file->lock); + + lm_file->size = 0; + lm_file->alloc_size = 0; + + /* Free scatter list of file pages */ + sg_free_table(&lm_file->sg_table); + + /* Free allocated file pages */ + for (unsigned long long i = 0; + i < lm_file->npages && lm_file->pages[i]; i++) + __free_page(lm_file->pages[i]); + kfree(lm_file->pages); + lm_file->pages = NULL; + + mutex_unlock(&lm_file->lock); + + /* allow file to be released since we are done with it */ + fput(lm_file->filep); +} + +void +pds_vfio_put_save_file(struct pds_vfio_pci_device *pds_vfio) +{ + if (!pds_vfio->save_file) + return; + + pds_vfio_put_lm_file(pds_vfio->save_file); + pds_vfio->save_file = NULL; +} + +void +pds_vfio_put_restore_file(struct pds_vfio_pci_device *pds_vfio) +{ + if (!pds_vfio->restore_file) + return; + + pds_vfio_put_lm_file(pds_vfio->restore_file); + pds_vfio->restore_file = NULL; +} + +static struct page * +pds_vfio_get_file_page(struct pds_vfio_lm_file *lm_file, + unsigned long offset) +{ + unsigned long cur_offset = 0; + struct scatterlist *sg; + unsigned int i; + + /* All accesses are sequential */ + if (offset < lm_file->last_offset || !lm_file->last_offset_sg) { + lm_file->last_offset = 0; + lm_file->last_offset_sg = lm_file->sg_table.sgl; + lm_file->sg_last_entry = 0; + } + + cur_offset = lm_file->last_offset; + + for_each_sg(lm_file->last_offset_sg, sg, + lm_file->sg_table.orig_nents - lm_file->sg_last_entry, + i) { + if (offset < sg->length + cur_offset) { + lm_file->last_offset_sg = sg; + lm_file->sg_last_entry += i; + lm_file->last_offset = cur_offset; + return nth_page(sg_page(sg), + (offset - cur_offset) / PAGE_SIZE); + } + cur_offset += sg->length; + } + + return NULL; +} + +static int +pds_vfio_release_file(struct inode *inode, struct file *filp) +{ + struct pds_vfio_lm_file *lm_file = filp->private_data; + + mutex_lock(&lm_file->lock); + lm_file->filep->f_pos = 0; + lm_file->size = 0; + mutex_unlock(&lm_file->lock); + mutex_destroy(&lm_file->lock); + kfree(lm_file); + + return 0; +} + +static ssize_t +pds_vfio_save_read(struct file *filp, char __user *buf, size_t len, loff_t *pos) +{ + struct pds_vfio_lm_file *lm_file = filp->private_data; + ssize_t done = 0; + + if (pos) + return -ESPIPE; + pos = &filp->f_pos; + + mutex_lock(&lm_file->lock); + if (*pos > lm_file->size) { + done = -EINVAL; + goto out_unlock; + } + + len = min_t(size_t, lm_file->size - *pos, len); + while (len) { + size_t page_offset; + struct page *page; + size_t page_len; + u8 *from_buff; + int err; + + page_offset = (*pos) % PAGE_SIZE; + page = pds_vfio_get_file_page(lm_file, *pos - page_offset); + if (!page) { + if (done == 0) + done = -EINVAL; + goto out_unlock; + } + + page_len = min_t(size_t, len, PAGE_SIZE - page_offset); + from_buff = kmap_local_page(page); + err = copy_to_user(buf, from_buff + page_offset, page_len); + kunmap_local(from_buff); + if (err) { + done = -EFAULT; + goto out_unlock; + } + *pos += page_len; + len -= page_len; + done += page_len; + buf += page_len; + } + +out_unlock: + mutex_unlock(&lm_file->lock); + return done; +} + +static const struct file_operations +pds_vfio_save_fops = { + .owner = THIS_MODULE, + .read = pds_vfio_save_read, + .release = pds_vfio_release_file, + .llseek = no_llseek, +}; + +static int +pds_vfio_get_save_file(struct pds_vfio_pci_device *pds_vfio) +{ + struct device *dev = &pds_vfio->vfio_coredev.pdev->dev; + struct pds_vfio_lm_file *lm_file; + int err; + u64 size; + + /* Get live migration state size in this state */ + err = pds_vfio_get_lm_status_cmd(pds_vfio, &size); + if (err) { + dev_err(dev, "failed to get save status: %pe\n", + ERR_PTR(err)); + return err; + } + + dev_dbg(dev, "save status, size = %lld\n", size); + + if (!size) { + dev_err(dev, "invalid state size\n"); + return -EIO; + } + + lm_file = pds_vfio_get_lm_file(&pds_vfio_save_fops, + O_RDONLY, size); + if (!lm_file) { + dev_err(dev, "failed to create save file\n"); + return -ENOENT; + } + + dev_dbg(dev, "size = %lld, alloc_size = %lld, npages = %lld\n", + lm_file->size, lm_file->alloc_size, lm_file->npages); + + pds_vfio->save_file = lm_file; + + return 0; +} + +static ssize_t +pds_vfio_restore_write(struct file *filp, const char __user *buf, size_t len, loff_t *pos) +{ + struct pds_vfio_lm_file *lm_file = filp->private_data; + loff_t requested_length; + ssize_t done = 0; + + if (pos) + return -ESPIPE; + + pos = &filp->f_pos; + + if (*pos < 0 || + check_add_overflow((loff_t)len, *pos, &requested_length)) + return -EINVAL; + + mutex_lock(&lm_file->lock); + + while (len) { + size_t page_offset; + struct page *page; + size_t page_len; + u8 *to_buff; + int err; + + page_offset = (*pos) % PAGE_SIZE; + page = pds_vfio_get_file_page(lm_file, *pos - page_offset); + if (!page) { + if (done == 0) + done = -EINVAL; + goto out_unlock; + } + + page_len = min_t(size_t, len, PAGE_SIZE - page_offset); + to_buff = kmap_local_page(page); + err = copy_from_user(to_buff + page_offset, buf, page_len); + kunmap_local(to_buff); + if (err) { + done = -EFAULT; + goto out_unlock; + } + *pos += page_len; + len -= page_len; + done += page_len; + buf += page_len; + lm_file->size += page_len; + } +out_unlock: + mutex_unlock(&lm_file->lock); + return done; +} + +static const struct file_operations +pds_vfio_restore_fops = { + .owner = THIS_MODULE, + .write = pds_vfio_restore_write, + .release = pds_vfio_release_file, + .llseek = no_llseek, +}; + +static int +pds_vfio_get_restore_file(struct pds_vfio_pci_device *pds_vfio) +{ + struct device *dev = &pds_vfio->vfio_coredev.pdev->dev; + struct pds_vfio_lm_file *lm_file; + int err = 0; + u64 size; + + size = sizeof(union pds_lm_dev_state); + + dev_dbg(dev, "restore status, size = %lld\n", size); + + if (!size) { + err = -EIO; + dev_err(dev, "invalid state size"); + goto err_get_lm_status; + } + + lm_file = pds_vfio_get_lm_file(&pds_vfio_restore_fops, + O_WRONLY, size); + if (!lm_file) { + err = -ENOENT; + dev_err(dev, "failed to create restore file"); + goto err_get_lm_file; + } + pds_vfio->restore_file = lm_file; + + return 0; + +err_get_lm_file: +err_get_lm_status: + return err; +} + +struct file * +pds_vfio_step_device_state_locked(struct pds_vfio_pci_device *pds_vfio, + enum vfio_device_mig_state next) +{ + enum vfio_device_mig_state cur = pds_vfio->state; + int err; + + if (cur == VFIO_DEVICE_STATE_STOP && next == VFIO_DEVICE_STATE_STOP_COPY) { + err = pds_vfio_get_save_file(pds_vfio); + if (err) + return ERR_PTR(err); + + err = pds_vfio_get_lm_state_cmd(pds_vfio); + if (err) { + pds_vfio_put_save_file(pds_vfio); + return ERR_PTR(err); + } + + return pds_vfio->save_file->filep; + } + + if (cur == VFIO_DEVICE_STATE_STOP_COPY && next == VFIO_DEVICE_STATE_STOP) { + pds_vfio_put_save_file(pds_vfio); + pds_vfio_send_host_vf_lm_status_cmd(pds_vfio, + PDS_LM_STA_NONE); + return NULL; + } + + if (cur == VFIO_DEVICE_STATE_STOP && next == VFIO_DEVICE_STATE_RESUMING) { + err = pds_vfio_get_restore_file(pds_vfio); + if (err) + return ERR_PTR(err); + + return pds_vfio->restore_file->filep; + } + + if (cur == VFIO_DEVICE_STATE_RESUMING && next == VFIO_DEVICE_STATE_STOP) { + err = pds_vfio_set_lm_state_cmd(pds_vfio); + if (err) + return ERR_PTR(err); + + pds_vfio_put_restore_file(pds_vfio); + return NULL; + } + + if (cur == VFIO_DEVICE_STATE_RUNNING && next == VFIO_DEVICE_STATE_RUNNING_P2P) { + pds_vfio_send_host_vf_lm_status_cmd(pds_vfio, PDS_LM_STA_IN_PROGRESS); + err = pds_vfio_suspend_device_cmd(pds_vfio); + if (err) + return ERR_PTR(err); + + return NULL; + } + + if (cur == VFIO_DEVICE_STATE_RUNNING_P2P && next == VFIO_DEVICE_STATE_RUNNING) { + err = pds_vfio_resume_device_cmd(pds_vfio); + if (err) + return ERR_PTR(err); + + pds_vfio_send_host_vf_lm_status_cmd(pds_vfio, + PDS_LM_STA_NONE); + return NULL; + } + + if (cur == VFIO_DEVICE_STATE_STOP && next == VFIO_DEVICE_STATE_RUNNING_P2P) + return NULL; + + if (cur == VFIO_DEVICE_STATE_RUNNING_P2P && next == VFIO_DEVICE_STATE_STOP) + return NULL; + + return ERR_PTR(-EINVAL); +} diff --git a/drivers/vfio/pci/pds/lm.h b/drivers/vfio/pci/pds/lm.h new file mode 100644 index 000000000000..72d439819994 --- /dev/null +++ b/drivers/vfio/pci/pds/lm.h @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright(c) 2023 Advanced Micro Devices, Inc. */ + +#ifndef _LM_H_ +#define _LM_H_ + +#include +#include +#include +#include + +#include + +struct pds_vfio_lm_file { + struct file *filep; + struct mutex lock; /* protect live migration data file */ + u64 size; /* Size with valid data */ + u64 alloc_size; /* Total allocated size. Always >= len */ + struct page **pages; /* Backing pages for file */ + unsigned long long npages; + struct sg_table sg_table; /* SG table for backing pages */ + struct pds_lm_sg_elem *sgl; /* DMA mapping */ + dma_addr_t sgl_addr; + u16 num_sge; + struct scatterlist *last_offset_sg; /* Iterator */ + unsigned int sg_last_entry; + unsigned long last_offset; +}; + +struct pds_vfio_pci_device; + +struct file * +pds_vfio_step_device_state_locked(struct pds_vfio_pci_device *pds_vfio, + enum vfio_device_mig_state next); + +void +pds_vfio_put_save_file(struct pds_vfio_pci_device *pds_vfio); +void +pds_vfio_put_restore_file(struct pds_vfio_pci_device *pds_vfio); + +#endif /* _LM_H_ */ diff --git a/drivers/vfio/pci/pds/pci_drv.c b/drivers/vfio/pci/pds/pci_drv.c index dca7d457bd8c..91d9a66d847a 100644 --- a/drivers/vfio/pci/pds/pci_drv.c +++ b/drivers/vfio/pci/pds/pci_drv.c @@ -75,12 +75,27 @@ pds_vfio_pci_table[] = { }; MODULE_DEVICE_TABLE(pci, pds_vfio_pci_table); +static void +pds_vfio_pci_aer_reset_done(struct pci_dev *pdev) +{ + struct pds_vfio_pci_device *pds_vfio = pds_vfio_pci_drvdata(pdev); + + pds_vfio_reset(pds_vfio); +} + +static const struct +pci_error_handlers pds_vfio_pci_err_handlers = { + .reset_done = pds_vfio_pci_aer_reset_done, + .error_detected = vfio_pci_core_aer_err_detected, +}; + static struct pci_driver pds_vfio_pci_driver = { .name = KBUILD_MODNAME, .id_table = pds_vfio_pci_table, .probe = pds_vfio_pci_probe, .remove = pds_vfio_pci_remove, + .err_handler = &pds_vfio_pci_err_handlers, .driver_managed_dma = true, }; diff --git a/drivers/vfio/pci/pds/vfio_dev.c b/drivers/vfio/pci/pds/vfio_dev.c index 228b27a0aa60..0c6e6c645f34 100644 --- a/drivers/vfio/pci/pds/vfio_dev.c +++ b/drivers/vfio/pci/pds/vfio_dev.c @@ -4,6 +4,7 @@ #include #include +#include "lm.h" #include "vfio_dev.h" struct pci_dev * @@ -12,6 +13,12 @@ pds_vfio_to_pci_dev(struct pds_vfio_pci_device *pds_vfio) return pds_vfio->vfio_coredev.pdev; } +struct device * +pds_vfio_to_dev(struct pds_vfio_pci_device *pds_vfio) +{ + return &pds_vfio_to_pci_dev(pds_vfio)->dev; +} + struct pds_vfio_pci_device * pds_vfio_pci_drvdata(struct pci_dev *pdev) { @@ -21,6 +28,103 @@ pds_vfio_pci_drvdata(struct pci_dev *pdev) vfio_coredev); } +static void +pds_vfio_state_mutex_unlock(struct pds_vfio_pci_device *pds_vfio) +{ +again: + spin_lock(&pds_vfio->reset_lock); + if (pds_vfio->deferred_reset) { + pds_vfio->deferred_reset = false; + if (pds_vfio->state == VFIO_DEVICE_STATE_ERROR) { + pds_vfio->state = VFIO_DEVICE_STATE_RUNNING; + pds_vfio_put_restore_file(pds_vfio); + pds_vfio_put_save_file(pds_vfio); + } + spin_unlock(&pds_vfio->reset_lock); + goto again; + } + mutex_unlock(&pds_vfio->state_mutex); + spin_unlock(&pds_vfio->reset_lock); +} + +void +pds_vfio_reset(struct pds_vfio_pci_device *pds_vfio) +{ + spin_lock(&pds_vfio->reset_lock); + pds_vfio->deferred_reset = true; + if (!mutex_trylock(&pds_vfio->state_mutex)) { + spin_unlock(&pds_vfio->reset_lock); + return; + } + spin_unlock(&pds_vfio->reset_lock); + pds_vfio_state_mutex_unlock(pds_vfio); +} + +static struct file * +pds_vfio_set_device_state(struct vfio_device *vdev, + enum vfio_device_mig_state new_state) +{ + struct pds_vfio_pci_device *pds_vfio = + container_of(vdev, struct pds_vfio_pci_device, + vfio_coredev.vdev); + struct file *res = NULL; + + mutex_lock(&pds_vfio->state_mutex); + while (new_state != pds_vfio->state) { + enum vfio_device_mig_state next_state; + + int err = vfio_mig_get_next_state(vdev, pds_vfio->state, + new_state, &next_state); + if (err) { + res = ERR_PTR(err); + break; + } + + res = pds_vfio_step_device_state_locked(pds_vfio, next_state); + if (IS_ERR(res)) + break; + + pds_vfio->state = next_state; + + if (WARN_ON(res && new_state != pds_vfio->state)) { + res = ERR_PTR(-EINVAL); + break; + } + } + pds_vfio_state_mutex_unlock(pds_vfio); + + return res; +} + +static int +pds_vfio_get_device_state(struct vfio_device *vdev, + enum vfio_device_mig_state *current_state) +{ + struct pds_vfio_pci_device *pds_vfio = + container_of(vdev, struct pds_vfio_pci_device, + vfio_coredev.vdev); + + mutex_lock(&pds_vfio->state_mutex); + *current_state = pds_vfio->state; + pds_vfio_state_mutex_unlock(pds_vfio); + return 0; +} + +static int +pds_vfio_get_device_state_size(struct vfio_device *vdev, + unsigned long *stop_copy_length) +{ + *stop_copy_length = PDS_LM_DEVICE_STATE_LENGTH; + return 0; +} + +static const struct vfio_migration_ops +pds_vfio_lm_ops = { + .migration_set_state = pds_vfio_set_device_state, + .migration_get_state = pds_vfio_get_device_state, + .migration_get_data_size = pds_vfio_get_device_state_size +}; + static int pds_vfio_init_device(struct vfio_device *vdev) { @@ -37,6 +141,9 @@ pds_vfio_init_device(struct vfio_device *vdev) pds_vfio->vf_id = pci_iov_vf_id(pdev); pds_vfio->pci_id = PCI_DEVID(pdev->bus->number, pdev->devfn); + vdev->migration_flags = VFIO_MIGRATION_STOP_COPY | VFIO_MIGRATION_P2P; + vdev->mig_ops = &pds_vfio_lm_ops; + dev_dbg(&pdev->dev, "%s: PF %#04x VF %#04x (%d) vf_id %d domain %d pds_vfio %p\n", __func__, pci_dev_id(pdev->physfn), pds_vfio->pci_id, pds_vfio->pci_id, pds_vfio->vf_id, @@ -57,18 +164,36 @@ pds_vfio_open_device(struct vfio_device *vdev) if (err) return err; + mutex_init(&pds_vfio->state_mutex); + pds_vfio->state = VFIO_DEVICE_STATE_RUNNING; + vfio_pci_core_finish_enable(&pds_vfio->vfio_coredev); return 0; } +static void +pds_vfio_close_device(struct vfio_device *vdev) +{ + struct pds_vfio_pci_device *pds_vfio = + container_of(vdev, struct pds_vfio_pci_device, + vfio_coredev.vdev); + + mutex_lock(&pds_vfio->state_mutex); + pds_vfio_put_restore_file(pds_vfio); + pds_vfio_put_save_file(pds_vfio); + mutex_unlock(&pds_vfio->state_mutex); + mutex_destroy(&pds_vfio->state_mutex); + vfio_pci_core_close_device(vdev); +} + static const struct vfio_device_ops pds_vfio_ops = { .name = "pds-vfio", .init = pds_vfio_init_device, .release = vfio_pci_core_release_dev, .open_device = pds_vfio_open_device, - .close_device = vfio_pci_core_close_device, + .close_device = pds_vfio_close_device, .ioctl = vfio_pci_core_ioctl, .device_feature = vfio_pci_core_ioctl_feature, .read = vfio_pci_core_read, diff --git a/drivers/vfio/pci/pds/vfio_dev.h b/drivers/vfio/pci/pds/vfio_dev.h index 92e8ff241ca8..df6208a7140b 100644 --- a/drivers/vfio/pci/pds/vfio_dev.h +++ b/drivers/vfio/pci/pds/vfio_dev.h @@ -7,12 +7,21 @@ #include #include +#include "lm.h" + struct pdsc; struct pds_vfio_pci_device { struct vfio_pci_core_device vfio_coredev; struct pdsc *pdsc; + struct pds_vfio_lm_file *save_file; + struct pds_vfio_lm_file *restore_file; + struct mutex state_mutex; /* protect migration state */ + enum vfio_device_mig_state state; + spinlock_t reset_lock; /* protect reset_done flow */ + u8 deferred_reset; + int vf_id; int pci_id; u16 client_id; @@ -20,7 +29,9 @@ struct pds_vfio_pci_device { const struct vfio_device_ops *pds_vfio_ops_info(void); struct pds_vfio_pci_device *pds_vfio_pci_drvdata(struct pci_dev *pdev); +void pds_vfio_reset(struct pds_vfio_pci_device *pds_vfio); struct pci_dev *pds_vfio_to_pci_dev(struct pds_vfio_pci_device *pds_vfio); +struct device *pds_vfio_to_dev(struct pds_vfio_pci_device *pds_vfio); #endif /* _VFIO_DEV_H_ */ diff --git a/include/linux/pds/pds_adminq.h b/include/linux/pds/pds_adminq.h index 98a60ce87b92..897b966c52ea 100644 --- a/include/linux/pds/pds_adminq.h +++ b/include/linux/pds/pds_adminq.h @@ -4,6 +4,8 @@ #ifndef _PDS_CORE_ADMINQ_H_ #define _PDS_CORE_ADMINQ_H_ +#include "pds_lm.h" + #define PDSC_ADMINQ_MAX_POLL_INTERVAL 256 enum pds_core_adminq_flags { @@ -600,6 +602,14 @@ union pds_core_adminq_cmd { struct pds_core_q_identify_cmd q_ident; struct pds_core_q_init_cmd q_init; + + struct pds_lm_suspend_cmd lm_suspend; + struct pds_lm_suspend_status_cmd lm_suspend_status; + struct pds_lm_resume_cmd lm_resume; + struct pds_lm_status_cmd lm_status; + struct pds_lm_save_cmd lm_save; + struct pds_lm_restore_cmd lm_restore; + struct pds_lm_host_vf_status_cmd lm_host_vf_status; }; union pds_core_adminq_comp { @@ -621,6 +631,8 @@ union pds_core_adminq_comp { struct pds_core_q_identify_comp q_ident; struct pds_core_q_init_comp q_init; + + struct pds_lm_status_comp lm_status; }; #ifndef __CHECKER__ diff --git a/include/linux/pds/pds_lm.h b/include/linux/pds/pds_lm.h index 26d17efeff28..f1b0beb3c87b 100644 --- a/include/linux/pds/pds_lm.h +++ b/include/linux/pds/pds_lm.h @@ -7,5 +7,211 @@ #include "pds_common.h" #define PDS_LM_DEV_NAME PDS_CORE_DRV_NAME "." PDS_DEV_TYPE_LM_STR +#define PDS_LM_DEVICE_STATE_LENGTH 65536 +#define PDS_LM_CHECK_DEVICE_STATE_LENGTH(X) \ + PDS_CORE_SIZE_CHECK(union, PDS_LM_DEVICE_STATE_LENGTH, X) + +/* + * enum pds_lm_cmd_opcode - Live Migration Device commands + */ +enum pds_lm_cmd_opcode { + PDS_LM_CMD_HOST_VF_STATUS = 1, + + /* Device state commands */ + PDS_LM_CMD_STATUS = 16, + PDS_LM_CMD_SUSPEND = 18, + PDS_LM_CMD_SUSPEND_STATUS = 19, + PDS_LM_CMD_RESUME = 20, + PDS_LM_CMD_SAVE = 21, + PDS_LM_CMD_RESTORE = 22, +}; + +/** + * struct pds_lm_cmd - generic command + * @opcode: Opcode + * @rsvd: Word boundary padding + * @vf_id: VF id + * @rsvd2: Structure padding to 60 Bytes + */ +struct pds_lm_cmd { + u8 opcode; + u8 rsvd; + __le16 vf_id; + u8 rsvd2[56]; +}; + +/** + * struct pds_lm_comp - generic command completion + * @status: Status of the command (enum pds_core_status_code) + * @rsvd: Structure padding to 16 Bytes + */ +struct pds_lm_comp { + u8 status; + u8 rsvd[15]; +}; + +/** + * struct pds_lm_status_cmd - STATUS command + * @opcode: Opcode + * @rsvd: Word boundary padding + * @vf_id: VF id + */ +struct pds_lm_status_cmd { + u8 opcode; + u8 rsvd; + __le16 vf_id; +}; + +/** + * struct pds_lm_status_comp - STATUS command completion + * @status: Status of the command (enum pds_core_status_code) + * @rsvd: Word boundary padding + * @comp_index: Index in the desc ring for which this is the completion + * @size: Size of the device state + * @rsvd2: Word boundary padding + * @color: Color bit + */ +struct pds_lm_status_comp { + u8 status; + u8 rsvd; + __le16 comp_index; + union { + __le64 size; + u8 rsvd2[11]; + } __packed; + u8 color; +}; + +/** + * struct pds_lm_suspend_cmd - SUSPEND command + * @opcode: Opcode PDS_LM_CMD_SUSPEND + * @rsvd: Word boundary padding + * @vf_id: VF id + */ +struct pds_lm_suspend_cmd { + u8 opcode; + u8 rsvd; + __le16 vf_id; +}; + +/** + * struct pds_lm_suspend_comp - SUSPEND command completion + * @status: Status of the command (enum pds_core_status_code) + * @rsvd: Word boundary padding + * @comp_index: Index in the desc ring for which this is the completion + * @state_size: Size of the device state computed post suspend + * @rsvd2: Word boundary padding + * @color: Color bit + */ +struct pds_lm_suspend_comp { + u8 status; + u8 rsvd; + __le16 comp_index; + union { + __le64 state_size; + u8 rsvd2[11]; + } __packed; + u8 color; +}; + +/** + * struct pds_lm_suspend_status_cmd - SUSPEND status command + * @opcode: Opcode PDS_AQ_CMD_LM_SUSPEND_STATUS + * @rsvd: Word boundary padding + * @vf_id: VF id + */ +struct pds_lm_suspend_status_cmd { + u8 opcode; + u8 rsvd; + __le16 vf_id; +}; + +/** + * struct pds_lm_resume_cmd - RESUME command + * @opcode: Opcode PDS_LM_CMD_RESUME + * @rsvd: Word boundary padding + * @vf_id: VF id + */ +struct pds_lm_resume_cmd { + u8 opcode; + u8 rsvd; + __le16 vf_id; +}; + +/** + * struct pds_lm_sg_elem - Transmit scatter-gather (SG) descriptor element + * @addr: DMA address of SG element data buffer + * @len: Length of SG element data buffer, in bytes + * @rsvd: Word boundary padding + */ +struct pds_lm_sg_elem { + __le64 addr; + __le32 len; + __le16 rsvd[2]; +}; + +/** + * struct pds_lm_save_cmd - SAVE command + * @opcode: Opcode PDS_LM_CMD_SAVE + * @rsvd: Word boundary padding + * @vf_id: VF id + * @rsvd2: Word boundary padding + * @sgl_addr: IOVA address of the SGL to dma the device state + * @num_sge: Total number of SG elements + */ +struct pds_lm_save_cmd { + u8 opcode; + u8 rsvd; + __le16 vf_id; + u8 rsvd2[4]; + __le64 sgl_addr; + __le32 num_sge; +} __packed; + +/** + * struct pds_lm_restore_cmd - RESTORE command + * @opcode: Opcode PDS_LM_CMD_RESTORE + * @rsvd: Word boundary padding + * @vf_id: VF id + * @rsvd2: Word boundary padding + * @sgl_addr: IOVA address of the SGL to dma the device state + * @num_sge: Total number of SG elements + */ +struct pds_lm_restore_cmd { + u8 opcode; + u8 rsvd; + __le16 vf_id; + u8 rsvd2[4]; + __le64 sgl_addr; + __le32 num_sge; +} __packed; + +/** + * union pds_lm_dev_state - device state information + * @words: Device state words + */ +union pds_lm_dev_state { + __le32 words[PDS_LM_DEVICE_STATE_LENGTH / sizeof(__le32)]; +}; + +enum pds_lm_host_vf_status { + PDS_LM_STA_NONE = 0, + PDS_LM_STA_IN_PROGRESS, + PDS_LM_STA_MAX, +}; + +/** + * struct pds_lm_host_vf_status_cmd - HOST_VF_STATUS command + * @opcode: Opcode PDS_LM_CMD_HOST_VF_STATUS + * @rsvd: Word boundary padding + * @vf_id: VF id + * @status: Current LM status of host VF driver (enum pds_lm_host_status) + */ +struct pds_lm_host_vf_status_cmd { + u8 opcode; + u8 rsvd; + __le16 vf_id; + u8 status; +}; #endif /* _PDS_LM_H_ */ From patchwork Sat Apr 22 01:06:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brett Creeley X-Patchwork-Id: 13220859 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8FDA2C77B61 for ; Sat, 22 Apr 2023 01:07:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234141AbjDVBHm (ORCPT ); Fri, 21 Apr 2023 21:07:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38034 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234137AbjDVBHg (ORCPT ); Fri, 21 Apr 2023 21:07:36 -0400 Received: from NAM02-BN1-obe.outbound.protection.outlook.com (mail-bn1nam02on2050.outbound.protection.outlook.com [40.107.212.50]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2F7B826AF; Fri, 21 Apr 2023 18:07:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=mS5/pymlrV5fECkLXE+I9+k5WUAKfBWfBW8GRudPSvYxXFxsWsZb87+QRun6k+8496mnUl/sppv0PCq6BwXBfRzsP5O1FxIlCpgnKY71hqyaumYzW0/ANw6ot0xhSP5ot2sCdbTDesnnG9mZNEzczu/TV44MY7NmV1O79xp6cfgP+n2V7E3X3v6ACfl4V/fwcytAZCtTRWP4qTbspb1FwRwi4NK4hKuTv6NbvGrxWaDcCFc96ZJl1ojIYb7OnBoSAfPv0EW0QSBDJDIgDpwrvMxyzJMlwk4g5UakLIjlIyvZgPc3GIvR8WfzicdJbNX6y0ACFKqngo+Kk46rQR45Qg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=8ZrzHsXhhIXLyC7BkmzYu6BUFYS09U6hqyk2pOXBens=; b=PJogCvSj98rNCcOLqKez7ZGRAVyy7XnpL3wFzL+RNxg2aJjgdgGP+6kuuo5ZtvQLvOREUnehu3rH/J1dzwPn/RTGW6tbGw54ONLnP7sPTGeCGqr4SOOnvWgCpBe6Bu7DcL0K+ai+zgI+bXc7jM/OClhQSM1bOZRszMuYHD31NoaNPw/dasipqTkYVmpjTC1ADucHvSMXcWN4tU4uBIR0XCbvd7JjV9N4nzNgtVG9hPx2MWovb2gq2MyPpdczgT/J87m0Sce2Wluw8gRPkHa0ZpdCUD2/bUuU1Lifp7oVCIkhtKbCyTyxZxh66qF9BALvTZldtPBolGYChEyVIx0UgA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=vger.kernel.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=8ZrzHsXhhIXLyC7BkmzYu6BUFYS09U6hqyk2pOXBens=; b=PVuiyh5rOI1NiSz7nxkHNtZBXyJBtLZxBaURj/lvSMOTOKpvG6eTTp+NlrYIhNBT6A3CurmwH7j8kcI5hu0yWVFXMXlaXRkOJGsiKXoS+asoU+GTFlh5vJBbRPbekzr0xUnevWPOBeV3+thS6MnjxOLyoAoeC/hCs1x235eciMc= Received: from BN8PR07CA0003.namprd07.prod.outlook.com (2603:10b6:408:ac::16) by CY8PR12MB8411.namprd12.prod.outlook.com (2603:10b6:930:6e::6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6319.22; Sat, 22 Apr 2023 01:07:18 +0000 Received: from BN8NAM11FT038.eop-nam11.prod.protection.outlook.com (2603:10b6:408:ac:cafe::76) by BN8PR07CA0003.outlook.office365.com (2603:10b6:408:ac::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6319.25 via Frontend Transport; Sat, 22 Apr 2023 01:07:17 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT038.mail.protection.outlook.com (10.13.176.246) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6340.15 via Frontend Transport; Sat, 22 Apr 2023 01:07:17 +0000 Received: from driver-dev1.pensando.io (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Fri, 21 Apr 2023 20:07:15 -0500 From: Brett Creeley To: , , , , , , CC: , , Subject: [PATCH v9 vfio 5/7] vfio/pds: Add support for dirty page tracking Date: Fri, 21 Apr 2023 18:06:40 -0700 Message-ID: <20230422010642.60720-6-brett.creeley@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230422010642.60720-1-brett.creeley@amd.com> References: <20230422010642.60720-1-brett.creeley@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT038:EE_|CY8PR12MB8411:EE_ X-MS-Office365-Filtering-Correlation-Id: 0a2b035e-653e-483d-84ae-08db42cdeaad X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: XMy+hitrkImJw/RwhfmU6vNG8ls/zlaAkUAV9hp3U5iPFqham9HFlerBTuRdmayZXVmR/59RDi69aevDw4aHSs2U02xmdl5dhAcmTUBZftJTj1qVk/DXpha2M1SHJTMLLJ6wdm0/B9BqrUT7/IgywvWWR68OEdpDeVzRra9hMCdQffQ2xO45I1MhZ9iCZbNFWh9Xwo+KdfMFXvOMReQRzAqRMtge/GsXxG93T8OqUkSXMntXshn+RDgLGU7wYETsCUrXhBLkT28zREpkzZIvl3Rf3+xNjw/KoXvwww7MSTUJVN5uDuI1NUb4X+Pmp8J2R+yzT40beqKnOgA7xT7HrLZ8RY2sm2fmTR3Z5D7Q59XFFyx+UWyeaSmguDcRxERrUbymtoCIHnERKFTZHezBDNTCKVNb8HSZ9claU9MN58GxIpvb5WEsCj8V0BfGglhJF9b5B/YIYTKkaPAaV2bx0u9rFRNj0hawbcxh6eZ05yEZy5pVmB2YodaTe0f50VdRf4IBHHOgpVoChVhLuiLd2yD38CYBpo31FfHSEbqMLEPOLRpj60cn3IvgB81y70iVln/e+yqEWMpGadZOXY6EuC5Mg6Hhr5CAW0+fgvvUYvrt4qc5OxVxqihCnjmwz6/EjBYXS03EGXASGtE6qgTiuOBlWbvzDr4ZklzMDlgDOQyKU4TD7Fy26BmnBhE+x5ty8uCH5ZjeQZ19ylpDrzOSVSGM5GS5topHQzuF/hibdtYh/B/cdrgsuyjGh8RH8MEWs2Dklfw9LhfURu+aVBa+3g== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(136003)(346002)(376002)(396003)(39860400002)(451199021)(36840700001)(40470700004)(46966006)(81166007)(2906002)(30864003)(356005)(40460700003)(41300700001)(5660300002)(44832011)(8936002)(8676002)(36756003)(86362001)(40480700001)(6666004)(26005)(1076003)(83380400001)(54906003)(82310400005)(2616005)(478600001)(36860700001)(47076005)(336012)(426003)(186003)(16526019)(316002)(4326008)(82740400003)(70586007)(110136005)(70206006)(14143004)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Apr 2023 01:07:17.5557 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0a2b035e-653e-483d-84ae-08db42cdeaad X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT038.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB8411 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org In order to support dirty page tracking, the driver has to implement the VFIO subsystem's vfio_log_ops. This includes log_start, log_stop, and log_read_and_clear. All of the tracker resources are allocated and dirty tracking on the device is started during log_start. The resources are cleaned up and dirty tracking on the device is stopped during log_stop. The dirty pages are determined and reported during log_read_and_clear. In order to support these callbacks admin queue commands are used. All of the adminq queue command structures and implementations are included as part of this patch. PDS_LM_CMD_DIRTY_STATUS is added to query the current status of dirty tracking on the device. This includes if it's enabled (i.e. number of regions being tracked from the device's perspective) and the maximum number of regions supported from the device's perspective. PDS_LM_CMD_DIRTY_ENABLE is added to enable dirty tracking on the specified number of regions and their iova ranges. PDS_LM_CMD_DIRTY_DISABLE is added to disable dirty tracking for all regions on the device. PDS_LM_CMD_READ_SEQ and PDS_LM_CMD_DIRTY_WRITE_ACK are added to support reading and acknowledging the currently dirtied pages. Signed-off-by: Brett Creeley Signed-off-by: Shannon Nelson --- drivers/vfio/pci/pds/Makefile | 1 + drivers/vfio/pci/pds/cmds.c | 124 +++++++ drivers/vfio/pci/pds/cmds.h | 9 + drivers/vfio/pci/pds/dirty.c | 562 ++++++++++++++++++++++++++++++++ drivers/vfio/pci/pds/dirty.h | 45 +++ drivers/vfio/pci/pds/lm.c | 3 +- drivers/vfio/pci/pds/vfio_dev.c | 12 +- drivers/vfio/pci/pds/vfio_dev.h | 5 + include/linux/pds/pds_adminq.h | 5 + include/linux/pds/pds_lm.h | 173 ++++++++++ 10 files changed, 936 insertions(+), 3 deletions(-) create mode 100644 drivers/vfio/pci/pds/dirty.c create mode 100644 drivers/vfio/pci/pds/dirty.h diff --git a/drivers/vfio/pci/pds/Makefile b/drivers/vfio/pci/pds/Makefile index dbaf613d3794..805176f7be9f 100644 --- a/drivers/vfio/pci/pds/Makefile +++ b/drivers/vfio/pci/pds/Makefile @@ -5,6 +5,7 @@ obj-$(CONFIG_PDS_VFIO_PCI) += pds_vfio.o pds_vfio-y := \ cmds.o \ + dirty.o \ lm.o \ pci_drv.o \ vfio_dev.o diff --git a/drivers/vfio/pci/pds/cmds.c b/drivers/vfio/pci/pds/cmds.c index b51873dace96..c7edcb7b91a1 100644 --- a/drivers/vfio/pci/pds/cmds.c +++ b/drivers/vfio/pci/pds/cmds.c @@ -361,3 +361,127 @@ pds_vfio_send_host_vf_lm_status_cmd(struct pds_vfio_pci_device *pds_vfio, dev_warn(dev, "failed to send host VF migration status: %pe\n", ERR_PTR(err)); } + +int +pds_vfio_dirty_status_cmd(struct pds_vfio_pci_device *pds_vfio, + u64 regions_dma, u8 *max_regions, + u8 *num_regions) +{ + union pds_core_adminq_cmd cmd = { + .lm_dirty_status.opcode = PDS_LM_CMD_DIRTY_STATUS, + .lm_dirty_status.vf_id = cpu_to_le16(pds_vfio->vf_id), + }; + struct device *dev = pds_vfio_to_dev(pds_vfio); + union pds_core_adminq_comp comp = {}; + int err; + + dev_dbg(dev, "vf%u: Dirty status\n", pds_vfio->vf_id); + + cmd.lm_dirty_status.regions_dma = cpu_to_le64(regions_dma); + cmd.lm_dirty_status.max_regions = *max_regions; + + err = pds_vfio_client_adminq_cmd(pds_vfio, &cmd, sizeof(cmd), + &comp, 0); + if (err) { + dev_err(dev, "failed to get dirty status: %pe\n", ERR_PTR(err)); + return err; + } + + /* only support seq_ack approach for now */ + if (!(le32_to_cpu(comp.lm_dirty_status.bmp_type_mask) & + BIT(PDS_LM_DIRTY_BMP_TYPE_SEQ_ACK))) { + dev_err(dev, "Dirty bitmap tracking SEQ_ACK not supported\n"); + return -EOPNOTSUPP; + } + + *num_regions = comp.lm_dirty_status.num_regions; + *max_regions = comp.lm_dirty_status.max_regions; + + dev_dbg(dev, "Page Tracking Status command successful, max_regions: %d, num_regions: %d, bmp_type: %s\n", + *max_regions, *num_regions, "PDS_LM_DIRTY_BMP_TYPE_SEQ_ACK"); + + return 0; +} + +int +pds_vfio_dirty_enable_cmd(struct pds_vfio_pci_device *pds_vfio, + u64 regions_dma, u8 num_regions) +{ + union pds_core_adminq_cmd cmd = { + .lm_dirty_enable.opcode = PDS_LM_CMD_DIRTY_ENABLE, + .lm_dirty_enable.vf_id = cpu_to_le16(pds_vfio->vf_id), + .lm_dirty_enable.regions_dma = cpu_to_le64(regions_dma), + .lm_dirty_enable.bmp_type = PDS_LM_DIRTY_BMP_TYPE_SEQ_ACK, + .lm_dirty_enable.num_regions = num_regions, + }; + struct device *dev = pds_vfio_to_dev(pds_vfio); + union pds_core_adminq_comp comp = {}; + int err; + + err = pds_vfio_client_adminq_cmd(pds_vfio, &cmd, sizeof(cmd), + &comp, 0); + if (err) { + dev_err(dev, "failed dirty tracking enable: %pe\n", + ERR_PTR(err)); + return err; + } + + return 0; +} + +int +pds_vfio_dirty_disable_cmd(struct pds_vfio_pci_device *pds_vfio) +{ + union pds_core_adminq_cmd cmd = { + .lm_dirty_disable.opcode = PDS_LM_CMD_DIRTY_DISABLE, + .lm_dirty_disable.vf_id = cpu_to_le16(pds_vfio->vf_id), + }; + struct device *dev = pds_vfio_to_dev(pds_vfio); + union pds_core_adminq_comp comp = {}; + int err; + + err = pds_vfio_client_adminq_cmd(pds_vfio, &cmd, sizeof(cmd), + &comp, 0); + if (err || comp.lm_dirty_status.num_regions != 0) { + /* in case num_regions is still non-zero after disable */ + err = err ? err : -EIO; + dev_err(dev, "failed dirty tracking disable: %pe, num_regions %d\n", + ERR_PTR(err), comp.lm_dirty_status.num_regions); + return err; + } + + return 0; +} + +int +pds_vfio_dirty_seq_ack_cmd(struct pds_vfio_pci_device *pds_vfio, + u64 sgl_dma, u16 num_sge, u32 offset, + u32 total_len, bool read_seq) +{ + const char *cmd_type_str = read_seq ? "read_seq" : "write_ack"; + union pds_core_adminq_cmd cmd = { + .lm_dirty_seq_ack.vf_id = cpu_to_le16(pds_vfio->vf_id), + .lm_dirty_seq_ack.len_bytes = cpu_to_le32(total_len), + .lm_dirty_seq_ack.off_bytes = cpu_to_le32(offset), + .lm_dirty_seq_ack.sgl_addr = cpu_to_le64(sgl_dma), + .lm_dirty_seq_ack.num_sge = cpu_to_le16(num_sge), + }; + struct device *dev = pds_vfio_to_dev(pds_vfio); + union pds_core_adminq_comp comp = {}; + int err; + + if (read_seq) + cmd.lm_dirty_seq_ack.opcode = PDS_LM_CMD_DIRTY_READ_SEQ; + else + cmd.lm_dirty_seq_ack.opcode = PDS_LM_CMD_DIRTY_WRITE_ACK; + + err = pds_vfio_client_adminq_cmd(pds_vfio, &cmd, sizeof(cmd), + &comp, 0); + if (err) { + dev_err(dev, "failed cmd Page Tracking %s: %pe\n", + cmd_type_str, ERR_PTR(err)); + return err; + } + + return 0; +} diff --git a/drivers/vfio/pci/pds/cmds.h b/drivers/vfio/pci/pds/cmds.h index 3d8a5508c733..fc1f4ae611eb 100644 --- a/drivers/vfio/pci/pds/cmds.h +++ b/drivers/vfio/pci/pds/cmds.h @@ -13,4 +13,13 @@ int pds_vfio_get_lm_state_cmd(struct pds_vfio_pci_device *pds_vfio); int pds_vfio_set_lm_state_cmd(struct pds_vfio_pci_device *pds_vfio); void pds_vfio_send_host_vf_lm_status_cmd(struct pds_vfio_pci_device *pds_vfio, enum pds_lm_host_vf_status vf_status); +int pds_vfio_dirty_status_cmd(struct pds_vfio_pci_device *pds_vfio, + u64 regions_dma, u8 *max_regions, + u8 *num_regions); +int pds_vfio_dirty_enable_cmd(struct pds_vfio_pci_device *pds_vfio, + u64 regions_dma, u8 num_regions); +int pds_vfio_dirty_disable_cmd(struct pds_vfio_pci_device *pds_vfio); +int pds_vfio_dirty_seq_ack_cmd(struct pds_vfio_pci_device *pds_vfio, + u64 sgl_dma, u16 num_sge, u32 offset, + u32 total_len, bool read_seq); #endif /* _CMDS_H_ */ diff --git a/drivers/vfio/pci/pds/dirty.c b/drivers/vfio/pci/pds/dirty.c new file mode 100644 index 000000000000..bd480bb74970 --- /dev/null +++ b/drivers/vfio/pci/pds/dirty.c @@ -0,0 +1,562 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Copyright(c) 2023 Advanced Micro Devices, Inc. */ + +#include +#include + +#include +#include +#include + +#include "vfio_dev.h" +#include "cmds.h" +#include "dirty.h" + +#define READ_SEQ true +#define WRITE_ACK false + +bool +pds_vfio_dirty_is_enabled(struct pds_vfio_pci_device *pds_vfio) +{ + return pds_vfio->dirty.is_enabled; +} + +void +pds_vfio_dirty_set_enabled(struct pds_vfio_pci_device *pds_vfio) +{ + pds_vfio->dirty.is_enabled = true; +} + +void +pds_vfio_dirty_set_disabled(struct pds_vfio_pci_device *pds_vfio) +{ + pds_vfio->dirty.is_enabled = false; +} + +static void +pds_vfio_print_guest_region_info(struct pds_vfio_pci_device *pds_vfio, + u8 max_regions) +{ + int len = max_regions * sizeof(struct pds_lm_dirty_region_info); + struct pci_dev *pdev = pds_vfio->vfio_coredev.pdev; + struct device *pdsc_dev = &pci_physfn(pdev)->dev; + struct pds_lm_dirty_region_info *region_info; + dma_addr_t regions_dma; + u8 num_regions; + int err; + + region_info = kcalloc(max_regions, + sizeof(struct pds_lm_dirty_region_info), + GFP_KERNEL); + if (!region_info) + return; + + regions_dma = dma_map_single(pdsc_dev, region_info, len, + DMA_FROM_DEVICE); + if (dma_mapping_error(pdsc_dev, regions_dma)) + goto err_out; + + err = pds_vfio_dirty_status_cmd(pds_vfio, regions_dma, + &max_regions, &num_regions); + dma_unmap_single(pdsc_dev, regions_dma, len, DMA_FROM_DEVICE); + if (err) + goto err_out; + + for (unsigned int i = 0; i < num_regions; i++) + dev_dbg(&pdev->dev, "region_info[%d]: dma_base 0x%llx page_count %u page_size_log2 %u\n", + i, le64_to_cpu(region_info[i].dma_base), + le32_to_cpu(region_info[i].page_count), + region_info[i].page_size_log2); + +err_out: + kfree(region_info); +} + +static int +pds_vfio_dirty_alloc_bitmaps(struct pds_vfio_dirty *dirty, + u32 nbits) +{ + unsigned long *host_seq_bmp, *host_ack_bmp; + + host_seq_bmp = bitmap_zalloc(nbits, GFP_KERNEL); + if (!host_seq_bmp) + return -ENOMEM; + + host_ack_bmp = bitmap_zalloc(nbits, GFP_KERNEL); + if (!host_ack_bmp) { + bitmap_free(host_seq_bmp); + return -ENOMEM; + } + + dirty->host_seq.bmp = host_seq_bmp; + dirty->host_ack.bmp = host_ack_bmp; + + return 0; +} + +static void +pds_vfio_dirty_free_bitmaps(struct pds_vfio_dirty *dirty) +{ + if (dirty->host_seq.bmp) + bitmap_free(dirty->host_seq.bmp); + if (dirty->host_ack.bmp) + bitmap_free(dirty->host_ack.bmp); + + dirty->host_seq.bmp = NULL; + dirty->host_ack.bmp = NULL; +} + +static void +__pds_vfio_dirty_free_sgl(struct pds_vfio_pci_device *pds_vfio, + struct pds_vfio_bmp_info *bmp_info) +{ + struct pci_dev *pdev = pds_vfio->vfio_coredev.pdev; + struct device *pdsc_dev = &pci_physfn(pdev)->dev; + + dma_unmap_single(pdsc_dev, bmp_info->sgl_addr, + bmp_info->num_sge * sizeof(struct pds_lm_sg_elem), + DMA_TO_DEVICE); + kfree(bmp_info->sgl); + + bmp_info->num_sge = 0; + bmp_info->sgl = NULL; + bmp_info->sgl_addr = 0; +} + +static void +pds_vfio_dirty_free_sgl(struct pds_vfio_pci_device *pds_vfio) +{ + if (pds_vfio->dirty.host_seq.sgl) + __pds_vfio_dirty_free_sgl(pds_vfio, + &pds_vfio->dirty.host_seq); + if (pds_vfio->dirty.host_ack.sgl) + __pds_vfio_dirty_free_sgl(pds_vfio, + &pds_vfio->dirty.host_ack); +} + +static int +__pds_vfio_dirty_alloc_sgl(struct pds_vfio_pci_device *pds_vfio, + struct pds_vfio_bmp_info *bmp_info, + u32 page_count) +{ + struct pci_dev *pdev = pds_vfio->vfio_coredev.pdev; + struct device *pdsc_dev = &pci_physfn(pdev)->dev; + struct pds_lm_sg_elem *sgl; + dma_addr_t sgl_addr; + size_t sgl_size; + u32 max_sge; + + max_sge = DIV_ROUND_UP(page_count, PAGE_SIZE * 8); + sgl_size = max_sge * sizeof(struct pds_lm_sg_elem); + + sgl = kzalloc(sgl_size, GFP_KERNEL); + if (!sgl) + return -ENOMEM; + + sgl_addr = dma_map_single(pdsc_dev, sgl, sgl_size, DMA_TO_DEVICE); + if (dma_mapping_error(pdsc_dev, sgl_addr)) { + kfree(sgl); + return -EIO; + } + + bmp_info->sgl = sgl; + bmp_info->num_sge = max_sge; + bmp_info->sgl_addr = sgl_addr; + + return 0; +} + +static int +pds_vfio_dirty_alloc_sgl(struct pds_vfio_pci_device *pds_vfio, + u32 page_count) +{ + struct pds_vfio_dirty *dirty = &pds_vfio->dirty; + int err; + + err = __pds_vfio_dirty_alloc_sgl(pds_vfio, + &dirty->host_seq, + page_count); + if (err) + return err; + + err = __pds_vfio_dirty_alloc_sgl(pds_vfio, + &dirty->host_ack, + page_count); + if (err) { + __pds_vfio_dirty_free_sgl(pds_vfio, &dirty->host_seq); + return err; + } + + return 0; +} + +static int +pds_vfio_dirty_enable(struct pds_vfio_pci_device *pds_vfio, + struct rb_root_cached *ranges, u32 nnodes, + u64 *page_size) +{ + struct pci_dev *pdev = pds_vfio->vfio_coredev.pdev; + struct device *pdsc_dev = &pci_physfn(pdev)->dev; + struct pds_vfio_dirty *dirty = &pds_vfio->dirty; + u64 region_start, region_size, region_page_size; + struct pds_lm_dirty_region_info *region_info; + struct interval_tree_node *node = NULL; + u8 max_regions = 0, num_regions; + dma_addr_t regions_dma = 0; + u32 num_ranges = nnodes; + u32 page_count; + u16 len; + int err; + + dev_dbg(&pdev->dev, "vf%u: Start dirty page tracking\n", pds_vfio->vf_id); + + if (pds_vfio_dirty_is_enabled(pds_vfio)) + return -EINVAL; + + pds_vfio_dirty_set_enabled(pds_vfio); + + /* find if dirty tracking is disabled, i.e. num_regions == 0 */ + err = pds_vfio_dirty_status_cmd(pds_vfio, 0, &max_regions, &num_regions); + if (num_regions) { + dev_err(&pdev->dev, "Dirty tracking already enabled for %d regions\n", + num_regions); + err = -EEXIST; + goto err_out; + } else if (!max_regions) { + dev_err(&pdev->dev, "Device doesn't support dirty tracking, max_regions %d\n", + max_regions); + err = -EOPNOTSUPP; + goto err_out; + } else if (err) { + dev_err(&pdev->dev, "Failed to get dirty status, err %pe\n", + ERR_PTR(err)); + goto err_out; + } + + /* + * Only support 1 region for now. If there are any large gaps in the + * VM's address regions, then this would be a waste of memory as we are + * generating 2 bitmaps (ack/seq) from the min address to the max + * address of the VM's address regions. In the future, if we support + * more than one region in the device/driver we can split the bitmaps + * on the largest address region gaps. We can do this split up to the + * max_regions times returned from the dirty_status command. + */ + max_regions = 1; + if (num_ranges > max_regions) { + vfio_combine_iova_ranges(ranges, nnodes, max_regions); + num_ranges = max_regions; + } + + node = interval_tree_iter_first(ranges, 0, ULONG_MAX); + if (!node) { + err = -EINVAL; + goto err_out; + } + + region_size = node->last - node->start + 1; + region_start = node->start; + region_page_size = *page_size; + + len = sizeof(*region_info); + region_info = kzalloc(len, GFP_KERNEL); + if (!region_info) { + err = -ENOMEM; + goto err_out; + } + + page_count = DIV_ROUND_UP(region_size, region_page_size); + + region_info->dma_base = cpu_to_le64(region_start); + region_info->page_count = cpu_to_le32(page_count); + region_info->page_size_log2 = ilog2(region_page_size); + + regions_dma = dma_map_single(pdsc_dev, (void *)region_info, len, + DMA_BIDIRECTIONAL); + if (dma_mapping_error(pdsc_dev, regions_dma)) { + err = -ENOMEM; + kfree(region_info); + goto err_out; + } + + err = pds_vfio_dirty_enable_cmd(pds_vfio, regions_dma, max_regions); + dma_unmap_single(pdsc_dev, regions_dma, len, DMA_BIDIRECTIONAL); + /* + * page_count might be adjusted by the device, + * update it before freeing region_info DMA + */ + page_count = le32_to_cpu(region_info->page_count); + + dev_dbg(&pdev->dev, "region_info: regions_dma 0x%llx dma_base 0x%llx page_count %u page_size_log2 %u\n", + regions_dma, region_start, page_count, (u8)ilog2(region_page_size)); + + kfree(region_info); + if (err) + goto err_out; + + err = pds_vfio_dirty_alloc_bitmaps(dirty, page_count); + if (err) { + dev_err(&pdev->dev, "Failed to alloc dirty bitmaps: %pe\n", + ERR_PTR(err)); + goto err_out; + } + + err = pds_vfio_dirty_alloc_sgl(pds_vfio, page_count); + if (err) { + dev_err(&pdev->dev, "Failed to alloc dirty sg lists: %pe\n", + ERR_PTR(err)); + goto err_free_bitmaps; + } + + dirty->region_start = region_start; + dirty->region_size = region_size; + dirty->region_page_size = region_page_size; + + pds_vfio_print_guest_region_info(pds_vfio, max_regions); + + return 0; + +err_free_bitmaps: + pds_vfio_dirty_free_bitmaps(dirty); +err_out: + pds_vfio_dirty_set_disabled(pds_vfio); + return err; +} + +int +pds_vfio_dirty_disable(struct pds_vfio_pci_device *pds_vfio) +{ + int err; + + if (!pds_vfio_dirty_is_enabled(pds_vfio)) { + err = 0; + goto out; + } + + pds_vfio_dirty_set_disabled(pds_vfio); + err = pds_vfio_dirty_disable_cmd(pds_vfio); + pds_vfio_dirty_free_sgl(pds_vfio); + pds_vfio_dirty_free_bitmaps(&pds_vfio->dirty); + +out: + pds_vfio_send_host_vf_lm_status_cmd(pds_vfio, PDS_LM_STA_NONE); + return err; +} + +static int +pds_vfio_dirty_seq_ack(struct pds_vfio_pci_device *pds_vfio, + struct pds_vfio_bmp_info *bmp_info, + u32 offset, u32 bmp_bytes, + bool read_seq) +{ + const char *bmp_type_str = read_seq ? "read_seq" : "write_ack"; + struct pci_dev *pdev = pds_vfio->vfio_coredev.pdev; + struct device *pdsc_dev = &pci_physfn(pdev)->dev; + int bytes_remaining; + dma_addr_t bmp_dma; + u8 dma_direction; + u16 num_sge = 0; + u64 *bmp; + int err; + + bmp = (u64 *)((u64)bmp_info->bmp + offset); + + dma_direction = read_seq ? DMA_FROM_DEVICE : DMA_TO_DEVICE; + bmp_dma = dma_map_single(pdsc_dev, bmp, bmp_bytes, + dma_direction); + if (dma_mapping_error(pdsc_dev, bmp_dma)) + return -EINVAL; + + bytes_remaining = bmp_bytes; + + for (int i = 0; i < bmp_info->num_sge && bytes_remaining > 0; i++) { + struct pds_lm_sg_elem *sg_elem = &bmp_info->sgl[i]; + u32 len = (bytes_remaining > PAGE_SIZE) ? + PAGE_SIZE : bytes_remaining; + + sg_elem->addr = cpu_to_le64(bmp_dma + i * PAGE_SIZE); + sg_elem->len = cpu_to_le32(len); + + bytes_remaining -= len; + ++num_sge; + } + + err = pds_vfio_dirty_seq_ack_cmd(pds_vfio, bmp_info->sgl_addr, + num_sge, offset, bmp_bytes, read_seq); + if (err) + dev_err(&pdev->dev, "Dirty bitmap %s failed offset %u bmp_bytes %u num_sge %u DMA 0x%llx: %pe\n", + bmp_type_str, offset, bmp_bytes, num_sge, bmp_info->sgl_addr, ERR_PTR(err)); + + dma_unmap_single(pdsc_dev, bmp_dma, bmp_bytes, dma_direction); + + return err; +} + +static int +pds_vfio_dirty_write_ack(struct pds_vfio_pci_device *pds_vfio, u32 offset, + u32 len) +{ + return pds_vfio_dirty_seq_ack(pds_vfio, + &pds_vfio->dirty.host_ack, offset, + len, WRITE_ACK); +} + +static int +pds_vfio_dirty_read_seq(struct pds_vfio_pci_device *pds_vfio, u32 offset, + u32 len) +{ + return pds_vfio_dirty_seq_ack(pds_vfio, + &pds_vfio->dirty.host_seq, offset, + len, READ_SEQ); +} + +static int +pds_vfio_dirty_process_bitmaps(struct pds_vfio_pci_device *pds_vfio, + struct iova_bitmap *dirty_bitmap, u32 bmp_offset, + u32 len_bytes) +{ + u64 page_size = pds_vfio->dirty.region_page_size; + u64 region_start = pds_vfio->dirty.region_start; + u32 bmp_offset_bit; + __le64 *seq, *ack; + int dword_count; + + dword_count = len_bytes / sizeof(u64); + seq = (__le64 *)((u64)pds_vfio->dirty.host_seq.bmp + bmp_offset); + ack = (__le64 *)((u64)pds_vfio->dirty.host_ack.bmp + bmp_offset); + bmp_offset_bit = bmp_offset * 8; + + for (int i = 0; i < dword_count; i++) { + u64 xor = le64_to_cpu(seq[i]) ^ le64_to_cpu(ack[i]); + + /* prepare for next write_ack call */ + ack[i] = seq[i]; + + for (u8 bit_i = 0; bit_i < BITS_PER_TYPE(u64); ++bit_i) { + if (xor & BIT(bit_i)) { + u64 abs_bit_i = bmp_offset_bit + i * + BITS_PER_TYPE(u64) + bit_i; + u64 addr = abs_bit_i * page_size + region_start; + + iova_bitmap_set(dirty_bitmap, addr, page_size); + } + } + } + + return 0; +} + +static int +pds_vfio_dirty_sync(struct pds_vfio_pci_device *pds_vfio, + struct iova_bitmap *dirty_bitmap, + unsigned long iova, unsigned long length) +{ + struct device *dev = &pds_vfio->vfio_coredev.pdev->dev; + struct pds_vfio_dirty *dirty = &pds_vfio->dirty; + u64 bmp_offset, bmp_bytes; + u64 bitmap_size, pages; + int err; + + dev_dbg(dev, "vf%u: Get dirty page bitmap\n", pds_vfio->vf_id); + + if (!pds_vfio_dirty_is_enabled(pds_vfio)) { + dev_err(dev, "vf%u: Sync failed, dirty tracking is disabled\n", + pds_vfio->vf_id); + return -EINVAL; + } + + pages = DIV_ROUND_UP(length, pds_vfio->dirty.region_page_size); + bitmap_size = round_up(pages, sizeof(u64) * BITS_PER_BYTE) / + BITS_PER_BYTE; + + dev_dbg(dev, "vf%u: iova 0x%lx length %lu page_size %llu pages %llu bitmap_size %llu\n", + pds_vfio->vf_id, iova, length, + pds_vfio->dirty.region_page_size, pages, bitmap_size); + + if (!length || + ((dirty->region_start + iova + length) > + (dirty->region_start + dirty->region_size))) { + dev_err(dev, "Invalid iova 0x%lx and/or length 0x%lx to sync\n", + iova, length); + return -EINVAL; + } + + /* bitmap is modified in 64 bit chunks */ + bmp_bytes = ALIGN(DIV_ROUND_UP(length / dirty->region_page_size, + sizeof(u64)), sizeof(u64)); + if (bmp_bytes != bitmap_size) { + dev_err(dev, "Calculated bitmap bytes %llu not equal to bitmap size %llu\n", + bmp_bytes, bitmap_size); + return -EINVAL; + } + + bmp_offset = DIV_ROUND_UP(iova / dirty->region_page_size, sizeof(u64)); + + dev_dbg(dev, "Syncing dirty bitmap, iova 0x%lx length 0x%lx, bmp_offset %llu bmp_bytes %llu\n", + iova, length, bmp_offset, bmp_bytes); + + err = pds_vfio_dirty_read_seq(pds_vfio, bmp_offset, bmp_bytes); + if (err) + return err; + + err = pds_vfio_dirty_process_bitmaps(pds_vfio, dirty_bitmap, + bmp_offset, bmp_bytes); + if (err) + return err; + + err = pds_vfio_dirty_write_ack(pds_vfio, bmp_offset, bmp_bytes); + if (err) + return err; + + return 0; +} + +int +pds_vfio_dma_logging_report(struct vfio_device *vdev, unsigned long iova, + unsigned long length, + struct iova_bitmap *dirty) +{ + struct pds_vfio_pci_device *pds_vfio = + container_of(vdev, struct pds_vfio_pci_device, + vfio_coredev.vdev); + int err; + + mutex_lock(&pds_vfio->state_mutex); + err = pds_vfio_dirty_sync(pds_vfio, dirty, iova, length); + pds_vfio_state_mutex_unlock(pds_vfio); + + return err; +} + +int +pds_vfio_dma_logging_start(struct vfio_device *vdev, + struct rb_root_cached *ranges, u32 nnodes, + u64 *page_size) +{ + struct pds_vfio_pci_device *pds_vfio = + container_of(vdev, struct pds_vfio_pci_device, + vfio_coredev.vdev); + int err; + + mutex_lock(&pds_vfio->state_mutex); + pds_vfio_send_host_vf_lm_status_cmd(pds_vfio, PDS_LM_STA_IN_PROGRESS); + err = pds_vfio_dirty_enable(pds_vfio, ranges, nnodes, page_size); + pds_vfio_state_mutex_unlock(pds_vfio); + + return err; +} + +int +pds_vfio_dma_logging_stop(struct vfio_device *vdev) +{ + struct pds_vfio_pci_device *pds_vfio = + container_of(vdev, struct pds_vfio_pci_device, + vfio_coredev.vdev); + int err; + + mutex_lock(&pds_vfio->state_mutex); + err = pds_vfio_dirty_disable(pds_vfio); + pds_vfio_state_mutex_unlock(pds_vfio); + + return err; +} diff --git a/drivers/vfio/pci/pds/dirty.h b/drivers/vfio/pci/pds/dirty.h new file mode 100644 index 000000000000..ea289fd830df --- /dev/null +++ b/drivers/vfio/pci/pds/dirty.h @@ -0,0 +1,45 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright(c) 2023 Advanced Micro Devices, Inc. */ + +#ifndef _DIRTY_H_ +#define _DIRTY_H_ + +struct pds_vfio_bmp_info { + unsigned long *bmp; + u32 bmp_bytes; + struct pds_lm_sg_elem *sgl; + dma_addr_t sgl_addr; + u16 num_sge; +}; + +struct pds_vfio_dirty { + struct pds_vfio_bmp_info host_seq; + struct pds_vfio_bmp_info host_ack; + u64 region_size; + u64 region_start; + u64 region_page_size; + bool is_enabled; +}; + +struct pds_vfio_pci_device; + +bool +pds_vfio_dirty_is_enabled(struct pds_vfio_pci_device *pds_vfio); +void +pds_vfio_dirty_set_enabled(struct pds_vfio_pci_device *pds_vfio); +void +pds_vfio_dirty_set_disabled(struct pds_vfio_pci_device *pds_vfio); +int +pds_vfio_dirty_disable(struct pds_vfio_pci_device *pds_vfio); + +int +pds_vfio_dma_logging_report(struct vfio_device *vdev, unsigned long iova, + unsigned long length, + struct iova_bitmap *dirty); +int +pds_vfio_dma_logging_start(struct vfio_device *vdev, + struct rb_root_cached *ranges, u32 nnodes, + u64 *page_size); +int +pds_vfio_dma_logging_stop(struct vfio_device *vdev); +#endif /* _DIRTY_H_ */ diff --git a/drivers/vfio/pci/pds/lm.c b/drivers/vfio/pci/pds/lm.c index 4e736f415df2..2b8876eb1bfd 100644 --- a/drivers/vfio/pci/pds/lm.c +++ b/drivers/vfio/pci/pds/lm.c @@ -386,8 +386,7 @@ pds_vfio_step_device_state_locked(struct pds_vfio_pci_device *pds_vfio, if (cur == VFIO_DEVICE_STATE_STOP_COPY && next == VFIO_DEVICE_STATE_STOP) { pds_vfio_put_save_file(pds_vfio); - pds_vfio_send_host_vf_lm_status_cmd(pds_vfio, - PDS_LM_STA_NONE); + pds_vfio_dirty_disable(pds_vfio); return NULL; } diff --git a/drivers/vfio/pci/pds/vfio_dev.c b/drivers/vfio/pci/pds/vfio_dev.c index 0c6e6c645f34..1adb00ea0114 100644 --- a/drivers/vfio/pci/pds/vfio_dev.c +++ b/drivers/vfio/pci/pds/vfio_dev.c @@ -5,6 +5,7 @@ #include #include "lm.h" +#include "dirty.h" #include "vfio_dev.h" struct pci_dev * @@ -28,7 +29,7 @@ pds_vfio_pci_drvdata(struct pci_dev *pdev) vfio_coredev); } -static void +void pds_vfio_state_mutex_unlock(struct pds_vfio_pci_device *pds_vfio) { again: @@ -125,6 +126,13 @@ pds_vfio_lm_ops = { .migration_get_data_size = pds_vfio_get_device_state_size }; +static const struct vfio_log_ops +pds_vfio_log_ops = { + .log_start = pds_vfio_dma_logging_start, + .log_stop = pds_vfio_dma_logging_stop, + .log_read_and_clear = pds_vfio_dma_logging_report, +}; + static int pds_vfio_init_device(struct vfio_device *vdev) { @@ -143,6 +151,7 @@ pds_vfio_init_device(struct vfio_device *vdev) vdev->migration_flags = VFIO_MIGRATION_STOP_COPY | VFIO_MIGRATION_P2P; vdev->mig_ops = &pds_vfio_lm_ops; + vdev->log_ops = &pds_vfio_log_ops; dev_dbg(&pdev->dev, "%s: PF %#04x VF %#04x (%d) vf_id %d domain %d pds_vfio %p\n", __func__, pci_dev_id(pdev->physfn), @@ -182,6 +191,7 @@ pds_vfio_close_device(struct vfio_device *vdev) mutex_lock(&pds_vfio->state_mutex); pds_vfio_put_restore_file(pds_vfio); pds_vfio_put_save_file(pds_vfio); + pds_vfio_dirty_disable(pds_vfio); mutex_unlock(&pds_vfio->state_mutex); mutex_destroy(&pds_vfio->state_mutex); vfio_pci_core_close_device(vdev); diff --git a/drivers/vfio/pci/pds/vfio_dev.h b/drivers/vfio/pci/pds/vfio_dev.h index df6208a7140b..2271f6af2a85 100644 --- a/drivers/vfio/pci/pds/vfio_dev.h +++ b/drivers/vfio/pci/pds/vfio_dev.h @@ -7,6 +7,7 @@ #include #include +#include "dirty.h" #include "lm.h" struct pdsc; @@ -17,6 +18,7 @@ struct pds_vfio_pci_device { struct pds_vfio_lm_file *save_file; struct pds_vfio_lm_file *restore_file; + struct pds_vfio_dirty dirty; struct mutex state_mutex; /* protect migration state */ enum vfio_device_mig_state state; spinlock_t reset_lock; /* protect reset_done flow */ @@ -27,6 +29,9 @@ struct pds_vfio_pci_device { u16 client_id; }; +void +pds_vfio_state_mutex_unlock(struct pds_vfio_pci_device *pds_vfio); + const struct vfio_device_ops *pds_vfio_ops_info(void); struct pds_vfio_pci_device *pds_vfio_pci_drvdata(struct pci_dev *pdev); void pds_vfio_reset(struct pds_vfio_pci_device *pds_vfio); diff --git a/include/linux/pds/pds_adminq.h b/include/linux/pds/pds_adminq.h index 897b966c52ea..8338722c74d2 100644 --- a/include/linux/pds/pds_adminq.h +++ b/include/linux/pds/pds_adminq.h @@ -610,6 +610,10 @@ union pds_core_adminq_cmd { struct pds_lm_save_cmd lm_save; struct pds_lm_restore_cmd lm_restore; struct pds_lm_host_vf_status_cmd lm_host_vf_status; + struct pds_lm_dirty_status_cmd lm_dirty_status; + struct pds_lm_dirty_enable_cmd lm_dirty_enable; + struct pds_lm_dirty_disable_cmd lm_dirty_disable; + struct pds_lm_dirty_seq_ack_cmd lm_dirty_seq_ack; }; union pds_core_adminq_comp { @@ -633,6 +637,7 @@ union pds_core_adminq_comp { struct pds_core_q_init_comp q_init; struct pds_lm_status_comp lm_status; + struct pds_lm_dirty_status_comp lm_dirty_status; }; #ifndef __CHECKER__ diff --git a/include/linux/pds/pds_lm.h b/include/linux/pds/pds_lm.h index f1b0beb3c87b..37312f92f3b0 100644 --- a/include/linux/pds/pds_lm.h +++ b/include/linux/pds/pds_lm.h @@ -24,6 +24,13 @@ enum pds_lm_cmd_opcode { PDS_LM_CMD_RESUME = 20, PDS_LM_CMD_SAVE = 21, PDS_LM_CMD_RESTORE = 22, + + /* Dirty page tracking commands */ + PDS_LM_CMD_DIRTY_STATUS = 32, + PDS_LM_CMD_DIRTY_ENABLE = 33, + PDS_LM_CMD_DIRTY_DISABLE = 34, + PDS_LM_CMD_DIRTY_READ_SEQ = 35, + PDS_LM_CMD_DIRTY_WRITE_ACK = 36, }; /** @@ -214,4 +221,170 @@ struct pds_lm_host_vf_status_cmd { u8 status; }; +/** + * struct pds_lm_dirty_region_info - Memory region info for STATUS and ENABLE + * @dma_base: Base address of the DMA-contiguous memory region + * @page_count: Number of pages in the memory region + * @page_size_log2: Log2 page size in the memory region + * @rsvd: Word boundary padding + */ +struct pds_lm_dirty_region_info { + __le64 dma_base; + __le32 page_count; + u8 page_size_log2; + u8 rsvd[3]; +}; + +/** + * struct pds_lm_dirty_status_cmd - DIRTY_STATUS command + * @opcode: Opcode PDS_LM_CMD_DIRTY_STATUS + * @rsvd: Word boundary padding + * @vf_id: VF id + * @max_regions: Capacity of the region info buffer + * @rsvd2: Word boundary padding + * @regions_dma: DMA address of the region info buffer + * + * The minimum of max_regions (from the command) and num_regions (from the + * completion) of struct pds_lm_dirty_region_info will be written to + * regions_dma. + * + * The max_regions may be zero, in which case regions_dma is ignored. In that + * case, the completion will only report the maximum number of regions + * supported by the device, and the number of regions currently enabled. + */ +struct pds_lm_dirty_status_cmd { + u8 opcode; + u8 rsvd; + __le16 vf_id; + u8 max_regions; + u8 rsvd2[3]; + __le64 regions_dma; +} __packed; + +/** + * enum pds_lm_dirty_bmp_type - Type of dirty page bitmap + * @PDS_LM_DIRTY_BMP_TYPE_NONE: No bitmap / disabled + * @PDS_LM_DIRTY_BMP_TYPE_SEQ_ACK: Seq/Ack bitmap representation + */ +enum pds_lm_dirty_bmp_type { + PDS_LM_DIRTY_BMP_TYPE_NONE = 0, + PDS_LM_DIRTY_BMP_TYPE_SEQ_ACK = 1, +}; + +/** + * struct pds_lm_dirty_status_comp - STATUS command completion + * @status: Status of the command (enum pds_core_status_code) + * @rsvd: Word boundary padding + * @comp_index: Index in the desc ring for which this is the completion + * @max_regions: Maximum number of regions supported by the device + * @num_regions: Number of regions currently enabled + * @bmp_type: Type of dirty bitmap representation + * @rsvd2: Word boundary padding + * @bmp_type_mask: Mask of supported bitmap types, bit index per type + * @rsvd3: Word boundary padding + * @color: Color bit + * + * This completion descriptor is used for STATUS, ENABLE, and DISABLE. + */ +struct pds_lm_dirty_status_comp { + u8 status; + u8 rsvd; + __le16 comp_index; + u8 max_regions; + u8 num_regions; + u8 bmp_type; + u8 rsvd2; + __le32 bmp_type_mask; + u8 rsvd3[3]; + u8 color; +}; + +/** + * struct pds_lm_dirty_enable_cmd - DIRTY_ENABLE command + * @opcode: Opcode PDS_LM_CMD_DIRTY_ENABLE + * @rsvd: Word boundary padding + * @vf_id: VF id + * @bmp_type: Type of dirty bitmap representation + * @num_regions: Number of entries in the region info buffer + * @rsvd2: Word boundary padding + * @regions_dma: DMA address of the region info buffer + * + * The num_regions must be nonzero, and less than or equal to the maximum + * number of regions supported by the device. + * + * The memory regions should not overlap. + * + * The information should be initialized by the driver. The device may modify + * the information on successful completion, such as by size-aligning the + * number of pages in a region. + * + * The modified number of pages will be greater than or equal to the page count + * given in the enable command, and at least as coarsly aligned as the given + * value. For example, the count might be aligned to a multiple of 64, but + * if the value is already a multiple of 128 or higher, it will not change. + * If the driver requires its own minimum alignment of the number of pages, the + * driver should account for that already in the region info of this command. + * + * This command uses struct pds_lm_dirty_status_comp for its completion. + */ +struct pds_lm_dirty_enable_cmd { + u8 opcode; + u8 rsvd; + __le16 vf_id; + u8 bmp_type; + u8 num_regions; + u8 rsvd2[2]; + __le64 regions_dma; +} __packed; + +/** + * struct pds_lm_dirty_disable_cmd - DIRTY_DISABLE command + * @opcode: Opcode PDS_LM_CMD_DIRTY_DISABLE + * @rsvd: Word boundary padding + * @vf_id: VF id + * + * Dirty page tracking will be disabled. This may be called in any state, as + * long as dirty page tracking is supported by the device, to ensure that dirty + * page tracking is disabled. + * + * This command uses struct pds_lm_dirty_status_comp for its completion. On + * success, num_regions will be zero. + */ +struct pds_lm_dirty_disable_cmd { + u8 opcode; + u8 rsvd; + __le16 vf_id; +}; + +/** + * struct pds_lm_dirty_seq_ack_cmd - DIRTY_READ_SEQ or _WRITE_ACK command + * @opcode: Opcode PDS_LM_CMD_DIRTY_[READ_SEQ|WRITE_ACK] + * @rsvd: Word boundary padding + * @vf_id: VF id + * @off_bytes: Byte offset in the bitmap + * @len_bytes: Number of bytes to transfer + * @num_sge: Number of DMA scatter gather elements + * @rsvd2: Word boundary padding + * @sgl_addr: DMA address of scatter gather list + * + * Read bytes from the SEQ bitmap, or write bytes into the ACK bitmap. + * + * This command treats the entire bitmap as a byte buffer. It does not + * distinguish between guest memory regions. The driver should refer to the + * number of pages in each region, according to PDS_LM_CMD_DIRTY_STATUS, to + * determine the region boundaries in the bitmap. Each region will be + * represented by exactly the number of bits as the page count for that region, + * immediately following the last bit of the previous region. + */ +struct pds_lm_dirty_seq_ack_cmd { + u8 opcode; + u8 rsvd; + __le16 vf_id; + __le32 off_bytes; + __le32 len_bytes; + __le16 num_sge; + u8 rsvd2[2]; + __le64 sgl_addr; +} __packed; + #endif /* _PDS_LM_H_ */ From patchwork Sat Apr 22 01:06:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brett Creeley X-Patchwork-Id: 13220860 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 42B23C77B7F for ; Sat, 22 Apr 2023 01:07:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232902AbjDVBHo (ORCPT ); Fri, 21 Apr 2023 21:07:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37864 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234121AbjDVBHg (ORCPT ); Fri, 21 Apr 2023 21:07:36 -0400 Received: from NAM10-MW2-obe.outbound.protection.outlook.com (mail-mw2nam10on2061.outbound.protection.outlook.com [40.107.94.61]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ED9102719; Fri, 21 Apr 2023 18:07:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=DUMq6QZYQrTA/930FbEzgbZILft2ZjHvHB6ZUOlmJ7gbpIHcyE4jp/wv36T7fd084RKZ1dz2Vej/SZu9keyit4LdDXfaifHIFe0eX6ZS9W3/zVD3Cxdj7b6yUGahGHkDykPg+6k8jw1rtgefNiUSbNovUsjveku/os8dfvPc+1nc9dhSVqI9SaOFPuw06VyZzDZyrlqDDlCR6A+tpmUN98bbbQMMZ5duhMnOBBR17KCh+ssdS5Dtq1bLX7wyxQ+Wo1JD1bXaMqOLxCq0FcNc88cTogW8HLlxSd4GAbph3mJ527KoGXzE2p9Yhhdoc4rVSOjyx420ucpfDoWkRAyT8w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=hxtxk1ZpvyrKOOhVoQcB2qJ5YUIOTUPC/7VpoUhu5iU=; b=DvDbdvUIPdE7VFnVfZmY9LeywWa7ktrpWvcua7w8B3m8/ZC7cUGxl1m9QrxBvglFVCD24/GkcGIeMBfc95UMgwWIk0TsHoV2FIqKgRCqrKExcXlsp5MGjiU1Qdp7ppF1+Ds1TTqk59qyxenqb42Ru0I+m6FRbkpengvEk0ceNB3yhG+Rz6kG5UhNZx0/0G7pw7D/IDRQYW6juj14d/5ILVyvNVzW0kiiILfKKsQ6u4rzQwf1WWa6B5e38+ZQOqPGv2HZT7yCZDJwOXH74Z4tIlmgTKfzkx4MUFAA8ViTHkOEdbKfu0m8zJUgpYSlJxWcGlh/WzvORCuKpnQc8/AaCg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=vger.kernel.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=hxtxk1ZpvyrKOOhVoQcB2qJ5YUIOTUPC/7VpoUhu5iU=; b=J/rxG/y7o82dnuOq/N2F04wwbz7Plg1icIyZPrBsvEEYB9HOQfCxujKdshZfWfeexh1/ayEmDHgmWvhjEycY9eZaTAx3NGFO8+EhI5d/lnBIIrNJ1/k+WO+5qYPtkUIK3fHRue9xKKWAKREAIm8dyZhdb2c/e9IHk6W7rc5j2F0= Received: from BN9PR03CA0764.namprd03.prod.outlook.com (2603:10b6:408:13a::19) by CH2PR12MB4133.namprd12.prod.outlook.com (2603:10b6:610:7a::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6319.22; Sat, 22 Apr 2023 01:07:19 +0000 Received: from BN8NAM11FT003.eop-nam11.prod.protection.outlook.com (2603:10b6:408:13a:cafe::3a) by BN9PR03CA0764.outlook.office365.com (2603:10b6:408:13a::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6319.27 via Frontend Transport; Sat, 22 Apr 2023 01:07:19 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT003.mail.protection.outlook.com (10.13.177.90) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6319.25 via Frontend Transport; Sat, 22 Apr 2023 01:07:19 +0000 Received: from driver-dev1.pensando.io (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Fri, 21 Apr 2023 20:07:18 -0500 From: Brett Creeley To: , , , , , , CC: , , Subject: [PATCH v9 vfio 6/7] vfio/pds: Add support for firmware recovery Date: Fri, 21 Apr 2023 18:06:41 -0700 Message-ID: <20230422010642.60720-7-brett.creeley@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230422010642.60720-1-brett.creeley@amd.com> References: <20230422010642.60720-1-brett.creeley@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT003:EE_|CH2PR12MB4133:EE_ X-MS-Office365-Filtering-Correlation-Id: 97040736-11c1-4960-4033-08db42cdebf9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Sgb7E5jAdbnEIejpwW+6dkc21fuLXRm8qWxVFhCYJ4zvpj6msc9woChj/BtjUKePK4O/6+FbpRNPZkT67KqP5oxPWqNqbY3Z2SGQPZhq4ZYbREMOM6SwvVh1S5jQeJKSd0zMwiyq5FC9GeTpX4soWPiu75HcSW0+ZGSypt3LhHs3IvLeEI0KlJBbaKDw/lg2POzef9ZOp1A/4v61ZE21ico87HmJVhK7paKS6jmgIKIGVNc1NdbM+J+jaUuWgCBwGDTToZgc/CN8hq/J67d6BIu77j7l2kaSTTN4ISjdj/LcxuPvXjY8SdfkMXt14e+kREV/N5q4TiefJjWMOE41k57VIwJAACKWsYAlkb/DtZn/m3PkY1fdVim1L2gr5vm4fPA5TCxmDNwb+/gqYjpF+uCTdkhyz3hJmPL0+m2IXngb8dtQ58CFyB7h6I8aKqmtvDAt8U4dAjsNLGPGPt2tgLmcIWTtg/r6DgRRvz6bdbAhnxSjY/jyGh/F2U+fez71xTkJLPhDmtFV716hEjzH66u43WqmbFu2BYQTXUMsivmjMr2QbIxQG2meF1BhfFWUy5WH+y5BLF32vO4fA5ztFebbjBlg3qyln4Sg/Fg9R+Kn6l5JzBb63hylOoj9kTwu7Kbty9avPs/5qGGDXaM5yUFXW3V+Shi5h9utqY9tjW1QKCJjckFMaryDsvypePszKc5yAlriC02n9Yp7DMSDJFOFPFrUTjvN6MOFqhYinMM= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(376002)(396003)(346002)(39860400002)(136003)(451199021)(46966006)(36840700001)(40470700004)(40460700003)(478600001)(356005)(81166007)(6666004)(1076003)(82740400003)(82310400005)(2616005)(186003)(16526019)(26005)(426003)(83380400001)(336012)(36860700001)(47076005)(86362001)(4326008)(54906003)(110136005)(36756003)(40480700001)(70586007)(41300700001)(8676002)(8936002)(70206006)(316002)(2906002)(44832011)(5660300002)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Apr 2023 01:07:19.7297 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 97040736-11c1-4960-4033-08db42cdebf9 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT003.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4133 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org It's possible that the device firmware crashes and is able to recover due to some configuration and/or other issue. If a live migration is in progress while the firmware crashes, the live migration will fail. However, the VF PCI device should still be functional post crash recovery and subsequent migrations should go through as expected. When the pds_core device notices that firmware crashes it sends an event to all its client drivers. When the pds_vfio driver receives this event while migration is in progress it will request a deferred reset on the next migration state transition. This state transition will report failure as well as any subsequent state transition requests from the VMM/VFIO. Based on uapi/vfio.h the only way out of VFIO_DEVICE_STATE_ERROR is by issuing VFIO_DEVICE_RESET. Once this reset is done, the migration state will be reset to VFIO_DEVICE_STATE_RUNNING and migration can be performed. If the event is received while no migration is in progress (i.e. the VM is in normal operating mode), then no actions are taken and the migration state remains VFIO_DEVICE_STATE_RUNNING. Signed-off-by: Brett Creeley Signed-off-by: Shannon Nelson --- drivers/vfio/pci/pds/pci_drv.c | 108 ++++++++++++++++++++++++++++++++ drivers/vfio/pci/pds/vfio_dev.c | 29 ++++++++- drivers/vfio/pci/pds/vfio_dev.h | 4 ++ 3 files changed, 139 insertions(+), 2 deletions(-) diff --git a/drivers/vfio/pci/pds/pci_drv.c b/drivers/vfio/pci/pds/pci_drv.c index 91d9a66d847a..b64c2e492688 100644 --- a/drivers/vfio/pci/pds/pci_drv.c +++ b/drivers/vfio/pci/pds/pci_drv.c @@ -19,6 +19,107 @@ #define PDS_VFIO_DRV_DESCRIPTION "AMD/Pensando VFIO Device Driver" #define PCI_VENDOR_ID_PENSANDO 0x1dd8 +static void +pds_vfio_recovery(struct pds_vfio_pci_device *pds_vfio) +{ + bool deferred_reset_needed = false; + + /* + * Documentation states that the kernel migration driver must not + * generate asynchronous device state transitions outside of + * manipulation by the user or the VFIO_DEVICE_RESET ioctl. + * + * Since recovery is an asynchronous event received from the device, + * initiate a deferred reset. Only issue the deferred reset if a + * migration is in progress, which will cause the next step of the + * migration to fail. Also, if the device is in a state that will + * be set to VFIO_DEVICE_STATE_RUNNING on the next action (i.e. VM is + * shutdown and device is in VFIO_DEVICE_STATE_STOP) as that will clear + * the VFIO_DEVICE_STATE_ERROR when the VM starts back up. + */ + mutex_lock(&pds_vfio->state_mutex); + if ((pds_vfio->state != VFIO_DEVICE_STATE_RUNNING && + pds_vfio->state != VFIO_DEVICE_STATE_ERROR) || + (pds_vfio->state == VFIO_DEVICE_STATE_RUNNING && + pds_vfio_dirty_is_enabled(pds_vfio))) + deferred_reset_needed = true; + mutex_unlock(&pds_vfio->state_mutex); + + /* + * On the next user initiated state transition, the device will + * transition to the VFIO_DEVICE_STATE_ERROR. At this point it's the user's + * responsibility to reset the device. + * + * If a VFIO_DEVICE_RESET is requested post recovery and before the next + * state transition, then the deferred reset state will be set to + * VFIO_DEVICE_STATE_RUNNING. + */ + if (deferred_reset_needed) + pds_vfio_deferred_reset(pds_vfio, VFIO_DEVICE_STATE_ERROR); +} + +static int +pds_vfio_pci_notify_handler(struct notifier_block *nb, + unsigned long ecode, + void *data) +{ + struct pds_vfio_pci_device *pds_vfio = container_of(nb, + struct pds_vfio_pci_device, + nb); + struct device *dev = pds_vfio_to_dev(pds_vfio); + union pds_core_notifyq_comp *event = data; + + dev_dbg(dev, "%s: event code %lu\n", __func__, ecode); + + /* + * We don't need to do anything for RESET state==0 as there is no notify + * or feedback mechanism available, and it is possible that we won't + * even see a state==0 event. + * + * Any requests from VFIO while state==0 will fail, which will return + * error and may cause migration to fail. + */ + if (ecode == PDS_EVENT_RESET) { + dev_info(dev, "%s: PDS_EVENT_RESET event received, state==%d\n", + __func__, event->reset.state); + if (event->reset.state == 1) + pds_vfio_recovery(pds_vfio); + } + + return 0; +} + +static int +pds_vfio_pci_register_event_handler(struct pds_vfio_pci_device *pds_vfio) +{ + struct device *dev = pds_vfio_to_dev(pds_vfio); + struct notifier_block *nb = &pds_vfio->nb; + int err; + + if (!nb->notifier_call) { + nb->notifier_call = pds_vfio_pci_notify_handler; + err = pdsc_register_notify(nb); + if (err) { + nb->notifier_call = NULL; + dev_err(dev, "failed to register pds event handler: %pe\n", + ERR_PTR(err)); + return -EINVAL; + } + dev_dbg(dev, "pds event handler registered\n"); + } + + return 0; +} + +static void +pds_vfio_pci_unregister_event_handler(struct pds_vfio_pci_device *pds_vfio) +{ + if (pds_vfio->nb.notifier_call) { + pdsc_unregister_notify(&pds_vfio->nb); + pds_vfio->nb.notifier_call = NULL; + } +} + static int pds_vfio_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) @@ -49,8 +150,14 @@ pds_vfio_pci_probe(struct pci_dev *pdev, goto out_unregister_coredev; } + err = pds_vfio_pci_register_event_handler(pds_vfio); + if (err) + goto out_unregister_client; + return 0; +out_unregister_client: + pds_vfio_unregister_client_cmd(pds_vfio); out_unregister_coredev: vfio_pci_core_unregister_device(&pds_vfio->vfio_coredev); out_put_vdev: @@ -63,6 +170,7 @@ pds_vfio_pci_remove(struct pci_dev *pdev) { struct pds_vfio_pci_device *pds_vfio = pds_vfio_pci_drvdata(pdev); + pds_vfio_pci_unregister_event_handler(pds_vfio); pds_vfio_unregister_client_cmd(pds_vfio); vfio_pci_core_unregister_device(&pds_vfio->vfio_coredev); vfio_put_device(&pds_vfio->vfio_coredev.vdev); diff --git a/drivers/vfio/pci/pds/vfio_dev.c b/drivers/vfio/pci/pds/vfio_dev.c index 1adb00ea0114..0ae9f9250083 100644 --- a/drivers/vfio/pci/pds/vfio_dev.c +++ b/drivers/vfio/pci/pds/vfio_dev.c @@ -37,10 +37,13 @@ pds_vfio_state_mutex_unlock(struct pds_vfio_pci_device *pds_vfio) if (pds_vfio->deferred_reset) { pds_vfio->deferred_reset = false; if (pds_vfio->state == VFIO_DEVICE_STATE_ERROR) { - pds_vfio->state = VFIO_DEVICE_STATE_RUNNING; + pds_vfio->state = pds_vfio->deferred_reset_state; pds_vfio_put_restore_file(pds_vfio); pds_vfio_put_save_file(pds_vfio); + } else if (pds_vfio->deferred_reset_state == VFIO_DEVICE_STATE_ERROR) { + pds_vfio->state = VFIO_DEVICE_STATE_ERROR; } + pds_vfio->deferred_reset_state = VFIO_DEVICE_STATE_RUNNING; spin_unlock(&pds_vfio->reset_lock); goto again; } @@ -53,6 +56,7 @@ pds_vfio_reset(struct pds_vfio_pci_device *pds_vfio) { spin_lock(&pds_vfio->reset_lock); pds_vfio->deferred_reset = true; + pds_vfio->deferred_reset_state = VFIO_DEVICE_STATE_RUNNING; if (!mutex_trylock(&pds_vfio->state_mutex)) { spin_unlock(&pds_vfio->reset_lock); return; @@ -61,6 +65,16 @@ pds_vfio_reset(struct pds_vfio_pci_device *pds_vfio) pds_vfio_state_mutex_unlock(pds_vfio); } +void +pds_vfio_deferred_reset(struct pds_vfio_pci_device *pds_vfio, + enum vfio_device_mig_state reset_state) +{ + spin_lock(&pds_vfio->reset_lock); + pds_vfio->deferred_reset = true; + pds_vfio->deferred_reset_state = reset_state; + spin_unlock(&pds_vfio->reset_lock); +} + static struct file * pds_vfio_set_device_state(struct vfio_device *vdev, enum vfio_device_mig_state new_state) @@ -71,7 +85,14 @@ pds_vfio_set_device_state(struct vfio_device *vdev, struct file *res = NULL; mutex_lock(&pds_vfio->state_mutex); - while (new_state != pds_vfio->state) { + /* + * only way to transition out of VFIO_DEVICE_STATE_ERROR is via + * VFIO_DEVICE_RESET, so prevent the state machine from running since + * vfio_mig_get_next_state() will throw a WARN_ON() when transitioning + * from VFIO_DEVICE_STATE_ERROR to any other state + */ + while (pds_vfio->state != VFIO_DEVICE_STATE_ERROR && + new_state != pds_vfio->state) { enum vfio_device_mig_state next_state; int err = vfio_mig_get_next_state(vdev, pds_vfio->state, @@ -93,6 +114,9 @@ pds_vfio_set_device_state(struct vfio_device *vdev, } } pds_vfio_state_mutex_unlock(pds_vfio); + /* still waiting on a deferred_reset */ + if (pds_vfio->state == VFIO_DEVICE_STATE_ERROR) + res = ERR_PTR(-EIO); return res; } @@ -175,6 +199,7 @@ pds_vfio_open_device(struct vfio_device *vdev) mutex_init(&pds_vfio->state_mutex); pds_vfio->state = VFIO_DEVICE_STATE_RUNNING; + pds_vfio->deferred_reset_state = VFIO_DEVICE_STATE_RUNNING; vfio_pci_core_finish_enable(&pds_vfio->vfio_coredev); diff --git a/drivers/vfio/pci/pds/vfio_dev.h b/drivers/vfio/pci/pds/vfio_dev.h index 2271f6af2a85..d494aabfce1f 100644 --- a/drivers/vfio/pci/pds/vfio_dev.h +++ b/drivers/vfio/pci/pds/vfio_dev.h @@ -23,6 +23,8 @@ struct pds_vfio_pci_device { enum vfio_device_mig_state state; spinlock_t reset_lock; /* protect reset_done flow */ u8 deferred_reset; + enum vfio_device_mig_state deferred_reset_state; + struct notifier_block nb; int vf_id; int pci_id; @@ -35,6 +37,8 @@ pds_vfio_state_mutex_unlock(struct pds_vfio_pci_device *pds_vfio); const struct vfio_device_ops *pds_vfio_ops_info(void); struct pds_vfio_pci_device *pds_vfio_pci_drvdata(struct pci_dev *pdev); void pds_vfio_reset(struct pds_vfio_pci_device *pds_vfio); +void pds_vfio_deferred_reset(struct pds_vfio_pci_device *pds_vfio, + enum vfio_device_mig_state reset_state); struct pci_dev *pds_vfio_to_pci_dev(struct pds_vfio_pci_device *pds_vfio); struct device *pds_vfio_to_dev(struct pds_vfio_pci_device *pds_vfio); From patchwork Sat Apr 22 01:06:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brett Creeley X-Patchwork-Id: 13220862 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76B85C7618E for ; Sat, 22 Apr 2023 01:07:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234182AbjDVBHt (ORCPT ); Fri, 21 Apr 2023 21:07:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38060 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234140AbjDVBHh (ORCPT ); Fri, 21 Apr 2023 21:07:37 -0400 Received: from NAM11-DM6-obe.outbound.protection.outlook.com (mail-dm6nam11on2088.outbound.protection.outlook.com [40.107.223.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 208FB269E; Fri, 21 Apr 2023 18:07:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=LyaHsb+FbZUuQ6A3ZiDhmWgSNSdQcH3JTy0GCt6ipg/Z1YsMWyrX4xAqxCS4LWqA3mjWYera/dWXHPCTEXivBKOCOMCoofWScMtqdX7st2xNfD5t2hWdvVG8vA4NrRgif9h/CmTgocHLNqxWOaCfMd1iPDqmSpNbHd3MzNstX31rUtF5kLFp2lcn8z5aK3tsF8FWnRvluL4nCZxsXTuDUSeLQS6kfbJp42eFyYd0efedDCe+GQsBsDJ+BkkIwetj/mvUVqAljoZ9XUvQEjwS+30Kbf2kgFT8/YzKg+WKTMJOSgfPrQVzMrncUpWlst7HdwNmGwT1Kcz6iT/hS/ZrKA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=fySxURFxhBfMeWykpyJOwgXivkTgR94ltVVXbx7NImA=; b=WF7RnIAxmaBBAD8VPXSd10kVF7+hMRyZZWVKEQ8ETT26U7lcggjA491NcQhnBfmTaHVklLl9PsT3PD4m01R138zAyr/PrAuT1SFydTbp6ji0o+5e8jmbbeBcu5cRqLDRmXKjOdWyaL2MpSTDV+GV0KXX38WjiwkgE9FXruF82zTwC/0Ex2IMW7GzVa9EfnLlUG5xRZ7IOi30oAfgXZQhBXmPKhdyQlpk3kqTJszuxXs0SvkQoUETLgS9QCpcS1oLGiikqshXnZF7qa8eUfwPYCVmz07ogggPlteT0lBL165amcFJtZJ8/H+/3K0EA2DrIbXxGLTjZRnV/APR0/qH0Q== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=vger.kernel.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=fySxURFxhBfMeWykpyJOwgXivkTgR94ltVVXbx7NImA=; b=uqlJdxcIm+akQLURAJf7Ze6bkIa0gwpIG3n5fyIgrs6pmznA77Hbi5+nX1Fq0aVLFH3C6sgiGrrsGwysnHs+PU4qU29amwwWpiIgwiSzuRxXaoKOLmBdl1juHzivxSsIrCC1mu8Z+fFkt6bMnV1uaPEiDoT7B2CDu4oo+7Fn13I= Received: from BN9PR03CA0359.namprd03.prod.outlook.com (2603:10b6:408:f6::34) by DS7PR12MB6096.namprd12.prod.outlook.com (2603:10b6:8:9b::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6319.22; Sat, 22 Apr 2023 01:07:22 +0000 Received: from BN8NAM11FT005.eop-nam11.prod.protection.outlook.com (2603:10b6:408:f6:cafe::48) by BN9PR03CA0359.outlook.office365.com (2603:10b6:408:f6::34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6319.25 via Frontend Transport; Sat, 22 Apr 2023 01:07:21 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT005.mail.protection.outlook.com (10.13.176.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6319.27 via Frontend Transport; Sat, 22 Apr 2023 01:07:21 +0000 Received: from driver-dev1.pensando.io (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Fri, 21 Apr 2023 20:07:20 -0500 From: Brett Creeley To: , , , , , , CC: , , Subject: [PATCH v9 vfio 7/7] vfio/pds: Add Kconfig and documentation Date: Fri, 21 Apr 2023 18:06:42 -0700 Message-ID: <20230422010642.60720-8-brett.creeley@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230422010642.60720-1-brett.creeley@amd.com> References: <20230422010642.60720-1-brett.creeley@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT005:EE_|DS7PR12MB6096:EE_ X-MS-Office365-Filtering-Correlation-Id: 9f0ee63a-3560-4ab9-4c31-08db42cded2a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: zTgrUQ9T0B009fnjYFSGhDvQPRPG4Ww5XJGgLANRohMnqLkniXxj+FNRzkUViRj+yOJKOACcU4JpN2nO+vw61LqicAmo0U5WiYFA+S8srKwsmvECEoHDgysq01tJEsjKQ5m9RVt7aqvnylYj/btD/CzJyU502jItrg5g6YZzxNwXoQxkVJjLZ4y1hLHI7B+Az/tErVff8i3reI9uEvLTqwr6rTsQlZApMkRe7OItzIJwwnWfvQpUA1pvUJ+SzFcRNnwvm7D0I7Vu06zNdpXAw3mE52QSPLZW+jdAFT9HUaHjjCZ+snoAFi1rAdfXR6ckm0iiytE+rd33VIngr9J5Cwojs8Ck0gwaxO0DEaNpSOb62EfHGCquhjjVG9WPuYGuU27ymJ5QXxhuzL0OLORp7Ji/inATmUDQc5dIM73Xt9IjRfN0B5x5fA3w/8c5XioQBtPtUN05hc/mesdCYGP0lew9M0D1x+pa8GDgd+mgGGlYuUFg5/6Cz5JihRv3w1ksx8qiRGG82YENACiskhR17JIfsx9JWEO1HDypU8czk7xykNrWQncipxBT9Yuht1sMxN+b9JNdsagxlUhpdMdNMiXkhJsfmLyWYpGPnUmAZeeC5fEeMjaq2iPSAsFU0R0WbSemN7/Dj1V8JdZ701jmyKGHVW6K1XE33XgpqooylM0Pya8vSRCYUu+kKUQop5xfXKA0l1TiXe8FO6YsyC/+P14K9nmfYg5MVdO9ot7v7A8= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(346002)(39860400002)(376002)(136003)(396003)(451199021)(46966006)(40470700004)(36840700001)(16526019)(40460700003)(44832011)(36756003)(2906002)(8676002)(86362001)(40480700001)(5660300002)(41300700001)(316002)(8936002)(82310400005)(70586007)(4326008)(70206006)(356005)(47076005)(336012)(82740400003)(36860700001)(426003)(83380400001)(2616005)(110136005)(1076003)(478600001)(26005)(54906003)(186003)(81166007)(6666004)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Apr 2023 01:07:21.7289 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9f0ee63a-3560-4ab9-4c31-08db42cded2a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT005.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6096 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Add Kconfig entries and pds_vfio.rst. Also, add an entry in the MAINTAINERS file for this new driver. It's not clear where documentation for vendor specific VFIO drivers should live, so just re-use the current amd ethernet location. Signed-off-by: Brett Creeley Signed-off-by: Shannon Nelson Reviewed-by: Simon Horman --- .../device_drivers/ethernet/amd/pds_vfio.rst | 79 +++++++++++++++++++ .../device_drivers/ethernet/index.rst | 1 + MAINTAINERS | 7 ++ drivers/vfio/pci/Kconfig | 2 + drivers/vfio/pci/pds/Kconfig | 20 +++++ 5 files changed, 109 insertions(+) create mode 100644 Documentation/networking/device_drivers/ethernet/amd/pds_vfio.rst create mode 100644 drivers/vfio/pci/pds/Kconfig diff --git a/Documentation/networking/device_drivers/ethernet/amd/pds_vfio.rst b/Documentation/networking/device_drivers/ethernet/amd/pds_vfio.rst new file mode 100644 index 000000000000..7bddde0c7c9d --- /dev/null +++ b/Documentation/networking/device_drivers/ethernet/amd/pds_vfio.rst @@ -0,0 +1,79 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. note: can be edited and viewed with /usr/bin/formiko-vim + +========================================================== +PCI VFIO driver for the AMD/Pensando(R) DSC adapter family +========================================================== + +AMD/Pensando Linux VFIO PCI Device Driver +Copyright(c) 2023 Advanced Micro Devices, Inc. + +Overview +======== + +The ``pds_vfio`` module is a PCI driver that supports Live Migration +capable Virtual Function (VF) devices in the DSC hardware. + +Using the device +================ + +The pds_vfio device is enabled via multiple configuration steps and +depends on the ``pds_core`` driver to create and enable SR-IOV Virtual +Function devices. + +Shown below are the steps to bind the driver to a VF and also to the +associated auxiliary device created by the ``pds_core`` driver. This +example assumes the pds_core and pds_vfio modules are already +loaded. + +.. code-block:: bash + :name: example-setup-script + + #!/bin/bash + + PF_BUS="0000:60" + PF_BDF="0000:60:00.0" + VF_BDF="0000:60:00.1" + + # Prevent non-vfio VF driver from probing the VF device + echo 0 > /sys/class/pci_bus/$PF_BUS/device/$PF_BDF/sriov_drivers_autoprobe + + # Create single VF for Live Migration via VFIO + echo 1 > /sys/bus/pci/drivers/pds_core/$PF_BDF/sriov_numvfs + + # Allow the VF to be bound to the pds_vfio driver + echo "pds_vfio" > /sys/class/pci_bus/$PF_BUS/device/$VF_BDF/driver_override + + # Bind the VF to the pds_vfio driver + echo "$VF_BDF" > /sys/bus/pci/drivers/pds_vfio/bind + +After performing the steps above, a file in /dev/vfio/ +should have been created. + + +Enabling the driver +=================== + +The driver is enabled via the standard kernel configuration system, +using the make command:: + + make oldconfig/menuconfig/etc. + +The driver is located in the menu structure at: + + -> Device Drivers + -> VFIO Non-Privileged userspace driver framework + -> VFIO support for PDS PCI devices + +Support +======= + +For general Linux networking support, please use the netdev mailing +list, which is monitored by Pensando personnel:: + + netdev@vger.kernel.org + +For more specific support needs, please use the Pensando driver support +email:: + + drivers@pensando.io diff --git a/Documentation/networking/device_drivers/ethernet/index.rst b/Documentation/networking/device_drivers/ethernet/index.rst index 417ca514a4d0..0dd88e6f4e7c 100644 --- a/Documentation/networking/device_drivers/ethernet/index.rst +++ b/Documentation/networking/device_drivers/ethernet/index.rst @@ -15,6 +15,7 @@ Contents: amazon/ena altera/altera_tse amd/pds_core + amd/pds_vfio aquantia/atlantic chelsio/cxgb cirrus/cs89x0 diff --git a/MAINTAINERS b/MAINTAINERS index 6ac562e0381e..df9cc59bc858 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -21991,6 +21991,13 @@ S: Maintained P: Documentation/driver-api/vfio-pci-device-specific-driver-acceptance.rst F: drivers/vfio/pci/*/ +VFIO PDS PCI DRIVER +M: Brett Creeley +L: kvm@vger.kernel.org +S: Maintained +F: Documentation/networking/device_drivers/ethernet/amd/pds_vfio.rst +F: drivers/vfio/pci/pds/ + VFIO PLATFORM DRIVER M: Eric Auger L: kvm@vger.kernel.org diff --git a/drivers/vfio/pci/Kconfig b/drivers/vfio/pci/Kconfig index f9d0c908e738..2c3831dd60ef 100644 --- a/drivers/vfio/pci/Kconfig +++ b/drivers/vfio/pci/Kconfig @@ -59,4 +59,6 @@ source "drivers/vfio/pci/mlx5/Kconfig" source "drivers/vfio/pci/hisilicon/Kconfig" +source "drivers/vfio/pci/pds/Kconfig" + endif diff --git a/drivers/vfio/pci/pds/Kconfig b/drivers/vfio/pci/pds/Kconfig new file mode 100644 index 000000000000..149d4986bf43 --- /dev/null +++ b/drivers/vfio/pci/pds/Kconfig @@ -0,0 +1,20 @@ +# SPDX-License-Identifier: GPL-2.0 +# Copyright (c) 2023 Advanced Micro Devices, Inc. + +config PDS_VFIO_PCI + tristate "VFIO support for PDS PCI devices" + depends on PDS_CORE + depends on VFIO_PCI_CORE + help + This provides generic PCI support for PDS devices using the VFIO + framework. + + More specific information on this driver can be + found in + . + + To compile this driver as a module, choose M here. The module + will be called pds_vfio. + + If you don't know what to do here, say N. +