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Wed, 26 Apr 2023 05:43:19 -0500 From: Harini Katakam To: , , , , , , , , , , , CC: , , , , , , Subject: [PATCH net-next v2 1/3] phy: mscc: Use PHY_ID_MATCH_VENDOR to minimize PHY ID table Date: Wed, 26 Apr 2023 16:13:11 +0530 Message-ID: <20230426104313.28950-2-harini.katakam@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230426104313.28950-1-harini.katakam@amd.com> References: <20230426104313.28950-1-harini.katakam@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT060:EE_|PH0PR12MB5646:EE_ X-MS-Office365-Filtering-Correlation-Id: e2fe37ce-5dab-4272-37ae-08db4643100e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: CYUArBB40H9xOdYmsj9wV+nlja1GyiOvqEl87fOKfLXq0clQIjVM0D41t0NTaESDXsQxXeV3ZqwOVylWVW7Xt49wwKRxi+wm5HhwJnrR+loX19hVD6DneuH4+WgtVcP4SXUHl/fkcKyAGvIFI00V5Y80NlbDUyMi93klwe+cFkWDSTsyc+U209A+XY5KFHFKpAd05I2C+fEqhHt5U/G8FEaq5Z2Nxi1WxzNhppr98yAsglj8x626TZbcuQbgbHf1t0RFQwEbIGKO3mFSRV108cpFTKsjIo4tngbr9Yor/7+JJqIM9wamZzEiux07JPdZxrD3EkqWFf3zO25MliXFevOBNA8KB9w9O0qGBysoARZ1tYxYwbfyH4tBOgBHfYxrm4enH6g43PjsY8mb9tVmzMik1ItWEiPLh9mADiNy/pIUlsRbWDN33oRCNNXsUq//KzgFdsf/PmhD1ZG0CLvL5ib+GZl4EkCr6jJ2jaPa7J71D1A0f778dnQWk/l6yQp3cRZM7GM8MGz10X6t0lnwZ4CjVDiqGWl+oCPtm8bxEJbTvg/MhlkoGb7PatuhBA19D5DDHKNub9AMtmVkUYrcDh6cacXRLiOxjQob3AvDTKuU0r9iaDwwMmVt11ACzx5sbduh9Dbb2LegfC6S90usdCSwagArM40dG3RVXlzjsFU0Mq6iLCIq7XHlB9JciBhu9JZl0MXsp0X+vVdo1UeJnUhqrpd1uIZGsuOX7ofGOfSf+ibvbJ0i71AJ7bpoW6HQ X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(396003)(39860400002)(346002)(376002)(136003)(451199021)(46966006)(36840700001)(40470700004)(40460700003)(36756003)(86362001)(40480700001)(81166007)(921005)(356005)(82740400003)(83380400001)(36860700001)(47076005)(316002)(82310400005)(426003)(26005)(1076003)(186003)(54906003)(478600001)(6666004)(110136005)(44832011)(336012)(70206006)(70586007)(8936002)(4326008)(8676002)(5660300002)(7416002)(2906002)(41300700001)(2616005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Apr 2023 10:43:24.7615 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e2fe37ce-5dab-4272-37ae-08db4643100e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT060.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB5646 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org All the PHY devices variants specified have the same mask and hence can be simplified to one vendor look up for 0xfffffff0. Any individual config can be identified by PHY_ID_MATCH_EXACT in the respective structure. Signed-off-by: Harini Katakam --- v2: New patch drivers/net/phy/mscc/mscc_main.c | 14 +------------- 1 file changed, 1 insertion(+), 13 deletions(-) diff --git a/drivers/net/phy/mscc/mscc_main.c b/drivers/net/phy/mscc/mscc_main.c index 62bf99e45af1..75d9582e5784 100644 --- a/drivers/net/phy/mscc/mscc_main.c +++ b/drivers/net/phy/mscc/mscc_main.c @@ -2656,19 +2656,7 @@ static struct phy_driver vsc85xx_driver[] = { module_phy_driver(vsc85xx_driver); static struct mdio_device_id __maybe_unused vsc85xx_tbl[] = { - { PHY_ID_VSC8504, 0xfffffff0, }, - { PHY_ID_VSC8514, 0xfffffff0, }, - { PHY_ID_VSC8530, 0xfffffff0, }, - { PHY_ID_VSC8531, 0xfffffff0, }, - { PHY_ID_VSC8540, 0xfffffff0, }, - { PHY_ID_VSC8541, 0xfffffff0, }, - { PHY_ID_VSC8552, 0xfffffff0, }, - { PHY_ID_VSC856X, 0xfffffff0, }, - { PHY_ID_VSC8572, 0xfffffff0, }, - { PHY_ID_VSC8574, 0xfffffff0, }, - { PHY_ID_VSC8575, 0xfffffff0, }, - { PHY_ID_VSC8582, 0xfffffff0, }, - { PHY_ID_VSC8584, 0xfffffff0, }, + { PHY_ID_MATCH_VENDOR(0xfffffff0) }, { } }; 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Wed, 26 Apr 2023 05:43:24 -0500 From: Harini Katakam To: , , , , , , , , , , , CC: , , , , , , Subject: [PATCH net-next v2 2/3] dt-bindings: mscc: Add RGMII RX and TX delay tuning Date: Wed, 26 Apr 2023 16:13:12 +0530 Message-ID: <20230426104313.28950-3-harini.katakam@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230426104313.28950-1-harini.katakam@amd.com> References: <20230426104313.28950-1-harini.katakam@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT060:EE_|SA1PR12MB7318:EE_ X-MS-Office365-Filtering-Correlation-Id: 4be0ae4f-a35a-4247-4e8e-08db464313dd X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: bKmJ2JVBJwEQnT+VCx7Fxtg8gldbUdV3Hmo5bLZML30Pg8VJx4mSaerONGLWCmApXGsZonZMB7OJJxaLFfVHAtLGPgJEh+z6PG6BGUXWANrokr3mj3VLVa6bwJclyvBUUxFp55pYS3BlCruCf3Cvtc97Cz2qqdEImT9i1z+WByO/Yk7LTEsBTmAEUknkktHshADoRxaxx92tdbvakkmdUbzYpVoFAgnr9ZBdDcVjqRKxkT9ObOovKEZwifbOYR+LcpYAwKEJCk7zFBvJlDg7DQabc4Od3X4N7uxnooW8ea2wpgONy56NzrArmRTP6qvb1Hnhuz7iPJozxASC1T7B/fXb37Ru7u+qz2ETtVcb89BEohKjKi0HfK/FwP0IyLJsoRrf4KK3fojlbb0i9NpWBgWaX0E+iFShiDY/IAL2/SgolgdL+k4QPHinZRLIXI+A6tz9Ej8k9E0K9nFNq2V8CRVLIOIFJ/A/0FxmYLkjHft5SO82evzb8aSB5ya7r0vjc9IlHtLT/USSpWzWYnx89CjxOd8gSfw6xx41UprfaXzfdpdCgBc027lDxoUfPaDfINV1zIOiA8g80HCtcoslz/ndvruSaKkSHnbeERGbx/3ElyIw1YGTEyggD5wfNl5TXvXQGSasogr5wypMwLi7tLQ1SWoxTWVcwbKzSiTpRbFJRVdDltmoAkobg+YhTmW+ZM4HDGskNOUh3pLSxDpVo+FmalihkniaZKuWjG64Gr0wkkdZmgWXWxCuiPwVwFd5 X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(376002)(346002)(39860400002)(396003)(136003)(451199021)(40470700004)(36840700001)(46966006)(8676002)(7416002)(54906003)(44832011)(8936002)(70206006)(81166007)(478600001)(86362001)(70586007)(82310400005)(2906002)(41300700001)(316002)(4326008)(6666004)(110136005)(5660300002)(26005)(1076003)(186003)(47076005)(82740400003)(921005)(356005)(40460700003)(40480700001)(336012)(2616005)(426003)(36756003)(36860700001)(83380400001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Apr 2023 10:43:31.1518 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4be0ae4f-a35a-4247-4e8e-08db464313dd X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT060.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB7318 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org From: Harini Katakam Add optional properties to tune RGMII RX and TX delay. The current default value in the Linux driver, when the phy-mode is rgmii-id, is 2ns for both. These properties take priority if specified. Signed-off-by: Harini Katakam Signed-off-by: Radhey Shyam Pandey Signed-off-by: Michal Simek --- v2: - Updated DT binding description and commit for optional delay tuning to be clearer on the precedence - Updated dt property name to include vendor instead of phy device name Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt b/Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt index 0a3647fe331b..2b779bc3096b 100644 --- a/Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt +++ b/Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt @@ -33,6 +33,8 @@ Optional properties: VSC8531_DUPLEX_COLLISION (8). - load-save-gpios : GPIO used for the load/save operation of the PTP hardware clock (PHC). +- mscc,rx-delay : RGMII RX delay. Allowed values are 0.2 - 3.4 ns. +- mscc,tx-delay : RGMII TX delay. Allowed values are 0.2 - 3.4 ns. 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Apr 2023 10:43:35.0548 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 392f4ec5-f7c0-4799-dc3e-08db46431630 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT077.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4207 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org From: Harini Katakam Add support for VSC8531_02 (Rev 2) device. Add support for optional RGMII RX and TX delay tuning via devicetree. The hierarchy is: - Retain the defaul 0.2ns delay when RGMII tuning is not set. - Retain the default 2ns delay when RGMII tuning is set and DT delay property is NOT specified. - Use the DT delay value when RGMII tuning is set and a DT delay property is specified. Signed-off-by: Harini Katakam Signed-off-by: Radhey Shyam Pandey Signed-off-by: Michal Simek --- v2: - Switch both VSC8531 and VSC8531-02 to use exact phy id match as they share the same model number - Ensure RCT - Improve optional property read drivers/net/phy/mscc/mscc.h | 3 +++ drivers/net/phy/mscc/mscc_main.c | 40 ++++++++++++++++++++++++++++---- 2 files changed, 39 insertions(+), 4 deletions(-) diff --git a/drivers/net/phy/mscc/mscc.h b/drivers/net/phy/mscc/mscc.h index a50235fdf7d9..5a26eba0ace0 100644 --- a/drivers/net/phy/mscc/mscc.h +++ b/drivers/net/phy/mscc/mscc.h @@ -281,6 +281,7 @@ enum rgmii_clock_delay { #define PHY_ID_VSC8514 0x00070670 #define PHY_ID_VSC8530 0x00070560 #define PHY_ID_VSC8531 0x00070570 +#define PHY_ID_VSC8531_02 0x00070572 #define PHY_ID_VSC8540 0x00070760 #define PHY_ID_VSC8541 0x00070770 #define PHY_ID_VSC8552 0x000704e0 @@ -373,6 +374,8 @@ struct vsc8531_private { * package. */ unsigned int base_addr; + u32 rx_delay; + u32 tx_delay; #if IS_ENABLED(CONFIG_MACSEC) /* MACsec fields: diff --git a/drivers/net/phy/mscc/mscc_main.c b/drivers/net/phy/mscc/mscc_main.c index 75d9582e5784..80cc90a23d57 100644 --- a/drivers/net/phy/mscc/mscc_main.c +++ b/drivers/net/phy/mscc/mscc_main.c @@ -525,6 +525,7 @@ static int vsc85xx_rgmii_set_skews(struct phy_device *phydev, u32 rgmii_cntl, { u16 rgmii_rx_delay_pos = ffs(rgmii_rx_delay_mask) - 1; u16 rgmii_tx_delay_pos = ffs(rgmii_tx_delay_mask) - 1; + struct vsc8531_private *vsc8531 = phydev->priv; u16 reg_val = 0; int rc; @@ -532,10 +533,10 @@ static int vsc85xx_rgmii_set_skews(struct phy_device *phydev, u32 rgmii_cntl, if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID || phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) - reg_val |= RGMII_CLK_DELAY_2_0_NS << rgmii_rx_delay_pos; + reg_val |= vsc8531->rx_delay << rgmii_rx_delay_pos; if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID || phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) - reg_val |= RGMII_CLK_DELAY_2_0_NS << rgmii_tx_delay_pos; + reg_val |= vsc8531->tx_delay << rgmii_tx_delay_pos; rc = phy_modify_paged(phydev, MSCC_PHY_PAGE_EXTENDED_2, rgmii_cntl, @@ -1812,6 +1813,15 @@ static int vsc85xx_config_init(struct phy_device *phydev) { int rc, i, phy_id; struct vsc8531_private *vsc8531 = phydev->priv; + struct device_node *of_node = phydev->mdio.dev.of_node; + + vsc8531->rx_delay = RGMII_CLK_DELAY_2_0_NS; + rc = of_property_read_u32(of_node, "mscc,rx-delay", + &vsc8531->rx_delay); + + vsc8531->tx_delay = RGMII_CLK_DELAY_2_0_NS; + rc = of_property_read_u32(of_node, "mscc,tx-delay", + &vsc8531->tx_delay); rc = vsc85xx_default_config(phydev); if (rc) @@ -2413,9 +2423,8 @@ static struct phy_driver vsc85xx_driver[] = { .get_stats = &vsc85xx_get_stats, }, { - .phy_id = PHY_ID_VSC8531, + PHY_ID_MATCH_EXACT(PHY_ID_VSC8531), .name = "Microsemi VSC8531", - .phy_id_mask = 0xfffffff0, /* PHY_GBIT_FEATURES */ .soft_reset = &genphy_soft_reset, .config_init = &vsc85xx_config_init, @@ -2436,6 +2445,29 @@ static struct phy_driver vsc85xx_driver[] = { .get_strings = &vsc85xx_get_strings, .get_stats = &vsc85xx_get_stats, }, +{ + PHY_ID_MATCH_EXACT(PHY_ID_VSC8531_02), + .name = "Microsemi VSC8531-02", + /* PHY_GBIT_FEATURES */ + .soft_reset = &genphy_soft_reset, + .config_init = &vsc85xx_config_init, + .config_aneg = &vsc85xx_config_aneg, + .read_status = &vsc85xx_read_status, + .handle_interrupt = vsc85xx_handle_interrupt, + .config_intr = &vsc85xx_config_intr, + .suspend = &genphy_suspend, + .resume = &genphy_resume, + .probe = &vsc85xx_probe, + .set_wol = &vsc85xx_wol_set, + .get_wol = &vsc85xx_wol_get, + .get_tunable = &vsc85xx_get_tunable, + .set_tunable = &vsc85xx_set_tunable, + .read_page = &vsc85xx_phy_read_page, + .write_page = &vsc85xx_phy_write_page, + .get_sset_count = &vsc85xx_get_sset_count, + .get_strings = &vsc85xx_get_strings, + .get_stats = &vsc85xx_get_stats, +}, { .phy_id = PHY_ID_VSC8540, .name = "Microsemi FE VSC8540 SyncE",