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So, let's properly define a RING_EXECLIST_SQ_CONTENTS_HI register to fix the issue and also to avoid other issues like that. Signed-off-by: Rodrigo Vivi Reviewed-by: Lucas De Marchi --- drivers/gpu/drm/xe/regs/xe_engine_regs.h | 3 ++- drivers/gpu/drm/xe/xe_execlist.c | 4 ++-- drivers/gpu/drm/xe/xe_hw_engine.c | 4 ++-- 3 files changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h index 2aa67d001c34..a1e1d1c206fa 100644 --- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h +++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h @@ -84,7 +84,8 @@ RING_FORCE_TO_NONPRIV_DENY) #define RING_MAX_NONPRIV_SLOTS 12 -#define RING_EXECLIST_SQ_CONTENTS(base) _MMIO((base) + 0x510) +#define RING_EXECLIST_SQ_CONTENTS_LO(base) _MMIO((base) + 0x510) +#define RING_EXECLIST_SQ_CONTENTS_HI(base) _MMIO((base) + 0x510 + 4) #define RING_EXECLIST_CONTROL(base) _MMIO((base) + 0x550) #define EL_CTRL_LOAD REG_BIT(0) diff --git a/drivers/gpu/drm/xe/xe_execlist.c b/drivers/gpu/drm/xe/xe_execlist.c index 02021457b1f0..37ac6473195e 100644 --- a/drivers/gpu/drm/xe/xe_execlist.c +++ b/drivers/gpu/drm/xe/xe_execlist.c @@ -84,9 +84,9 @@ static void __start_lrc(struct xe_hw_engine *hwe, struct xe_lrc *lrc, xe_mmio_write32(gt, RING_MODE_GEN7(hwe->mmio_base).reg, _MASKED_BIT_ENABLE(GEN11_GFX_DISABLE_LEGACY_MODE)); - xe_mmio_write32(gt, RING_EXECLIST_SQ_CONTENTS(hwe->mmio_base).reg + 0, + xe_mmio_write32(gt, RING_EXECLIST_SQ_CONTENTS_LO(hwe->mmio_base).reg, lower_32_bits(lrc_desc)); - xe_mmio_write32(gt, RING_EXECLIST_SQ_CONTENTS(hwe->mmio_base).reg + 4, + xe_mmio_write32(gt, RING_EXECLIST_SQ_CONTENTS_HI(hwe->mmio_base).reg, upper_32_bits(lrc_desc)); xe_mmio_write32(gt, RING_EXECLIST_CONTROL(hwe->mmio_base).reg, EL_CTRL_LOAD); diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c index 4b56c35b988d..23b9f120c258 100644 --- a/drivers/gpu/drm/xe/xe_hw_engine.c +++ b/drivers/gpu/drm/xe/xe_hw_engine.c @@ -528,10 +528,10 @@ void xe_hw_engine_print_state(struct xe_hw_engine *hwe, struct drm_printer *p) hw_engine_mmio_read32(hwe, RING_EXECLIST_STATUS_HI(0).reg)); drm_printf(p, "\tRING_EXECLIST_SQ_CONTENTS_LO: 0x%08x\n", hw_engine_mmio_read32(hwe, - RING_EXECLIST_SQ_CONTENTS(0).reg)); + RING_EXECLIST_SQ_CONTENTS_LO(0).reg)); drm_printf(p, "\tRING_EXECLIST_SQ_CONTENTS_HI: 0x%08x\n", hw_engine_mmio_read32(hwe, - RING_EXECLIST_SQ_CONTENTS(0).reg) + 4); + RING_EXECLIST_SQ_CONTENTS_HI(0).reg)); drm_printf(p, "\tRING_EXECLIST_CONTROL: 0x%08x\n", hw_engine_mmio_read32(hwe, RING_EXECLIST_CONTROL(0).reg)); From patchwork Wed Apr 26 20:57:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Rodrigo Vivi X-Patchwork-Id: 13224937 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 481C8C77B60 for ; Wed, 26 Apr 2023 20:57:37 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CEFF210E46F; Wed, 26 Apr 2023 20:57:33 +0000 (UTC) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id C067D10E1FD; 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The error state will contain useful information for GPU hang debug, such as INSTDONE registers and the current buffers getting executed, as well as any other information that helps user space and allow later replays of the error. The proposal here is to avoid a Xe only error_state like i915 and use a standard dev_coredump infrastructure to expose the error state. For our own case, the data is only useful if it is a snapshot of the time when the GPU crash has happened, since we reset the GPU immediately after and the registers might have changed. So the proposal here is to have an internal snapshot to be printed out later. Also, usually a subsequent GPU hang can be only a cause of the initial one. So we only save the 'first' hang. The dev_coredump has a delayed work queue where it remove the coredump and free all the data withing a few moments of the error. When that happens we also reset our capture state and allow further snapshots. Right now this infra only print out the time of the hang. More information will be migrated here on subsequent work. Also, in order to organize the dump better, the goal is to propose dev_coredump changes itself to allow multiple files and different controls. But for now we start Xe usage of it without any dependency on dev_coredump core changes. Cc: Daniel Vetter Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/xe/Kconfig | 1 + drivers/gpu/drm/xe/Makefile | 1 + drivers/gpu/drm/xe/xe_devcoredump.c | 144 ++++++++++++++++++++++ drivers/gpu/drm/xe/xe_devcoredump.h | 22 ++++ drivers/gpu/drm/xe/xe_devcoredump_types.h | 47 +++++++ drivers/gpu/drm/xe/xe_device_types.h | 4 + drivers/gpu/drm/xe/xe_guc_submit.c | 2 + drivers/gpu/drm/xe/xe_pci.c | 2 + 8 files changed, 223 insertions(+) create mode 100644 drivers/gpu/drm/xe/xe_devcoredump.c create mode 100644 drivers/gpu/drm/xe/xe_devcoredump.h create mode 100644 drivers/gpu/drm/xe/xe_devcoredump_types.h diff --git a/drivers/gpu/drm/xe/Kconfig b/drivers/gpu/drm/xe/Kconfig index f6f3b491d162..d44794f99338 100644 --- a/drivers/gpu/drm/xe/Kconfig +++ b/drivers/gpu/drm/xe/Kconfig @@ -35,6 +35,7 @@ config DRM_XE select DRM_TTM_HELPER select DRM_SCHED select MMU_NOTIFIER + select WANT_DEV_COREDUMP help Experimental driver for Intel Xe series GPUs diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile index ee4a95beec20..9d675f7c77aa 100644 --- a/drivers/gpu/drm/xe/Makefile +++ b/drivers/gpu/drm/xe/Makefile @@ -34,6 +34,7 @@ xe-y += xe_bb.o \ xe_bo.o \ xe_bo_evict.o \ xe_debugfs.o \ + xe_devcoredump.o \ xe_device.o \ xe_dma_buf.o \ xe_engine.o \ diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c new file mode 100644 index 000000000000..d9531183f03a --- /dev/null +++ b/drivers/gpu/drm/xe/xe_devcoredump.c @@ -0,0 +1,144 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright © 2023 Intel Corporation + */ + +#include "xe_devcoredump.h" +#include "xe_devcoredump_types.h" + +#include +#include + +#include "xe_engine.h" +#include "xe_gt.h" + +/** + * DOC: Xe device coredump + * + * Devices overview: + * Xe uses dev_coredump infrastructure for exposing the crash errors in a + * standardized way. + * devcoredump exposes a temporary device under /sys/class/devcoredump/ + * which is linked with our card device directly. + * The core dump can be accessed either from + * /sys/class/drm/card/device/devcoredump/ or from + * /sys/class/devcoredump/devcd where + * /sys/class/devcoredump/devcd/failing_device is a link to + * /sys/class/drm/card/device/. + * + * Snapshot at hang: + * The 'data' file is printed with a drm_printer pointer at devcoredump read + * time. For this reason, we need to take snapshots from when the hang has + * happened, and not only when the user is reading the file. Otherwise the + * information is outdated since the resets might have happened in between. + * + * 'First' failure snapshot: + * In general, the first hang is the most critical one since the following hangs + * can be a consequence of the initial hang. For this reason we only take the + * snapshot of the 'first' failure and ignore subsequent calls of this function, + * at least while the coredump device is alive. Dev_coredump has a delayed work + * queue that will eventually delete the device and free all the dump + * information. At this time we also clear the faulty_engine and allow the next + * hang capture. + */ + +static ssize_t xe_devcoredump_read(char *buffer, loff_t offset, + size_t count, void *data, size_t datalen) +{ + struct xe_devcoredump *coredump = data; + struct xe_devcoredump_snapshot *ss; + struct drm_printer p; + struct drm_print_iterator iter; + struct timespec64 ts; + + iter.data = buffer; + iter.offset = 0; + iter.start = offset; + iter.remain = count; + + mutex_lock(&coredump->lock); + + ss = &coredump->snapshot; + p = drm_coredump_printer(&iter); + + drm_printf(&p, "**** Xe Device Coredump ****\n"); + drm_printf(&p, "kernel: " UTS_RELEASE "\n"); + drm_printf(&p, "module: " KBUILD_MODNAME "\n"); + + ts = ktime_to_timespec64(ss->snapshot_time); + drm_printf(&p, "Snapshot time: %lld.%09ld\n", ts.tv_sec, ts.tv_nsec); + ts = ktime_to_timespec64(ss->boot_time); + drm_printf(&p, "Boot time: %lld.%09ld\n", ts.tv_sec, ts.tv_nsec); + ts = ktime_to_timespec64(ktime_sub(ss->snapshot_time, ss->boot_time)); + drm_printf(&p, "Uptime: %lld.%09ld\n", ts.tv_sec, ts.tv_nsec); + + mutex_unlock(&coredump->lock); + + return count - iter.remain; +} + +static void xe_devcoredump_free(void *data) +{ + struct xe_devcoredump *coredump = data; + struct xe_device *xe = container_of(coredump, struct xe_device, + devcoredump); + mutex_lock(&coredump->lock); + + coredump->faulty_engine = NULL; + drm_info(&xe->drm, "Xe device coredump has been deleted.\n"); + + mutex_unlock(&coredump->lock); +} + +static void devcoredump_snapshot(struct xe_devcoredump *coredump) +{ + struct xe_devcoredump_snapshot *ss = &coredump->snapshot; + + lockdep_assert_held(&coredump->lock); + ss->snapshot_time = ktime_get_real(); + ss->boot_time = ktime_get_boottime(); +} + +/** + * xe_devcoredump - Take the required snapshots and initialize coredump device. + * @e: The faulty xe_engine, where the issue was detected. + * + * This function should be called at the crash time. It is skipped if we still + * have the core dump device available with the information of the 'first' + * snapshot. + */ +void xe_devcoredump(struct xe_engine *e) +{ + struct xe_device *xe = gt_to_xe(e->gt); + struct xe_devcoredump *coredump = &xe->devcoredump; + + mutex_lock(&coredump->lock); + if (coredump->faulty_engine) { + drm_dbg(&xe->drm, "Multiple hangs are occuring, but only the first snapshot was taken\n"); + mutex_unlock(&coredump->lock); + return; + } + coredump->faulty_engine = e; + devcoredump_snapshot(coredump); + mutex_unlock(&coredump->lock); + + drm_info(&xe->drm, "Xe device coredump has been created\n"); + drm_info(&xe->drm, "Check your /sys/class/drm/card/device/devcoredump/data\n"); + + dev_coredumpm(xe->drm.dev, THIS_MODULE, coredump, 0, GFP_KERNEL, + xe_devcoredump_read, xe_devcoredump_free); +} + +/** + * xe_devcoredump_init - Initialize xe_devcoredump. + * @xe: Xe device. + * + * This function should be called at the probe so the mutex lock can be + * initialized. + */ +void xe_devcoredump_init(struct xe_device *xe) +{ + struct xe_devcoredump *coredump = &xe->devcoredump; + + mutex_init(&coredump->lock); +} diff --git a/drivers/gpu/drm/xe/xe_devcoredump.h b/drivers/gpu/drm/xe/xe_devcoredump.h new file mode 100644 index 000000000000..30941d2e554b --- /dev/null +++ b/drivers/gpu/drm/xe/xe_devcoredump.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2023 Intel Corporation + */ + +#ifndef _XE_DEVCOREDUMP_H_ +#define _XE_DEVCOREDUMP_H_ + +struct xe_device; +struct xe_engine; + +void xe_devcoredump_init(struct xe_device *xe); + +#ifdef CONFIG_DEV_COREDUMP +void xe_devcoredump(struct xe_engine *e); +#else +static inline void xe_devcoredump(struct xe_engine *e) +{ +} +#endif + +#endif diff --git a/drivers/gpu/drm/xe/xe_devcoredump_types.h b/drivers/gpu/drm/xe/xe_devcoredump_types.h new file mode 100644 index 000000000000..3f395fa9104e --- /dev/null +++ b/drivers/gpu/drm/xe/xe_devcoredump_types.h @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2023 Intel Corporation + */ + +#ifndef _XE_DEVCOREDUMP_TYPES_H_ +#define _XE_DEVCOREDUMP_TYPES_H_ + +#include +#include + +struct xe_device; + +/** + * struct xe_devcoredump_snapshot - Crash snapshot + * + * This struct contains all the useful information quickly captured at the time + * of the crash. So, any subsequent reads of the coredump points to a data that + * shows the state of the GPU of when the issue has happened. + */ +struct xe_devcoredump_snapshot { + /** @snapshot_time: Time of this capture. */ + ktime_t snapshot_time; + /** @boot_time: Relative boot time so the uptime can be calculated. */ + ktime_t boot_time; +}; + +/** + * struct xe_devcoredump - Xe devcoredump main structure + * + * This struct represents the live and active dev_coredump node. + * It is created/populated at the time of a crash/error. Then it + * is read later when user access the device coredump data file + * for reading the information. + */ +struct xe_devcoredump { + /** @xe: Xe device. */ + struct xe_device *xe; + /** @falty_engine: Engine where the crash/error happened. */ + struct xe_engine *faulty_engine; + /** @lock: Protects data from races between capture and read out. */ + struct mutex lock; + /** @snapshot: Snapshot is captured at time of the first crash */ + struct xe_devcoredump_snapshot snapshot; +}; + +#endif diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h index 1cb404e48aaa..2a0995824692 100644 --- a/drivers/gpu/drm/xe/xe_device_types.h +++ b/drivers/gpu/drm/xe/xe_device_types.h @@ -12,6 +12,7 @@ #include #include +#include "xe_devcoredump_types.h" #include "xe_gt_types.h" #include "xe_platform_types.h" #include "xe_step_types.h" @@ -55,6 +56,9 @@ struct xe_device { /** @drm: drm device */ struct drm_device drm; + /** @devcoredump: device coredump */ + struct xe_devcoredump devcoredump; + /** @info: device info */ struct intel_device_info { /** @graphics_name: graphics IP name */ diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c index e857013070b9..231fb4145297 100644 --- a/drivers/gpu/drm/xe/xe_guc_submit.c +++ b/drivers/gpu/drm/xe/xe_guc_submit.c @@ -14,6 +14,7 @@ #include #include "regs/xe_lrc_layout.h" +#include "xe_devcoredump.h" #include "xe_device.h" #include "xe_engine.h" #include "xe_force_wake.h" @@ -800,6 +801,7 @@ guc_engine_timedout_job(struct drm_sched_job *drm_job) drm_warn(&xe->drm, "Timedout job: seqno=%u, guc_id=%d, flags=0x%lx", xe_sched_job_seqno(job), e->guc->id, e->flags); simple_error_capture(e); + xe_devcoredump(e); } else { drm_dbg(&xe->drm, "Timedout signaled job: seqno=%u, guc_id=%d, flags=0x%lx", xe_sched_job_seqno(job), e->guc->id, e->flags); diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c index e512e8b69831..1d496210b580 100644 --- a/drivers/gpu/drm/xe/xe_pci.c +++ b/drivers/gpu/drm/xe/xe_pci.c @@ -16,6 +16,7 @@ #include "regs/xe_regs.h" #include "regs/xe_gt_regs.h" +#include "xe_devcoredump.h" #include "xe_device.h" #include "xe_display.h" #include "xe_drv.h" @@ -657,6 +658,7 @@ static int xe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) return err; 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The devcoredump is linked at the device level, so when in use it will prevent the module removal, but it doesn't prevent the call of the pci_remove callback. This callback cannot fail anyway and we end up clearing and freeing the entire pci device. Hence, after we removed the pci device, we shouldn't allow any read or free operations to avoid segmentation fault. Signed-off-by: Rodrigo Vivi Reviewed-by: Matthew Brost --- drivers/gpu/drm/xe/xe_devcoredump.c | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c index d9531183f03a..a08929c01b75 100644 --- a/drivers/gpu/drm/xe/xe_devcoredump.c +++ b/drivers/gpu/drm/xe/xe_devcoredump.c @@ -42,6 +42,11 @@ * hang capture. */ +static struct xe_device *coredump_to_xe(const struct xe_devcoredump *coredump) +{ + return container_of(coredump, struct xe_device, devcoredump); +} + static ssize_t xe_devcoredump_read(char *buffer, loff_t offset, size_t count, void *data, size_t datalen) { @@ -51,6 +56,10 @@ static ssize_t xe_devcoredump_read(char *buffer, loff_t offset, struct drm_print_iterator iter; struct timespec64 ts; + /* Our device is gone already... */ + if (!data || !coredump_to_xe(coredump)) + return -ENODEV; + iter.data = buffer; iter.offset = 0; iter.start = offset; @@ -80,12 +89,16 @@ static ssize_t xe_devcoredump_read(char *buffer, loff_t offset, static void xe_devcoredump_free(void *data) { struct xe_devcoredump *coredump = data; - struct xe_device *xe = container_of(coredump, struct xe_device, - devcoredump); + + /* Our device is gone. Nothing to do... */ + if (!data || !coredump_to_xe(coredump)) + return; + mutex_lock(&coredump->lock); coredump->faulty_engine = NULL; - drm_info(&xe->drm, "Xe device coredump has been deleted.\n"); + drm_info(&coredump_to_xe(coredump)->drm, + "Xe device coredump has been deleted.\n"); mutex_unlock(&coredump->lock); } From patchwork Wed Apr 26 20:57:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rodrigo Vivi X-Patchwork-Id: 13224939 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B4813C77B7C for ; Wed, 26 Apr 2023 20:57:48 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1F60310E9D9; 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The goal is to have a clear split between the mapped portions of the CTB and the static information, so we can easily capture snapshots that will be used for later read out with the devcoredump infrastructure. Signed-off-by: Rodrigo Vivi Reviewed-by: Matthew Brost --- drivers/gpu/drm/xe/xe_guc_ct.c | 155 ++++++++++++++------------- drivers/gpu/drm/xe/xe_guc_ct_types.h | 20 ++-- 2 files changed, 95 insertions(+), 80 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c index 9055ff133a7c..e16e5fe37ed4 100644 --- a/drivers/gpu/drm/xe/xe_guc_ct.c +++ b/drivers/gpu/drm/xe/xe_guc_ct.c @@ -172,13 +172,14 @@ int xe_guc_ct_init(struct xe_guc_ct *ct) static void guc_ct_ctb_h2g_init(struct xe_device *xe, struct guc_ctb *h2g, struct iosys_map *map) { - h2g->size = CTB_H2G_BUFFER_SIZE / sizeof(u32); - h2g->resv_space = 0; - h2g->tail = 0; - h2g->head = 0; - h2g->space = CIRC_SPACE(h2g->tail, h2g->head, h2g->size) - - h2g->resv_space; - h2g->broken = false; + h2g->info.size = CTB_H2G_BUFFER_SIZE / sizeof(u32); + h2g->info.resv_space = 0; + h2g->info.tail = 0; + h2g->info.head = 0; + h2g->info.space = CIRC_SPACE(h2g->info.tail, h2g->info.head, + h2g->info.size) - + h2g->info.resv_space; + h2g->info.broken = false; h2g->desc = *map; xe_map_memset(xe, &h2g->desc, 0, 0, sizeof(struct guc_ct_buffer_desc)); @@ -189,13 +190,14 @@ static void guc_ct_ctb_h2g_init(struct xe_device *xe, struct guc_ctb *h2g, static void guc_ct_ctb_g2h_init(struct xe_device *xe, struct guc_ctb *g2h, struct iosys_map *map) { - g2h->size = CTB_G2H_BUFFER_SIZE / sizeof(u32); - g2h->resv_space = G2H_ROOM_BUFFER_SIZE / sizeof(u32); - g2h->head = 0; - g2h->tail = 0; - g2h->space = CIRC_SPACE(g2h->tail, g2h->head, g2h->size) - - g2h->resv_space; - g2h->broken = false; + g2h->info.size = CTB_G2H_BUFFER_SIZE / sizeof(u32); + g2h->info.resv_space = G2H_ROOM_BUFFER_SIZE / sizeof(u32); + g2h->info.head = 0; + g2h->info.tail = 0; + g2h->info.space = CIRC_SPACE(g2h->info.tail, g2h->info.head, + g2h->info.size) - + g2h->info.resv_space; + g2h->info.broken = false; g2h->desc = IOSYS_MAP_INIT_OFFSET(map, CTB_DESC_SIZE); xe_map_memset(xe, &g2h->desc, 0, 0, sizeof(struct guc_ct_buffer_desc)); @@ -212,7 +214,7 @@ static int guc_ct_ctb_h2g_register(struct xe_guc_ct *ct) desc_addr = xe_bo_ggtt_addr(ct->bo); ctb_addr = xe_bo_ggtt_addr(ct->bo) + CTB_DESC_SIZE * 2; - size = ct->ctbs.h2g.size * sizeof(u32); + size = ct->ctbs.h2g.info.size * sizeof(u32); err = xe_guc_self_cfg64(guc, GUC_KLV_SELF_CFG_H2G_CTB_DESCRIPTOR_ADDR_KEY, @@ -240,7 +242,7 @@ static int guc_ct_ctb_g2h_register(struct xe_guc_ct *ct) desc_addr = xe_bo_ggtt_addr(ct->bo) + CTB_DESC_SIZE; ctb_addr = xe_bo_ggtt_addr(ct->bo) + CTB_DESC_SIZE * 2 + CTB_H2G_BUFFER_SIZE; - size = ct->ctbs.g2h.size * sizeof(u32); + size = ct->ctbs.g2h.info.size * sizeof(u32); err = xe_guc_self_cfg64(guc, GUC_KLV_SELF_CFG_G2H_CTB_DESCRIPTOR_ADDR_KEY, @@ -329,11 +331,12 @@ static bool h2g_has_room(struct xe_guc_ct *ct, u32 cmd_len) lockdep_assert_held(&ct->lock); - if (cmd_len > h2g->space) { - h2g->head = desc_read(ct_to_xe(ct), h2g, head); - h2g->space = CIRC_SPACE(h2g->tail, h2g->head, h2g->size) - - h2g->resv_space; - if (cmd_len > h2g->space) + if (cmd_len > h2g->info.space) { + h2g->info.head = desc_read(ct_to_xe(ct), h2g, head); + h2g->info.space = CIRC_SPACE(h2g->info.tail, h2g->info.head, + h2g->info.size) - + h2g->info.resv_space; + if (cmd_len > h2g->info.space) return false; } @@ -344,7 +347,7 @@ static bool g2h_has_room(struct xe_guc_ct *ct, u32 g2h_len) { lockdep_assert_held(&ct->lock); - return ct->ctbs.g2h.space > g2h_len; + return ct->ctbs.g2h.info.space > g2h_len; } static int has_room(struct xe_guc_ct *ct, u32 cmd_len, u32 g2h_len) @@ -360,16 +363,16 @@ static int has_room(struct xe_guc_ct *ct, u32 cmd_len, u32 g2h_len) static void h2g_reserve_space(struct xe_guc_ct *ct, u32 cmd_len) { lockdep_assert_held(&ct->lock); - ct->ctbs.h2g.space -= cmd_len; + ct->ctbs.h2g.info.space -= cmd_len; } static void g2h_reserve_space(struct xe_guc_ct *ct, u32 g2h_len, u32 num_g2h) { - XE_BUG_ON(g2h_len > ct->ctbs.g2h.space); + XE_BUG_ON(g2h_len > ct->ctbs.g2h.info.space); if (g2h_len) { spin_lock_irq(&ct->fast_lock); - ct->ctbs.g2h.space -= g2h_len; + ct->ctbs.g2h.info.space -= g2h_len; ct->g2h_outstanding += num_g2h; spin_unlock_irq(&ct->fast_lock); } @@ -378,10 +381,10 @@ static void g2h_reserve_space(struct xe_guc_ct *ct, u32 g2h_len, u32 num_g2h) static void __g2h_release_space(struct xe_guc_ct *ct, u32 g2h_len) { lockdep_assert_held(&ct->fast_lock); - XE_WARN_ON(ct->ctbs.g2h.space + g2h_len > - ct->ctbs.g2h.size - ct->ctbs.g2h.resv_space); + XE_WARN_ON(ct->ctbs.g2h.info.space + g2h_len > + ct->ctbs.g2h.info.size - ct->ctbs.g2h.info.resv_space); - ct->ctbs.g2h.space += g2h_len; + ct->ctbs.g2h.info.space += g2h_len; --ct->g2h_outstanding; } @@ -400,20 +403,21 @@ static int h2g_write(struct xe_guc_ct *ct, const u32 *action, u32 len, u32 cmd[GUC_CTB_MSG_MAX_LEN / sizeof(u32)]; u32 cmd_len = len + GUC_CTB_HDR_LEN; u32 cmd_idx = 0, i; - u32 tail = h2g->tail; + u32 tail = h2g->info.tail; struct iosys_map map = IOSYS_MAP_INIT_OFFSET(&h2g->cmds, tail * sizeof(u32)); lockdep_assert_held(&ct->lock); XE_BUG_ON(len * sizeof(u32) > GUC_CTB_MSG_MAX_LEN); - XE_BUG_ON(tail > h2g->size); + XE_BUG_ON(tail > h2g->info.size); /* Command will wrap, zero fill (NOPs), return and check credits again */ - if (tail + cmd_len > h2g->size) { - xe_map_memset(xe, &map, 0, 0, (h2g->size - tail) * sizeof(u32)); - h2g_reserve_space(ct, (h2g->size - tail)); - h2g->tail = 0; - desc_write(xe, h2g, tail, h2g->tail); + if (tail + cmd_len > h2g->info.size) { + xe_map_memset(xe, &map, 0, 0, + (h2g->info.size - tail) * sizeof(u32)); + h2g_reserve_space(ct, (h2g->info.size - tail)); + h2g->info.tail = 0; + desc_write(xe, h2g, tail, h2g->info.tail); return -EAGAIN; } @@ -445,11 +449,11 @@ static int h2g_write(struct xe_guc_ct *ct, const u32 *action, u32 len, xe_device_wmb(ct_to_xe(ct)); /* Update local copies */ - h2g->tail = (tail + cmd_len) % h2g->size; + h2g->info.tail = (tail + cmd_len) % h2g->info.size; h2g_reserve_space(ct, cmd_len); /* Update descriptor */ - desc_write(xe, h2g, tail, h2g->tail); + desc_write(xe, h2g, tail, h2g->info.tail); return 0; } @@ -466,7 +470,7 @@ static int __guc_ct_send_locked(struct xe_guc_ct *ct, const u32 *action, XE_BUG_ON(!g2h_len && num_g2h); lockdep_assert_held(&ct->lock); - if (unlikely(ct->ctbs.h2g.broken)) { + if (unlikely(ct->ctbs.h2g.info.broken)) { ret = -EPIPE; goto out; } @@ -554,8 +558,9 @@ static int guc_ct_send_locked(struct xe_guc_ct *ct, const u32 *action, u32 len, if (sleep_period_ms == 1024) goto broken; - trace_xe_guc_ct_h2g_flow_control(h2g->head, h2g->tail, - h2g->size, h2g->space, + trace_xe_guc_ct_h2g_flow_control(h2g->info.head, h2g->info.tail, + h2g->info.size, + h2g->info.space, len + GUC_CTB_HDR_LEN); msleep(sleep_period_ms); sleep_period_ms <<= 1; @@ -565,15 +570,16 @@ static int guc_ct_send_locked(struct xe_guc_ct *ct, const u32 *action, u32 len, struct xe_device *xe = ct_to_xe(ct); struct guc_ctb *g2h = &ct->ctbs.g2h; - trace_xe_guc_ct_g2h_flow_control(g2h->head, + trace_xe_guc_ct_g2h_flow_control(g2h->info.head, desc_read(xe, g2h, tail), - g2h->size, g2h->space, + g2h->info.size, + g2h->info.space, g2h_fence ? GUC_CTB_HXG_MSG_MAX_LEN : g2h_len); #define g2h_avail(ct) \ - (desc_read(ct_to_xe(ct), (&ct->ctbs.g2h), tail) != ct->ctbs.g2h.head) + (desc_read(ct_to_xe(ct), (&ct->ctbs.g2h), tail) != ct->ctbs.g2h.info.head) if (!wait_event_timeout(ct->wq, !ct->g2h_outstanding || g2h_avail(ct), HZ)) goto broken; @@ -590,7 +596,7 @@ static int guc_ct_send_locked(struct xe_guc_ct *ct, const u32 *action, u32 len, broken: drm_err(drm, "No forward process on H2G, reset required"); xe_guc_ct_print(ct, &p); - ct->ctbs.h2g.broken = true; + ct->ctbs.h2g.info.broken = true; return -EDEADLK; } @@ -656,7 +662,7 @@ static bool retry_failure(struct xe_guc_ct *ct, int ret) return false; #define ct_alive(ct) \ - (ct->enabled && !ct->ctbs.h2g.broken && !ct->ctbs.g2h.broken) + (ct->enabled && !ct->ctbs.h2g.info.broken && !ct->ctbs.g2h.info.broken) if (!wait_event_interruptible_timeout(ct->wq, ct_alive(ct), HZ * 5)) return false; #undef ct_alive @@ -821,7 +827,7 @@ static int parse_g2h_msg(struct xe_guc_ct *ct, u32 *msg, u32 len) drm_err(&xe->drm, "G2H channel broken on read, origin=%d, reset required\n", origin); - ct->ctbs.g2h.broken = true; + ct->ctbs.g2h.info.broken = true; return -EPROTO; } @@ -840,7 +846,7 @@ static int parse_g2h_msg(struct xe_guc_ct *ct, u32 *msg, u32 len) drm_err(&xe->drm, "G2H channel broken on read, type=%d, reset required\n", type); - ct->ctbs.g2h.broken = true; + ct->ctbs.g2h.info.broken = true; ret = -EOPNOTSUPP; } @@ -919,36 +925,37 @@ static int g2h_read(struct xe_guc_ct *ct, u32 *msg, bool fast_path) if (!ct->enabled) return -ENODEV; - if (g2h->broken) + if (g2h->info.broken) return -EPIPE; /* Calculate DW available to read */ tail = desc_read(xe, g2h, tail); - avail = tail - g2h->head; + avail = tail - g2h->info.head; if (unlikely(avail == 0)) return 0; if (avail < 0) - avail += g2h->size; + avail += g2h->info.size; /* Read header */ - xe_map_memcpy_from(xe, msg, &g2h->cmds, sizeof(u32) * g2h->head, sizeof(u32)); + xe_map_memcpy_from(xe, msg, &g2h->cmds, sizeof(u32) * g2h->info.head, + sizeof(u32)); len = FIELD_GET(GUC_CTB_MSG_0_NUM_DWORDS, msg[0]) + GUC_CTB_MSG_MIN_LEN; if (len > avail) { drm_err(&xe->drm, "G2H channel broken on read, avail=%d, len=%d, reset required\n", avail, len); - g2h->broken = true; + g2h->info.broken = true; return -EPROTO; } - head = (g2h->head + 1) % g2h->size; + head = (g2h->info.head + 1) % g2h->info.size; avail = len - 1; /* Read G2H message */ - if (avail + head > g2h->size) { - u32 avail_til_wrap = g2h->size - head; + if (avail + head > g2h->info.size) { + u32 avail_til_wrap = g2h->info.size - head; xe_map_memcpy_from(xe, msg + 1, &g2h->cmds, sizeof(u32) * head, @@ -983,8 +990,8 @@ static int g2h_read(struct xe_guc_ct *ct, u32 *msg, bool fast_path) } /* Update local / descriptor header */ - g2h->head = (head + avail) % g2h->size; - desc_write(xe, g2h, head, g2h->head); + g2h->info.head = (head + avail) % g2h->info.size; + desc_write(xe, g2h, head, g2h->info.head); return len; } @@ -1093,12 +1100,12 @@ static void guc_ct_ctb_print(struct xe_device *xe, struct guc_ctb *ctb, { u32 head, tail; - drm_printf(p, "\tsize: %d\n", ctb->size); - drm_printf(p, "\tresv_space: %d\n", ctb->resv_space); - drm_printf(p, "\thead: %d\n", ctb->head); - drm_printf(p, "\ttail: %d\n", ctb->tail); - drm_printf(p, "\tspace: %d\n", ctb->space); - drm_printf(p, "\tbroken: %d\n", ctb->broken); + drm_printf(p, "\tsize: %d\n", ctb->info.size); + drm_printf(p, "\tresv_space: %d\n", ctb->info.resv_space); + drm_printf(p, "\thead: %d\n", ctb->info.head); + drm_printf(p, "\ttail: %d\n", ctb->info.tail); + drm_printf(p, "\tspace: %d\n", ctb->info.space); + drm_printf(p, "\tbroken: %d\n", ctb->info.broken); head = desc_read(xe, ctb, head); tail = desc_read(xe, ctb, tail); @@ -1114,7 +1121,7 @@ static void guc_ct_ctb_print(struct xe_device *xe, struct guc_ctb *ctb, drm_printf(p, "\tcmd[%d]: 0x%08x\n", head, xe_map_rd(xe, &map, 0, u32)); ++head; - if (head == ctb->size) { + if (head == ctb->info.size) { head = 0; map = ctb->cmds; } else { @@ -1168,12 +1175,12 @@ void xe_guc_ct_selftest(struct xe_guc_ct *ct, struct drm_printer *p) if (!ret) { xe_guc_ct_irq_handler(ct); msleep(200); - if (g2h->space != - CIRC_SPACE(0, 0, g2h->size) - g2h->resv_space) { + if (g2h->info.space != + CIRC_SPACE(0, 0, g2h->info.size) - g2h->info.resv_space) { drm_printf(p, "Mismatch on space %d, %d\n", - g2h->space, - CIRC_SPACE(0, 0, g2h->size) - - g2h->resv_space); + g2h->info.space, + CIRC_SPACE(0, 0, g2h->info.size) - + g2h->info.resv_space); ret = -EIO; } if (ct->g2h_outstanding) { @@ -1185,12 +1192,12 @@ void xe_guc_ct_selftest(struct xe_guc_ct *ct, struct drm_printer *p) /* Check failure path for blocking CTs too */ xe_guc_ct_send_block(ct, bad_action, ARRAY_SIZE(bad_action)); - if (g2h->space != - CIRC_SPACE(0, 0, g2h->size) - g2h->resv_space) { + if (g2h->info.space != + CIRC_SPACE(0, 0, g2h->info.size) - g2h->info.resv_space) { drm_printf(p, "Mismatch on space %d, %d\n", - g2h->space, - CIRC_SPACE(0, 0, g2h->size) - - g2h->resv_space); + g2h->info.space, + CIRC_SPACE(0, 0, g2h->info.size) - + g2h->info.resv_space); ret = -EIO; } if (ct->g2h_outstanding) { diff --git a/drivers/gpu/drm/xe/xe_guc_ct_types.h b/drivers/gpu/drm/xe/xe_guc_ct_types.h index fd27dacf00c5..64e3dd14d4b2 100644 --- a/drivers/gpu/drm/xe/xe_guc_ct_types.h +++ b/drivers/gpu/drm/xe/xe_guc_ct_types.h @@ -19,13 +19,9 @@ struct xe_bo; /** - * struct guc_ctb - GuC command transport buffer (CTB) + * struct guc_ctb_info - GuC command transport buffer (CTB) info */ -struct guc_ctb { - /** @desc: dma buffer map for CTB descriptor */ - struct iosys_map desc; - /** @cmds: dma buffer map for CTB commands */ - struct iosys_map cmds; +struct guc_ctb_info { /** @size: size of CTB commands (DW) */ u32 size; /** @resv_space: reserved space of CTB commands (DW) */ @@ -40,6 +36,18 @@ struct guc_ctb { bool broken; }; +/** + * struct guc_ctb - GuC command transport buffer (CTB) + */ +struct guc_ctb { + /** @desc: dma buffer map for CTB descriptor */ + struct iosys_map desc; + /** @cmds: dma buffer map for CTB commands */ + struct iosys_map cmds; + /** @info: CTB info */ + struct guc_ctb_info info; +}; + /** * struct xe_guc_ct - GuC command transport (CT) layer * From patchwork Wed Apr 26 20:57:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rodrigo Vivi X-Patchwork-Id: 13224940 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ACCEAC7618E for ; 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Wed, 26 Apr 2023 20:57:38 +0000 From: Rodrigo Vivi To: Subject: [PATCH 05/14] drm/xe: Convert GuC CT print to snapshot capture and print. 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Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/xe/xe_guc_ct.c | 132 +++++++++++++++++++++++---- drivers/gpu/drm/xe/xe_guc_ct.h | 7 +- drivers/gpu/drm/xe/xe_guc_ct_types.h | 26 ++++++ 3 files changed, 145 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c index e16e5fe37ed4..0b7b95dbd9be 100644 --- a/drivers/gpu/drm/xe/xe_guc_ct.c +++ b/drivers/gpu/drm/xe/xe_guc_ct.c @@ -1095,31 +1095,26 @@ static void g2h_worker_func(struct work_struct *w) xe_device_mem_access_put(ct_to_xe(ct)); } -static void guc_ct_ctb_print(struct xe_device *xe, struct guc_ctb *ctb, - struct drm_printer *p) +static void guc_ctb_snapshot_capture(struct xe_device *xe, struct guc_ctb *ctb, + struct guc_ctb_snapshot *snapshot) { u32 head, tail; - drm_printf(p, "\tsize: %d\n", ctb->info.size); - drm_printf(p, "\tresv_space: %d\n", ctb->info.resv_space); - drm_printf(p, "\thead: %d\n", ctb->info.head); - drm_printf(p, "\ttail: %d\n", ctb->info.tail); - drm_printf(p, "\tspace: %d\n", ctb->info.space); - drm_printf(p, "\tbroken: %d\n", ctb->info.broken); + snapshot->cmds = kmalloc_array(ctb->info.size, sizeof(u32), GFP_ATOMIC); - head = desc_read(xe, ctb, head); - tail = desc_read(xe, ctb, tail); - drm_printf(p, "\thead (memory): %d\n", head); - drm_printf(p, "\ttail (memory): %d\n", tail); - drm_printf(p, "\tstatus (memory): 0x%x\n", desc_read(xe, ctb, status)); + xe_map_memcpy_from(xe, &snapshot->desc, &ctb->desc, 0, + sizeof(struct guc_ct_buffer_desc)); + memcpy(&snapshot->info, &ctb->info, sizeof(struct guc_ctb_info)); + + head = snapshot->desc.head; + tail = snapshot->desc.tail; if (head != tail) { struct iosys_map map = IOSYS_MAP_INIT_OFFSET(&ctb->cmds, head * sizeof(u32)); while (head != tail) { - drm_printf(p, "\tcmd[%d]: 0x%08x\n", head, - xe_map_rd(xe, &map, 0, u32)); + snapshot->cmds[head] = xe_map_rd(xe, &map, 0, u32); ++head; if (head == ctb->info.size) { head = 0; @@ -1131,20 +1126,119 @@ static void guc_ct_ctb_print(struct xe_device *xe, struct guc_ctb *ctb, } } -void xe_guc_ct_print(struct xe_guc_ct *ct, struct drm_printer *p) +static void guc_ctb_snapshot_print(struct guc_ctb_snapshot *snapshot, + struct drm_printer *p) +{ + u32 head, tail; + + drm_printf(p, "\tsize: %d\n", snapshot->info.size); + drm_printf(p, "\tresv_space: %d\n", snapshot->info.space); + drm_printf(p, "\thead: %d\n", snapshot->info.head); + drm_printf(p, "\ttail: %d\n", snapshot->info.tail); + drm_printf(p, "\tspace: %d\n", snapshot->info.space); + drm_printf(p, "\tbroken: %d\n", snapshot->info.broken); + drm_printf(p, "\thead (memory): %d\n", snapshot->desc.head); + drm_printf(p, "\ttail (memory): %d\n", snapshot->desc.tail); + drm_printf(p, "\tstatus (memory): 0x%x\n", snapshot->desc.status); + + head = snapshot->desc.head; + tail = snapshot->desc.tail; + + while (head != tail) { + drm_printf(p, "\tcmd[%d]: 0x%08x\n", head, + snapshot->cmds[head]); + ++head; + if (head == snapshot->info.size) + head = 0; + } +} + +static void guc_ctb_snapshot_free(struct guc_ctb_snapshot *snapshot) +{ + kfree(snapshot->cmds); +} + +/** + * xe_guc_ct_snapshot_capture - Take a quick snapshot of the CT state. + * @ct: GuC CT object. + * + * This can be printed out in a later stage like during dev_coredump + * analysis. + * + * Returns: a GuC CT snapshot object that must be freed by the caller + * by using `xe_guc_ct_snapshot_free`. + */ +struct xe_guc_ct_snapshot *xe_guc_ct_snapshot_capture(struct xe_guc_ct *ct) { + struct xe_guc_ct_snapshot *snapshot; + + snapshot = kzalloc(sizeof(struct xe_guc_ct_snapshot), GFP_ATOMIC); + if (ct->enabled) { + snapshot->ct_enabled = true; + guc_ctb_snapshot_capture(ct_to_xe(ct), &ct->ctbs.h2g, + &snapshot->h2g); + guc_ctb_snapshot_capture(ct_to_xe(ct), &ct->ctbs.g2h, + &snapshot->g2h); + } + + return snapshot; +} + +/** + * xe_guc_ct_snapshot_print - Print out a given GuC CT snapshot. + * @snapshot: GuC CT snapshot object. + * @p: drm_printer where it will be printed out. + * + * This function prints out a given GuC CT snapshot object. + */ +void xe_guc_ct_snapshot_print(struct xe_guc_ct_snapshot *snapshot, + struct drm_printer *p) +{ + if (snapshot->ct_enabled) { drm_puts(p, "\nH2G CTB (all sizes in DW):\n"); - guc_ct_ctb_print(ct_to_xe(ct), &ct->ctbs.h2g, p); + guc_ctb_snapshot_print(&snapshot->h2g, p); drm_puts(p, "\nG2H CTB (all sizes in DW):\n"); - guc_ct_ctb_print(ct_to_xe(ct), &ct->ctbs.g2h, p); - drm_printf(p, "\tg2h outstanding: %d\n", ct->g2h_outstanding); + guc_ctb_snapshot_print(&snapshot->g2h, p); + + drm_printf(p, "\tg2h outstanding: %d\n", + snapshot->g2h_outstanding); } else { drm_puts(p, "\nCT disabled\n"); } } +/** + * xe_guc_ct_snapshot_free - Free all allocated objects for a given snapshot. + * @snapshot: GuC CT snapshot object. + * + * This function free all the memory that needed to be allocated at capture + * time. + */ +void xe_guc_ct_snapshot_free(struct xe_guc_ct_snapshot *snapshot) +{ + guc_ctb_snapshot_free(&snapshot->h2g); + guc_ctb_snapshot_free(&snapshot->g2h); + kfree(snapshot); +} + +/** + * xe_guc_ct_print - GuC CT Print. + * @ct: GuC CT. + * @p: drm_printer where it will be printed out. + * + * This function quickly capture a snapshot and immediately print it out. + */ +void xe_guc_ct_print(struct xe_guc_ct *ct, struct drm_printer *p) +{ + struct xe_guc_ct_snapshot *snapshot; + + snapshot = xe_guc_ct_snapshot_capture(ct); + xe_guc_ct_snapshot_print(snapshot, p); + xe_guc_ct_snapshot_free(snapshot); +} + #ifdef XE_GUC_CT_SELFTEST /* * Disable G2H processing in IRQ handler to force xe_guc_ct_send to enter flow diff --git a/drivers/gpu/drm/xe/xe_guc_ct.h b/drivers/gpu/drm/xe/xe_guc_ct.h index 49fb74f91e4d..29e0dff7ad9b 100644 --- a/drivers/gpu/drm/xe/xe_guc_ct.h +++ b/drivers/gpu/drm/xe/xe_guc_ct.h @@ -13,9 +13,14 @@ struct drm_printer; int xe_guc_ct_init(struct xe_guc_ct *ct); int xe_guc_ct_enable(struct xe_guc_ct *ct); void xe_guc_ct_disable(struct xe_guc_ct *ct); -void xe_guc_ct_print(struct xe_guc_ct *ct, struct drm_printer *p); void xe_guc_ct_fast_path(struct xe_guc_ct *ct); +struct xe_guc_ct_snapshot *xe_guc_ct_snapshot_capture(struct xe_guc_ct *ct); +void xe_guc_ct_snapshot_print(struct xe_guc_ct_snapshot *snapshot, + struct drm_printer *p); +void xe_guc_ct_snapshot_free(struct xe_guc_ct_snapshot *snapshot); +void xe_guc_ct_print(struct xe_guc_ct *ct, struct drm_printer *p); + static inline void xe_guc_ct_irq_handler(struct xe_guc_ct *ct) { wake_up_all(&ct->wq); diff --git a/drivers/gpu/drm/xe/xe_guc_ct_types.h b/drivers/gpu/drm/xe/xe_guc_ct_types.h index 64e3dd14d4b2..93046d95b009 100644 --- a/drivers/gpu/drm/xe/xe_guc_ct_types.h +++ b/drivers/gpu/drm/xe/xe_guc_ct_types.h @@ -48,6 +48,32 @@ struct guc_ctb { struct guc_ctb_info info; }; +/** + * struct guc_ctb_snapshot - GuC command transport buffer (CTB) snapshot + */ +struct guc_ctb_snapshot { + /** @desc: snapshot of the CTB descriptor */ + struct guc_ct_buffer_desc desc; + /** @cmds: snapshot of the CTB commands */ + u32 *cmds; + /** @info: snapshot of the CTB info */ + struct guc_ctb_info info; +}; + +/** + * struct xe_guc_ct_snapshot - GuC command transport (CT) snapshot + */ +struct xe_guc_ct_snapshot { + /** @ct_enabled: CT enabled info at capture time. */ + bool ct_enabled; + /** @g2h_outstanding: G2H outstanding info at the capture time */ + u32 g2h_outstanding; + /** @g2h: G2H CTB snapshot */ + struct guc_ctb_snapshot g2h; + /** @h2g: H2G CTB snapshot */ + struct guc_ctb_snapshot h2g; +}; + /** * struct xe_guc_ct - GuC command transport (CT) layer * From patchwork Wed Apr 26 20:57:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rodrigo Vivi X-Patchwork-Id: 13224941 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C5FA3C77B60 for ; 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Wed, 26 Apr 2023 20:57:42 +0000 From: Rodrigo Vivi To: Subject: [PATCH 06/14] drm/xe: Add GuC CT snapshot to xe_devcoredump. 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Any format change should come on follow-up work. Signed-off-by: Rodrigo Vivi Reviewed-by: Matthew Brost --- drivers/gpu/drm/xe/xe_devcoredump.c | 14 ++++++++++++++ drivers/gpu/drm/xe/xe_devcoredump_types.h | 4 ++++ 2 files changed, 18 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c index a08929c01b75..795581c58d90 100644 --- a/drivers/gpu/drm/xe/xe_devcoredump.c +++ b/drivers/gpu/drm/xe/xe_devcoredump.c @@ -11,6 +11,7 @@ #include "xe_engine.h" #include "xe_gt.h" +#include "xe_guc_ct.h" /** * DOC: Xe device coredump @@ -47,6 +48,11 @@ static struct xe_device *coredump_to_xe(const struct xe_devcoredump *coredump) return container_of(coredump, struct xe_device, devcoredump); } +static struct xe_guc *engine_to_guc(struct xe_engine *e) +{ + return &e->gt->uc.guc; +} + static ssize_t xe_devcoredump_read(char *buffer, loff_t offset, size_t count, void *data, size_t datalen) { @@ -81,6 +87,9 @@ static ssize_t xe_devcoredump_read(char *buffer, loff_t offset, ts = ktime_to_timespec64(ktime_sub(ss->snapshot_time, ss->boot_time)); drm_printf(&p, "Uptime: %lld.%09ld\n", ts.tv_sec, ts.tv_nsec); + drm_printf(&p, "\n**** GuC CT ****\n"); + xe_guc_ct_snapshot_print(coredump->snapshot.ct, &p); + mutex_unlock(&coredump->lock); return count - iter.remain; @@ -96,6 +105,8 @@ static void xe_devcoredump_free(void *data) mutex_lock(&coredump->lock); + xe_guc_ct_snapshot_free(coredump->snapshot.ct); + coredump->faulty_engine = NULL; drm_info(&coredump_to_xe(coredump)->drm, "Xe device coredump has been deleted.\n"); @@ -106,10 +117,13 @@ static void xe_devcoredump_free(void *data) static void devcoredump_snapshot(struct xe_devcoredump *coredump) { struct xe_devcoredump_snapshot *ss = &coredump->snapshot; + struct xe_guc *guc = engine_to_guc(coredump->faulty_engine); lockdep_assert_held(&coredump->lock); ss->snapshot_time = ktime_get_real(); ss->boot_time = ktime_get_boottime(); + + coredump->snapshot.ct = xe_guc_ct_snapshot_capture(&guc->ct); } /** diff --git a/drivers/gpu/drm/xe/xe_devcoredump_types.h b/drivers/gpu/drm/xe/xe_devcoredump_types.h index 3f395fa9104e..1e44d5346364 100644 --- a/drivers/gpu/drm/xe/xe_devcoredump_types.h +++ b/drivers/gpu/drm/xe/xe_devcoredump_types.h @@ -23,6 +23,10 @@ struct xe_devcoredump_snapshot { ktime_t snapshot_time; /** @boot_time: Relative boot time so the uptime can be calculated. */ ktime_t boot_time; + + /* GuC snapshots */ + /** @ct_snapshot: GuC CT snapshot */ + struct xe_guc_ct_snapshot *ct; }; /** From patchwork Wed Apr 26 20:57:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Rodrigo Vivi X-Patchwork-Id: 13224942 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 40117C77B7C for ; Wed, 26 Apr 2023 20:57:56 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3D25D10E689; Wed, 26 Apr 2023 20:57:55 +0000 (UTC) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 65D4F10E143; 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While doing that also delete the unused struct guc_wq_item. Cc: Matthew Brost Signed-off-by: Rodrigo Vivi Reviewed-by: Matthew Brost --- drivers/gpu/drm/xe/xe_guc_fwif.h | 29 ----------- drivers/gpu/drm/xe/xe_guc_submit.c | 40 ++++----------- drivers/gpu/drm/xe/xe_guc_submit_types.h | 64 ++++++++++++++++++++++++ 3 files changed, 75 insertions(+), 58 deletions(-) create mode 100644 drivers/gpu/drm/xe/xe_guc_submit_types.h diff --git a/drivers/gpu/drm/xe/xe_guc_fwif.h b/drivers/gpu/drm/xe/xe_guc_fwif.h index 20155ba4ef07..27d132ce2087 100644 --- a/drivers/gpu/drm/xe/xe_guc_fwif.h +++ b/drivers/gpu/drm/xe/xe_guc_fwif.h @@ -46,35 +46,6 @@ #define GUC_MAX_ENGINE_CLASSES 16 #define GUC_MAX_INSTANCES_PER_CLASS 32 -/* Work item for submitting workloads into work queue of GuC. */ -#define WQ_STATUS_ACTIVE 1 -#define WQ_STATUS_SUSPENDED 2 -#define WQ_STATUS_CMD_ERROR 3 -#define WQ_STATUS_ENGINE_ID_NOT_USED 4 -#define WQ_STATUS_SUSPENDED_FROM_RESET 5 -#define WQ_TYPE_NOOP 0x4 -#define WQ_TYPE_MULTI_LRC 0x5 -#define WQ_TYPE_MASK GENMASK(7, 0) -#define WQ_LEN_MASK GENMASK(26, 16) - -#define WQ_GUC_ID_MASK GENMASK(15, 0) -#define WQ_RING_TAIL_MASK GENMASK(28, 18) - -struct guc_wq_item { - u32 header; - u32 context_desc; - u32 submit_element_info; - u32 fence_id; -} __packed; - -struct guc_sched_wq_desc { - u32 head; - u32 tail; - u32 error_offset; - u32 wq_status; - u32 reserved[28]; -} __packed; - /* Helper for context registration H2G */ struct guc_ctxt_registration_info { u32 flags; diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c index 231fb4145297..a5fe7755ce4c 100644 --- a/drivers/gpu/drm/xe/xe_guc_submit.c +++ b/drivers/gpu/drm/xe/xe_guc_submit.c @@ -22,6 +22,7 @@ #include "xe_guc.h" #include "xe_guc_ct.h" #include "xe_guc_engine_types.h" +#include "xe_guc_submit_types.h" #include "xe_hw_engine.h" #include "xe_hw_fence.h" #include "xe_lrc.h" @@ -378,32 +379,12 @@ static void set_min_preemption_timeout(struct xe_guc *guc, struct xe_engine *e) __guc_engine_policy_action_size(&policy), 0, 0); } -#define PARALLEL_SCRATCH_SIZE 2048 -#define WQ_SIZE (PARALLEL_SCRATCH_SIZE / 2) -#define WQ_OFFSET (PARALLEL_SCRATCH_SIZE - WQ_SIZE) -#define CACHELINE_BYTES 64 - -struct sync_semaphore { - u32 semaphore; - u8 unused[CACHELINE_BYTES - sizeof(u32)]; -}; - -struct parallel_scratch { - struct guc_sched_wq_desc wq_desc; - - struct sync_semaphore go; - struct sync_semaphore join[XE_HW_ENGINE_MAX_INSTANCE]; - - u8 unused[WQ_OFFSET - sizeof(struct guc_sched_wq_desc) - - sizeof(struct sync_semaphore) * (XE_HW_ENGINE_MAX_INSTANCE + 1)]; - - u32 wq[WQ_SIZE / sizeof(u32)]; -}; - #define parallel_read(xe_, map_, field_) \ - xe_map_rd_field(xe_, &map_, 0, struct parallel_scratch, field_) + xe_map_rd_field(xe_, &map_, 0, struct guc_submit_parallel_scratch, \ + field_) #define parallel_write(xe_, map_, field_, val_) \ - xe_map_wr_field(xe_, &map_, 0, struct parallel_scratch, field_, val_) + xe_map_wr_field(xe_, &map_, 0, struct guc_submit_parallel_scratch, \ + field_, val_) static void __register_mlrc_engine(struct xe_guc *guc, struct xe_engine *e, @@ -486,13 +467,13 @@ static void register_engine(struct xe_engine *e) struct iosys_map map = xe_lrc_parallel_map(lrc); info.wq_desc_lo = lower_32_bits(ggtt_addr + - offsetof(struct parallel_scratch, wq_desc)); + offsetof(struct guc_submit_parallel_scratch, wq_desc)); info.wq_desc_hi = upper_32_bits(ggtt_addr + - offsetof(struct parallel_scratch, wq_desc)); + offsetof(struct guc_submit_parallel_scratch, wq_desc)); info.wq_base_lo = lower_32_bits(ggtt_addr + - offsetof(struct parallel_scratch, wq[0])); + offsetof(struct guc_submit_parallel_scratch, wq[0])); info.wq_base_hi = upper_32_bits(ggtt_addr + - offsetof(struct parallel_scratch, wq[0])); + offsetof(struct guc_submit_parallel_scratch, wq[0])); info.wq_size = WQ_SIZE; e->guc->wqi_head = 0; @@ -594,7 +575,7 @@ static void wq_item_append(struct xe_engine *e) XE_BUG_ON(i != wqi_size / sizeof(u32)); - iosys_map_incr(&map, offsetof(struct parallel_scratch, + iosys_map_incr(&map, offsetof(struct guc_submit_parallel_scratch, wq[e->guc->wqi_tail / sizeof(u32)])); xe_map_memcpy_to(xe, &map, 0, wqi, wqi_size); e->guc->wqi_tail += wqi_size; @@ -1674,6 +1655,7 @@ static void guc_engine_print(struct xe_engine *e, struct drm_printer *p) guc_engine_wq_print(e, p); spin_lock(&sched->job_list_lock); + list_for_each_entry(job, &sched->pending_list, drm.list) drm_printf(p, "\tJob: seqno=%d, fence=%d, finished=%d\n", xe_sched_job_seqno(job), diff --git a/drivers/gpu/drm/xe/xe_guc_submit_types.h b/drivers/gpu/drm/xe/xe_guc_submit_types.h new file mode 100644 index 000000000000..d369ea0bad60 --- /dev/null +++ b/drivers/gpu/drm/xe/xe_guc_submit_types.h @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright © 2023 Intel Corporation + */ + +#ifndef _XE_GUC_SUBMIT_TYPES_H_ +#define _XE_GUC_SUBMIT_TYPES_H_ + +#include "xe_hw_engine_types.h" + +/* Work item for submitting workloads into work queue of GuC. */ +#define WQ_STATUS_ACTIVE 1 +#define WQ_STATUS_SUSPENDED 2 +#define WQ_STATUS_CMD_ERROR 3 +#define WQ_STATUS_ENGINE_ID_NOT_USED 4 +#define WQ_STATUS_SUSPENDED_FROM_RESET 5 +#define WQ_TYPE_NOOP 0x4 +#define WQ_TYPE_MULTI_LRC 0x5 +#define WQ_TYPE_MASK GENMASK(7, 0) +#define WQ_LEN_MASK GENMASK(26, 16) + +#define WQ_GUC_ID_MASK GENMASK(15, 0) +#define WQ_RING_TAIL_MASK GENMASK(28, 18) + +#define PARALLEL_SCRATCH_SIZE 2048 +#define WQ_SIZE (PARALLEL_SCRATCH_SIZE / 2) +#define WQ_OFFSET (PARALLEL_SCRATCH_SIZE - WQ_SIZE) +#define CACHELINE_BYTES 64 + +struct guc_sched_wq_desc { + u32 head; + u32 tail; + u32 error_offset; + u32 wq_status; + u32 reserved[28]; +} __packed; + +struct sync_semaphore { + u32 semaphore; + u8 unused[CACHELINE_BYTES - sizeof(u32)]; +}; + +/** + * Struct guc_submit_parallel_scratch - A scratch shared mapped buffer. + */ +struct guc_submit_parallel_scratch { + /** @wq_desc: Guc scheduler workqueue descriptor */ + struct guc_sched_wq_desc wq_desc; + + /** @go: Go Semaphore */ + struct sync_semaphore go; + /** @join: Joined semaphore for the relevant hw engine instances */ + struct sync_semaphore join[XE_HW_ENGINE_MAX_INSTANCE]; + + /** @unused: Unused/Reserved memory space */ + u8 unused[WQ_OFFSET - sizeof(struct guc_sched_wq_desc) - + sizeof(struct sync_semaphore) * + (XE_HW_ENGINE_MAX_INSTANCE + 1)]; + + /** @wq: Workqueue info */ + u32 wq[WQ_SIZE / sizeof(u32)]; +}; + +#endif From patchwork Wed Apr 26 20:57:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rodrigo Vivi X-Patchwork-Id: 13224945 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 736D5C77B60 for ; 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Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/xe/xe_guc_submit.c | 212 +++++++++++++++++++---- drivers/gpu/drm/xe/xe_guc_submit.h | 10 +- drivers/gpu/drm/xe/xe_guc_submit_types.h | 91 ++++++++++ 3 files changed, 274 insertions(+), 39 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c index a5fe7755ce4c..9c06411f857f 100644 --- a/drivers/gpu/drm/xe/xe_guc_submit.c +++ b/drivers/gpu/drm/xe/xe_guc_submit.c @@ -1596,75 +1596,211 @@ int xe_guc_engine_reset_failure_handler(struct xe_guc *guc, u32 *msg, u32 len) return 0; } -static void guc_engine_wq_print(struct xe_engine *e, struct drm_printer *p) +static void +guc_engine_wq_snapshot_capture(struct xe_engine *e, + struct xe_guc_submit_engine_snapshot *snapshot) { struct xe_guc *guc = engine_to_guc(e); struct xe_device *xe = guc_to_xe(guc); struct iosys_map map = xe_lrc_parallel_map(e->lrc); int i; + snapshot->guc.wqi_head = e->guc->wqi_head; + snapshot->guc.wqi_tail = e->guc->wqi_tail; + snapshot->parallel.wq_desc.head = parallel_read(xe, map, wq_desc.head); + snapshot->parallel.wq_desc.tail = parallel_read(xe, map, wq_desc.tail); + snapshot->parallel.wq_desc.status = parallel_read(xe, map, + wq_desc.wq_status); + + if (snapshot->parallel.wq_desc.head != + snapshot->parallel.wq_desc.tail) { + for (i = snapshot->parallel.wq_desc.head; + i != snapshot->parallel.wq_desc.tail; + i = (i + sizeof(u32)) % WQ_SIZE) + snapshot->parallel.wq[i / sizeof(u32)] = + parallel_read(xe, map, wq[i / sizeof(u32)]); + } +} + +static void +guc_engine_wq_snapshot_print(struct xe_guc_submit_engine_snapshot *snapshot, + struct drm_printer *p) +{ + int i; + drm_printf(p, "\tWQ head: %u (internal), %d (memory)\n", - e->guc->wqi_head, parallel_read(xe, map, wq_desc.head)); + snapshot->guc.wqi_head, snapshot->parallel.wq_desc.head); drm_printf(p, "\tWQ tail: %u (internal), %d (memory)\n", - e->guc->wqi_tail, parallel_read(xe, map, wq_desc.tail)); - drm_printf(p, "\tWQ status: %u\n", - parallel_read(xe, map, wq_desc.wq_status)); - if (parallel_read(xe, map, wq_desc.head) != - parallel_read(xe, map, wq_desc.tail)) { - for (i = parallel_read(xe, map, wq_desc.head); - i != parallel_read(xe, map, wq_desc.tail); + snapshot->guc.wqi_tail, snapshot->parallel.wq_desc.tail); + drm_printf(p, "\tWQ status: %u\n", snapshot->parallel.wq_desc.status); + + if (snapshot->parallel.wq_desc.head != + snapshot->parallel.wq_desc.tail) { + for (i = snapshot->parallel.wq_desc.head; + i != snapshot->parallel.wq_desc.tail; i = (i + sizeof(u32)) % WQ_SIZE) drm_printf(p, "\tWQ[%zu]: 0x%08x\n", i / sizeof(u32), - parallel_read(xe, map, wq[i / sizeof(u32)])); + snapshot->parallel.wq[i / sizeof(u32)]); } } -static void guc_engine_print(struct xe_engine *e, struct drm_printer *p) +/** + * xe_guc_engine_snapshot_capture - Take a quick snapshot of the GuC Engine. + * @e: Xe Engine. + * + * This can be printed out in a later stage like during dev_coredump + * analysis. + * + * Returns: a GuC Submit Engine snapshot object that must be freed by the + * caller, using `xe_guc_engine_snapshot_free`. + */ +struct xe_guc_submit_engine_snapshot * +xe_guc_engine_snapshot_capture(struct xe_engine *e) { struct drm_gpu_scheduler *sched = &e->guc->sched; struct xe_sched_job *job; + struct xe_guc_submit_engine_snapshot *snapshot; int i; - drm_printf(p, "\nGuC ID: %d\n", e->guc->id); - drm_printf(p, "\tName: %s\n", e->name); - drm_printf(p, "\tClass: %d\n", e->class); - drm_printf(p, "\tLogical mask: 0x%x\n", e->logical_mask); - drm_printf(p, "\tWidth: %d\n", e->width); - drm_printf(p, "\tRef: %d\n", kref_read(&e->refcount)); - drm_printf(p, "\tTimeout: %ld (ms)\n", sched->timeout); - drm_printf(p, "\tTimeslice: %u (us)\n", e->sched_props.timeslice_us); - drm_printf(p, "\tPreempt timeout: %u (us)\n", - e->sched_props.preempt_timeout_us); + snapshot = kzalloc(sizeof(struct xe_guc_submit_engine_snapshot), + GFP_ATOMIC); + + snapshot->guc.id = e->guc->id; + memcpy(&snapshot->name, &e->name, sizeof(snapshot->name)); + snapshot->class = e->class; + snapshot->logical_mask = e->logical_mask; + snapshot->width = e->width; + snapshot->refcount = kref_read(&e->refcount); + snapshot->sched_timeout = sched->timeout; + snapshot->sched_props.timeslice_us = e->sched_props.timeslice_us; + snapshot->sched_props.preempt_timeout_us = + e->sched_props.preempt_timeout_us; + + snapshot->lrc = kmalloc_array(e->width, sizeof(struct lrc_snapshot), + GFP_ATOMIC); + for (i = 0; i < e->width; ++i ) { struct xe_lrc *lrc = e->lrc + i; + snapshot->lrc[i].context_desc = + lower_32_bits(xe_lrc_ggtt_addr(lrc)); + snapshot->lrc[i].head = xe_lrc_ring_head(lrc); + snapshot->lrc[i].tail.internal = lrc->ring.tail; + snapshot->lrc[i].tail.memory = + xe_lrc_read_ctx_reg(lrc, CTX_RING_TAIL); + snapshot->lrc[i].start_seqno = xe_lrc_start_seqno(lrc); + snapshot->lrc[i].seqno = xe_lrc_seqno(lrc); + + } + + snapshot->schedule_state = atomic_read(&e->guc->state); + snapshot->engine_flags = e->flags; + + snapshot->parallel_execution = xe_engine_is_parallel(e); + if (snapshot->parallel_execution) + guc_engine_wq_snapshot_capture(e, snapshot); + + spin_lock(&sched->job_list_lock); + snapshot->pending_list_size = list_count_nodes(&sched->pending_list); + snapshot->pending_list = kmalloc_array(snapshot->pending_list_size, + sizeof(struct pending_list_snapshot), + GFP_ATOMIC); + i = 0; + list_for_each_entry(job, &sched->pending_list, drm.list) { + snapshot->pending_list[i].seqno = xe_sched_job_seqno(job); + snapshot->pending_list[i].fence = + dma_fence_is_signaled(job->fence) ? 1 : 0; + snapshot->pending_list[i].finished = + dma_fence_is_signaled(&job->drm.s_fence->finished) + ? 1 : 0; + i++; + } + spin_unlock(&sched->job_list_lock); + + return snapshot; +} + +/** + * xe_guc_engine_snapshot_print - Print out a given GuC Engine snapshot. + * @snapshot: GuC Submit Engine snapshot object. + * @p: drm_printer where it will be printed out. + * + * This function prints out a given GuC Submit Engine snapshot object. + */ +void +xe_guc_engine_snapshot_print(struct xe_guc_submit_engine_snapshot *snapshot, + struct drm_printer *p) +{ + int i; + + drm_printf(p, "\nGuC ID: %d\n", snapshot->guc.id); + drm_printf(p, "\tName: %s\n", snapshot->name); + drm_printf(p, "\tClass: %d\n", snapshot->class); + drm_printf(p, "\tLogical mask: 0x%x\n", snapshot->logical_mask); + drm_printf(p, "\tWidth: %d\n", snapshot->width); + drm_printf(p, "\tRef: %d\n", snapshot->refcount); + drm_printf(p, "\tTimeout: %ld (ms)\n", snapshot->sched_timeout); + drm_printf(p, "\tTimeslice: %u (us)\n", + snapshot->sched_props.timeslice_us); + drm_printf(p, "\tPreempt timeout: %u (us)\n", + snapshot->sched_props.preempt_timeout_us); + + for (i = 0; i < snapshot->width; ++i ) { drm_printf(p, "\tHW Context Desc: 0x%08x\n", - lower_32_bits(xe_lrc_ggtt_addr(lrc))); + snapshot->lrc[i].context_desc); drm_printf(p, "\tLRC Head: (memory) %u\n", - xe_lrc_ring_head(lrc)); + snapshot->lrc[i].head); drm_printf(p, "\tLRC Tail: (internal) %u, (memory) %u\n", - lrc->ring.tail, - xe_lrc_read_ctx_reg(lrc, CTX_RING_TAIL)); + snapshot->lrc[i].tail.internal, + snapshot->lrc[i].tail.memory); drm_printf(p, "\tStart seqno: (memory) %d\n", - xe_lrc_start_seqno(lrc)); - drm_printf(p, "\tSeqno: (memory) %d\n", xe_lrc_seqno(lrc)); + snapshot->lrc[i].start_seqno); + drm_printf(p, "\tSeqno: (memory) %d\n", snapshot->lrc[i].seqno); } - drm_printf(p, "\tSchedule State: 0x%x\n", atomic_read(&e->guc->state)); - drm_printf(p, "\tFlags: 0x%lx\n", e->flags); - if (xe_engine_is_parallel(e)) - guc_engine_wq_print(e, p); + drm_printf(p, "\tSchedule State: 0x%x\n", snapshot->schedule_state); + drm_printf(p, "\tFlags: 0x%lx\n", snapshot->engine_flags); - spin_lock(&sched->job_list_lock); + if (snapshot->parallel_execution) + guc_engine_wq_snapshot_print(snapshot, p); - list_for_each_entry(job, &sched->pending_list, drm.list) + for(i = 0; i < snapshot->pending_list_size; i++) drm_printf(p, "\tJob: seqno=%d, fence=%d, finished=%d\n", - xe_sched_job_seqno(job), - dma_fence_is_signaled(job->fence) ? 1 : 0, - dma_fence_is_signaled(&job->drm.s_fence->finished) ? - 1 : 0); - spin_unlock(&sched->job_list_lock); + snapshot->pending_list[i].seqno, + snapshot->pending_list[i].fence, + snapshot->pending_list[i].finished); +} + +/** + * xe_guc_engine_snapshot_free - Free all allocated objects for a given + * snapshot. + * @snapshot: GuC Submit Engine snapshot object. + * + * This function free all the memory that needed to be allocated at capture + * time. + */ +void xe_guc_engine_snapshot_free(struct xe_guc_submit_engine_snapshot *snapshot) +{ + kfree(snapshot->lrc); + kfree(snapshot->pending_list); + kfree(snapshot); +} + +static void guc_engine_print(struct xe_engine *e, struct drm_printer *p) +{ + struct xe_guc_submit_engine_snapshot *snapshot; + + snapshot = xe_guc_engine_snapshot_capture(e); + xe_guc_engine_snapshot_print(snapshot, p); + xe_guc_engine_snapshot_free(snapshot); } +/** + * xe_guc_submit_print - GuC Submit Print. + * @guc: GuC. + * @p: drm_printer where it will be printed out. + * + * This function capture and prints snapshots of **all** GuC Engines. + */ void xe_guc_submit_print(struct xe_guc *guc, struct drm_printer *p) { struct xe_engine *e; diff --git a/drivers/gpu/drm/xe/xe_guc_submit.h b/drivers/gpu/drm/xe/xe_guc_submit.h index 8002734d6f24..4153c2d22013 100644 --- a/drivers/gpu/drm/xe/xe_guc_submit.h +++ b/drivers/gpu/drm/xe/xe_guc_submit.h @@ -13,7 +13,6 @@ struct xe_engine; struct xe_guc; int xe_guc_submit_init(struct xe_guc *guc); -void xe_guc_submit_print(struct xe_guc *guc, struct drm_printer *p); int xe_guc_submit_reset_prepare(struct xe_guc *guc); void xe_guc_submit_reset_wait(struct xe_guc *guc); @@ -27,4 +26,13 @@ int xe_guc_engine_memory_cat_error_handler(struct xe_guc *guc, u32 *msg, u32 len); int xe_guc_engine_reset_failure_handler(struct xe_guc *guc, u32 *msg, u32 len); +struct xe_guc_submit_engine_snapshot * +xe_guc_engine_snapshot_capture(struct xe_engine *e); +void +xe_guc_engine_snapshot_print(struct xe_guc_submit_engine_snapshot *snapshot, + struct drm_printer *p); +void +xe_guc_engine_snapshot_free(struct xe_guc_submit_engine_snapshot *snapshot); +void xe_guc_submit_print(struct xe_guc *guc, struct drm_printer *p); + #endif diff --git a/drivers/gpu/drm/xe/xe_guc_submit_types.h b/drivers/gpu/drm/xe/xe_guc_submit_types.h index d369ea0bad60..0b726609dc14 100644 --- a/drivers/gpu/drm/xe/xe_guc_submit_types.h +++ b/drivers/gpu/drm/xe/xe_guc_submit_types.h @@ -61,4 +61,95 @@ struct guc_submit_parallel_scratch { u32 wq[WQ_SIZE / sizeof(u32)]; }; +struct lrc_snapshot { + u32 context_desc; + u32 head; + struct { + u32 internal; + u32 memory; + } tail; + u32 start_seqno; + u32 seqno; +}; + +struct pending_list_snapshot { + u32 seqno; + bool fence; + bool finished; +}; + +/** + * struct xe_guc_submit_engine_snapshot - Snapshot for devcoredump + */ +struct xe_guc_submit_engine_snapshot { + /** @name: name of this engine */ + char name[MAX_FENCE_NAME_LEN]; + /** @class: class of this engine */ + enum xe_engine_class class; + /** + * @logical_mask: logical mask of where job submitted to engine can run + */ + u32 logical_mask; + /** @width: width (number BB submitted per exec) of this engine */ + u16 width; + /** @refcount: ref count of this engine */ + u32 refcount; + /** + * @sched_timeout: the time after which a job is removed from the + * scheduler. + */ + long sched_timeout; + + /** @sched_props: scheduling properties */ + struct { + /** @timeslice_us: timeslice period in micro-seconds */ + u32 timeslice_us; + /** @preempt_timeout_us: preemption timeout in micro-seconds */ + u32 preempt_timeout_us; + } sched_props; + + /** @lrc: LRC Snapshot */ + struct lrc_snapshot *lrc; + + /** @schedule_state: Schedule State at the moment of Crash */ + u32 schedule_state; + /** @engine_flags: Flags of the faulty engine */ + unsigned long engine_flags; + + /** @guc: GuC Engine Snapshot */ + struct { + /** @wqi_head: work queue item head */ + u32 wqi_head; + /** @wqi_tail: work queue item tail */ + u32 wqi_tail; + /** @id: GuC id for this xe_engine */ + u16 id; + } guc; + + /** + * @parallel_execution: Indication if the failure was during parallel + * execution + */ + bool parallel_execution; + /** @parallel: snapshot of the useful parallel scratch */ + struct { + /** @wq_desc: Workqueue description */ + struct { + /** @head: Workqueue Head */ + u32 head; + /** @tail: Workqueue Tail */ + u32 tail; + /** @status: Workqueue Status */ + u32 status; + } wq_desc; + /** @wq: Workqueue Items */ + u32 wq[WQ_SIZE / sizeof(u32)]; + } parallel; + + /** @pending_list_size: Size of the pending list snapshot array */ + int pending_list_size; + /** @pending_list: snapshot of the pending list info */ + struct pending_list_snapshot *pending_list; +}; + #endif From patchwork Wed Apr 26 20:57:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rodrigo Vivi X-Patchwork-Id: 13224944 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 25D7CC7EE23 for ; Wed, 26 Apr 2023 20:58:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1666110EA32; Wed, 26 Apr 2023 20:58:05 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1161210E1FD; Wed, 26 Apr 2023 20:57:59 +0000 (UTC) DKIM-Signature: v=1; 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Any format change should come on follow-up work. Signed-off-by: Rodrigo Vivi Reviewed-by: Matthew Brost --- drivers/gpu/drm/xe/xe_devcoredump.c | 7 ++++++- drivers/gpu/drm/xe/xe_devcoredump_types.h | 2 ++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c index 795581c58d90..0e7ec654a9f2 100644 --- a/drivers/gpu/drm/xe/xe_devcoredump.c +++ b/drivers/gpu/drm/xe/xe_devcoredump.c @@ -12,6 +12,7 @@ #include "xe_engine.h" #include "xe_gt.h" #include "xe_guc_ct.h" +#include "xe_guc_submit.h" /** * DOC: Xe device coredump @@ -89,6 +90,7 @@ static ssize_t xe_devcoredump_read(char *buffer, loff_t offset, drm_printf(&p, "\n**** GuC CT ****\n"); xe_guc_ct_snapshot_print(coredump->snapshot.ct, &p); + xe_guc_engine_snapshot_print(coredump->snapshot.ge, &p); mutex_unlock(&coredump->lock); @@ -106,6 +108,7 @@ static void xe_devcoredump_free(void *data) mutex_lock(&coredump->lock); xe_guc_ct_snapshot_free(coredump->snapshot.ct); + xe_guc_engine_snapshot_free(coredump->snapshot.ge); coredump->faulty_engine = NULL; drm_info(&coredump_to_xe(coredump)->drm, @@ -117,13 +120,15 @@ static void xe_devcoredump_free(void *data) static void devcoredump_snapshot(struct xe_devcoredump *coredump) { struct xe_devcoredump_snapshot *ss = &coredump->snapshot; - struct xe_guc *guc = engine_to_guc(coredump->faulty_engine); + struct xe_engine *e = coredump->faulty_engine; + struct xe_guc *guc = engine_to_guc(e); lockdep_assert_held(&coredump->lock); ss->snapshot_time = ktime_get_real(); ss->boot_time = ktime_get_boottime(); coredump->snapshot.ct = xe_guc_ct_snapshot_capture(&guc->ct); + coredump->snapshot.ge = xe_guc_engine_snapshot_capture(e); } /** diff --git a/drivers/gpu/drm/xe/xe_devcoredump_types.h b/drivers/gpu/drm/xe/xe_devcoredump_types.h index 1e44d5346364..e055b266af70 100644 --- a/drivers/gpu/drm/xe/xe_devcoredump_types.h +++ b/drivers/gpu/drm/xe/xe_devcoredump_types.h @@ -27,6 +27,8 @@ struct xe_devcoredump_snapshot { /* GuC snapshots */ /** @ct_snapshot: GuC CT snapshot */ struct xe_guc_ct_snapshot *ct; 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Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/xe/xe_gt_debugfs.c | 2 +- drivers/gpu/drm/xe/xe_guc_submit.c | 2 +- drivers/gpu/drm/xe/xe_hw_engine.c | 210 +++++++++++++++++------- drivers/gpu/drm/xe/xe_hw_engine.h | 8 +- drivers/gpu/drm/xe/xe_hw_engine_types.h | 78 +++++++++ 5 files changed, 241 insertions(+), 59 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_gt_debugfs.c b/drivers/gpu/drm/xe/xe_gt_debugfs.c index c45486c2015a..8bf441e850a0 100644 --- a/drivers/gpu/drm/xe/xe_gt_debugfs.c +++ b/drivers/gpu/drm/xe/xe_gt_debugfs.c @@ -42,7 +42,7 @@ static int hw_engines(struct seq_file *m, void *data) } for_each_hw_engine(hwe, gt, id) - xe_hw_engine_print_state(hwe, &p); + xe_hw_engine_print(hwe, &p); xe_device_mem_access_put(xe); err = xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL); diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c index 9c06411f857f..74659d0a69b3 100644 --- a/drivers/gpu/drm/xe/xe_guc_submit.c +++ b/drivers/gpu/drm/xe/xe_guc_submit.c @@ -751,7 +751,7 @@ static void simple_error_capture(struct xe_engine *e) if (hwe->class != e->hwe->class || !(BIT(hwe->logical_instance) & adj_logical_mask)) continue; - xe_hw_engine_print_state(hwe, &p); + xe_hw_engine_print(hwe, &p); } xe_analyze_vm(&p, e->vm, e->gt->info.id); xe_force_wake_put(gt_to_fw(guc_to_gt(guc)), XE_FORCEWAKE_ALL); diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c index 23b9f120c258..eda0666bfa2f 100644 --- a/drivers/gpu/drm/xe/xe_hw_engine.c +++ b/drivers/gpu/drm/xe/xe_hw_engine.c @@ -505,77 +505,175 @@ void xe_hw_engine_handle_irq(struct xe_hw_engine *hwe, u16 intr_vec) xe_hw_fence_irq_run(hwe->fence_irq); } -void xe_hw_engine_print_state(struct xe_hw_engine *hwe, struct drm_printer *p) +/** + * xe_hw_engine_snapshot_capture - Take a quick snapshot of the HW Engine. + * @hwe: Xe HW Engine. + * + * This can be printed out in a later stage like during dev_coredump + * analysis. + * + * Returns: a Xe HW Engine snapshot object that must be freed by the + * caller, using `xe_hw_engine_snapshot_free`. + */ +struct xe_hw_engine_snapshot * +xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe) { + struct xe_hw_engine_snapshot *snapshot; + int len; + if (!xe_hw_engine_is_valid(hwe)) - return; + return NULL; + + snapshot = kzalloc(sizeof(struct xe_hw_engine_snapshot), GFP_ATOMIC); + + len = strlen(hwe->name) + 1; + snapshot->name = kzalloc(len, GFP_ATOMIC); + strscpy(snapshot->name, hwe->name, len); + snapshot->class = hwe->class; + snapshot->logical_instance = hwe->logical_instance; + snapshot->forcewake.domain = hwe->domain; + snapshot->forcewake.ref = xe_force_wake_ref(gt_to_fw(hwe->gt), + hwe->domain); + snapshot->mmio_base = hwe->mmio_base; + + snapshot->reg.ring_hwstam = hw_engine_mmio_read32(hwe, + RING_HWSTAM(0).reg); + snapshot->reg.ring_hws_pga = hw_engine_mmio_read32(hwe, + RING_HWS_PGA(0).reg); + snapshot->reg.ring_execlist_status_lo = + hw_engine_mmio_read32(hwe, RING_EXECLIST_STATUS_LO(0).reg); + snapshot->reg.ring_execlist_status_hi = + hw_engine_mmio_read32(hwe, RING_EXECLIST_STATUS_HI(0).reg); + snapshot->reg.ring_execlist_sq_contents_lo = + hw_engine_mmio_read32(hwe, + RING_EXECLIST_SQ_CONTENTS_LO(0).reg); + snapshot->reg.ring_execlist_sq_contents_hi = + hw_engine_mmio_read32(hwe, + RING_EXECLIST_SQ_CONTENTS_HI(0).reg); + snapshot->reg.ring_execlist_control = + hw_engine_mmio_read32(hwe, RING_EXECLIST_CONTROL(0).reg); + snapshot->reg.ring_start = hw_engine_mmio_read32(hwe, + RING_START(0).reg); + snapshot->reg.ring_head = + hw_engine_mmio_read32(hwe, RING_HEAD(0).reg) & HEAD_ADDR; + snapshot->reg.ring_tail = + hw_engine_mmio_read32(hwe, RING_TAIL(0).reg) & TAIL_ADDR; + snapshot->reg.ring_ctl = hw_engine_mmio_read32(hwe, RING_CTL(0).reg); + snapshot->reg.ring_mi_mode = + hw_engine_mmio_read32(hwe, RING_MI_MODE(0).reg); + snapshot->reg.ring_mode_gen7 = + hw_engine_mmio_read32(hwe, RING_MODE_GEN7(0).reg); + snapshot->reg.ring_imr = hw_engine_mmio_read32(hwe, RING_IMR(0).reg); + snapshot->reg.ring_esr = hw_engine_mmio_read32(hwe, RING_ESR(0).reg); + snapshot->reg.ring_emr = hw_engine_mmio_read32(hwe, RING_EMR(0).reg); + snapshot->reg.ring_eir = hw_engine_mmio_read32(hwe, RING_EIR(0).reg); + snapshot->reg.ring_acthd_udw = + hw_engine_mmio_read32(hwe, RING_ACTHD_UDW(0).reg); + snapshot->reg.ring_acthd = hw_engine_mmio_read32(hwe, + RING_ACTHD(0).reg); + snapshot->reg.ring_bbaddr_udw = + hw_engine_mmio_read32(hwe, RING_BBADDR_UDW(0).reg); + snapshot->reg.ring_bbaddr = hw_engine_mmio_read32(hwe, RING_BBADDR(0).reg); + snapshot->reg.ring_dma_fadd_udw = + hw_engine_mmio_read32(hwe, RING_DMA_FADD_UDW(0).reg), + snapshot->reg.ring_dma_fadd = + hw_engine_mmio_read32(hwe, RING_DMA_FADD(0).reg); + snapshot->reg.ipeir = hw_engine_mmio_read32(hwe, IPEIR(0).reg); + snapshot->reg.ipehr = hw_engine_mmio_read32(hwe, IPEHR(0).reg); - drm_printf(p, "%s (physical), logical instance=%d\n", hwe->name, - hwe->logical_instance); - drm_printf(p, "\tForcewake: domain 0x%x, ref %d\n", - hwe->domain, - xe_force_wake_ref(gt_to_fw(hwe->gt), hwe->domain)); - drm_printf(p, "\tMMIO base: 0x%08x\n", hwe->mmio_base); + if (snapshot->class == XE_ENGINE_CLASS_COMPUTE) + snapshot->reg.rcu_mode = xe_mmio_read32(hwe->gt, + GEN12_RCU_MODE.reg); - drm_printf(p, "\tHWSTAM: 0x%08x\n", - hw_engine_mmio_read32(hwe, RING_HWSTAM(0).reg)); - drm_printf(p, "\tRING_HWS_PGA: 0x%08x\n", - hw_engine_mmio_read32(hwe, RING_HWS_PGA(0).reg)); + return snapshot; +} +/** + * xe_hw_engine_snapshot_print - Print out a given Xe HW Engine snapshot. + * @snapshot: Xe HW Engine snapshot object. + * @p: drm_printer where it will be printed out. + * + * This function prints out a given Xe HW Engine snapshot object. + */ +void xe_hw_engine_snapshot_print(struct xe_hw_engine_snapshot *snapshot, + struct drm_printer *p) +{ + if (!snapshot) + return; + + drm_printf(p, "%s (physical), logical instance=%d\n", snapshot->name, + snapshot->logical_instance); + drm_printf(p, "\tForcewake: domain 0x%x, ref %d\n", + snapshot->forcewake.domain, snapshot->forcewake.ref); + drm_printf(p, "\tMMIO base: 0x%08x\n", snapshot->mmio_base); + drm_printf(p, "\tHWSTAM: 0x%08x\n", snapshot->reg.ring_hwstam); + drm_printf(p, "\tRING_HWS_PGA: 0x%08x\n", snapshot->reg.ring_hws_pga); drm_printf(p, "\tRING_EXECLIST_STATUS_LO: 0x%08x\n", - hw_engine_mmio_read32(hwe, RING_EXECLIST_STATUS_LO(0).reg)); + snapshot->reg.ring_execlist_status_lo); drm_printf(p, "\tRING_EXECLIST_STATUS_HI: 0x%08x\n", - hw_engine_mmio_read32(hwe, RING_EXECLIST_STATUS_HI(0).reg)); + snapshot->reg.ring_execlist_status_hi); drm_printf(p, "\tRING_EXECLIST_SQ_CONTENTS_LO: 0x%08x\n", - hw_engine_mmio_read32(hwe, - RING_EXECLIST_SQ_CONTENTS_LO(0).reg)); + snapshot->reg.ring_execlist_sq_contents_lo); drm_printf(p, "\tRING_EXECLIST_SQ_CONTENTS_HI: 0x%08x\n", - hw_engine_mmio_read32(hwe, - RING_EXECLIST_SQ_CONTENTS_HI(0).reg)); + snapshot->reg.ring_execlist_sq_contents_hi); drm_printf(p, "\tRING_EXECLIST_CONTROL: 0x%08x\n", - hw_engine_mmio_read32(hwe, RING_EXECLIST_CONTROL(0).reg)); - - drm_printf(p, "\tRING_START: 0x%08x\n", - hw_engine_mmio_read32(hwe, RING_START(0).reg)); - drm_printf(p, "\tRING_HEAD: 0x%08x\n", - hw_engine_mmio_read32(hwe, RING_HEAD(0).reg) & HEAD_ADDR); - drm_printf(p, "\tRING_TAIL: 0x%08x\n", - hw_engine_mmio_read32(hwe, RING_TAIL(0).reg) & TAIL_ADDR); - drm_printf(p, "\tRING_CTL: 0x%08x\n", - hw_engine_mmio_read32(hwe, RING_CTL(0).reg)); - drm_printf(p, "\tRING_MODE: 0x%08x\n", - hw_engine_mmio_read32(hwe, RING_MI_MODE(0).reg)); + snapshot->reg.ring_execlist_control); + drm_printf(p, "\tRING_START: 0x%08x\n", snapshot->reg.ring_start); + drm_printf(p, "\tRING_HEAD: 0x%08x\n", snapshot->reg.ring_head); + drm_printf(p, "\tRING_TAIL: 0x%08x\n", snapshot->reg.ring_tail); + drm_printf(p, "\tRING_CTL: 0x%08x\n", snapshot->reg.ring_ctl); + drm_printf(p, "\tRING_MODE: 0x%08x\n", snapshot->reg.ring_mi_mode); drm_printf(p, "\tRING_MODE_GEN7: 0x%08x\n", - hw_engine_mmio_read32(hwe, RING_MODE_GEN7(0).reg)); - - drm_printf(p, "\tRING_IMR: 0x%08x\n", - hw_engine_mmio_read32(hwe, RING_IMR(0).reg)); - drm_printf(p, "\tRING_ESR: 0x%08x\n", - hw_engine_mmio_read32(hwe, RING_ESR(0).reg)); - drm_printf(p, "\tRING_EMR: 0x%08x\n", - hw_engine_mmio_read32(hwe, RING_EMR(0).reg)); - drm_printf(p, "\tRING_EIR: 0x%08x\n", - hw_engine_mmio_read32(hwe, RING_EIR(0).reg)); - - drm_printf(p, "\tACTHD: 0x%08x_%08x\n", - hw_engine_mmio_read32(hwe, RING_ACTHD_UDW(0).reg), - hw_engine_mmio_read32(hwe, RING_ACTHD(0).reg)); - drm_printf(p, "\tBBADDR: 0x%08x_%08x\n", - hw_engine_mmio_read32(hwe, RING_BBADDR_UDW(0).reg), - hw_engine_mmio_read32(hwe, RING_BBADDR(0).reg)); + snapshot->reg.ring_mode_gen7); + drm_printf(p, "\tRING_IMR: 0x%08x\n", snapshot->reg.ring_imr); + drm_printf(p, "\tRING_ESR: 0x%08x\n", snapshot->reg.ring_esr); + drm_printf(p, "\tRING_EMR: 0x%08x\n", snapshot->reg.ring_emr); + drm_printf(p, "\tRING_EIR: 0x%08x\n", snapshot->reg.ring_eir); + drm_printf(p, "\tACTHD: 0x%08x_%08x\n", snapshot->reg.ring_acthd_udw, + snapshot->reg.ring_acthd); + drm_printf(p, "\tBBADDR: 0x%08x_%08x\n", snapshot->reg.ring_bbaddr_udw, + snapshot->reg.ring_bbaddr); drm_printf(p, "\tDMA_FADDR: 0x%08x_%08x\n", - hw_engine_mmio_read32(hwe, RING_DMA_FADD_UDW(0).reg), - hw_engine_mmio_read32(hwe, RING_DMA_FADD(0).reg)); + snapshot->reg.ring_dma_fadd_udw, + snapshot->reg.ring_dma_fadd); + drm_printf(p, "\tIPEIR: 0x%08x\n", snapshot->reg.ipeir); + drm_printf(p, "\tIPEHR: 0x%08x\n\n", snapshot->reg.ipehr); - drm_printf(p, "\tIPEIR: 0x%08x\n", - hw_engine_mmio_read32(hwe, IPEIR(0).reg)); - drm_printf(p, "\tIPEHR: 0x%08x\n\n", - hw_engine_mmio_read32(hwe, IPEHR(0).reg)); - - if (hwe->class == XE_ENGINE_CLASS_COMPUTE) + if (snapshot->class == XE_ENGINE_CLASS_COMPUTE) drm_printf(p, "\tGEN12_RCU_MODE: 0x%08x\n", - xe_mmio_read32(hwe->gt, GEN12_RCU_MODE.reg)); + snapshot->reg.rcu_mode); +} + +/** + * xe_hw_engine_snapshot_free - Free all allocated objects for a given snapshot. + * @snapshot: Xe HW Engine snapshot object. + * + * This function free all the memory that needed to be allocated at capture + * time. + */ +void xe_hw_engine_snapshot_free(struct xe_hw_engine_snapshot *snapshot) +{ + if (!snapshot) + return; + + kfree(snapshot->name); + kfree(snapshot); +} + +/** + * xe_hw_engine_print - Xe HW Engine Print. + * @hwe: Hardware Engine. + * @p: drm_printer. + * + * This function quickly capture a snapshot and immediately print it out. + */ +void xe_hw_engine_print(struct xe_hw_engine *hwe, struct drm_printer *p) +{ + struct xe_hw_engine_snapshot *snapshot; + snapshot = xe_hw_engine_snapshot_capture(hwe); + xe_hw_engine_snapshot_print(snapshot, p); + xe_hw_engine_snapshot_free(snapshot); } u32 xe_hw_engine_mask_per_class(struct xe_gt *gt, diff --git a/drivers/gpu/drm/xe/xe_hw_engine.h b/drivers/gpu/drm/xe/xe_hw_engine.h index ceab65397256..a0514bf859c6 100644 --- a/drivers/gpu/drm/xe/xe_hw_engine.h +++ b/drivers/gpu/drm/xe/xe_hw_engine.h @@ -14,10 +14,16 @@ int xe_hw_engines_init_early(struct xe_gt *gt); int xe_hw_engines_init(struct xe_gt *gt); void xe_hw_engine_handle_irq(struct xe_hw_engine *hwe, u16 intr_vec); void xe_hw_engine_enable_ring(struct xe_hw_engine *hwe); -void xe_hw_engine_print_state(struct xe_hw_engine *hwe, struct drm_printer *p); u32 xe_hw_engine_mask_per_class(struct xe_gt *gt, enum xe_engine_class engine_class); +struct xe_hw_engine_snapshot * +xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe); +void xe_hw_engine_snapshot_free(struct xe_hw_engine_snapshot *snapshot); +void xe_hw_engine_snapshot_print(struct xe_hw_engine_snapshot *snapshot, + struct drm_printer *p); +void xe_hw_engine_print(struct xe_hw_engine *hwe, struct drm_printer *p); + bool xe_hw_engine_is_reserved(struct xe_hw_engine *hwe); static inline bool xe_hw_engine_is_valid(struct xe_hw_engine *hwe) { diff --git a/drivers/gpu/drm/xe/xe_hw_engine_types.h b/drivers/gpu/drm/xe/xe_hw_engine_types.h index 2c40384957da..c15d6c671fbb 100644 --- a/drivers/gpu/drm/xe/xe_hw_engine_types.h +++ b/drivers/gpu/drm/xe/xe_hw_engine_types.h @@ -109,4 +109,82 @@ struct xe_hw_engine { enum xe_hw_engine_id engine_id; }; +/** + * struct xe_hw_engine_snapshot - Hardware engine snapshot + * + * Contains the snapshot of usefull hardware engine info and registers. + */ +struct xe_hw_engine_snapshot { + /** @name: name of the hw engine */ + char *name; + /** @class: class of this hw engine */ + enum xe_engine_class class; + /** @logical_instance: logical instance of this hw engine */ + u16 logical_instance; + /** @forcewake: Force Wake information snapshot */ + struct { + /** @domain: force wake domain of this hw engine */ + enum xe_force_wake_domains domain; + /** @ref: Forcewake ref for the above domain */ + int ref; + } forcewake; + /** @reg: Useful MMIO register snapshot */ + /** @mmio_base: MMIO base address of this hw engine*/ + u32 mmio_base; + struct { + /** @ring_hwstam: RING_HWSTAM */ + u32 ring_hwstam; + /** @ring_hws_pga: RING_HWS_PGA */ + u32 ring_hws_pga; + /** @ring_execlist_status_lo: RING_EXECLIST_STATUS_LO */ + u32 ring_execlist_status_lo; + /** @ring_execlist_status_hi: RING_EXECLIST_STATUS_HI */ + u32 ring_execlist_status_hi; + /** @ring_execlist_sq_contents_lo: RING_EXECLIST_SQ_CONTENTS */ + u32 ring_execlist_sq_contents_lo; + /** @ring_execlist_sq_contents_hi: RING_EXECLIST_SQ_CONTENTS + 4 */ + u32 ring_execlist_sq_contents_hi; + /** @ring_execlist_control: RING_EXECLIST_CONTROL */ + u32 ring_execlist_control; + /** @ring_start: RING_START */ + u32 ring_start; + /** @ring_head: RING_HEAD */ + u32 ring_head; + /** @ring_tail: RING_TAIL */ + u32 ring_tail; + /** @ring_ctl: RING_CTL */ + u32 ring_ctl; + /** @ring_mi_mode: RING_MI_MODE */ + u32 ring_mi_mode; + /** @ring_mode_gen7: RING_MODE_GEN7 */ + u32 ring_mode_gen7; + /** @ring_imr: RING_IMR */ + u32 ring_imr; + /** @ring_esr: RING_ESR */ + u32 ring_esr; + /** @ring_emr: RING_EMR */ + u32 ring_emr; + /** @ring_eir: RING_EIR */ + u32 ring_eir; + /** @ring_acthd_udw: RING_ACTHD_UDW */ + u32 ring_acthd_udw; + /** @ring_acthd: RING_ACTHD */ + u32 ring_acthd; + /** @ring_bbaddr_udw: RING_BBADDR_UDW */ + u32 ring_bbaddr_udw; + /** @ring_bbaddr: RING_BBADDR */ + u32 ring_bbaddr; + /** @ring_dma_fadd_udw: RING_DMA_FADD_UDW */ + u32 ring_dma_fadd_udw; + /** @ring_dma_fadd: RING_DMA_FADD */ + u32 ring_dma_fadd; + /** @ipeir: IPEIR */ + u32 ipeir; + /** @ipehr: IPEHR */ + u32 ipehr; + /** @rcu_mode: GEN12_RCU_MODE */ + u32 rcu_mode; + } reg; +}; + #endif From patchwork Wed Apr 26 20:57:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rodrigo Vivi X-Patchwork-Id: 13224947 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 62505C77B7F for ; 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Wed, 26 Apr 2023 20:58:00 +0000 From: Rodrigo Vivi To: Subject: [PATCH 11/14] drm/xe: Add HW Engine snapshot to xe_devcoredump. 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Any format change should come on follow-up work. Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/xe/xe_devcoredump.c | 45 +++++++++++++++++++++++ drivers/gpu/drm/xe/xe_devcoredump_types.h | 4 ++ 2 files changed, 49 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c index 0e7ec654a9f2..1ffd12646a99 100644 --- a/drivers/gpu/drm/xe/xe_devcoredump.c +++ b/drivers/gpu/drm/xe/xe_devcoredump.c @@ -9,10 +9,13 @@ #include #include +#include "xe_device.h" #include "xe_engine.h" +#include "xe_force_wake.h" #include "xe_gt.h" #include "xe_guc_ct.h" #include "xe_guc_submit.h" +#include "xe_hw_engine.h" /** * DOC: Xe device coredump @@ -62,6 +65,9 @@ static ssize_t xe_devcoredump_read(char *buffer, loff_t offset, struct drm_printer p; struct drm_print_iterator iter; struct timespec64 ts; + struct xe_engine *e; + struct xe_hw_engine *hwe; + enum xe_hw_engine_id id; /* Our device is gone already... */ if (!data || !coredump_to_xe(coredump)) @@ -75,6 +81,7 @@ static ssize_t xe_devcoredump_read(char *buffer, loff_t offset, mutex_lock(&coredump->lock); ss = &coredump->snapshot; + e = coredump->faulty_engine; p = drm_coredump_printer(&iter); drm_printf(&p, "**** Xe Device Coredump ****\n"); @@ -92,6 +99,10 @@ static ssize_t xe_devcoredump_read(char *buffer, loff_t offset, xe_guc_ct_snapshot_print(coredump->snapshot.ct, &p); xe_guc_engine_snapshot_print(coredump->snapshot.ge, &p); + drm_printf(&p, "\n**** HW Engines ****\n"); + for_each_hw_engine(hwe, e->gt, id) + xe_hw_engine_snapshot_print(coredump->snapshot.hwe[id], &p); + mutex_unlock(&coredump->lock); return count - iter.remain; @@ -100,6 +111,8 @@ static ssize_t xe_devcoredump_read(char *buffer, loff_t offset, static void xe_devcoredump_free(void *data) { struct xe_devcoredump *coredump = data; + struct xe_hw_engine *hwe; + enum xe_hw_engine_id id; /* Our device is gone. Nothing to do... */ if (!data || !coredump_to_xe(coredump)) @@ -109,6 +122,8 @@ static void xe_devcoredump_free(void *data) xe_guc_ct_snapshot_free(coredump->snapshot.ct); xe_guc_engine_snapshot_free(coredump->snapshot.ge); + for_each_hw_engine(hwe, coredump->faulty_engine->gt, id) + xe_hw_engine_snapshot_free(coredump->snapshot.hwe[id]); coredump->faulty_engine = NULL; drm_info(&coredump_to_xe(coredump)->drm, @@ -122,13 +137,43 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump) struct xe_devcoredump_snapshot *ss = &coredump->snapshot; struct xe_engine *e = coredump->faulty_engine; struct xe_guc *guc = engine_to_guc(e); + struct xe_hw_engine *hwe; + enum xe_hw_engine_id id; + u32 adj_logical_mask = e->logical_mask; + u32 width_mask = (0x1 << e->width) - 1; + int i; + bool cookie; lockdep_assert_held(&coredump->lock); ss->snapshot_time = ktime_get_real(); ss->boot_time = ktime_get_boottime(); + cookie = dma_fence_begin_signalling(); + for (i = 0; e->width > 1 && i < XE_HW_ENGINE_MAX_INSTANCE;) { + if (adj_logical_mask & BIT(i)) { + adj_logical_mask |= width_mask << i; + i += e->width; + } else { + ++i; + } + } + + xe_force_wake_get(gt_to_fw(e->gt), XE_FORCEWAKE_ALL); + coredump->snapshot.ct = xe_guc_ct_snapshot_capture(&guc->ct); coredump->snapshot.ge = xe_guc_engine_snapshot_capture(e); + + for_each_hw_engine(hwe, e->gt, id) { + if (hwe->class != e->hwe->class || + !(BIT(hwe->logical_instance) & adj_logical_mask)) { + coredump->snapshot.hwe[id] = NULL; + continue; + } + coredump->snapshot.hwe[id] = xe_hw_engine_snapshot_capture(hwe); + } + + xe_force_wake_put(gt_to_fw(e->gt), XE_FORCEWAKE_ALL); + dma_fence_end_signalling(cookie); } /** diff --git a/drivers/gpu/drm/xe/xe_devcoredump_types.h b/drivers/gpu/drm/xe/xe_devcoredump_types.h index e055b266af70..8b17ecf1b6e6 100644 --- a/drivers/gpu/drm/xe/xe_devcoredump_types.h +++ b/drivers/gpu/drm/xe/xe_devcoredump_types.h @@ -9,6 +9,8 @@ #include #include +#include "xe_hw_engine_types.h" + struct xe_device; /** @@ -29,6 +31,8 @@ struct xe_devcoredump_snapshot { struct xe_guc_ct_snapshot *ct; /** @ge: Guc Engine snapshot */ struct xe_guc_submit_engine_snapshot *ge; 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Let's limit the config to the top level functions and leave the clean-up work for the compilers so we don't create a spider-web of configs. No functional change. Just a preparation for the devcoredump. Signed-off-by: Rodrigo Vivi Reviewed-by: Matthew Brost --- drivers/gpu/drm/xe/xe_vm.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c index bdf82d34eb66..4cffdb84680a 100644 --- a/drivers/gpu/drm/xe/xe_vm.c +++ b/drivers/gpu/drm/xe/xe_vm.c @@ -3369,7 +3369,6 @@ int xe_vm_invalidate_vma(struct xe_vma *vma) return 0; } -#if IS_ENABLED(CONFIG_DRM_XE_SIMPLE_ERROR_CAPTURE) int xe_analyze_vm(struct drm_printer *p, struct xe_vm *vm, int gt_id) { struct rb_node *node; @@ -3405,9 +3404,3 @@ int xe_analyze_vm(struct drm_printer *p, struct xe_vm *vm, int gt_id) return 0; } -#else -int xe_analyze_vm(struct drm_printer *p, struct xe_vm *vm, int gt_id) -{ - return 0; -} -#endif From patchwork Wed Apr 26 20:57:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rodrigo Vivi X-Patchwork-Id: 13224949 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 27A0BC7618E for ; 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Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/xe/xe_guc_submit.c | 2 +- drivers/gpu/drm/xe/xe_vm.c | 137 +++++++++++++++++++++++++---- drivers/gpu/drm/xe/xe_vm.h | 6 +- drivers/gpu/drm/xe/xe_vm_types.h | 18 ++++ 4 files changed, 143 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c index 74659d0a69b3..ac98bc1843e8 100644 --- a/drivers/gpu/drm/xe/xe_guc_submit.c +++ b/drivers/gpu/drm/xe/xe_guc_submit.c @@ -753,7 +753,7 @@ static void simple_error_capture(struct xe_engine *e) continue; xe_hw_engine_print(hwe, &p); } - xe_analyze_vm(&p, e->vm, e->gt->info.id); + xe_vm_print(&p, e->vm, e->gt->info.id); xe_force_wake_put(gt_to_fw(guc_to_gt(guc)), XE_FORCEWAKE_ALL); dma_fence_end_signalling(cookie); } diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c index 4cffdb84680a..075640dbdff0 100644 --- a/drivers/gpu/drm/xe/xe_vm.c +++ b/drivers/gpu/drm/xe/xe_vm.c @@ -3369,38 +3369,139 @@ int xe_vm_invalidate_vma(struct xe_vma *vma) return 0; } -int xe_analyze_vm(struct drm_printer *p, struct xe_vm *vm, int gt_id) +/** + * xe_vm_snapshot_capture - Take a quick snapshot of the HW Engine. + * @vm: Xe VM + * @gt_id: GT id number + * + * This can be printed out in a later stage like during dev_coredump + * analysis. + * + * Returns: a Xe VM snapshot object that must be freed by the + * caller, using `xe_vm_snapshot_free`. + */ +struct xe_vm_snapshot *xe_vm_snapshot_capture(struct xe_vm *vm, int gt_id) { + struct xe_vm_snapshot *snapshot; struct rb_node *node; - bool is_vram; - uint64_t addr; + int i = 0; + + snapshot = kzalloc(sizeof(struct xe_vm_snapshot), GFP_ATOMIC); + + if (!down_read_trylock(&vm->lock)) + return snapshot; + + snapshot->acquired = true; + + for (node = rb_first(&vm->vmas); node; node = rb_next(node)) + snapshot->num_nodes++; + + snapshot->vm_nodes = kmalloc_array(snapshot->num_nodes, + sizeof(struct vm_node_snapshot), + GFP_ATOMIC); - if (!down_read_trylock(&vm->lock)) { - drm_printf(p, " Failed to acquire VM lock to dump capture"); - return 0; - } if (vm->pt_root[gt_id]) { - addr = xe_bo_addr(vm->pt_root[gt_id]->bo, 0, GEN8_PAGE_SIZE, &is_vram); - drm_printf(p, " VM root: A:0x%llx %s\n", addr, is_vram ? "VRAM" : "SYS"); + snapshot->vm_root = kzalloc(sizeof(struct vm_node_snapshot), + GFP_ATOMIC); + snapshot->vm_root->addr = xe_bo_addr(vm->pt_root[gt_id]->bo, 0, + GEN8_PAGE_SIZE, + &snapshot->vm_root->is_vram); } for (node = rb_first(&vm->vmas); node; node = rb_next(node)) { struct xe_vma *vma = to_xe_vma(node); - bool is_userptr = xe_vma_is_userptr(vma); + snapshot->vm_nodes[i].is_userptr = xe_vma_is_userptr(vma); - if (is_userptr) { + if (snapshot->vm_nodes[i].is_userptr) { struct xe_res_cursor cur; - xe_res_first_sg(vma->userptr.sg, 0, GEN8_PAGE_SIZE, &cur); - addr = xe_res_dma(&cur); + xe_res_first_sg(vma->userptr.sg, 0, GEN8_PAGE_SIZE, + &cur); + snapshot->vm_nodes[i].addr = xe_res_dma(&cur); } else { - addr = xe_bo_addr(vma->bo, 0, GEN8_PAGE_SIZE, &is_vram); + snapshot->vm_nodes[i].addr = xe_bo_addr(vma->bo, 0, + GEN8_PAGE_SIZE, + &snapshot->vm_nodes[i].is_vram); } - drm_printf(p, " [%016llx-%016llx] S:0x%016llx A:%016llx %s\n", - vma->start, vma->end, vma->end - vma->start + 1ull, - addr, is_userptr ? "USR" : is_vram ? "VRAM" : "SYS"); + snapshot->vm_nodes[i].vma.start = vma->start; + snapshot->vm_nodes[i].vma.end = vma->end; + i++; } up_read(&vm->lock); - return 0; + return snapshot; +} + +/** + * xe_vm_snapshot_print - Print out a given Xe HW Engine snapshot. + * @snapshot: Xe VM snapshot object. + * @p: drm_printer where it will be printed out. + * + * This function prints out a given Xe HW Engine snapshot object. + */ +void xe_vm_snapshot_print(struct xe_vm_snapshot *snapshot, + struct drm_printer *p) +{ + int i; + + if (!snapshot) + return; + + if (!snapshot->acquired) { + drm_printf(p, " Failed to acquire VM lock to dump capture"); + return; + } + + if (snapshot->vm_root) { + drm_printf(p, " VM root: A:0x%llx %s\n", + snapshot->vm_root->addr, + snapshot->vm_root->is_vram ? "VRAM" : "SYS"); + } + + for (i = 0; snapshot->vm_nodes && i < snapshot->num_nodes; i++) + drm_printf(p, " [%016llx-%016llx] S:0x%016llx A:%016llx %s\n", + snapshot->vm_nodes[i].vma.start, + snapshot->vm_nodes[i].vma.end, + snapshot->vm_nodes[i].vma.end - + snapshot->vm_nodes[i].vma.start + 1ull, + snapshot->vm_nodes[i].addr, + snapshot->vm_nodes[i].is_userptr ? + "USR" : snapshot->vm_nodes[i].is_vram ? + "VRAM" : "SYS"); +} + +/** + * xe_vm_snapshot_free - Free all allocated objects for a given snapshot. + * @snapshot: Xe VM snapshot object. + * + * This function free all the memory that needed to be allocated at capture + * time. + */ +void xe_vm_snapshot_free(struct xe_vm_snapshot *snapshot) +{ + if (!snapshot) + return; + + if (snapshot->vm_root) + kfree(snapshot->vm_root); + if (snapshot->vm_nodes) + kfree(snapshot->vm_nodes); + kfree(snapshot); +} + +/** + * xe_vm_print - Xe VM Print. + * @p: drm_printer + * @vm: Xe VM + * @gt_id: GT id number + * + * This function quickly capture a snapshot and immediately print it out. + */ +void xe_vm_print(struct drm_printer *p, struct xe_vm *vm, int gt_id) +{ + struct xe_vm_snapshot *snapshot; + + snapshot = xe_vm_snapshot_capture(vm, gt_id); + xe_vm_snapshot_print(snapshot, p); + xe_vm_snapshot_free(snapshot); } diff --git a/drivers/gpu/drm/xe/xe_vm.h b/drivers/gpu/drm/xe/xe_vm.h index 748dc16ebed9..924884b36469 100644 --- a/drivers/gpu/drm/xe/xe_vm.h +++ b/drivers/gpu/drm/xe/xe_vm.h @@ -145,7 +145,11 @@ void xe_vm_unlock_dma_resv(struct xe_vm *vm, void xe_vm_fence_all_extobjs(struct xe_vm *vm, struct dma_fence *fence, enum dma_resv_usage usage); -int xe_analyze_vm(struct drm_printer *p, struct xe_vm *vm, int gt_id); +struct xe_vm_snapshot *xe_vm_snapshot_capture(struct xe_vm *vm, int gt_id); +void xe_vm_snapshot_print(struct xe_vm_snapshot *snapshot, + struct drm_printer *p); +void xe_vm_snapshot_free(struct xe_vm_snapshot *snapshot); +void xe_vm_print(struct drm_printer *p, struct xe_vm *vm, int gt_id); #if IS_ENABLED(CONFIG_DRM_XE_DEBUG_VM) #define vm_dbg drm_dbg diff --git a/drivers/gpu/drm/xe/xe_vm_types.h b/drivers/gpu/drm/xe/xe_vm_types.h index fada7896867f..18e79b6a2182 100644 --- a/drivers/gpu/drm/xe/xe_vm_types.h +++ b/drivers/gpu/drm/xe/xe_vm_types.h @@ -149,6 +149,24 @@ struct xe_vma { } extobj; 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Wed, 26 Apr 2023 20:58:11 +0000 From: Rodrigo Vivi To: Subject: [PATCH 14/14] drm/xe: Add VM snapshot to xe_devcoredump. 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The only difference is that xe_devcoredump will only stash the 'first' hang, which is the one that we care most and should analyze first, while simple_error_capture will dump them all the kernel log. But this is just a start point to start building a useful and organized crash dump, using standard infrastructure. Later this will be changed to have output that can be parsed by tools and used for error replay. Also, it is important to highlight that the goal is not to replace the simple_error_capture which is still useful for some cases. But simple_error_capture should be protected under DEBUG and EXPERT flags, while the devcoredump has its own production config and will be useful for bug reporting and for error replay. Signed-off-by: Rodrigo Vivi Reviewed-by: Matthew Brost --- drivers/gpu/drm/xe/xe_devcoredump.c | 6 ++++++ drivers/gpu/drm/xe/xe_devcoredump_types.h | 3 +++ 2 files changed, 9 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c index 1ffd12646a99..9dbafd586fbd 100644 --- a/drivers/gpu/drm/xe/xe_devcoredump.c +++ b/drivers/gpu/drm/xe/xe_devcoredump.c @@ -16,6 +16,7 @@ #include "xe_guc_ct.h" #include "xe_guc_submit.h" #include "xe_hw_engine.h" +#include "xe_vm.h" /** * DOC: Xe device coredump @@ -103,6 +104,9 @@ static ssize_t xe_devcoredump_read(char *buffer, loff_t offset, for_each_hw_engine(hwe, e->gt, id) xe_hw_engine_snapshot_print(coredump->snapshot.hwe[id], &p); + drm_printf(&p, "\n**** VM ****\n"); + xe_vm_snapshot_print(coredump->snapshot.vm, &p); + mutex_unlock(&coredump->lock); return count - iter.remain; @@ -124,6 +128,7 @@ static void xe_devcoredump_free(void *data) xe_guc_engine_snapshot_free(coredump->snapshot.ge); for_each_hw_engine(hwe, coredump->faulty_engine->gt, id) xe_hw_engine_snapshot_free(coredump->snapshot.hwe[id]); + xe_vm_snapshot_free(coredump->snapshot.vm); coredump->faulty_engine = NULL; drm_info(&coredump_to_xe(coredump)->drm, @@ -172,6 +177,7 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump) coredump->snapshot.hwe[id] = xe_hw_engine_snapshot_capture(hwe); } + coredump->snapshot.vm = xe_vm_snapshot_capture(e->vm, e->gt->info.id); xe_force_wake_put(gt_to_fw(e->gt), XE_FORCEWAKE_ALL); dma_fence_end_signalling(cookie); } diff --git a/drivers/gpu/drm/xe/xe_devcoredump_types.h b/drivers/gpu/drm/xe/xe_devcoredump_types.h index 8b17ecf1b6e6..f508eca292f7 100644 --- a/drivers/gpu/drm/xe/xe_devcoredump_types.h +++ b/drivers/gpu/drm/xe/xe_devcoredump_types.h @@ -31,8 +31,11 @@ struct xe_devcoredump_snapshot { struct xe_guc_ct_snapshot *ct; /** @ge: Guc Engine snapshot */ struct xe_guc_submit_engine_snapshot *ge; + /** @hwe: HW Engine snapshot array */ struct xe_hw_engine_snapshot *hwe[XE_NUM_HW_ENGINES]; + /** @vm: VM snapshot */ + struct xe_vm_snapshot *vm; }; /**